[PATCH] zfs: fix missing include for disk_partition definition
Commit 0528979fa7ab ("part: Drop disk_partition_t typedef") changed to
a struct. As a result it uncovered an apparent missing include in
zfs_common.h for part.h which actually contains the definition. The ZFS
handles the struct exclusively as pointers so it was only a warning.
warning: ‘struct disk_partition’ declared inside parameter list
will not be visible outside of this definition or declaration
void zfs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info);
Signed-off-by: Joel Johnson
Series-CC: Simon Glass
---
include/zfs_common.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/zfs_common.h b/include/zfs_common.h
index 027ba91b28..cb83e59e83 100644
--- a/include/zfs_common.h
+++ b/include/zfs_common.h
@@ -22,6 +22,8 @@
#ifndef __ZFS_COMMON__
#define __ZFS_COMMON__
+#include
+
#define SECTOR_SIZE0x200
#define SECTOR_BITS9
--
2.26.2
Re: U-Boot atheros PHY support and cubox ethernet
Hi Tom, On Thu, Jun 18, 2020 at 10:39 AM Tom Rini wrote: > It's a good question what else doesn't work. What has been actively > verified at this point? After the fixes I sent yesterday, the few imx boards I have access at the moment have Ethernet working well.
Re: [PATCH v3 4/4] arm: Remove netspace_v2 board
On Thu, Jun 18, 2020 at 11:15:16PM +0530, Jagan Teki wrote: > This board has not been converted to CONFIG_DM by the deadline. I am working at converting this board too, along with net2big_v2. Simon > > Remove it. > > Patch-cc: Simon Guinot > Signed-off-by: Jagan Teki > --- > Changes for v3: > - new patch > > arch/arm/mach-kirkwood/Kconfig| 4 - > board/LaCie/netspace_v2/Kconfig | 12 -- > board/LaCie/netspace_v2/MAINTAINERS | 14 -- > board/LaCie/netspace_v2/Makefile | 10 -- > board/LaCie/netspace_v2/kwbimage-is2.cfg | 149 -- > board/LaCie/netspace_v2/kwbimage-ns2l.cfg | 149 -- > board/LaCie/netspace_v2/kwbimage.cfg | 149 -- > board/LaCie/netspace_v2/netspace_v2.c | 120 - > board/LaCie/netspace_v2/netspace_v2.h | 22 > configs/inetspace_v2_defconfig| 53 > configs/netspace_lite_v2_defconfig| 53 > configs/netspace_max_v2_defconfig | 53 > configs/netspace_mini_v2_defconfig| 48 --- > configs/netspace_v2_defconfig | 53 > 14 files changed, 889 deletions(-) > delete mode 100644 board/LaCie/netspace_v2/Kconfig > delete mode 100644 board/LaCie/netspace_v2/MAINTAINERS > delete mode 100644 board/LaCie/netspace_v2/Makefile > delete mode 100644 board/LaCie/netspace_v2/kwbimage-is2.cfg > delete mode 100644 board/LaCie/netspace_v2/kwbimage-ns2l.cfg > delete mode 100644 board/LaCie/netspace_v2/kwbimage.cfg > delete mode 100644 board/LaCie/netspace_v2/netspace_v2.c > delete mode 100644 board/LaCie/netspace_v2/netspace_v2.h > delete mode 100644 configs/inetspace_v2_defconfig > delete mode 100644 configs/netspace_lite_v2_defconfig > delete mode 100644 configs/netspace_max_v2_defconfig > delete mode 100644 configs/netspace_mini_v2_defconfig > delete mode 100644 configs/netspace_v2_defconfig > > diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig > index ad6aef45bf..899c079773 100644 > --- a/arch/arm/mach-kirkwood/Kconfig > +++ b/arch/arm/mach-kirkwood/Kconfig > @@ -35,9 +35,6 @@ config TARGET_KM_KIRKWOOD > bool "KM Kirkwood Board" > select VENDOR_KM > > -config TARGET_NETSPACE_V2 > - bool "LaCie netspace_v2 Board" > - > config TARGET_IB62X0 > bool "ib62x0 Board" > > @@ -77,7 +74,6 @@ source "board/cloudengines/pogo_e02/Kconfig" > source "board/d-link/dns325/Kconfig" > source "board/iomega/iconnect/Kconfig" > source "board/keymile/Kconfig" > -source "board/LaCie/netspace_v2/Kconfig" > source "board/raidsonic/ib62x0/Kconfig" > source "board/Seagate/dockstar/Kconfig" > source "board/Seagate/goflexhome/Kconfig" > diff --git a/board/LaCie/netspace_v2/Kconfig b/board/LaCie/netspace_v2/Kconfig > deleted file mode 100644 > index 930b822dfb..00 > --- a/board/LaCie/netspace_v2/Kconfig > +++ /dev/null > @@ -1,12 +0,0 @@ > -if TARGET_NETSPACE_V2 > - > -config SYS_BOARD > - default "netspace_v2" > - > -config SYS_VENDOR > - default "LaCie" > - > -config SYS_CONFIG_NAME > - default "lacie_kw" > - > -endif > diff --git a/board/LaCie/netspace_v2/MAINTAINERS > b/board/LaCie/netspace_v2/MAINTAINERS > deleted file mode 100644 > index 55fd50d4eb..00 > --- a/board/LaCie/netspace_v2/MAINTAINERS > +++ /dev/null > @@ -1,14 +0,0 @@ > -NETSPACE_V2 BOARD > -M: Simon Guinot > -S: Maintained > -F: board/LaCie/netspace_v2/ > -F: include/configs/lacie_kw.h > -F: configs/inetspace_v2_defconfig > -F: configs/netspace_max_v2_defconfig > -F: configs/netspace_v2_defconfig > - > -NETSPACE_LITE_V2 BOARD > -#M: - > -S: Maintained > -F: configs/netspace_lite_v2_defconfig > -F: configs/netspace_mini_v2_defconfig > diff --git a/board/LaCie/netspace_v2/Makefile > b/board/LaCie/netspace_v2/Makefile > deleted file mode 100644 > index a6270bdd4b..00 > --- a/board/LaCie/netspace_v2/Makefile > +++ /dev/null > @@ -1,10 +0,0 @@ > -# SPDX-License-Identifier: GPL-2.0+ > -# > -# Copyright (C) 2011 Simon Guinot > -# > -# Based on Kirkwood support: > -# (C) Copyright 2009 > -# Marvell Semiconductor > -# Written-by: Prafulla Wadaskar > - > -obj-y:= netspace_v2.o ../common/common.o > diff --git a/board/LaCie/netspace_v2/kwbimage-is2.cfg > b/board/LaCie/netspace_v2/kwbimage-is2.cfg > deleted file mode 100644 > index 50f584ae70..00 > --- a/board/LaCie/netspace_v2/kwbimage-is2.cfg > +++ /dev/null > @@ -1,149 +0,0 @@ > -# SPDX-License-Identifier: GPL-2.0+ > -# > -# Copyright (C) 2011 Simon Guinot > -# > -# Based on Kirkwood support: > -# (C) Copyright 2009 > -# Marvell Semiconductor > -# Written-by: Prafulla Wadaskar > -# Refer doc/README.kwbimage for more details about how-to configure > -# and create kirkwood boot image > -# > - > -# Boot Media configurations > -BOOT_FROMspi # Boot from SPI flash > - > -# SOC registers configuration using bootrom header extension > -# Maximum
Re: [PATCH v3 2/4] arm: Remove d2net_v2 board
On Sat, Jun 20, 2020 at 02:24:47AM +0200, Simon Guinot wrote: > On Thu, Jun 18, 2020 at 06:25:06PM -0400, Tom Rini wrote: > > On Fri, Jun 19, 2020 at 12:02:17AM +0200, Simon Guinot wrote: > > > On Thu, Jun 18, 2020 at 11:15:14PM +0530, Jagan Teki wrote: > > > Hi Jagan, > > > > > > > This board has not been converted to CONFIG_DM by the deadline. > > > > > > Is that possible to negociate a new deadline ? > > > > Well, when will you be able to spend some time bringing the platform up > > to current standards? Doing a quick build for net2big_v2 I see: > > +(net2big_v2) = WARNING == > > +(net2big_v2) This board does not use CONFIG_DM. CONFIG_DM will be > > +(net2big_v2) compulsory starting with the v2020.01 release. > > +(net2big_v2) Failure to update may result in board removal. > > +(net2big_v2) See doc/driver-model/migration.rst for more info. > > +(net2big_v2) > > +(net2big_v2) This board does not use CONFIG_DM_USB. Please update > > +(net2big_v2) the board to use CONFIG_DM_USB before the v2019.07 release. > > +(net2big_v2) Failure to update by the deadline may result in board removal. > > +(net2big_v2) This board does use CONFIG_MVSATA_IDE which is not > > +(net2big_v2) ported to driver-model (DM) yet. Please update the storage > > +(net2big_v2) controller driver to use CONFIG_AHCI before the v2019.07 > > +(net2big_v2) release. > > +(net2big_v2) This board does not use CONFIG_DM_SPI_FLASH. Please update > > +(net2big_v2) the board to use CONFIG_SPI_FLASH before the v2019.07 release. > > +(net2big_v2) This board does not use CONFIG_DM_ETH (Driver Model > > +(net2big_v2) for Ethernet drivers). Please update the board to use > > +(net2big_v2) CONFIG_DM_ETH before the v2020.07 release. Failure to > > +(net2big_v2) update by the deadline may result in board removal. > > > > So there's a lot of stuff that needs updating. Conversion to CONFIG_DM > > is what you'll need to then convert SPI, ETH and USB to use DM and the > > IDE driver also needs attention and conversion. Thanks! > > Hi Tom, > > I am working on it. But so far it is not going very well and the whole > thing is turning into a debug session. > > But I'll do my best and whatever the result will be, I'll send you an > update by the end of the next week. > > Is this acceptable to you ? Yes, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 2/4] arm: Remove d2net_v2 board
On Thu, Jun 18, 2020 at 06:25:06PM -0400, Tom Rini wrote: > On Fri, Jun 19, 2020 at 12:02:17AM +0200, Simon Guinot wrote: > > On Thu, Jun 18, 2020 at 11:15:14PM +0530, Jagan Teki wrote: > > Hi Jagan, > > > > > This board has not been converted to CONFIG_DM by the deadline. > > > > Is that possible to negociate a new deadline ? > > Well, when will you be able to spend some time bringing the platform up > to current standards? Doing a quick build for net2big_v2 I see: > +(net2big_v2) = WARNING == > +(net2big_v2) This board does not use CONFIG_DM. CONFIG_DM will be > +(net2big_v2) compulsory starting with the v2020.01 release. > +(net2big_v2) Failure to update may result in board removal. > +(net2big_v2) See doc/driver-model/migration.rst for more info. > +(net2big_v2) > +(net2big_v2) This board does not use CONFIG_DM_USB. Please update > +(net2big_v2) the board to use CONFIG_DM_USB before the v2019.07 release. > +(net2big_v2) Failure to update by the deadline may result in board removal. > +(net2big_v2) This board does use CONFIG_MVSATA_IDE which is not > +(net2big_v2) ported to driver-model (DM) yet. Please update the storage > +(net2big_v2) controller driver to use CONFIG_AHCI before the v2019.07 > +(net2big_v2) release. > +(net2big_v2) This board does not use CONFIG_DM_SPI_FLASH. Please update > +(net2big_v2) the board to use CONFIG_SPI_FLASH before the v2019.07 release. > +(net2big_v2) This board does not use CONFIG_DM_ETH (Driver Model > +(net2big_v2) for Ethernet drivers). Please update the board to use > +(net2big_v2) CONFIG_DM_ETH before the v2020.07 release. Failure to > +(net2big_v2) update by the deadline may result in board removal. > > So there's a lot of stuff that needs updating. Conversion to CONFIG_DM > is what you'll need to then convert SPI, ETH and USB to use DM and the > IDE driver also needs attention and conversion. Thanks! Hi Tom, I am working on it. But so far it is not going very well and the whole thing is turning into a debug session. But I'll do my best and whatever the result will be, I'll send you an update by the end of the next week. Is this acceptable to you ? Thanks. Simon signature.asc Description: PGP signature
[PATCH] env/fat.c: allow loading from a FAT partition on the MMC boot device
I don't want to have to specify the device; only the partition.
This allows me to use the same image on internal eMMC or SD card for
Banana Pi R2, and it finds its own environment either way.
Signed-off-by: David Woodhouse
---
env/Kconfig | 4
env/fat.c | 29 +++--
2 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/env/Kconfig b/env/Kconfig
index 38e7fadbb9..5784136674 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -434,6 +434,10 @@ config ENV_FAT_DEVICE_AND_PART
If none, first valid partition in device D. If no
partition table then means device D.
+ If ENV_FAT_INTERFACE is set to "mmc" then device 'D' can be omitted,
+ leaving the string starting with a colon, and the boot device will
+ be used.
+
config ENV_FAT_FILE
string "Name of the FAT file to use for the environment"
depends on ENV_IS_IN_FAT
diff --git a/env/fat.c b/env/fat.c
index 35a1955e63..37c15d16cd 100644
--- a/env/fat.c
+++ b/env/fat.c
@@ -29,6 +29,31 @@
# define LOADENV
#endif
+__weak int mmc_get_env_dev(void)
+{
+return CONFIG_SYS_MMC_ENV_DEV;
+}
+
+static char *env_fat_device_and_part(void)
+{
+#ifdef CONFIG_MMC
+ static char *part_str;
+
+ if (!part_str) {
+ part_str = CONFIG_ENV_FAT_DEVICE_AND_PART;
+ if (!strcmp(CONFIG_ENV_FAT_INTERFACE, "mmc")
+ && part_str[0] == ':') {
+ part_str = "0" CONFIG_ENV_FAT_DEVICE_AND_PART;
+ part_str[0] += mmc_get_env_dev();
+ }
+ }
+
+ return part_str;
+#else
+ return CONFIG_ENV_FAT_DEVICE_AND_PART;
+#endif
+}
+
static int env_fat_save(void)
{
env_t __aligned(ARCH_DMA_MINALIGN) env_new;
@@ -43,7 +68,7 @@ static int env_fat_save(void)
return err;
part = blk_get_device_part_str(CONFIG_ENV_FAT_INTERFACE,
- CONFIG_ENV_FAT_DEVICE_AND_PART,
+ env_fat_device_and_part(),
_desc, , 1);
if (part < 0)
return 1;
@@ -89,7 +114,7 @@ static int env_fat_load(void)
#endif
part = blk_get_device_part_str(CONFIG_ENV_FAT_INTERFACE,
- CONFIG_ENV_FAT_DEVICE_AND_PART,
+ env_fat_device_and_part(),
_desc, , 1);
if (part < 0)
goto err_env_relocate;
--
2.26.2
smime.p7s
Description: S/MIME cryptographic signature
Re: [RFC 0/4] drivers: footprint reduction proposal
On Fri, Jun 19, 2020 at 06:11:36PM -0300, Walter Lozano wrote: > Based on several reports and discussions it is clear that U-Boot's > footprint is always a concern, and any kind of reduction is an > improvement. > > This series is a proposal to help reducing the footprint by parsing > information provided in DT and drivers in different ways and adding > additional intelligence to dtoc. The current version implements the basic > functionality in dtoc but this is no fully integrated, however it will allow > us to discuss this approach. > > Firstly, based on the compatible strings found in drivers, include only DT > nodes > which are supported by any driver present in U-Boot. > > Secondly, generate struct udevice_id entries only for nodes present in DT, > which will allow to avoid including additional data. > > These are the first steps for further improvements as proposed in the specific > patches in this series. > > This work is based on the work of Simon Glass present in [1] which adds > support to dtoc for parsing compatible strings. > > [1] https://gitlab.denx.de/u-boot/custodians/u-boot-dm/-/tree/dtoc-working I applied this series on top of the above tree, but there's no rule for so is something missing? Thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] RFC: dtoc: add POC for dtb shrink
On 12/6/20 15:44, Walter Lozano wrote:
Based on several reports and discussions [1], [2] it is clear that U-Boot's
footprint is always a concern, and any kind of reduction is an
improvement.
In particular dtb is one of the sources of footprint increment, as
U-Boot uses the same dtb as Linux. However is interesting to note that
U-Boot does not require all the nodes and properties declared in it.
Some improvements in this sense are already present, such as
removing properties based on configuration and using specific "u-boot"
properties to keep only specific node in SPL. However, this require
manual configuration.
Additionally reducing dtb, will allow ATF for better handing FDT buffer, which
is an issue in some contexts [3].
In order to improve this situation, this patch adds a proof of concept
for dtb shrink. The idea behind this is simple, remove all the nodes
from dtb which compatible string is not supported by any driver present.
This approach makes sense for those configuration where Linux is
expected to have its own dtb.
This patch is based on the work of Simon Glass present in [4] which adds
support to dtoc for parsing compatible strings.
Some early untested results shows that the reduction in size is 50 % in
case of mx6_cuboxi_defconfig, which is promising.
Some additional reduction could be possible by only keeping the nodes for
whose compatible string is supported by any enabled driver. However,
this requires to add extra logic to parse config files and map
configuration to compatible strings.
This proof of concept uses fdtgrep to implement the node removal, but
the idea is to implement this logic inside the dtoc for better handling.
[1]
http://patchwork.ozlabs.org/project/uboot/patch/20200525093539.1.Ibf2d19439cde35e39192a9d4a8dad23539fae2e6@changeid/
[2]
http://u-boot.10912.n7.nabble.com/PATCH-v1-00-15-add-basic-driver-support-for-broadcom-NS3-soc-tt412411.html#none
[3] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4512
[4] https://gitlab.denx.de/u-boot/custodians/u-boot-dm/-/tree/dtoc-working
Signed-off-by: Walter Lozano
---
tools/dtoc/dtb_platdata.py | 37 ++---
1 file changed, 34 insertions(+), 3 deletions(-)
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 21cce5afb5..adffcc6d07 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -399,7 +399,10 @@ class DtbPlatdata(object):
"""Scan the driver folders to build a list of driver names and
possible
aliases
"""
-for (dirpath, dirnames, filenames) in os.walk('/home/sglass/u'):
+basedir = sys.argv[0].replace('tools/dtoc/dtoc', '')
+if basedir == '':
+basedir = './'
+for (dirpath, dirnames, filenames) in os.walk(basedir):
for fn in filenames:
if not fn.endswith('.c'):
continue
@@ -802,6 +805,27 @@ class DtbPlatdata(object):
self.out(''.join(self.get_buf()))
self.close_output()
+def shrink(self):
+compat = []
+cmd = './tools/fdtgrep '
+#print(self._drivers)
+for dr in self._drivers.values():
+compat = compat + dr.compat
+
+for cp in compat:
+#print(cp)
+cmd += ' -c ' + cp
+
+cmd += ' -O dtb -o ' + self._dtb_fname.replace('.dtb', '') +
'-shrink.dtb ' + self._dtb_fname
+
+if False:
+with open('dt_shrink.sh', 'w+') as script:
+script.write(cmd)
+
+os.system(cmd)
+
+return
+
def run_steps(args, dtb_file, config_file, include_disabled, output):
"""Run all the steps of the dtoc tool
@@ -816,6 +840,10 @@ def run_steps(args, dtb_file, config_file, include_disabled, output):
if not args:
raise ValueError('Please specify a command: struct, platdata')
+skip_scan = False
+if args == ['shrink']:
+skip_scan = True
+
plat = DtbPlatdata(dtb_file, config_file, include_disabled)
plat.scan_drivers()
plat.scan_dtb()
@@ -823,14 +851,17 @@ def run_steps(args, dtb_file, config_file,
include_disabled, output):
plat.scan_config()
plat.scan_reg_sizes()
plat.setup_output(output)
-structs = plat.scan_structs()
-plat.scan_phandles()
+if not skip_scan:
+structs = plat.scan_structs()
+plat.scan_phandles()
for cmd in args[0].split(','):
if cmd == 'struct':
plat.generate_structs(structs)
elif cmd == 'platdata':
plat.generate_tables()
+elif cmd == 'shrink':
+plat.shrink()
else:
raise ValueError("Unknown command '%s': (use: struct, platdata)" %
cmd)
This patch has been superseded by a new version with additional
features, which can be found in
https://patchwork.ozlabs.org/project/uboot/list/?series=184682
Regards,
Walter
[RFC 4/4] mmc: fsl_esdhc_imx: make use of dtoc to generate struct udevice_id
As an example of use, convert fsl_esdhc_imx to use COMPATIBLE entries
for declaring compatible strings.
As a result of these entries dtoc will generate code similar to
Signed-off-by: Walter Lozano
---
drivers/mmc/fsl_esdhc_imx.c | 58 ++---
1 file changed, 41 insertions(+), 17 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 588d6a9d76..16448a9ebe 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -33,6 +33,7 @@
#include
#include
#include
+#include
#if !CONFIG_IS_ENABLED(BLK)
#include "mmc_private.h"
@@ -1613,22 +1614,45 @@ static struct esdhc_soc_data usdhc_imx8qm_data = {
ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES,
};
-static const struct udevice_id fsl_esdhc_ids[] = {
- { .compatible = "fsl,imx53-esdhc", },
- { .compatible = "fsl,imx6ul-usdhc", },
- { .compatible = "fsl,imx6sx-usdhc", },
- { .compatible = "fsl,imx6sl-usdhc", },
- { .compatible = "fsl,imx6q-usdhc", },
- { .compatible = "fsl,imx7d-usdhc", .data = (ulong)_imx7d_data,},
- { .compatible = "fsl,imx7ulp-usdhc", },
- { .compatible = "fsl,imx8qm-usdhc", .data = (ulong)_imx8qm_data,},
- { .compatible = "fsl,imx8mm-usdhc", .data = (ulong)_imx8qm_data,},
- { .compatible = "fsl,imx8mn-usdhc", .data = (ulong)_imx8qm_data,},
- { .compatible = "fsl,imx8mq-usdhc", .data = (ulong)_imx8qm_data,},
- { .compatible = "fsl,imxrt-usdhc", },
- { .compatible = "fsl,esdhc", },
- { /* sentinel */ }
-};
+#if 0
+// As result of the COMPATIBLE entries, dtoc will produce
+// code similar to this
+
+#define COMPATIBLE(__driver_name, compatible, ...)
+
+#define COMPATIBLE_LIST_FSL_ESDHC { \
+{.compatible = "fsl,imx53-esdhc"},\
+{.compatible = "fsl,imx6ul-usdhc"},\
+{.compatible = "fsl,imx6sx-usdhc"},\
+{.compatible = "fsl,imx6sl-usdhc"},\
+{.compatible = "fsl,imx6q-usdhc"},\
+{.compatible = "fsl,imx7ulp-usdhc"},\
+{.compatible = "fsl,imxrt-usdhc"},\
+{.compatible = "fsl,esdhc"},\
+{ /* sentinel */ },\
+}
+#define COMPATIBLE_LIST_FSL_ESDHC2 { \
+{.compatible = "fsl,imxrt-usdhc2"},\
+{.compatible = "fsl,esdhc2"},\
+{ /* sentinel */ },\
+}
+#endif
+
+COMPATIBLE(FSL_ESDHC, "fsl,imx53-esdhc")
+COMPATIBLE(FSL_ESDHC, "fsl,imx6ul-usdhc")
+COMPATIBLE(FSL_ESDHC, "fsl,imx6sx-usdhc")
+COMPATIBLE(FSL_ESDHC, "fsl,imx6sl-usdhc")
+COMPATIBLE(FSL_ESDHC, "fsl,imx6q-usdhc")
+COMPATIBLE(FSL_ESDHC, "fsl,imx7d-usdhc", (ulong)_imx7d_data)
+COMPATIBLE(FSL_ESDHC, "fsl,imx7ulp-usdhc")
+COMPATIBLE(FSL_ESDHC, "fsl,imx8qm-usdhc", _imx8qm_data)
+COMPATIBLE(FSL_ESDHC, "fsl,imx8mm-usdhc", _imx8qm_data)
+COMPATIBLE(FSL_ESDHC, "fsl,imx8mn-usdhc", _imx8qm_data)
+COMPATIBLE(FSL_ESDHC, "fsl,imx8mq-usdhc", _imx8qm_data)
+COMPATIBLE(FSL_ESDHC, "fsl,imxrt-usdhc")
+COMPATIBLE(FSL_ESDHC, "fsl,esdhc")
+
+static const struct udevice_id fsl_esdhc_ids[] = COMPATIBLE_LIST_FSL_ESDHC;
#if CONFIG_IS_ENABLED(BLK)
static int fsl_esdhc_bind(struct udevice *dev)
@@ -1640,7 +1664,7 @@ static int fsl_esdhc_bind(struct udevice *dev)
#endif
U_BOOT_DRIVER(fsl_esdhc) = {
- .name = "fsl-esdhc-mmc",
+ .name = "fsl_esdhc",
.id = UCLASS_MMC,
.of_match = fsl_esdhc_ids,
.ops= _esdhc_ops,
--
2.20.1
[RFC 2/4] dtoc: add initial support for deleting DTB nodes
This patch introduce a test for deleting DTB nodes using Python library.
Signed-off-by: Walter Lozano
---
tools/dtoc/dtb_platdata.py | 28
tools/dtoc/fdt.py | 3 +++
2 files changed, 31 insertions(+)
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 1df13b2cd2..d3fb4dcbf2 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -831,6 +831,30 @@ class DtbPlatdata(object):
return
+def test_del_node(self):
+"""Test the support of node deletion'
+
+This function tests the support of node removal by deleting a specific
+node name
+"""
+for n in self._fdt.GetRoot().subnodes:
+print('Name', n.name)
+#print('Props', n.props)
+if n.name == 'board-detect':
+n.DelNode()
+#self._fdt.GetRoot().subnodes.remove(n)
+self._fdt.Scan()
+print('')
+for n in self._fdt.GetRoot().subnodes:
+print('Name', n.name)
+#print('Props', n.props)
+if n.name == 'serial':
+self._fdt.GetRoot().subnodes.remove(n)
+
+self._fdt.Pack()
+self._fdt.Flush()
+self._fdt.Sync()
+
def run_steps(args, dtb_file, config_file, include_disabled, output):
"""Run all the steps of the dtoc tool
@@ -848,6 +872,8 @@ def run_steps(args, dtb_file, config_file,
include_disabled, output):
skip_scan = False
if args == ['shrink']:
skip_scan = True
+if args == ['test_del_node']:
+skip_scan = True
plat = DtbPlatdata(dtb_file, config_file, include_disabled)
plat.scan_drivers()
@@ -867,6 +893,8 @@ def run_steps(args, dtb_file, config_file,
include_disabled, output):
plat.generate_tables()
elif cmd == 'shrink':
plat.shrink()
+elif cmd == 'test_del_node':
+plat.test_del_node()
else:
raise ValueError("Unknown command '%s': (use: struct, platdata)" %
cmd)
diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py
index 3d4bc3b2ef..b3b626cd4d 100644
--- a/tools/dtoc/fdt.py
+++ b/tools/dtoc/fdt.py
@@ -502,6 +502,9 @@ class Node:
for prop in prop_list:
prop.Sync(auto_resize)
+def DelNode(self):
+fdt_obj = self._fdt._fdt_obj
+fdt_obj.del_node(self._offset)
class Fdt:
"""Provides simple access to a flat device tree blob using libfdts.
--
2.20.1
[RFC 1/4] dtoc: add POC for dtb shrink
Based on several reports and discussions [1], [2] it is clear that U-Boot's
footprint is always a concern, and any kind of reduction is an
improvement.
In particular dtb is one of the sources of footprint increment, as
U-Boot uses the same dtb as Linux. However is interesting to note that
U-Boot does not require all the nodes and properties declared in it.
Some improvements in this sense are already present, such as
removing properties based on configuration and using specific "u-boot"
properties to keep only specific node in SPL. However, this require
manual configuration.
Additionally reducing dtb, will allow ATF for better handing FDT buffer, which
is an issue in some contexts [3].
In order to improve this situation, this patch adds a proof of concept
for dtb shrink. The idea behind this is simple, remove all the nodes
from dtb which compatible string is not supported by any driver present.
This approach makes sense for those configuration where Linux is
expected to have its own dtb.
This patch is based on the work of Simon Glass present in [4] which adds
support to dtoc for parsing compatible strings.
Some early untested results shows that the reduction in size is 50 % in
case of mx6_cuboxi_defconfig, which is promising.
Some additional reduction could be possible by only keeping the nodes for
whose compatible string is supported by any enabled driver. However,
this requires to add extra logic to parse config files and map
configuration to compatible strings.
This proof of concept uses fdtgrep to implement the node removal, but
the idea is to implement this logic inside the dtoc for better handling.
[1]
http://patchwork.ozlabs.org/project/uboot/patch/20200525093539.1.Ibf2d19439cde35e39192a9d4a8dad23539fae2e6@changeid/
[2]
http://u-boot.10912.n7.nabble.com/PATCH-v1-00-15-add-basic-driver-support-for-broadcom-NS3-soc-tt412411.html#none
[3] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4512
[4] https://gitlab.denx.de/u-boot/custodians/u-boot-dm/-/tree/dtoc-working
Signed-off-by: Walter Lozano
---
tools/dtoc/dtb_platdata.py | 42 +++---
1 file changed, 39 insertions(+), 3 deletions(-)
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 21cce5afb5..1df13b2cd2 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -399,7 +399,10 @@ class DtbPlatdata(object):
"""Scan the driver folders to build a list of driver names and possible
aliases
"""
-for (dirpath, dirnames, filenames) in os.walk('/home/sglass/u'):
+basedir = sys.argv[0].replace('tools/dtoc/dtoc', '')
+if basedir == '':
+basedir = './'
+for (dirpath, dirnames, filenames) in os.walk(basedir):
for fn in filenames:
if not fn.endswith('.c'):
continue
@@ -802,6 +805,32 @@ class DtbPlatdata(object):
self.out(''.join(self.get_buf()))
self.close_output()
+def shrink(self):
+"""Generate a shrunk version of DTB bases on valid drivers
+
+This function removes nodes from dtb which compatible string is not
+found in drivers. The output is saved in a file with suffix name
-shrink.dtb
+"""
+compat = []
+cmd = './tools/fdtgrep '
+#print(self._drivers)
+for dr in self._drivers.values():
+compat = compat + dr.compat
+
+for cp in compat:
+#print(cp)
+cmd += ' -c ' + cp
+
+cmd += ' -O dtb -o ' + self._dtb_fname.replace('.dtb', '') +
'-shrink.dtb ' + self._dtb_fname
+
+if False:
+with open('dt_shrink.sh', 'w+') as script:
+script.write(cmd)
+
+os.system(cmd)
+
+return
+
def run_steps(args, dtb_file, config_file, include_disabled, output):
"""Run all the steps of the dtoc tool
@@ -816,6 +845,10 @@ def run_steps(args, dtb_file, config_file,
include_disabled, output):
if not args:
raise ValueError('Please specify a command: struct, platdata')
+skip_scan = False
+if args == ['shrink']:
+skip_scan = True
+
plat = DtbPlatdata(dtb_file, config_file, include_disabled)
plat.scan_drivers()
plat.scan_dtb()
@@ -823,14 +856,17 @@ def run_steps(args, dtb_file, config_file,
include_disabled, output):
plat.scan_config()
plat.scan_reg_sizes()
plat.setup_output(output)
-structs = plat.scan_structs()
-plat.scan_phandles()
+if not skip_scan:
+structs = plat.scan_structs()
+plat.scan_phandles()
for cmd in args[0].split(','):
if cmd == 'struct':
plat.generate_structs(structs)
elif cmd == 'platdata':
plat.generate_tables()
+elif cmd == 'shrink':
+plat.shrink()
else:
raise ValueError("Unknown command '%s': (use: struct, platdata)" %
cmd)
--
2.20.1
[RFC 3/4] dtoc: add support for generate stuct udevice_id
Based on several reports there is an increasing concern in the impact
of adding additional features to drivers based on compatible strings.
A good example of this situation is found in [1].
In order to reduce this impact and as an initial step for further
reduction, propose a new way to declare compatible strings, which allows
to only include the useful ones.
The idea is to define compatible strings in a way to be easily parsed by
dtoc, which will be responsible to build struct udevice_id [] based on
the compatible strings present in the dtb.
Additional features can be easily added, such as define constants
depending on the presence of compatible strings, which allows to enable
code blocks only in such cases without the need of adding additional
configuration options.
[1]
http://patchwork.ozlabs.org/project/uboot/patch/20200525202429.2146-1-ag...@denx.de/
Signed-off-by: Walter Lozano
---
tools/dtoc/dtb_platdata.py | 32
1 file changed, 32 insertions(+)
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index d3fb4dcbf2..e199caf8c9 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -170,6 +170,9 @@ class DtbPlatdata(object):
key: alias name
value: node path
_tiny_uclasses: List of uclass names that are marked as 'tiny'
+_compatible_strings: Dict of compatible strings read from drivres
+key: driver name
+value: list of struct udevice_id
"""
def __init__(self, dtb_fname, config_fname, include_disabled):
self._fdt = None
@@ -188,6 +191,7 @@ class DtbPlatdata(object):
self._tiny_uclasses = []
self._of_match = {}
self._compat_to_driver = {}
+self._compatible_strings = {}
def get_normalized_compat_name(self, node):
compat_c, aliases_c = get_compat_name(node)
@@ -395,6 +399,15 @@ class DtbPlatdata(object):
except:
pass
+# find entries declared with the form
+# COMPATIBLE(driver_name, compatible_string)
+compatible_strings =
re.findall('COMPATIBLE\(\s*(\w+)\s*,\s*(\S+)\s*\)', b)
+
+for co in compatible_strings:
+if not self._compatible_strings.get(co[0]):
+self._compatible_strings[co[0]] = []
+self._compatible_strings[co[0]].append(co)
+
def scan_drivers(self):
"""Scan the driver folders to build a list of driver names and possible
aliases
@@ -805,6 +818,23 @@ class DtbPlatdata(object):
self.out(''.join(self.get_buf()))
self.close_output()
+def generate_compatible(self):
+"""Generates the struct udevice_id[] to be used in drivers
+
+This writes C code to implement struct udevice_id[] based on
+COMPATIBLE(driver_name, compatible) entries found in drivers.
+
+Additionally this function can filter entries in order to avoid
+adding those that are not present in DT.
+"""
+self.out('#define COMPATIBLE(__driver_name, __compatible, ...)\n\n')
+for vals in self._compatible_strings.values():
+st = ''
+for comp in vals:
+st += '{.compatible = %s},\\\n' % (comp[1])
+st += '{ /* sentinel */ },\\\n'
+self.out('#define COMPATIBLE_LIST_%s { \\\n%s}\n' % (comp[0], st))
+
def shrink(self):
"""Generate a shrunk version of DTB bases on valid drivers
@@ -895,6 +925,8 @@ def run_steps(args, dtb_file, config_file,
include_disabled, output):
plat.shrink()
elif cmd == 'test_del_node':
plat.test_del_node()
+elif cmd == 'compatible':
+plat.generate_compatible()
else:
raise ValueError("Unknown command '%s': (use: struct, platdata)" %
cmd)
--
2.20.1
[RFC 0/4] drivers: footprint reduction proposal
Based on several reports and discussions it is clear that U-Boot's footprint is always a concern, and any kind of reduction is an improvement. This series is a proposal to help reducing the footprint by parsing information provided in DT and drivers in different ways and adding additional intelligence to dtoc. The current version implements the basic functionality in dtoc but this is no fully integrated, however it will allow us to discuss this approach. Firstly, based on the compatible strings found in drivers, include only DT nodes which are supported by any driver present in U-Boot. Secondly, generate struct udevice_id entries only for nodes present in DT, which will allow to avoid including additional data. These are the first steps for further improvements as proposed in the specific patches in this series. This work is based on the work of Simon Glass present in [1] which adds support to dtoc for parsing compatible strings. [1] https://gitlab.denx.de/u-boot/custodians/u-boot-dm/-/tree/dtoc-working Walter Lozano (4): dtoc: add POC for dtb shrink dtoc: add initial support for deleting DTB nodes dtoc: add support for generate stuct udevice_id mmc: fsl_esdhc_imx: make use of dtoc to generate struct udevice_id drivers/mmc/fsl_esdhc_imx.c | 58 ++-- tools/dtoc/dtb_platdata.py | 102 ++-- tools/dtoc/fdt.py | 3 ++ 3 files changed, 143 insertions(+), 20 deletions(-) -- 2.20.1
Re: Pull request for UEFI sub-system for efi-2020-07-rc5 (2)
On Fri, Jun 19, 2020 at 08:01:48PM +0200, Heinrich Schuchardt wrote: > The following changes since commit 0b3a92dfa3639167e8d1e40f524b5b094fbcd357: > > Merge tag 'u-boot-amlogic-20200618' of > https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic (2020-06-18 > 09:46:55 -0400) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git > tags/efi-2020-07-rc5-2 > > for you to fetch changes up to 0d7c2913fdf71d74e0d6c710dcceaa29f3862d8c: > > cmd: bootefi: Honor the address & size cells properties correctly > (2020-06-19 09:00:38 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] cmd: bootefi: Honor the address & size cells properties correctly
On Thu, Jun 18, 2020 at 11:51 PM Heinrich Schuchardt wrote:
>
> On 6/19/20 3:51 AM, Atish Patra wrote:
> > fdtdec_get_addr_size reads the uses a fixed value for address & size
> > cell properties which may not be correct always.
> >
> > Use the auto variant of the function which automatically reads
> > #address-cells & #size-cells from parent and uses to read the "reg"
> > property.
> >
> > Signed-off-by: Atish Patra
> > ---
> > cmd/bootefi.c | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/cmd/bootefi.c b/cmd/bootefi.c
> > index 0f6d0f77507c..5f3fcce597de 100644
> > --- a/cmd/bootefi.c
> > +++ b/cmd/bootefi.c
> > @@ -190,8 +190,9 @@ static void efi_carve_out_dt_rsv(void *fdt)
> > subnode = fdt_first_subnode(fdt, nodeoffset);
> > while (subnode >= 0) {
> > /* check if this subnode has a reg property */
> > - addr = fdtdec_get_addr_size(fdt, subnode, "reg",
> > - (fdt_size_t *));
> > + addr = fdtdec_get_addr_size_auto_parent(fdt,
> > nodeoffset,
> > + subnode, "reg", 0,
> > + (fdt_size_t *), false);
>
> On qemu_arm_defconfig: sizeof(fdt_size_t) = 4, sizeof(u64) = 8. So after
> the call the upper four bytes of size will be random bytes from the stack.
>
Ah yes. Thanks for catching that and the quick fix.
> Best regards
>
> Heinrich
>
> > /*
> >* The /reserved-memory node may have children with
> >* a size instead of a reg property.
> >
>
--
Regards,
Atish
Re: [PATCH V2 4/5] pinctrl: renesas: Enable R8A774A1 PFC tables
On 6/19/20 5:55 PM, Adam Ford wrote: [...] > diff --git a/drivers/pinctrl/renesas/sh_pfc.h > b/drivers/pinctrl/renesas/sh_pfc.h > index db3d513358..b9ce471007 100644 > --- a/drivers/pinctrl/renesas/sh_pfc.h > +++ b/drivers/pinctrl/renesas/sh_pfc.h > @@ -300,6 +300,7 @@ extern const struct sh_pfc_soc_info > r8a7793_pinmux_info; > extern const struct sh_pfc_soc_info r8a7794_pinmux_info; > extern const struct sh_pfc_soc_info r8a7795_pinmux_info; > extern const struct sh_pfc_soc_info r8a7796_pinmux_info; > +extern const struct sh_pfc_soc_info r8a774a1_pinmux_info; > extern const struct sh_pfc_soc_info r8a77965_pinmux_info; > extern const struct sh_pfc_soc_info r8a77970_pinmux_info; > extern const struct sh_pfc_soc_info r8a77980_pinmux_info; Please keep the lists sorted, all of them, where it makes sense. >>> >>> I was trying to do that. At least in hex. Doesn't 774a1 comes after >>> 7796 and before 77965? >> >> I honestly don't know how to sort these lists well either, neither >> option seems particularly good. What does Linux do ? > > I can make it match Linux or at least place it where it would be. > Some of the entries in Linux don't exist in U-Boot, so would mean > putting this at the top of the list. Sounds good.
Re: [PATCH V2 3/5] clk: renesas: Add R8A774A1 clock tables
On 6/19/20 5:52 PM, Adam Ford wrote:
> On Fri, Jun 19, 2020 at 9:18 AM Marek Vasut wrote:
>>
>> On 6/19/20 3:58 PM, Adam Ford wrote:
>>> This sync's the clock tables with the official release from
>>> Renesas' repo based on U-Boot 2018.09 and modified to build into
>>> the latest version of U-Boot.
>>
>> Can you import the clock table from Linux too ?
>
> Sure thing. Doing so actually removed a note for missing clocks. :-)
Nice
>> [...]
>>
>>> +static const struct mstp_stop_table r8a774a1_mstp_table[] = {
>>> + { 0x0020, 0x0, 0x0020, 0 },
>>> + { 0x, 0x0, 0x, 0 },
>>> + { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 },
>>> + { 0xFFDF, 0x400, 0xFFDF, 0 },
>>> + { 0x8184, 0x180, 0x8184, 0 },
>>> + { 0xC3FF, 0x0, 0xC3FF, 0 },
>>> + { 0x, 0x0, 0x, 0 },
>>> + { 0x, 0x0, 0x, 0 },
>>> + { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 },
>>> + { 0xFFFE, 0x0, 0xFFFE, 0 },
>>> + { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 },
>>> + { 0x00B7, 0x0, 0x00B7, 0 },
>>> +};
>>
>> Can you check whether all those bits are really defined in the MSTP
>> registers of the SoC ?
>
> Can you give me a point on how to interpret this table? I copied it
> from the Renesas release, and it looks the same as the table for the
> R8A7796, but I don't know what it's supposed to do.
Look into renesas_clk_remove() in
drivers/clk/renesas/renesas-cpg-mssr.c
> I found the RZG2M ref manual 1.00, and lists MSTPSR1-10 and
> RMSTPCR1-10. Their initial values vary between revisions of the
> silicon for the RZ/G2M, but there are 12 entries in the table, so I am
> not even sure I'm looking at the right stuff in the ref manual.
You're looking at the correct part of the manual. The goal is to turn
off all the clock expect required ones before booting Linux. The code
(see above) should make it clear what each line means and which register
is written.
Re: [PATCH v2 5/6] crypto/fsl: instantiate the RNG with prediciton resistance
Am 2020-06-19 18:54, schrieb Horia Geantă:
On 6/19/2020 7:37 PM, Horia Geanta wrote:
On 6/17/2020 11:48 PM, Michael Walle wrote:
Am 2020-06-17 21:15, schrieb Horia Geantă:
On 6/4/2020 6:48 PM, Michael Walle wrote:
+
+ desc = memalign(ARCH_DMA_MINALIGN, desc_size);
+ if (!desc) {
+ debug("cannot allocate RNG init descriptor memory\n");
+ return -ENOMEM;
+ }
+
+ for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) {
+ /*
+* If the corresponding bit is set, then it means the state
+* handle was initialized by us, and thus it needs to be
+* deinitialized as well
+*/
+
+ if (state_handle_mask & RDSTA_IF(sh_idx)) {
+ /*
+* Create the descriptor for deinstantating this state
+* handle.
+*/
+ inline_cnstr_jobdesc_rng_deinstantiation(desc, sh_idx);
+ flush_dcache_range((unsigned long)desc,
+ (unsigned long)desc + desc_size);
Shouldn't this be roundup(desc_size, ARCH_DMA_MINALIGN) instead of
desc_size?
I've seen the same idioms sometimes, but it wasn't clear to me why
that
would
be needed; the hardware only uses the desc_size, right?
Yes, HW will use only [desc, desc + desc_size].
I think this is needed to avoid cacheline sharing issues
on non-coherent platforms: CPU needs to make sure a larger area
is written back to memory and corresponding cache lines are
invalidated.
Looking at flush_dcache_range() implementation, it does its own
rounding,
based on CTR_EL0[DminLine] - "smallest data cache line size".
I guess this value might be smaller than ARCH_DMA_MINALIGN,
hence the explicit rounding to ARCH_DMA_MINALIGN is needed.
Btw, I think
desc = memalign(ARCH_DMA_MINALIGN, desc_size);
needs to be replaced with
desc = malloc_cache_aligned(desc_size);
But then the rounding is not needed, right? I mean there can't
be any other malloc() which might allocate memory in the same
cache line.
-michael
Pull request (-next): u-boot-spi/master
Hi Tom, PR is for -next (v2020.10) as part of spi dm-conversion changes. Summary: - Convert fsl_espi to driver model (Chuanhua) - Enable am335x baltos to DM_SPI (Jagan) - Drop few powerpc board which doesn't have DM enabled (Jagan) Travis-CI: https://travis-ci.org/github/openedev/u-boot-amarula/builds/699804652 Any inputs? Jagan. The following changes since commit 9cb895203a46654f7ee6dd95be5c8ab05e4dfbd3: Merge tag 'u-boot-stm32-20200616' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2020-06-16 09:18:56 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-spi master for you to fetch changes up to 2a2b94a9d9a3139853c6ccd911c55db77b714a68: am335x: baltos: Enable DM_SPI (2020-06-18 21:53:21 +0530) Chuanhua Han (1): dm: spi: Convert Freescale ESPI driver to driver model Jagan Teki (11): powerpc: Remove configs/B4420QDS_NAND_defconfig board powerpc: Remove configs/BSC9131RDB_NAND_SYSCLK100_defconfig board powerpc: Remove configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig board powerpc: Remove configs/C29XPCIE_NAND_defconfig board powerpc: Remove configs/MPC8536DS_36BIT_defconfig board powerpc: Remove P1022DS_36BIT_NAND_defconfig board powerpc: Remove T1024QDS_DDR4_SECURE_BOOT_defconfig board powerpc: Remove T1040QDS_DDR4_defconfig board powerpc: Remove T4160QDS_NAND_defconfig board powerpc: Remove TWR-P1025_defconfig board am335x: baltos: Enable DM_SPI arch/powerpc/cpu/mpc85xx/Kconfig | 108 -- board/freescale/b4860qds/Kconfig | 14 - board/freescale/b4860qds/MAINTAINERS | 17 - board/freescale/b4860qds/Makefile | 16 - board/freescale/b4860qds/b4860qds.c| 1276 board/freescale/b4860qds/b4860qds.h| 12 - board/freescale/b4860qds/b4860qds_crossbar_con.h | 72 -- board/freescale/b4860qds/b4860qds_qixis.h | 28 - board/freescale/b4860qds/b4_pbi.cfg| 30 - board/freescale/b4860qds/b4_rcw.cfg|7 - board/freescale/b4860qds/ddr.c | 267 board/freescale/b4860qds/eth_b4860qds.c| 454 --- board/freescale/b4860qds/law.c | 28 - board/freescale/b4860qds/pci.c | 23 - board/freescale/b4860qds/spl.c | 119 -- board/freescale/b4860qds/tlb.c | 154 --- board/freescale/bsc9131rdb/Kconfig | 12 - board/freescale/bsc9131rdb/MAINTAINERS |9 - board/freescale/bsc9131rdb/Makefile| 21 - board/freescale/bsc9131rdb/README | 151 --- board/freescale/bsc9131rdb/bsc9131rdb.c| 82 -- board/freescale/bsc9131rdb/ddr.c | 170 --- board/freescale/bsc9131rdb/law.c | 18 - board/freescale/bsc9131rdb/spl_minimal.c | 105 -- board/freescale/bsc9131rdb/tlb.c | 61 - board/freescale/bsc9132qds/Kconfig | 14 - board/freescale/bsc9132qds/MAINTAINERS | 25 - board/freescale/bsc9132qds/Makefile| 21 - board/freescale/bsc9132qds/README | 150 --- board/freescale/bsc9132qds/bsc9132qds.c| 432 --- board/freescale/bsc9132qds/ddr.c | 191 --- board/freescale/bsc9132qds/law.c | 28 - board/freescale/bsc9132qds/spl_minimal.c | 117 -- board/freescale/bsc9132qds/tlb.c | 91 -- board/freescale/c29xpcie/Kconfig | 14 - board/freescale/c29xpcie/MAINTAINERS | 10 - board/freescale/c29xpcie/Makefile | 25 - board/freescale/c29xpcie/README| 99 -- board/freescale/c29xpcie/c29xpcie.c| 159 --- board/freescale/c29xpcie/cpld.c| 133 -- board/freescale/c29xpcie/cpld.h| 39 - board/freescale/c29xpcie/ddr.c | 106 -- board/freescale/c29xpcie/law.c | 18 - board/freescale/c29xpcie/spl.c | 81 -- board/freescale/c29xpcie/spl_minimal.c | 63 - board/freescale/c29xpcie/tlb.c | 84 -- board/freescale/mpc8536ds/Kconfig | 12 - board/freescale/mpc8536ds/MAINTAINERS |9 - board/freescale/mpc8536ds/Makefile | 10 - board/freescale/mpc8536ds/README | 127 -- board/freescale/mpc8536ds/ddr.c| 59 - board/freescale/mpc8536ds/law.c| 19 - board/freescale/mpc8536ds/mpc8536ds.c | 293 - board/freescale/mpc8536ds/tlb.c| 70 -- board/freescale/p1022ds/Kconfig| 12 -
Re: [PULL] Pull request: u-boot-stm32 for v2020.07= u-boot-stm32-20200619
On Fri, Jun 19, 2020 at 04:37:37PM +, Patrick DELAUNAY wrote: > Hi Tom, > > Please pull the STM32 related patches for v2020.07: u-boot-stm32-20200619 > > With the following changes: > - fix SD card cart detect on DHCOM and STMicroelectronics boards > > CI status: > https://gitlab.denx.de/u-boot/custodians/u-boot-stm/pipelines/3731 > > Thanks, > Patrick > > > The following changes since commit 0b3a92dfa3639167e8d1e40f524b5b094fbcd357: > > Merge tag 'u-boot-amlogic-20200618' of > https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic (2020-06-18 09:46:55 > -0400) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git > tags/u-boot-stm32-20200619 > > for you to fetch changes up to 792919241b3d750cd5295dfe6dd1d0958b9be468: > > ARM: dts: stm32: Reinstate card detect behavior on ST boards (2020-06-19 > 14:18:36 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: Pull request, u-boot-tegra/master
On Fri, Jun 19, 2020 at 08:53:42AM -0700, Tom Warren wrote: > Tom, > > Please pull u-boot-tegra/master into U-Boot/master. Thanks. > > All Tegra builds are OK on my system, and Stephen's test frame reports that > all tests pass. > > The following changes since commit 9cb895203a46654f7ee6dd95be5c8ab05e4dfbd3: > > Merge tag 'u-boot-stm32-20200616' of > https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2020-06-16 09:18:56 > -0400) > > are available in the git repository at: > > > ssh://twarren@git-mirror-santaclara:12001/m/denx.de/u-boot-tegra.git > master > > for you to fetch changes up to 7b4f42b6cd5d8fa32f763b5ec03b7b8fdf7c4303: > > t210: Nano: Add NVME support (2020-06-18 15:12:34 -0700) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] common/board_f: Respect original FDT size while relocating
On 6/19/20 8:51 PM, Tom Rini wrote:
> On Fri, Jun 19, 2020 at 03:19:21PM +, Oleksandr Andrushchenko wrote:
>> On 6/19/20 4:53 PM, Tom Rini wrote:
>>> On Fri, Jun 19, 2020 at 11:22:18AM +0300, Oleksandr Andrushchenko wrote:
>>>
From: Oleksandr Andrushchenko
While relocating FDT we reserve some memory for the new FDT and
set the size of the FDT with that respect. But FDT may be placed
at the end of the RAM leading to memory access beyond it.
Fix this by copying exact FDT size bytes, not the reserved size.
Signed-off-by: Oleksandr Andrushchenko
---
common/board_f.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/board_f.c b/common/board_f.c
index 01194eaa0e4d..aa1285e94999 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -670,7 +670,7 @@ static int reloc_fdt(void)
if (gd->flags & GD_FLG_SKIP_RELOC)
return 0;
if (gd->new_fdt) {
- memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
+ memcpy(gd->new_fdt, gd->fdt_blob, fdt_totalsize(gd->fdt_blob));
gd->fdt_blob = gd->new_fdt;
}
#endif
>>> So, I think the problem is placing the fdt so close to the end of memory
>>> and we need to fix that.
>> Exactly
>>> With the above change, we won't copy past the
>>> end of memory
>> yes
>>>but gd->fdt_blob + gd->fdt_size will still point past it,
>>> yes?
>> Not really as the next op after the memcpy will set fdt_blob to the new
>> location
>>
>> and it is safe to access the memory in [gd->fdt_blob; gd->fdt_blob +
>> gd->fdt_size) range.
>>
>> We only ensure we are copying the fdt itself, not also the reserved memory
>> which
>>
>> doesn't exist past the original fdt addresses
> Ah, so I had something backwards then. We're fine because gd->new_fdt +
> gd->fdt_size is fine. Thanks!
>
Yes, that's right
Re: [PATCH] fs/fat/fat.c: Do not perform zero block reads if there are no blocks left
On Fri, Jun 19, 2020 at 10:12:20AM -0700, Jason Wessel wrote:
> v2: Fix indentation and remove unneeded braces.
Series notes go below the '--- '
>
> While using u-boot with qemu's virtio driver I stumbled across a
> problem reading files less than sector size. On the real hardware the
> block reader seems ok with reading zero blocks, and while we could fix
> the virtio host side of qemu to deal with a zero block read instead of
> crashing, the u-boot fat driver should not be doing zero block reads
> in the first place. If you ask hardware to read zero blocks you are
> just going to get zero data. There may also be other hardware that
> responds similarly to the virtio interface so this is worth fixing.
>
> Without the patch I get the following and have to restart qemu because
> it dies.
> -
> => fatls virtio 0:1
>30 cmdline.txt
> => fatload virtio 0:1 ${loadaddr} cmdline.txt
> qemu-system-aarch64: virtio: zero sized buffers are not allowed
> -
>
> With the patch I get the expected results.
> -
> => fatls virtio 0:1
>30 cmdline.txt
> => fatload virtio 0:1 ${loadaddr} cmdline.txt
> 30 bytes read in 11 ms (2 KiB/s)
> => md.b ${loadaddr} 0x1E
> 4008: 64 77 63 5f 6f 74 67 2e 6c 70 6d 5f 65 6e 61 62dwc_otg.lpm_enab
> 40080010: 6c 65 3d 30 20 72 6f 6f 74 77 61 69 74 0a le=0 rootwait.
>
> -
>
> Signed-off-by: Jason Wessel
> ---
> fs/fat/fat.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/fs/fat/fat.c b/fs/fat/fat.c
> index 7fd29470c1..8233a74620 100644
> --- a/fs/fat/fat.c
> +++ b/fs/fat/fat.c
> @@ -278,7 +278,11 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8
> *buffer, unsigned long size)
> }
> } else {
> idx = size / mydata->sect_size;
> - ret = disk_read(startsect, idx, buffer);
> + if (idx == 0) {
> + ret = 0;
> + } else {
> + ret = disk_read(startsect, idx, buffer);
> + }
> if (ret != idx) {
> debug("Error reading data (got %d)\n", ret);
> return -1;
Spacing is still off and still extra braces. Code looks fine tho,
thanks!
--
Tom
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Re: [PATCH v2 5/9] sandbox: support the change of env location
On Fri, Jun 19, 2020 at 02:40:06PM +, Patrick DELAUNAY wrote: > Hi, > > > From: Tom Rini > > Sent: jeudi 18 juin 2020 21:17 > > > > On Tue, Jun 16, 2020 at 09:40:44AM +0200, Patrick Delaunay wrote: > > > > > Add support of environment location with a new sandbox command > > > 'env_loc'. > > > > > > When the user change the environment location with the command > > > 'env_loc ' the env is reinitialized and saved; the > > > GD_FLG_ENV_DEFAULT flag is also updated. > > > > > > When the user set the same env location, the environment is re-loaded. > > > > > > Signed-off-by: Patrick Delaunay > > > --- > > > > > > Changes in v2: > > > - change cmd_tbl_t to struct cmd_tbl > > > > > > board/sandbox/sandbox.c | 42 > > > - > > > 1 file changed, 41 insertions(+), 1 deletion(-) > > > > This is for testing, which is why it's on sandbox? But I think we should > > have this > > be a generic opt-in feature as changing where environment is saved at run > > time > > has use cases when we have multiple available. Thanks! > > Yes in my mind it was only for testing on sandbox > > But I agree, I can a add a opt-in generic command to select and load ENV on > one target. > > Someting as "env load [] " which loads with the request backend and > update gd->env_load_prio > > With = name of the name define in backend with ENV_NAME macro > And using the default location gd->env_load_prio when absent. > > Or split in 2 new commands > > - env select > - env load > > Perhaps this last proposal with 2 command is more flexible > to be combined with other command (env save / env erase) > > if this proposal is OK, I will work on it. Sounds good to me, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 3/9] env: correctly handle result in env_init
On Fri, Jun 19, 2020 at 02:14:00PM +, Patrick DELAUNAY wrote:
> Hi Tom and Marek,
>
> > From: Tom Rini
> > Sent: jeudi 18 juin 2020 21:16
> >
> > On Tue, Jun 16, 2020 at 09:40:42AM +0200, Patrick Delaunay wrote:
> >
> > > Don't return error with ret=-ENOENT when the optional ops drv->init is
> > > absent but only if env_driver_lookup doesn't found driver.
> > >
> > > This patch correct an issue for the code
> > > if (!env_init())
> > > env_load()
> > > When only ext4 is supported (CONFIG_ENV_IS_IN_EXT4), as the backend
> > > env/ext4.c doesn't define an ops .init
> > >
> > > Signed-off-by: Patrick Delaunay
> > > ---
> > >
> > > (no changes since v1)
> > >
> > > env/env.c | 5 -
> > > 1 file changed, 4 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/env/env.c b/env/env.c
> > > index dcc25c030b..819c88f729 100644
> > > --- a/env/env.c
> > > +++ b/env/env.c
> > > @@ -295,7 +295,10 @@ int env_init(void)
> > > int prio;
> > >
> > > for (prio = 0; (drv = env_driver_lookup(ENVOP_INIT, prio)); prio++) {
> > > - if (!drv->init || !(ret = drv->init()))
> > > + ret = 0;
> > > + if (drv->init)
> > > + ret = drv->init();
> > > + if (!ret)
> > > env_set_inited(drv->location);
> > >
> > > debug("%s: Environment %s init done (ret=%d)\n", __func__,
> >
> > I'm adding in Marek here because this reminds me of similar questions /
> > concerns
> > I had looking in to his series. At root, I think we're not being
> > consistent in each of
> > our env backing implementations about where flags such as ENV_VALID are set,
> > and return values / checks of functions.
> >
> > Just outside of the start of the patch context here, we set ret to -ENOENT
> > and just
> > past this, if still -ENOENT we say ENV_VALID and point at the default
> > environment.
> >
> > But, I don't follow the patch commit message here. If we don't have
> > drv->init we call env_set_inited(drv->location) but we won't have change
> > ret to 0, which means that later on down the function we go back to default
> > environment.
>
> The cause of the issue is because the init() ops is optional in "struct
> env_driver".
Right.
> When this opt is absent, I assume that the initialization is not mandatory but
> this inititialization need to be tagged in gd->env_has_init with the call of
> env_set_inited() function
So when drv->init isn't set we are already calling env_set_inited(...).
If that's not the case, what's going on?
> And the ENV backend is FOUND (don't return -ENOENT)
>
> else the next call of env_has_inited(drv->location) always failed : in
> env_load()
>
> I see the error in EXT4 env backend,.all the other backend as a env_init()
> function
>
> But some othe backend don't define the .init operation and have the issue
>
> eeprom.c:235:U_BOOT_ENV_LOCATION(eeprom) = {
> ext4.c:135:U_BOOT_ENV_LOCATION(ext4) = {
> fat.c:128:U_BOOT_ENV_LOCATION(fat) = {
> mmc.c:393:U_BOOT_ENV_LOCATION(mmc) = {
> onenand.c:108:U_BOOT_ENV_LOCATION(onenand) = {
> sata.c:117:U_BOOT_ENV_LOCATION(sata) = {
> ubi.c:179:U_BOOT_ENV_LOCATION(ubi) = {
>
> The other don't have issue:
>
> flash.c:358:U_BOOT_ENV_LOCATION(flash) = {
> flash.c:368: .init = env_flash_init,
> nand.c:382:U_BOOT_ENV_LOCATION(nand) = {
> nand.c:389: .init = env_nand_init,
> nowhere.c:30:U_BOOT_ENV_LOCATION(nowhere) = {
> nowhere.c:32: .init = env_nowhere_init,
> nvram.c:117:U_BOOT_ENV_LOCATION(nvram) = {
> nvram.c:122: .init = env_nvram_init,
> remote.c:54:U_BOOT_ENV_LOCATION(remote) = {
> remote.c:59: .init = env_remote_init,
> sf.c:306:U_BOOT_ENV_LOCATION(sf) = {
> sf.c:312: .init = env_sf_init,
Right, there should be a problem showing up on a ton of locations, not
just ext4 which is why I'm concerned / confused here. While ext4 isn't
as widely used yet as I would expect, FAT/MMC are.
> > So isn't this a problem in most environment cases then? Thanks!
>
> I don't sure which environment configuration can case issue (only one ENV
> without drc->init() function)
> But no issue if at least one CONFIG_ENV_IS_ is activated with driver
> implementing init ops
>
> But I see the issue in SANDBOX when I activate EXT4 only target.
> (CONFIG_ENV_IS_IN_EXT4),
> And no more issue when I add CONFIG_ENV_IS_NOWHERE.
>
> PS: no direct issue if env_init result is not checked
>but I check this result in the sandbox tests in next patches:
> if (!env_init())
>env_load()
>
>but anyway inconsistent value of gd->env_has_init
>which can be a problem for any env_has_inited() calls
Right. I think there's some bigger inconsistency going on here that
needs to be fixed. I'm also confused / concerned how you're not seeing
env_set_inite(..) being called. if (!NULL) is true. Thanks!
--
Tom
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Pull request for UEFI sub-system for efi-2020-07-rc5 (2)
The following changes since commit 0b3a92dfa3639167e8d1e40f524b5b094fbcd357: Merge tag 'u-boot-amlogic-20200618' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic (2020-06-18 09:46:55 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git tags/efi-2020-07-rc5-2 for you to fetch changes up to 0d7c2913fdf71d74e0d6c710dcceaa29f3862d8c: cmd: bootefi: Honor the address & size cells properties correctly (2020-06-19 09:00:38 +0200) Pull request for UEFI sub-system for efi-2020-07-rc5 (2) Fix memory reservations: do not use random bytes from the stack. Atish Patra (1): cmd: bootefi: Honor the address & size cells properties correctly cmd/bootefi.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-)
Re: [RFC PATCH 0/4] CONFIG_IS_ENABLED magic
On Fri, Jun 12, 2020 at 01:02:12PM +0200, Rasmus Villemoes wrote:
> The first patch is just something I suggested to allow zstd support to
> move forward. The remaining ones aim to make it more ergonomic to use
> CONFIG_IS_ENABLED to exclude things from the build.
>
> While it currently works just fine in C code that one can do
>
> if (CONFIG_IS_ENABLED(FOO)) {
>
> }
>
> and have the compiler throw the whole block away, and then later the
> linker throw away any functions and/or data that turns out not be used
> anyway, it's currently somewhat uglier to exclude items from an array
> initializer - it requires three lines to do
>
> #if CONFIG_IS_ENABLED(FOO)
> { some array item },
> #endif
>
> and grepping for the FOO symbol doesn't really show what it is used
> for including/excluding.
>
> With the last patch, one can instead do
>
> CONFIG_IS_ENABLED(FOO, ({ some array item },))
>
> It's just an RFC; I think this can be useful to reduce the size of
> SPL/TPL without too much cluttering of the source, others can
> disagree.
>
>
> Rasmus Villemoes (4):
> common/image.c: image_decomp: put IH_COMP_XXX cases inside ifndef
> USE_HOSTCC
> linux/kconfig.h: simplify logic for choosing CONFIG_{SPL_,TPL_,}*
> linux/kconfig.h: remove unused helper macros
> linux/kconfig.h: create two- and three-argument versions of
> CONFIG_IS_ENABLED
>
> common/image.c | 2 +
> include/linux/kconfig.h | 103 ++-
> scripts/config_whitelist.txt | 2 -
> 3 files changed, 54 insertions(+), 53 deletions(-)
This is I believe a good step forward and should let us clean up our
code in a few areas. Thanks!
--
Tom
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Re: [PATCH] common/board_f: Respect original FDT size while relocating
On Fri, Jun 19, 2020 at 03:19:21PM +, Oleksandr Andrushchenko wrote:
> On 6/19/20 4:53 PM, Tom Rini wrote:
> > On Fri, Jun 19, 2020 at 11:22:18AM +0300, Oleksandr Andrushchenko wrote:
> >
> >> From: Oleksandr Andrushchenko
> >>
> >> While relocating FDT we reserve some memory for the new FDT and
> >> set the size of the FDT with that respect. But FDT may be placed
> >> at the end of the RAM leading to memory access beyond it.
> >> Fix this by copying exact FDT size bytes, not the reserved size.
> >>
> >> Signed-off-by: Oleksandr Andrushchenko
> >> ---
> >> common/board_f.c | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/common/board_f.c b/common/board_f.c
> >> index 01194eaa0e4d..aa1285e94999 100644
> >> --- a/common/board_f.c
> >> +++ b/common/board_f.c
> >> @@ -670,7 +670,7 @@ static int reloc_fdt(void)
> >>if (gd->flags & GD_FLG_SKIP_RELOC)
> >>return 0;
> >>if (gd->new_fdt) {
> >> - memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
> >> + memcpy(gd->new_fdt, gd->fdt_blob, fdt_totalsize(gd->fdt_blob));
> >>gd->fdt_blob = gd->new_fdt;
> >>}
> >> #endif
> > So, I think the problem is placing the fdt so close to the end of memory
> > and we need to fix that.
> Exactly
> >With the above change, we won't copy past the
> > end of memory
> yes
> > but gd->fdt_blob + gd->fdt_size will still point past it,
> > yes?
>
> Not really as the next op after the memcpy will set fdt_blob to the new
> location
>
> and it is safe to access the memory in [gd->fdt_blob; gd->fdt_blob +
> gd->fdt_size) range.
>
> We only ensure we are copying the fdt itself, not also the reserved memory
> which
>
> doesn't exist past the original fdt addresses
Ah, so I had something backwards then. We're fine because gd->new_fdt +
gd->fdt_size is fine. Thanks!
--
Tom
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[PATCH 1/1] cmd: fdt: remove CMD_FDT_MAX_DUMP
When printing the device tree we want to get an output that can be used as
input for the device tree compiler. This requires that we do not write
bogus lines like
pcie@1000 {
interrupt-map = * 0x4000127c [0x0280];
For instance the QEMU virt device has a property interrupt-map with 640
bytes which exceeds CMD_FDT_MAX_DUMP=64.
So lets do away with the artificial limitation to 64 bytes.
As indicated in commit f0a29d43313c ("fdt: Limit printed hex in fdt print
and list commands") if a device tree contains binary blobs, it may still
be desirable to limit the output length. Provide environment variable
fdt_max_dump for this purpose.
Fixes: 5d927b428622 ("Kconfig: Drop CONFIG_CMD_FDT_MAX_DUMP")
Signed-off-by: Heinrich Schuchardt
---
cmd/fdt.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/cmd/fdt.c b/cmd/fdt.c
index 99b1b5b3fc..89ab572d8d 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -21,7 +21,6 @@
#define MAX_LEVEL 32 /* how deeply nested we will go */
#define SCRATCHPAD 1024/* bytes of scratchpad memory */
-#define CMD_FDT_MAX_DUMP 64
/*
* Global data (for the gd->bd)
@@ -934,11 +933,17 @@ static int is_printable_string(const void *data, int len)
static void print_data(const void *data, int len)
{
int j;
+ const char *env_max_dump;
+ ulong max_dump = ULONG_MAX;
/* no data, don't print */
if (len == 0)
return;
+ env_max_dump = env_get("fdt_max_dump");
+ if (env_max_dump)
+ max_dump = simple_strtoul(env_max_dump, NULL, 16);
+
/*
* It is a string, but it may have multiple strings (embedded '\0's).
*/
@@ -957,7 +962,7 @@ static void print_data(const void *data, int len)
}
if ((len %4) == 0) {
- if (len > CMD_FDT_MAX_DUMP)
+ if (len > max_dump)
printf("* 0x%p [0x%08x]", data, len);
else {
const __be32 *p;
@@ -969,7 +974,7 @@ static void print_data(const void *data, int len)
printf(">");
}
} else { /* anything else... hexdump */
- if (len > CMD_FDT_MAX_DUMP)
+ if (len > max_dump)
printf("* 0x%p [0x%08x]", data, len);
else {
const u8 *s;
--
2.27.0
[PATCH] fs/fat/fat.c: Do not perform zero block reads if there are no blocks left
v2: Fix indentation and remove unneeded braces.
While using u-boot with qemu's virtio driver I stumbled across a
problem reading files less than sector size. On the real hardware the
block reader seems ok with reading zero blocks, and while we could fix
the virtio host side of qemu to deal with a zero block read instead of
crashing, the u-boot fat driver should not be doing zero block reads
in the first place. If you ask hardware to read zero blocks you are
just going to get zero data. There may also be other hardware that
responds similarly to the virtio interface so this is worth fixing.
Without the patch I get the following and have to restart qemu because
it dies.
-
=> fatls virtio 0:1
30 cmdline.txt
=> fatload virtio 0:1 ${loadaddr} cmdline.txt
qemu-system-aarch64: virtio: zero sized buffers are not allowed
-
With the patch I get the expected results.
-
=> fatls virtio 0:1
30 cmdline.txt
=> fatload virtio 0:1 ${loadaddr} cmdline.txt
30 bytes read in 11 ms (2 KiB/s)
=> md.b ${loadaddr} 0x1E
4008: 64 77 63 5f 6f 74 67 2e 6c 70 6d 5f 65 6e 61 62dwc_otg.lpm_enab
40080010: 6c 65 3d 30 20 72 6f 6f 74 77 61 69 74 0a le=0 rootwait.
-
Signed-off-by: Jason Wessel
---
fs/fat/fat.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 7fd29470c1..8233a74620 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -278,7 +278,11 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer,
unsigned long size)
}
} else {
idx = size / mydata->sect_size;
- ret = disk_read(startsect, idx, buffer);
+ if (idx == 0) {
+ ret = 0;
+ } else {
+ ret = disk_read(startsect, idx, buffer);
+ }
if (ret != idx) {
debug("Error reading data (got %d)\n", ret);
return -1;
--
2.17.1
[PATCH] fs/fat.c: Do not perform zero block reads if there are no blocks left
While using u-boot with qemu's virtio driver I stumbled across a
problem reading files less than sector size. On the real hardware the
block reader seems ok with reading zero blocks, and while we could fix
the virtio host side of qemu to deal with a zero block read instead of
crashing, the u-boot fat driver should not be doing zero block reads
in the first place. If you ask hardware to read zero blocks you are
just going to get zero data. There may also be other hardware that
responds similarly to the virtio interface so this is worth fixing.
Without the patch I get the following and have to restart qemu because
it dies.
-
=> fatls virtio 0:1
30 cmdline.txt
=> fatload virtio 0:1 ${loadaddr} cmdline.txt
qemu-system-aarch64: virtio: zero sized buffers are not allowed
-
With the patch I get the expected results.
-
=> fatls virtio 0:1
30 cmdline.txt
=> fatload virtio 0:1 ${loadaddr} cmdline.txt
30 bytes read in 11 ms (2 KiB/s)
=> md.b ${loadaddr} 0x1E
4008: 64 77 63 5f 6f 74 67 2e 6c 70 6d 5f 65 6e 61 62dwc_otg.lpm_enab
40080010: 6c 65 3d 30 20 72 6f 6f 74 77 61 69 74 0a le=0 rootwait.
-
Signed-off-by: Jason Wessel
---
fs/fat/fat.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 7fd29470c1..8233a74620 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -278,7 +278,11 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer,
unsigned long size)
}
} else {
idx = size / mydata->sect_size;
- ret = disk_read(startsect, idx, buffer);
+ if (idx == 0) {
+ ret = 0;
+ } else {
+ ret = disk_read(startsect, idx, buffer);
+ }
if (ret != idx) {
debug("Error reading data (got %d)\n", ret);
return -1;
--
2.17.1
RE: Can't access mmc #0 on mt7623 when booted from external SD
Hi David,
1. mt7623-moore-pinctrl is written for introducing more supports for new
mediatek soc like mt7622, mt7629, mt8183 and so on and even more easily
maintained than before
2. mt7623-moore-pinctrl/mt2701-pinctrl drives the same hardware, but with
different driver style, the latter one is already hard to extend to newer and
variety mediatek SoC.
3. mt7623 pinctrl on uboot would prefer to apply mt7623-moore-pinctrl just
since pinctrl on uboot is developed later than mt7623-moore-pinctrl.
mt7623 pinctrl on linux still would prefer to apply mt2701-pinctrl since
they have been supported for a while and be stable enough.
4. it's still welcome to submit patches to mt7623-moore-pinctrl from your
experiences in mt7623 uboot to make it complete.
Thanks,
Sean
-Original Message-
From: David Woodhouse [mailto:dw...@infradead.org]
Sent: Thursday, June 18, 2020 2:03 PM
To: Michael Nazzareno Trimarchi
Cc: U-Boot-Denx ; Ryder Lee (李庚諺)
; Weijie Gao (高惟杰) ; frank
wunderlich ; Sean Wang
Subject: Re: Can't access mmc #0 on mt7623 when booted from external SD
On Thu, 2020-06-18 at 21:34 +0200, Michael Nazzareno Trimarchi wrote:
> > Looks like the pinctrl driver. This *ought* to work (with the caveat
> > that I really ought to make two pinctrl setups and change between them
> > according to the voltage, like the Linux DT and mtk-sd driver do).
> >
> > --- a/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts
> > +++ b/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts
> > @@ -133,12 +133,14 @@
> > "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
> > "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
> > input-enable;
> > - bias-pull-up;
> > + drive-strength = <2>;
> > + bias-pull-up = <3>;
> > };
> >
> > conf-clk {
> > pins = "MSDC0_CLK";
> > - bias-pull-down;
> > + drive-strength = <2>;
> > + bias-pull-down = <3>;
> > };
> >
> > conf-rst {
> >
> >
> > But it doesn't work. Partly because the U-Boot mtk pinctrl driver
> > doesn't support the R0 R1 bits encoded in that <3>, and partly because
> > it doesn't *even* get pullup/pulldown right at all; it sets the bit in
> > the GPIO_PULLSEL registers but *not* the PUPD bit in the correct
> > register for MSDC and other pins.
>
> So change them manually, make it work, You have the board. I don't
> have any MediaTek board at the moment. Can you implement the missed part?
I think I'd rather let the MediaTek folks handle it, as it affects
other SoCs too.
It turns out Linux has a pinctrl-mt7623.c driver which looks a lot like
the U-Boot one, but *isn't* actually the one being used, because in
Linux it only matches "mediatek,mt7623-moore-pinctrl" which isn't in
this board's DT.
Linux also has a pinctrl-mt2701.c driver that matches the
"mediatek,mt7623-pinctrl" that *is* on this board, and which *does*
work correctly.
So I don't know if we just have the wrong driver in U-Boot. Or if the
mediatek,mt7623-moore-pinctrl compatible string is a temporary name for
the *same* hardware, to invoke the new driver that isn't complete yet
so it isn't being used in Linux... but is in U-Boot?
Sean?
Re: [PATCH] common/board_f: Respect original FDT size while relocating
On 6/19/20 4:53 PM, Tom Rini wrote:
> On Fri, Jun 19, 2020 at 11:22:18AM +0300, Oleksandr Andrushchenko wrote:
>
>> From: Oleksandr Andrushchenko
>>
>> While relocating FDT we reserve some memory for the new FDT and
>> set the size of the FDT with that respect. But FDT may be placed
>> at the end of the RAM leading to memory access beyond it.
>> Fix this by copying exact FDT size bytes, not the reserved size.
>>
>> Signed-off-by: Oleksandr Andrushchenko
>> ---
>> common/board_f.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/common/board_f.c b/common/board_f.c
>> index 01194eaa0e4d..aa1285e94999 100644
>> --- a/common/board_f.c
>> +++ b/common/board_f.c
>> @@ -670,7 +670,7 @@ static int reloc_fdt(void)
>> if (gd->flags & GD_FLG_SKIP_RELOC)
>> return 0;
>> if (gd->new_fdt) {
>> -memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
>> +memcpy(gd->new_fdt, gd->fdt_blob, fdt_totalsize(gd->fdt_blob));
>> gd->fdt_blob = gd->new_fdt;
>> }
>> #endif
> So, I think the problem is placing the fdt so close to the end of memory
> and we need to fix that.
Exactly
>With the above change, we won't copy past the
> end of memory
yes
> but gd->fdt_blob + gd->fdt_size will still point past it,
> yes?
Not really as the next op after the memcpy will set fdt_blob to the new location
and it is safe to access the memory in [gd->fdt_blob; gd->fdt_blob +
gd->fdt_size) range.
We only ensure we are copying the fdt itself, not also the reserved memory which
doesn't exist past the original fdt addresses
> Thanks!
>
[PATCH] fs/fat.c: Do not perform zero block reads if there are no blocks left
While using u-boot with qemu's virtio driver I stumbled across a
problem reading files less than sector size. On the real hardware the
block reader seems ok with reading zero blocks, and while we could fix
the virtio host side of qemu to deal with a zero block read instead of
crashing, the u-boot fat driver should not be doing zero block reads
in the first place. If you ask hardware to read zero blocks you are
just going to get zero data. There may also be other hardware that
responds similarly to the virtio interface so this is worth fixing.
Without the patch I get the following and have to restart qemu because
it dies.
-
=> fatls virtio 0:1
30 cmdline.txt
=> fatload virtio 0:1 ${loadaddr} cmdline.txt
qemu-system-aarch64: virtio: zero sized buffers are not allowed
-
With the patch I get the expected results.
-
=> fatls virtio 0:1
30 cmdline.txt
=> fatload virtio 0:1 ${loadaddr} cmdline.txt
30 bytes read in 11 ms (2 KiB/s)
=> md.b ${loadaddr} 0x1E
4008: 64 77 63 5f 6f 74 67 2e 6c 70 6d 5f 65 6e 61 62dwc_otg.lpm_enab
40080010: 6c 65 3d 30 20 72 6f 6f 74 77 61 69 74 0a le=0 rootwait.
-
Signed-off-by: Jason Wessel
---
fs/fat/fat.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 7fd29470c1..8233a74620 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -278,7 +278,11 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer,
unsigned long size)
}
} else {
idx = size / mydata->sect_size;
- ret = disk_read(startsect, idx, buffer);
+ if (idx == 0) {
+ ret = 0;
+ } else {
+ ret = disk_read(startsect, idx, buffer);
+ }
if (ret != idx) {
debug("Error reading data (got %d)\n", ret);
return -1;
--
2.17.1
Re: [PATCH v3 02/15] arm: cpu: armv8: add L3 memory flush support
Hi Simon, On Wed, Jun 17, 2020 at 8:42 AM Simon Glass wrote: > > On Wed, 10 Jun 2020 at 04:41, Rayagonda Kokatanur > wrote: > > > > Add L3 memory flush support for NS3. > > > > Signed-off-by: Rayagonda Kokatanur > > --- > > arch/arm/cpu/armv8/Makefile | 1 + > > arch/arm/cpu/armv8/bcmns3/Makefile | 5 ++ > > arch/arm/cpu/armv8/bcmns3/lowlevel.S | 90 > > 3 files changed, 96 insertions(+) > > create mode 100644 arch/arm/cpu/armv8/bcmns3/Makefile > > create mode 100644 arch/arm/cpu/armv8/bcmns3/lowlevel.S > > > > diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile > > index 2e48df0eb9..7e33a183d5 100644 > > --- a/arch/arm/cpu/armv8/Makefile > > +++ b/arch/arm/cpu/armv8/Makefile > > @@ -39,3 +39,4 @@ obj-$(CONFIG_S32V234) += s32v234/ > > obj-$(CONFIG_TARGET_HIKEY) += hisilicon/ > > obj-$(CONFIG_ARMV8_PSCI) += psci.o > > obj-$(CONFIG_ARCH_SUNXI) += lowlevel_init.o > > +obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/ > > diff --git a/arch/arm/cpu/armv8/bcmns3/Makefile > > b/arch/arm/cpu/armv8/bcmns3/Makefile > > new file mode 100644 > > index 00..a35e29d11a > > --- /dev/null > > +++ b/arch/arm/cpu/armv8/bcmns3/Makefile > > @@ -0,0 +1,5 @@ > > +# SPDX-License-Identifier: GPL-2.0+ > > +# > > +# Copyright 2020 Broadcom. > > + > > +obj-y += lowlevel.o > > diff --git a/arch/arm/cpu/armv8/bcmns3/lowlevel.S > > b/arch/arm/cpu/armv8/bcmns3/lowlevel.S > > new file mode 100644 > > index 00..202286248e > > --- /dev/null > > +++ b/arch/arm/cpu/armv8/bcmns3/lowlevel.S > > @@ -0,0 +1,90 @@ > > +/* SPDX-License-Identifier: GPL-2.0+ */ > > +/* > > + * Copyright 2020 Broadcom > > + * > > + * Extracted from fsl-layerscape/lowlevel.S > > Should this file be common, then? Is the (c) correct? Do you mean, file "arch/arm/cpu/armv8/bcmns3/lowlevel.S" should be common and for common file copyright tag should be "(C) Copyright 2020" instead of "Copyright 2020 Broadcom". Please let me know. Best regards, Rayagonda
Re: [PATCH v2 5/6] crypto/fsl: instantiate the RNG with prediciton resistance
On 6/19/2020 7:37 PM, Horia Geanta wrote:
> On 6/17/2020 11:48 PM, Michael Walle wrote:
>> Am 2020-06-17 21:15, schrieb Horia Geantă:
>>> On 6/4/2020 6:48 PM, Michael Walle wrote:
+
+ desc = memalign(ARCH_DMA_MINALIGN, desc_size);
+ if (!desc) {
+ debug("cannot allocate RNG init descriptor memory\n");
+ return -ENOMEM;
+ }
+
+ for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) {
+ /*
+ * If the corresponding bit is set, then it means the state
+ * handle was initialized by us, and thus it needs to be
+ * deinitialized as well
+ */
+
+ if (state_handle_mask & RDSTA_IF(sh_idx)) {
+ /*
+ * Create the descriptor for deinstantating this state
+ * handle.
+ */
+ inline_cnstr_jobdesc_rng_deinstantiation(desc, sh_idx);
+ flush_dcache_range((unsigned long)desc,
+ (unsigned long)desc + desc_size);
>>> Shouldn't this be roundup(desc_size, ARCH_DMA_MINALIGN) instead of
>>> desc_size?
>>
>> I've seen the same idioms sometimes, but it wasn't clear to me why that
>> would
>> be needed; the hardware only uses the desc_size, right?
>>
> Yes, HW will use only [desc, desc + desc_size].
>
> I think this is needed to avoid cacheline sharing issues
> on non-coherent platforms: CPU needs to make sure a larger area
> is written back to memory and corresponding cache lines are invalidated.
>
> Looking at flush_dcache_range() implementation, it does its own rounding,
> based on CTR_EL0[DminLine] - "smallest data cache line size".
> I guess this value might be smaller than ARCH_DMA_MINALIGN,
> hence the explicit rounding to ARCH_DMA_MINALIGN is needed.
>
Btw, I think
desc = memalign(ARCH_DMA_MINALIGN, desc_size);
needs to be replaced with
desc = malloc_cache_aligned(desc_size);
Horia
Re: repurposing dhcp command
On Fri, Jun 19, 2020 at 06:32:57PM +0300, Ramon Fried wrote: > Hi. > Basically, bootp command and dhcp command have the same logic, no > difference whatsoever. > Also, sometimes, It's needed to just acquire an IP address using dhcp > and boot in some other way (NFS). > > I'm suggesting repurposing the dhcp command to only do DHCP IP > address acquisition. > Users could use "bootp" command instead, or just type "dhcp && tftpboot" > > What do you think ? This is what the autoload variable is for. Set it to no or false and dhcp (and bootp, iirc) will only acquire an address. It's been the documented / expected interface for far too long to change it as well. -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 5/6] crypto/fsl: instantiate the RNG with prediciton resistance
On 6/17/2020 11:48 PM, Michael Walle wrote:
> Am 2020-06-17 21:15, schrieb Horia Geantă:
>> On 6/4/2020 6:48 PM, Michael Walle wrote:
>>> +
>>> + desc = memalign(ARCH_DMA_MINALIGN, desc_size);
>>> + if (!desc) {
>>> + debug("cannot allocate RNG init descriptor memory\n");
>>> + return -ENOMEM;
>>> + }
>>> +
>>> + for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) {
>>> + /*
>>> +* If the corresponding bit is set, then it means the state
>>> +* handle was initialized by us, and thus it needs to be
>>> +* deinitialized as well
>>> +*/
>>> +
>>> + if (state_handle_mask & RDSTA_IF(sh_idx)) {
>>> + /*
>>> +* Create the descriptor for deinstantating this state
>>> +* handle.
>>> +*/
>>> + inline_cnstr_jobdesc_rng_deinstantiation(desc, sh_idx);
>>> + flush_dcache_range((unsigned long)desc,
>>> + (unsigned long)desc + desc_size);
>> Shouldn't this be roundup(desc_size, ARCH_DMA_MINALIGN) instead of
>> desc_size?
>
> I've seen the same idioms sometimes, but it wasn't clear to me why that
> would
> be needed; the hardware only uses the desc_size, right?
>
Yes, HW will use only [desc, desc + desc_size].
I think this is needed to avoid cacheline sharing issues
on non-coherent platforms: CPU needs to make sure a larger area
is written back to memory and corresponding cache lines are invalidated.
Looking at flush_dcache_range() implementation, it does its own rounding,
based on CTR_EL0[DminLine] - "smallest data cache line size".
I guess this value might be smaller than ARCH_DMA_MINALIGN,
hence the explicit rounding to ARCH_DMA_MINALIGN is needed.
>>> @@ -466,9 +511,18 @@ static int instantiate_rng(u8 sec_idx, int
>>> gen_sk)
>>> * If the corresponding bit is set, this state handle
>>> * was initialized by somebody else, so it's left alone.
>>> */
>>> - rdsta_val = sec_in32(>rdsta) & RNG_STATE_HANDLE_MASK;
>>> - if (rdsta_val & (1 << sh_idx))
>>> - continue;
>>> + rdsta_val = sec_in32(>rdsta);
>>> + if (rdsta_val & (RDSTA_IF(sh_idx) | RDSTA_PR(sh_idx))) {
>> Adding RDSTA_PR(sh_idx) to the mask is not needed,
>> PR bit is meaningless without IF bit set.
>
> Ok.
>
>>
>>> + if (rdsta_val & RDSTA_PR(sh_idx))
>>> + continue;
>> Could combine the condition here with the outer if condition:
>> if (rdsta_val & RDSTA_IF(sh_idx) && !(rdsta_val &
>> RDSTA_PR(sh_idx)))
>> {
>
> If we keep that it is consistent with the linux driver. So I'd vote to
> keep it. Also the continue statement would be missing and thus the
> rng would be instantiated again. Or am I missing something?
>
You are correct, let's keep this as is.
Thanks,
Horia
[PULL] Pull request: u-boot-stm32 for v2020.07= u-boot-stm32-20200619
Hi Tom, Please pull the STM32 related patches for v2020.07: u-boot-stm32-20200619 With the following changes: - fix SD card cart detect on DHCOM and STMicroelectronics boards CI status: https://gitlab.denx.de/u-boot/custodians/u-boot-stm/pipelines/3731 Thanks, Patrick The following changes since commit 0b3a92dfa3639167e8d1e40f524b5b094fbcd357: Merge tag 'u-boot-amlogic-20200618' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic (2020-06-18 09:46:55 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git tags/u-boot-stm32-20200619 for you to fetch changes up to 792919241b3d750cd5295dfe6dd1d0958b9be468: ARM: dts: stm32: Reinstate card detect behavior on ST boards (2020-06-19 14:18:36 +0200) - fix SD card cart detect on DHCOM and ST boards Marek Vasut (1): ARM: dts: stm32: Reinstate card detect behavior on DHSOM Patrick Delaunay (1): ARM: dts: stm32: Reinstate card detect behavior on ST boards arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 2 ++ arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 2 ++ arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 3 +++ 3 files changed, 7 insertions(+)
Aw: [PATCH] pinctrl: mediatek: add PUPD/R0/R1 support for MT7623
Hi, Problem seems to be board-specific, on my bananapi-r2 v1.0 i had no problems with accessing emmc if booted from sdcard. but with the Patch i can still access any mmc-device (tried booting from emmc and sd) Tested-By: Frank Wunderlich regards Frank
Re: [PATCH V2 4/5] pinctrl: renesas: Enable R8A774A1 PFC tables
On Fri, Jun 19, 2020 at 9:27 AM Marek Vasut wrote: > > On 6/19/20 4:25 PM, Adam Ford wrote: > > On Fri, Jun 19, 2020 at 9:18 AM Marek Vasut wrote: > >> > >> On 6/19/20 3:58 PM, Adam Ford wrote: > >>> The PFC tables for the R8A774A1 are already available, but they > >>> not enabled. > >>> > >>> This patch adds the Kconfig option and builds the corresponding file > >>> when PINCTRL_PFC_R8A774A1 is enabled. > >> > >> [...] > >> > >>> diff --git a/drivers/pinctrl/renesas/sh_pfc.h > >>> b/drivers/pinctrl/renesas/sh_pfc.h > >>> index db3d513358..b9ce471007 100644 > >>> --- a/drivers/pinctrl/renesas/sh_pfc.h > >>> +++ b/drivers/pinctrl/renesas/sh_pfc.h > >>> @@ -300,6 +300,7 @@ extern const struct sh_pfc_soc_info > >>> r8a7793_pinmux_info; > >>> extern const struct sh_pfc_soc_info r8a7794_pinmux_info; > >>> extern const struct sh_pfc_soc_info r8a7795_pinmux_info; > >>> extern const struct sh_pfc_soc_info r8a7796_pinmux_info; > >>> +extern const struct sh_pfc_soc_info r8a774a1_pinmux_info; > >>> extern const struct sh_pfc_soc_info r8a77965_pinmux_info; > >>> extern const struct sh_pfc_soc_info r8a77970_pinmux_info; > >>> extern const struct sh_pfc_soc_info r8a77980_pinmux_info; > >> > >> Please keep the lists sorted, all of them, where it makes sense. > > > > I was trying to do that. At least in hex. Doesn't 774a1 comes after > > 7796 and before 77965? > > I honestly don't know how to sort these lists well either, neither > option seems particularly good. What does Linux do ? I can make it match Linux or at least place it where it would be. Some of the entries in Linux don't exist in U-Boot, so would mean putting this at the top of the list. adam
Pull request, u-boot-tegra/master
Tom, Please pull u-boot-tegra/master into U-Boot/master. Thanks. All Tegra builds are OK on my system, and Stephen's test frame reports that all tests pass. The following changes since commit 9cb895203a46654f7ee6dd95be5c8ab05e4dfbd3: Merge tag 'u-boot-stm32-20200616' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2020-06-16 09:18:56 -0400) are available in the git repository at: ssh://twarren@git-mirror-santaclara:12001/m/denx.de/u-boot-tegra.git master for you to fetch changes up to 7b4f42b6cd5d8fa32f763b5ec03b7b8fdf7c4303: t210: Nano: Add NVME support (2020-06-18 15:12:34 -0700) Igor Opaniuk (1): colibri_t20: change maintainer Jon Hunter (2): firmware: PSCI: Fix PSCI support for OF live trees ARM: tegra: Enable PSCI support for Tegra210 and Tegra186 Tom Warren (1): t210: Nano: Add NVME support arch/arm/dts/tegra186.dtsi| 5 + arch/arm/dts/tegra210.dtsi| 5 + board/toradex/colibri_t20/MAINTAINERS | 2 +- configs/p3450-_defconfig | 1 + drivers/firmware/psci.c | 4 +--- 5 files changed, 13 insertions(+), 4 deletions(-)
Re: [PATCH V2 3/5] clk: renesas: Add R8A774A1 clock tables
On Fri, Jun 19, 2020 at 9:18 AM Marek Vasut wrote:
>
> On 6/19/20 3:58 PM, Adam Ford wrote:
> > This sync's the clock tables with the official release from
> > Renesas' repo based on U-Boot 2018.09 and modified to build into
> > the latest version of U-Boot.
>
> Can you import the clock table from Linux too ?
Sure thing. Doing so actually removed a note for missing clocks. :-)
>
> [...]
>
> > +static const struct mstp_stop_table r8a774a1_mstp_table[] = {
> > + { 0x0020, 0x0, 0x0020, 0 },
> > + { 0x, 0x0, 0x, 0 },
> > + { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 },
> > + { 0xFFDF, 0x400, 0xFFDF, 0 },
> > + { 0x8184, 0x180, 0x8184, 0 },
> > + { 0xC3FF, 0x0, 0xC3FF, 0 },
> > + { 0x, 0x0, 0x, 0 },
> > + { 0x, 0x0, 0x, 0 },
> > + { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 },
> > + { 0xFFFE, 0x0, 0xFFFE, 0 },
> > + { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 },
> > + { 0x00B7, 0x0, 0x00B7, 0 },
> > +};
>
> Can you check whether all those bits are really defined in the MSTP
> registers of the SoC ?
Can you give me a point on how to interpret this table? I copied it
from the Renesas release, and it looks the same as the table for the
R8A7796, but I don't know what it's supposed to do.
I found the RZG2M ref manual 1.00, and lists MSTPSR1-10 and
RMSTPCR1-10. Their initial values vary between revisions of the
silicon for the RZ/G2M, but there are 12 entries in the table, so I am
not even sure I'm looking at the right stuff in the ref manual.
thanks,
adam
repurposing dhcp command
Hi. Basically, bootp command and dhcp command have the same logic, no difference whatsoever. Also, sometimes, It's needed to just acquire an IP address using dhcp and boot in some other way (NFS). I'm suggesting repurposing the dhcp command to only do DHCP IP address acquisition. Users could use "bootp" command instead, or just type "dhcp && tftpboot" What do you think ? Thanks, Ramon.
[PATCH v2 11/14] sandbox: Move section u_boot_list to make it RW
In order to be able to update data in u_boot_list, move this section to make it RW. Signed-off-by: Walter Lozano --- arch/sandbox/cpu/u-boot-spl.lds | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/sandbox/cpu/u-boot-spl.lds b/arch/sandbox/cpu/u-boot-spl.lds index de65b01b33..c60eb109b1 100644 --- a/arch/sandbox/cpu/u-boot-spl.lds +++ b/arch/sandbox/cpu/u-boot-spl.lds @@ -20,4 +20,4 @@ SECTIONS __bss_start = .; } -INSERT BEFORE .data; +INSERT AFTER .data; -- 2.20.1
[PATCH v2 12/14] arm: dts: include gpio nodes for card detect
Several MMC drivers use GPIO for card detection with cd-gpios property in
the MMC node pointing to a GPIO node. However, as U-Boot tries to save
space by keeping only required nodes using u-boot* properties, several
devices tree result in having only in the MMC node but not the GPIO node
associated to cd-gpios.
This patch, fixes several ocurrence of this issue.
Signed-off-by: Walter Lozano
---
arch/arm/dts/da850-evm-u-boot.dtsi| 4
arch/arm/dts/da850-lcdk-u-boot.dtsi | 4
arch/arm/dts/rk3288-u-boot.dtsi | 4
arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 2 +-
arch/arm/dts/rk3288-veyron-u-boot.dtsi| 11 +++
5 files changed, 24 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/rk3288-veyron-u-boot.dtsi
diff --git a/arch/arm/dts/da850-evm-u-boot.dtsi
b/arch/arm/dts/da850-evm-u-boot.dtsi
index d9afc5edf4..d588628641 100644
--- a/arch/arm/dts/da850-evm-u-boot.dtsi
+++ b/arch/arm/dts/da850-evm-u-boot.dtsi
@@ -39,3 +39,7 @@
{
u-boot,dm-spl;
};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/da850-lcdk-u-boot.dtsi
b/arch/arm/dts/da850-lcdk-u-boot.dtsi
index b372d06ca9..d50775c173 100644
--- a/arch/arm/dts/da850-lcdk-u-boot.dtsi
+++ b/arch/arm/dts/da850-lcdk-u-boot.dtsi
@@ -28,3 +28,7 @@
{
u-boot,dm-spl;
};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
index 6d31735362..51b6e018bd 100644
--- a/arch/arm/dts/rk3288-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-u-boot.dtsi
@@ -43,3 +43,7 @@
{
u-boot,dm-pre-reloc;
};
+
+ {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
index eccc069368..251fbdee71 100644
--- a/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
+++ b/arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi
@@ -3,7 +3,7 @@
* Copyright 2015 Google, Inc
*/
-#include "rk3288-u-boot.dtsi"
+#include "rk3288-veyron-u-boot.dtsi"
{
rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
diff --git a/arch/arm/dts/rk3288-veyron-u-boot.dtsi
b/arch/arm/dts/rk3288-veyron-u-boot.dtsi
new file mode 100644
index 00..899fe6e7a0
--- /dev/null
+++ b/arch/arm/dts/rk3288-veyron-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2015 Google, Inc
+ */
+
+#include "rk3288-u-boot.dtsi"
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
--
2.20.1
[PATCH v2 10/14] dtoc: update tests to match new platdata
After using a new approach to link nodes when OF_PLATDATA is enabled
the test cases need to be update.
This patch updates the tests based on this new implementation.
Signed-off-by: Walter Lozano
---
tools/dtoc/test_dtoc.py | 103 +++-
1 file changed, 60 insertions(+), 43 deletions(-)
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index ae3ec509c1..b13904008a 100755
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -48,6 +48,9 @@ C_HEADER = '''/*
#include
'''
+C_EMPTY_POPULATE_PHANDLE_DATA = '''void dm_populate_phandle_data(void) {
+}
+'''
def get_dtb_file(dts_fname, capture_stderr=False):
@@ -167,7 +170,7 @@ class TestDtoc(unittest.TestCase):
self.run_test(['platdata'], dtb_file, output)
with open(output) as infile:
lines = infile.read().splitlines()
-self.assertEqual(C_HEADER.splitlines() + [''], lines)
+self.assertEqual(C_HEADER.splitlines() + [''] +
C_EMPTY_POPULATE_PHANDLE_DATA.splitlines(), lines)
def test_simple(self):
"""Test output from some simple nodes with various types of data"""
@@ -202,7 +205,7 @@ struct dtd_sandbox_spl_test_2 {
with open(output) as infile:
data = infile.read()
self._CheckStrings(C_HEADER + '''
-static const struct dtd_sandbox_spl_test dtv_spl_test = {
+static struct dtd_sandbox_spl_test dtv_spl_test = {
\t.boolval\t\t= true,
\t.bytearray\t\t= {0x6, 0x0, 0x0},
\t.byteval\t\t= 0x5,
@@ -220,7 +223,7 @@ U_BOOT_DEVICE(spl_test) = {
\t.platdata_size\t= sizeof(dtv_spl_test),
};
-static const struct dtd_sandbox_spl_test dtv_spl_test2 = {
+static struct dtd_sandbox_spl_test dtv_spl_test2 = {
\t.bytearray\t\t= {0x1, 0x23, 0x34},
\t.byteval\t\t= 0x8,
\t.intarray\t\t= {0x5, 0x0, 0x0, 0x0},
@@ -236,7 +239,7 @@ U_BOOT_DEVICE(spl_test2) = {
\t.platdata_size\t= sizeof(dtv_spl_test2),
};
-static const struct dtd_sandbox_spl_test dtv_spl_test3 = {
+static struct dtd_sandbox_spl_test dtv_spl_test3 = {
\t.stringarray\t\t= {"one", "", ""},
};
U_BOOT_DEVICE(spl_test3) = {
@@ -245,7 +248,7 @@ U_BOOT_DEVICE(spl_test3) = {
\t.platdata_size\t= sizeof(dtv_spl_test3),
};
-static const struct dtd_sandbox_spl_test_2 dtv_spl_test4 = {
+static struct dtd_sandbox_spl_test_2 dtv_spl_test4 = {
};
U_BOOT_DEVICE(spl_test4) = {
\t.name\t\t= "sandbox_spl_test_2",
@@ -253,7 +256,7 @@ U_BOOT_DEVICE(spl_test4) = {
\t.platdata_size\t= sizeof(dtv_spl_test4),
};
-static const struct dtd_sandbox_i2c_test dtv_i2c_at_0 = {
+static struct dtd_sandbox_i2c_test dtv_i2c_at_0 = {
};
U_BOOT_DEVICE(i2c_at_0) = {
\t.name\t\t= "sandbox_i2c_test",
@@ -261,7 +264,7 @@ U_BOOT_DEVICE(i2c_at_0) = {
\t.platdata_size\t= sizeof(dtv_i2c_at_0),
};
-static const struct dtd_sandbox_pmic_test dtv_pmic_at_9 = {
+static struct dtd_sandbox_pmic_test dtv_pmic_at_9 = {
\t.low_power\t\t= true,
\t.reg\t\t\t= {0x9, 0x0},
};
@@ -271,7 +274,7 @@ U_BOOT_DEVICE(pmic_at_9) = {
\t.platdata_size\t= sizeof(dtv_pmic_at_9),
};
-''', data)
+''' + C_EMPTY_POPULATE_PHANDLE_DATA, data)
def test_driver_alias(self):
"""Test output from a device tree file with a driver alias"""
@@ -293,7 +296,7 @@ struct dtd_sandbox_gpio {
with open(output) as infile:
data = infile.read()
self._CheckStrings(C_HEADER + '''
-static const struct dtd_sandbox_gpio dtv_gpios_at_0 = {
+static struct dtd_sandbox_gpio dtv_gpios_at_0 = {
\t.gpio_bank_name\t\t= "a",
\t.gpio_controller\t= true,
\t.sandbox_gpio_count\t= 0x14,
@@ -304,6 +307,8 @@ U_BOOT_DEVICE(gpios_at_0) = {
\t.platdata_size\t= sizeof(dtv_gpios_at_0),
};
+void dm_populate_phandle_data(void) {
+}
''', data)
def test_invalid_driver(self):
@@ -324,7 +329,7 @@ struct dtd_invalid {
with open(output) as infile:
data = infile.read()
self._CheckStrings(C_HEADER + '''
-static const struct dtd_invalid dtv_spl_test = {
+static struct dtd_invalid dtv_spl_test = {
};
U_BOOT_DEVICE(spl_test) = {
\t.name\t\t= "invalid",
@@ -332,6 +337,8 @@ U_BOOT_DEVICE(spl_test) = {
\t.platdata_size\t= sizeof(dtv_spl_test),
};
+void dm_populate_phandle_data(void) {
+}
''', data)
def test_phandle(self):
@@ -354,7 +361,7 @@ struct dtd_target {
with open(output) as infile:
data = infile.read()
self._CheckStrings(C_HEADER + '''
-static const struct dtd_target dtv_phandle_target = {
+static struct dtd_target dtv_phandle_target = {
\t.intval\t\t\t= 0x0,
};
U_BOOT_DEVICE(phandle_target) = {
@@ -363,7 +370,7 @@ U_BOOT_DEVICE(phandle_target) = {
\t.platdata_size\t= sizeof(dtv_phandle_target),
};
-static const struct dtd_target dtv_phandle2_target = {
+static struct dtd_target dtv_phandle2_target = {
\t.intval\t\t\t= 0x1,
};
U_BOOT_DEVICE(phandle2_target) = {
@@ -372,7 +379,7 @@ U_BOOT_DEVICE(phandle2_target) = {
\t.platdata_size\t= sizeof(dtv_phandle2_target),
};
-static const struct dtd_target
[PATCH v2 14/14] dtoc add test for cd-gpios
Add a test for dtoc taking into account the cd-gpios property.
Signed-off-by: Walter Lozano
---
tools/dtoc/dtoc_test_phandle_cd_gpios.dts | 42 ++
tools/dtoc/test_dtoc.py | 67 +++
2 files changed, 109 insertions(+)
create mode 100644 tools/dtoc/dtoc_test_phandle_cd_gpios.dts
diff --git a/tools/dtoc/dtoc_test_phandle_cd_gpios.dts
b/tools/dtoc/dtoc_test_phandle_cd_gpios.dts
new file mode 100644
index 00..241743e73e
--- /dev/null
+++ b/tools/dtoc/dtoc_test_phandle_cd_gpios.dts
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test device tree file for dtoc
+ *
+ * Copyright 2020 Collabora Ltd.
+ */
+
+/dts-v1/;
+
+/ {
+ phandle: phandle-target {
+ u-boot,dm-pre-reloc;
+ compatible = "target";
+ intval = <0>;
+ #gpio-cells = <0>;
+ };
+
+ phandle_1: phandle2-target {
+ u-boot,dm-pre-reloc;
+ compatible = "target";
+ intval = <1>;
+ #gpio-cells = <1>;
+ };
+ phandle_2: phandle3-target {
+ u-boot,dm-pre-reloc;
+ compatible = "target";
+ intval = <2>;
+ #gpio-cells = <2>;
+ };
+
+ phandle-source {
+ u-boot,dm-pre-reloc;
+ compatible = "source";
+ cd-gpios = < _1 11 _2 12 13 >;
+ };
+
+ phandle-source2 {
+ u-boot,dm-pre-reloc;
+ compatible = "source";
+ cd-gpios = <>;
+ };
+};
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 72831dc2df..c7fabe7696 100755
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -465,6 +465,73 @@ U_BOOT_DEVICE(phandle_source2) = {
void dm_populate_phandle_data(void) {
\tdtv_phandle_source2.clocks[0].node = DM_GET_DEVICE(phandle_target);
}
+''', data)
+
+def test_phandle_cd_gpio(self):
+"""Test that phandle targets are generated when unsing cd-gpios"""
+dtb_file = get_dtb_file('dtoc_test_phandle_cd_gpios.dts')
+output = tools.GetOutputFilename('output')
+dtb_platdata.run_steps(['platdata'], dtb_file, False, output, True)
+with open(output) as infile:
+data = infile.read()
+self._CheckStrings(C_HEADER + '''
+static struct dtd_target dtv_phandle_target = {
+\t.intval\t\t\t= 0x0,
+};
+U_BOOT_DEVICE(phandle_target) = {
+\t.name\t\t= "target",
+\t.platdata\t= _phandle_target,
+\t.platdata_size\t= sizeof(dtv_phandle_target),
+};
+
+static struct dtd_target dtv_phandle2_target = {
+\t.intval\t\t\t= 0x1,
+};
+U_BOOT_DEVICE(phandle2_target) = {
+\t.name\t\t= "target",
+\t.platdata\t= _phandle2_target,
+\t.platdata_size\t= sizeof(dtv_phandle2_target),
+};
+
+static struct dtd_target dtv_phandle3_target = {
+\t.intval\t\t\t= 0x2,
+};
+U_BOOT_DEVICE(phandle3_target) = {
+\t.name\t\t= "target",
+\t.platdata\t= _phandle3_target,
+\t.platdata_size\t= sizeof(dtv_phandle3_target),
+};
+
+static struct dtd_source dtv_phandle_source = {
+\t.cd_gpios\t\t= {
+\t\t\t{NULL, {}},
+\t\t\t{NULL, {11}},
+\t\t\t{NULL, {12, 13}},
+\t\t\t{NULL, {}},},
+};
+U_BOOT_DEVICE(phandle_source) = {
+\t.name\t\t= "source",
+\t.platdata\t= _phandle_source,
+\t.platdata_size\t= sizeof(dtv_phandle_source),
+};
+
+static struct dtd_source dtv_phandle_source2 = {
+\t.cd_gpios\t\t= {
+\t\t\t{NULL, {}},},
+};
+U_BOOT_DEVICE(phandle_source2) = {
+\t.name\t\t= "source",
+\t.platdata\t= _phandle_source2,
+\t.platdata_size\t= sizeof(dtv_phandle_source2),
+};
+
+void dm_populate_phandle_data(void) {
+\tdtv_phandle_source.cd_gpios[0].node = DM_GET_DEVICE(phandle_target);
+\tdtv_phandle_source.cd_gpios[1].node = DM_GET_DEVICE(phandle2_target);
+\tdtv_phandle_source.cd_gpios[2].node = DM_GET_DEVICE(phandle3_target);
+\tdtv_phandle_source.cd_gpios[3].node = DM_GET_DEVICE(phandle_target);
+\tdtv_phandle_source2.cd_gpios[0].node = DM_GET_DEVICE(phandle_target);
+}
''', data)
def test_phandle_bad(self):
--
2.20.1
[PATCH v2 13/14] dtoc: update dtb_platdata to support cd-gpios
Currently dtoc does not support the property cd-gpios used to declare
the gpios for card detect in mmc.
This patch adds support to cd-gpios property.
Signed-off-by: Walter Lozano
---
tools/dtoc/dtb_platdata.py | 13 -
tools/dtoc/test_dtoc.py| 2 +-
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 4262b8687f..831acf3b8a 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -257,7 +257,7 @@ class DtbPlatdata(object):
Return:
Number of argument cells is this is a phandle, else None
"""
-if prop.name in ['clocks']:
+if prop.name in ['clocks', 'cd-gpios']:
if not isinstance(prop.value, list):
prop.value = [prop.value]
val = prop.value
@@ -277,11 +277,14 @@ class DtbPlatdata(object):
if not target:
raise ValueError("Cannot parse '%s' in node '%s'" %
(prop.name, node_name))
-prop_name = '#clock-cells'
-cells = target.props.get(prop_name)
+cells = None
+for prop_name in ['#clock-cells', '#gpio-cells']:
+cells = target.props.get(prop_name)
+if cells:
+break
if not cells:
-raise ValueError("Node '%s' has no '%s' property" %
-(target.name, prop_name))
+raise ValueError("Node '%s' has no cells property" %
+(target.name))
num_args = fdt_util.fdt32_to_cpu(cells.value)
max_args = max(max_args, num_args)
args.append(num_args)
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index b13904008a..72831dc2df 100755
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -484,7 +484,7 @@ void dm_populate_phandle_data(void) {
output = tools.GetOutputFilename('output')
with self.assertRaises(ValueError) as e:
self.run_test(['struct'], dtb_file, output)
-self.assertIn("Node 'phandle-target' has no '#clock-cells' property",
+self.assertIn("Node 'phandle-target' has no cells property",
str(e.exception))
def test_aliases(self):
--
2.20.1
[PATCH v2 05/14] dm: doc: update of-plat with the support for driver aliases
Update the documentation with the support for driver aliases using
U_BOOT_DRIVER_ALIAS.
Signed-off-by: Walter Lozano
---
doc/driver-model/of-plat.rst | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/doc/driver-model/of-plat.rst b/doc/driver-model/of-plat.rst
index 034a68bb4e..376d4409a5 100644
--- a/doc/driver-model/of-plat.rst
+++ b/doc/driver-model/of-plat.rst
@@ -183,6 +183,17 @@ via U_BOOT_DRIVER(). This effectively means that a
U_BOOT_DRIVER() with a
it to a valid name for C) is needed, so a dedicated driver is required for
each 'compatible' string.
+In order to make this a bit more flexible U_BOOT_DRIVER_ALIAS macro can be
+used to declare an alias for a driver name, typically a 'compatible' string.
+This macro produces no code, but it is by dtoc tool.
+
+During the build process dtoc parses both U_BOOT_DRIVER and U_BOOT_DRIVER_ALIAS
+to build a list of valid driver names and driver aliases. If the 'compatible'
+string used for a device does not not match a valid driver name, it will be
+checked against the list of driver aliases in order to get the right driver
+name to use. If in this step there is no match found a warning is issued to
+avoid run-time failures.
+
Where a node has multiple compatible strings, a #define is used to make them
equivalent, e.g.:
@@ -269,7 +280,7 @@ For example:
};
U_BOOT_DRIVER(mmc_drv) = {
-.name = "vendor_mmc", /* matches compatible string */
+.name = "mmc_drv",
.id = UCLASS_MMC,
.of_match = mmc_ids,
.ofdata_to_platdata = mmc_ofdata_to_platdata,
@@ -278,6 +289,7 @@ For example:
.platdata_auto_alloc_size = sizeof(struct mmc_platdata),
};
+U_BOOT_DRIVER_ALIAS(mmc_drv, vendor_mmc) /* matches compatible string */
Note that struct mmc_platdata is defined in the C file, not in a header. This
is to avoid needing to include dt-structs.h in a header file. The idea is to
--
2.20.1
[PATCH v2 04/14] dtoc: add option to disable warnings
As dtoc now performs checks for valid driver names, when running dtoc
tests several warnings arise as these tests don't use valid driver
names.
This patch adds an option to disable those warning, which is only
intended for running tests.
Signed-off-by: Walter Lozano
---
tools/dtoc/dtb_platdata.py | 11 +--
tools/dtoc/dtoc_test_invalid_driver.dts | 15
tools/dtoc/test_dtoc.py | 91 +
3 files changed, 84 insertions(+), 33 deletions(-)
create mode 100644 tools/dtoc/dtoc_test_invalid_driver.dts
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index c4701d3211..84c39608c3 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -141,6 +141,7 @@ class DtbPlatdata(object):
_valid_nodes: A list of Node object with compatible strings
_include_disabled: true to include nodes marked status = "disabled"
_outfile: The current output file (sys.stdout or a real file)
+_warning_disabled: true to disable warnings about driver names not
found
_lines: Stashed list of output lines for outputting in the future
_aliases: Dict that hold aliases for compatible strings
key: First compatible string declared in a node
@@ -151,12 +152,13 @@ class DtbPlatdata(object):
U_BOOT_DRIVER_ALIAS(driver_alias, driver_name)
value: Driver name declared with U_BOOT_DRIVER(driver_name)
"""
-def __init__(self, dtb_fname, include_disabled):
+def __init__(self, dtb_fname, include_disabled, warning_disabled):
self._fdt = None
self._dtb_fname = dtb_fname
self._valid_nodes = None
self._include_disabled = include_disabled
self._outfile = None
+self._warning_disabled = warning_disabled
self._lines = []
self._aliases = {}
self._drivers = []
@@ -184,7 +186,8 @@ class DtbPlatdata(object):
compat_c_old = compat_c
compat_c = self._driver_aliases.get(compat_c)
if not compat_c:
-print('WARNING: the driver %s was not found in the driver
list' % (compat_c_old))
+if not self._warning_disabled:
+print('WARNING: the driver %s was not found in the driver
list' % (compat_c_old))
compat_c = compat_c_old
else:
aliases_c = [compat_c_old] + aliases_c
@@ -632,7 +635,7 @@ class DtbPlatdata(object):
nodes_to_output.remove(node)
-def run_steps(args, dtb_file, include_disabled, output):
+def run_steps(args, dtb_file, include_disabled, output,
warning_disabled=False):
"""Run all the steps of the dtoc tool
Args:
@@ -644,7 +647,7 @@ def run_steps(args, dtb_file, include_disabled, output):
if not args:
raise ValueError('Please specify a command: struct, platdata')
-plat = DtbPlatdata(dtb_file, include_disabled)
+plat = DtbPlatdata(dtb_file, include_disabled, warning_disabled)
plat.scan_drivers()
plat.scan_dtb()
plat.scan_tree()
diff --git a/tools/dtoc/dtoc_test_invalid_driver.dts
b/tools/dtoc/dtoc_test_invalid_driver.dts
new file mode 100644
index 00..914ac3e899
--- /dev/null
+++ b/tools/dtoc/dtoc_test_invalid_driver.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test device tree file for dtoc
+ *
+ * Copyright 2017 Google, Inc
+ */
+
+/dts-v1/;
+
+/ {
+ spl-test {
+ u-boot,dm-pre-reloc;
+ compatible = "invalid";
+ };
+};
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 91fc9d77f3..ae3ec509c1 100755
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -12,6 +12,7 @@ tool.
import collections
import os
import struct
+import sys
import unittest
from dtoc import dtb_platdata
@@ -101,6 +102,10 @@ class TestDtoc(unittest.TestCase):
print('Failures written to /tmp/binman.{expected,actual}')
self.assertEquals(expected, actual)
+
+def run_test(self, args, dtb_file, output):
+dtb_platdata.run_steps(args, dtb_file, False, output, True)
+
def test_name(self):
"""Test conversion of device tree names to C identifiers"""
self.assertEqual('serial_at_0x12', conv_name_to_c('serial@0x12'))
@@ -154,12 +159,12 @@ class TestDtoc(unittest.TestCase):
"""Test output from a device tree file with no nodes"""
dtb_file = get_dtb_file('dtoc_test_empty.dts')
output = tools.GetOutputFilename('output')
-dtb_platdata.run_steps(['struct'], dtb_file, False, output)
+self.run_test(['struct'], dtb_file, output)
with open(output) as infile:
lines = infile.read().splitlines()
self.assertEqual(HEADER.splitlines(), lines)
-dtb_platdata.run_steps(['platdata'], dtb_file, False, output)
+self.run_test(['platdata'], dtb_file, output)
with open(output) as infile:
[PATCH v2 08/14] dtoc: extend dtoc to use struct driver_info when linking nodes
In the current implementation, when dtoc parses a dtb to generate a struct
platdata it converts the information related to linked nodes as pointers
to struct platdata of destination nodes. By doing this, it makes
difficult to get pointer to udevices created based on these
information.
This patch extends dtoc to use struct driver_info when populating
information about linked nodes, which makes it easier to later get
the devices created. In this context, reimplement functions like
clk_get_by_index_platdata() which made use of the previous approach.
Signed-off-by: Walter Lozano
---
drivers/clk/clk-uclass.c| 11 +--
drivers/misc/irq-uclass.c | 10 --
drivers/mmc/ftsdc010_mci.c | 2 +-
drivers/mmc/rockchip_dw_mmc.c | 2 +-
drivers/mmc/rockchip_sdhci.c| 2 +-
drivers/ram/rockchip/sdram_rk3399.c | 2 +-
drivers/spi/rk_spi.c| 2 +-
include/clk.h | 4 ++--
tools/dtoc/dtb_platdata.py | 24 +---
9 files changed, 37 insertions(+), 22 deletions(-)
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 71878474eb..412f26cd29 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -25,17 +25,16 @@ static inline const struct clk_ops *clk_dev_ops(struct
udevice *dev)
#if CONFIG_IS_ENABLED(OF_CONTROL)
# if CONFIG_IS_ENABLED(OF_PLATDATA)
-int clk_get_by_index_platdata(struct udevice *dev, int index,
- struct phandle_1_arg *cells, struct clk *clk)
+int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
+ struct clk *clk)
{
int ret;
- if (index != 0)
- return -ENOSYS;
- ret = uclass_get_device(UCLASS_CLK, 0, >dev);
+ ret = device_get_by_driver_info((struct driver_info *)cells->node,
+ >dev);
if (ret)
return ret;
- clk->id = cells[0].arg[0];
+ clk->id = cells->arg[0];
return 0;
}
diff --git a/drivers/misc/irq-uclass.c b/drivers/misc/irq-uclass.c
index 61aa10e465..3c38681108 100644
--- a/drivers/misc/irq-uclass.c
+++ b/drivers/misc/irq-uclass.c
@@ -63,17 +63,15 @@ int irq_read_and_clear(struct irq *irq)
}
#if CONFIG_IS_ENABLED(OF_PLATDATA)
-int irq_get_by_index_platdata(struct udevice *dev, int index,
- struct phandle_1_arg *cells, struct irq *irq)
+int irq_get_by_driver_info(struct udevice *dev,
+ struct phandle_1_arg *cells, struct irq *irq)
{
int ret;
- if (index != 0)
- return -ENOSYS;
- ret = uclass_get_device(UCLASS_IRQ, 0, >dev);
+ ret = device_get_by_driver_info(cells->node, >dev);
if (ret)
return ret;
- irq->id = cells[0].arg[0];
+ irq->id = cells->arg[0];
return 0;
}
diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
index 9c15eb36d6..efa92d48be 100644
--- a/drivers/mmc/ftsdc010_mci.c
+++ b/drivers/mmc/ftsdc010_mci.c
@@ -437,7 +437,7 @@ static int ftsdc010_mmc_probe(struct udevice *dev)
chip->priv = dev;
chip->dev_index = 1;
memcpy(priv->minmax, dtplat->clock_freq_min_max, sizeof(priv->minmax));
- ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, >clk);
+ ret = clk_get_by_driver_info(dev, dtplat->clocks, >clk);
if (ret < 0)
return ret;
#endif
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index ac710324c8..80432ddbbc 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -120,7 +120,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
priv->minmax[0] = 40; /* 400 kHz */
priv->minmax[1] = dtplat->max_frequency;
- ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, >clk);
+ ret = clk_get_by_driver_info(dev, dtplat->clocks, >clk);
if (ret < 0)
return ret;
#else
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index b440996b26..b073f1a08d 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -46,7 +46,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
host->name = dev->name;
host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
max_frequency = dtplat->max_frequency;
- ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, );
+ ret = clk_get_by_driver_info(dev, dtplat->clocks, );
#else
max_frequency = dev_read_u32_default(dev, "max-frequency", 0);
ret = clk_get_by_index(dev, 0, );
diff --git a/drivers/ram/rockchip/sdram_rk3399.c
b/drivers/ram/rockchip/sdram_rk3399.c
index d69ef01d08..87ec25f893 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -3125,7 +3125,7 @@ static int rk3399_dmc_init(struct udevice *dev)
priv->cic,
[PATCH v2 07/14] core: extend struct driver_info to point to device
Currently when creating an U_BOOT_DEVICE entry a struct driver_info
is declared, which contains the data needed to instantiate the device.
However, the actual device is created at runtime and there is no proper
way to get the device based on its struct driver_info.
This patch extends struct driver_info adding a pointer to udevice which
is populated during the bind process, allowing to generate a set of
functions to get the device based on its struct driver_info.
Signed-off-by: Walter Lozano
---
drivers/core/device.c | 26 +++---
drivers/core/root.c | 4
include/dm/device.h | 15 +++
include/dm/platdata.h | 14 ++
4 files changed, 56 insertions(+), 3 deletions(-)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index a0ad080aaf..4f8c97a195 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -250,6 +250,7 @@ int device_bind_by_name(struct udevice *parent, bool
pre_reloc_only,
{
struct driver *drv;
uint platdata_size = 0;
+ int ret;
drv = lists_driver_lookup_name(info->name);
if (!drv)
@@ -260,9 +261,16 @@ int device_bind_by_name(struct udevice *parent, bool
pre_reloc_only,
#if CONFIG_IS_ENABLED(OF_PLATDATA)
platdata_size = info->platdata_size;
#endif
- return device_bind_common(parent, drv, info->name,
- (void *)info->platdata, 0, ofnode_null(), platdata_size,
- devp);
+ ret = device_bind_common(parent, drv, info->name,
+(void *)info->platdata, 0, ofnode_null(),
+platdata_size, devp);
+ if (ret)
+ return ret;
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ info->dev = *devp;
+#endif
+
+ return ret;
}
static void *alloc_priv(int size, uint flags)
@@ -727,6 +735,18 @@ int device_get_global_by_ofnode(ofnode ofnode, struct
udevice **devp)
return device_get_device_tail(dev, dev ? 0 : -ENOENT, devp);
}
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+int device_get_by_driver_info(const struct driver_info *info,
+ struct udevice **devp)
+{
+ struct udevice *dev;
+
+ dev = info->dev;
+
+ return device_get_device_tail(dev, dev ? 0 : -ENOENT, devp);
+}
+#endif
+
int device_find_first_child(const struct udevice *parent, struct udevice
**devp)
{
if (list_empty(>child_head)) {
diff --git a/drivers/core/root.c b/drivers/core/root.c
index c9ee56478a..2643ef68a7 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -346,6 +346,10 @@ int dm_init_and_scan(bool pre_reloc_only)
{
int ret;
+#if CONFIG_IS_ENABLED(OF_PLATDATA)
+ dm_populate_phandle_data();
+#endif
+
ret = dm_init(IS_ENABLED(CONFIG_OF_LIVE));
if (ret) {
debug("dm_init() failed: %d\n", ret);
diff --git a/include/dm/device.h b/include/dm/device.h
index 2cfe10766f..f5738a0cee 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -538,6 +538,21 @@ int device_find_global_by_ofnode(ofnode node, struct
udevice **devp);
*/
int device_get_global_by_ofnode(ofnode node, struct udevice **devp);
+/**
+ * device_get_by_driver_info() - Get a device based on driver_info
+ *
+ * Locates a device by its struct driver_info, by using its reference which
+ * is updated during the bind process.
+ *
+ * The device is probed to activate it ready for use.
+ *
+ * @info: Struct driver_info
+ * @devp: Returns pointer to device if found, otherwise this is set to NULL
+ * @return 0 if OK, -ve on error
+ */
+int device_get_by_driver_info(const struct driver_info *info,
+ struct udevice **devp);
+
/**
* device_find_first_child() - Find the first child of a device
*
diff --git a/include/dm/platdata.h b/include/dm/platdata.h
index c972fa6936..cab93b071b 100644
--- a/include/dm/platdata.h
+++ b/include/dm/platdata.h
@@ -22,12 +22,14 @@
* @name: Driver name
* @platdata: Driver-specific platform data
* @platdata_size: Size of platform data structure
+ * @dev: Device created from this structure data
*/
struct driver_info {
const char *name;
const void *platdata;
#if CONFIG_IS_ENABLED(OF_PLATDATA)
uint platdata_size;
+ struct udevice *dev;
#endif
};
@@ -43,4 +45,16 @@ struct driver_info {
#define U_BOOT_DEVICES(__name) \
ll_entry_declare_list(struct driver_info, __name, driver_info)
+/* Get a pointer to a given driver */
+#define DM_GET_DEVICE(__name) \
+ ll_entry_get(struct driver_info, __name, driver_info)
+
+/**
+ * dm_populate_phandle_data() - Populates phandle data in platda
+ *
+ * This populates phandle data with an U_BOOT_DEVICE entry get by
+ * DM_GET_DEVICE. The implementation of this function will be done
+ * by dtoc when parsing dtb.
+ */
+void dm_populate_phandle_data(void);
#endif
--
2.20.1
[PATCH v2 09/14] dm: doc: update of-plat with new phandle support
Update documentation to reflect the new phandle support when OF_PLATDATA
is used. Now phandles are implemented as pointers to U_BOOT_DEVICE,
which makes it possible to get a pointer to the actual device.
Signed-off-by: Walter Lozano
---
doc/driver-model/of-plat.rst | 24
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/doc/driver-model/of-plat.rst b/doc/driver-model/of-plat.rst
index 376d4409a5..1e3fad137b 100644
--- a/doc/driver-model/of-plat.rst
+++ b/doc/driver-model/of-plat.rst
@@ -69,9 +69,8 @@ strictly necessary. Notable problems include:
- Correct relations between nodes are not implemented. This means that
parent/child relations (like bus device iteration) do not work yet.
Some phandles (those that are recognised as such) are converted into
- a pointer to platform data. This pointer can potentially be used to
- access the referenced device (by searching for the pointer value).
- This feature is not yet implemented, however.
+ a pointer to struct driver_info. This pointer can be used to access
+ the referenced device.
How it works
@@ -146,10 +145,10 @@ and the following device declaration:
.clock_freq_min_max = {0x61a80, 0x8f0d180},
.vmmc_supply= 0xb,
.num_slots = 0x1,
-.clocks = {{_clock_controller_at_ff76,
456},
- {_clock_controller_at_ff76, 68},
- {_clock_controller_at_ff76,
114},
- {_clock_controller_at_ff76,
118}},
+.clocks = {{NULL, 456},
+ {NULL, 68},
+ {NULL, 114},
+ {NULL, 118}},
.cap_mmc_highspeed = true,
.disable_wp = true,
.bus_width = 0x4,
@@ -164,6 +163,13 @@ and the following device declaration:
.platdata_size = sizeof(dtv_dwmmc_at_ff0c),
};
+void dm_populate_phandle_data(void) {
+dtv_dwmmc_at_ff0c.clocks[0].node =
DM_GET_DEVICE(clock_controller_at_ff76);
+dtv_dwmmc_at_ff0c.clocks[1].node =
DM_GET_DEVICE(clock_controller_at_ff76);
+dtv_dwmmc_at_ff0c.clocks[2].node =
DM_GET_DEVICE(clock_controller_at_ff76);
+dtv_dwmmc_at_ff0c.clocks[3].node =
DM_GET_DEVICE(clock_controller_at_ff76);
+}
+
The device is then instantiated at run-time and the platform data can be
accessed using:
@@ -329,7 +335,9 @@ prevents them being used inadvertently. All usage must be
bracketed with
#if CONFIG_IS_ENABLED(OF_PLATDATA).
The dt-platdata.c file contains the device declarations and is is built in
-spl/dt-platdata.c.
+spl/dt-platdata.c. It additionally contains the definition of
+dm_populate_phandle_data() which is responsible of filling the phandle
+information by adding references to U_BOOT_DEVICE by using DM_GET_DEVICE
The beginnings of a libfdt Python module are provided. So far this only
implements a subset of the features.
--
2.20.1
[PATCH v2 06/14] core: drop const for struct driver_info
In order to prepare for a new support of phandle when OF_PLATDATA is used
drop the const for struct driver_info as this struct will need to be
updated on runtime.
Signed-off-by: Walter Lozano
---
drivers/core/device.c| 2 +-
drivers/core/root.c | 2 +-
include/dm/device-internal.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 0157bb1fe0..a0ad080aaf 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -246,7 +246,7 @@ int device_bind_ofnode(struct udevice *parent, const struct
driver *drv,
}
int device_bind_by_name(struct udevice *parent, bool pre_reloc_only,
- const struct driver_info *info, struct udevice **devp)
+ struct driver_info *info, struct udevice **devp)
{
struct driver *drv;
uint platdata_size = 0;
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 14df16c280..c9ee56478a 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -25,7 +25,7 @@
DECLARE_GLOBAL_DATA_PTR;
-static const struct driver_info root_info = {
+static struct driver_info root_info = {
.name = "root_driver",
};
diff --git a/include/dm/device-internal.h b/include/dm/device-internal.h
index 294d6c1810..5145fb4e14 100644
--- a/include/dm/device-internal.h
+++ b/include/dm/device-internal.h
@@ -81,7 +81,7 @@ int device_bind_with_driver_data(struct udevice *parent,
* @return 0 if OK, -ve on error
*/
int device_bind_by_name(struct udevice *parent, bool pre_reloc_only,
- const struct driver_info *info, struct udevice **devp);
+ struct driver_info *info, struct udevice **devp);
/**
* device_ofdata_to_platdata() - Read platform data for a device
--
2.20.1
[PATCH v2 00/14] improve OF_PLATDATA support
When using OF_PLATDATA dtbs are converted to C structs in order to save space as we can remove both dtbs and libraries from TPL/SPL binaries. This patchset tries to improve its support by overcoming some limitations in the current implementation First, the support for scan and check for valid driver/aliases is added in order to generate U_BOOT_DEVICE entries with valid driver names. Secondly, the way information about linked noded (phandle) is generated in C structs is improved in order to make it easier to get a device associated to its data. Lastly the support for the property cd-gpios is added, which is used to configure the card detection gpio on MMC is added. This implementation is based in discussion in [1], [2] and [3] [1] https://patchwork.ozlabs.org/patch/1249198/ [2] https://patchwork.ozlabs.org/project/uboot/list/?series=167495=* [3] https://patchwork.ozlabs.org/project/uboot/list/?series=176759=* Walter Lozano (14): drivers: rename drivers to match compatible string dtoc: add missing code comments dtoc: add support to scan drivers dtoc: add option to disable warnings dm: doc: update of-plat with the support for driver aliases core: drop const for struct driver_info core: extend struct driver_info to point to device dtoc: extend dtoc to use struct driver_info when linking nodes dm: doc: update of-plat with new phandle support dtoc: update tests to match new platdata sandbox: Move section u_boot_list to make it RW arm: dts: include gpio nodes for card detect dtoc: update dtb_platdata to support cd-gpios dtoc add test for cd-gpios arch/arm/dts/da850-evm-u-boot.dtsi| 4 + arch/arm/dts/da850-lcdk-u-boot.dtsi | 4 + arch/arm/dts/rk3288-u-boot.dtsi | 4 + arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi | 2 +- arch/arm/dts/rk3288-veyron-u-boot.dtsi| 11 + .../mach-at91/arm926ejs/at91sam9260_devices.c | 6 +- .../arm926ejs/at91sam9m10g45_devices.c| 10 +- arch/arm/mach-rockchip/rk3328/syscon_rk3328.c | 4 +- arch/sandbox/cpu/u-boot-spl.lds | 2 +- board/davinci/da8xxevm/omapl138_lcdk.c| 2 +- board/sandbox/sandbox.c | 2 +- doc/driver-model/of-plat.rst | 38 ++- drivers/clk/at91/clk-master.c | 4 +- drivers/clk/at91/clk-peripheral.c | 4 +- drivers/clk/at91/pmc.c| 6 +- drivers/clk/clk-uclass.c | 11 +- drivers/core/device.c | 28 +- drivers/core/root.c | 6 +- drivers/core/simple-bus.c | 4 +- drivers/gpio/at91_gpio.c | 4 +- drivers/gpio/da8xx_gpio.c | 4 +- drivers/gpio/mxs_gpio.c | 8 +- drivers/gpio/rk_gpio.c| 4 +- drivers/gpio/sandbox.c| 6 +- drivers/i2c/rk_i2c.c | 6 +- drivers/input/cros_ec_keyb.c | 4 +- drivers/misc/cros_ec_sandbox.c| 4 +- drivers/misc/irq-uclass.c | 10 +- drivers/mmc/davinci_mmc.c | 4 +- drivers/mmc/ftsdc010_mci.c| 2 +- drivers/mmc/mxsmmc.c | 7 +- drivers/mmc/rockchip_dw_mmc.c | 7 +- drivers/mmc/rockchip_sdhci.c | 2 +- drivers/mtd/spi/sf-uclass.c | 2 +- drivers/mtd/spi/sf_probe.c| 6 +- drivers/pinctrl/nxp/pinctrl-mxs.c | 6 +- drivers/pinctrl/pinctrl-at91.c| 6 +- drivers/pinctrl/rockchip/pinctrl-rk3188.c | 2 +- drivers/pinctrl/rockchip/pinctrl-rk3288.c | 2 +- drivers/pinctrl/rockchip/pinctrl-rk3328.c | 2 +- drivers/pinctrl/rockchip/pinctrl-rk3368.c | 2 +- drivers/power/pmic/rk8xx.c| 6 +- drivers/power/regulator/fixed.c | 4 +- drivers/ram/rockchip/dmc-rk3368.c | 2 +- drivers/ram/rockchip/sdram_rk3188.c | 2 +- drivers/ram/rockchip/sdram_rk3288.c | 2 +- drivers/ram/rockchip/sdram_rk3328.c | 2 +- drivers/ram/rockchip/sdram_rk3399.c | 2 +- drivers/serial/ns16550.c | 4 + drivers/serial/sandbox.c | 6 +- drivers/spi/mxs_spi.c | 8 +- drivers/spi/rk_spi.c | 10 +- drivers/spi/sandbox_spi.c | 4 +- drivers/tpm/tpm_tis_sandbox.c | 4 +- drivers/video/rockchip/rk3288_vop.c | 4 +- drivers/video/sandbox_sdl.c | 4 +- drivers/watchdog/at91sam9_wdt.c | 4 +- include/clk.h | 4 +- include/dm/device-internal.h | 2 +- include/dm/device.h | 22 ++ include/dm/platdata.h
[PATCH v2 01/14] drivers: rename drivers to match compatible string
When using OF_PLATDATA, the bind process between devices and drivers
is performed trying to match compatible string with driver names.
However driver names are not strictly defined, and also there are different
names used when declaring a driver with U_BOOT_DRIVER, the name of the
symbol used in the linker list and the used in the struct driver_info.
In order to make things a bit more clear, rename the drivers names. This
will also help for further OF_PLATDATA improvements, such as checking
for valid driver names.
Signed-off-by: Walter Lozano
---
.../mach-at91/arm926ejs/at91sam9260_devices.c | 6 +--
.../arm926ejs/at91sam9m10g45_devices.c| 10 ++--
arch/arm/mach-rockchip/rk3328/syscon_rk3328.c | 4 +-
board/davinci/da8xxevm/omapl138_lcdk.c| 2 +-
board/sandbox/sandbox.c | 2 +-
drivers/clk/at91/clk-master.c | 4 +-
drivers/clk/at91/clk-peripheral.c | 4 +-
drivers/clk/at91/pmc.c| 4 +-
drivers/core/simple-bus.c | 4 +-
drivers/gpio/at91_gpio.c | 4 +-
drivers/gpio/da8xx_gpio.c | 4 +-
drivers/gpio/mxs_gpio.c | 6 +--
drivers/gpio/rk_gpio.c| 4 +-
drivers/gpio/sandbox.c| 4 +-
drivers/i2c/rk_i2c.c | 4 +-
drivers/input/cros_ec_keyb.c | 4 +-
drivers/misc/cros_ec_sandbox.c| 4 +-
drivers/mmc/davinci_mmc.c | 4 +-
drivers/mmc/mxsmmc.c | 6 +--
drivers/mmc/rockchip_dw_mmc.c | 2 +-
drivers/mtd/spi/sf-uclass.c | 2 +-
drivers/mtd/spi/sf_probe.c| 4 +-
drivers/pinctrl/nxp/pinctrl-mxs.c | 4 +-
drivers/pinctrl/pinctrl-at91.c| 4 +-
drivers/pinctrl/rockchip/pinctrl-rk3188.c | 2 +-
drivers/pinctrl/rockchip/pinctrl-rk3288.c | 2 +-
drivers/pinctrl/rockchip/pinctrl-rk3328.c | 2 +-
drivers/pinctrl/rockchip/pinctrl-rk3368.c | 2 +-
drivers/power/pmic/rk8xx.c| 4 +-
drivers/power/regulator/fixed.c | 4 +-
drivers/ram/rockchip/dmc-rk3368.c | 2 +-
drivers/ram/rockchip/sdram_rk3188.c | 2 +-
drivers/ram/rockchip/sdram_rk3288.c | 2 +-
drivers/ram/rockchip/sdram_rk3328.c | 2 +-
drivers/serial/sandbox.c | 6 +--
drivers/spi/mxs_spi.c | 6 +--
drivers/spi/rk_spi.c | 6 +--
drivers/spi/sandbox_spi.c | 4 +-
drivers/tpm/tpm_tis_sandbox.c | 4 +-
drivers/video/rockchip/rk3288_vop.c | 4 +-
drivers/video/sandbox_sdl.c | 4 +-
drivers/watchdog/at91sam9_wdt.c | 4 +-
test/dm/gpio.c| 2 +-
test/dm/spi.c | 6 +--
test/py/tests/test_bind.py| 54 +--
45 files changed, 104 insertions(+), 120 deletions(-)
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
index c033ed6d16..8122d2f98e 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9260_devices.c
@@ -220,7 +220,7 @@ static const struct at91_port_platdata at91sam9260_plat[] =
{
};
U_BOOT_DEVICES(at91sam9260_gpios) = {
- { "gpio_at91", _plat[0] },
- { "gpio_at91", _plat[1] },
- { "gpio_at91", _plat[2] },
+ { "atmel_at91rm9200_gpio", _plat[0] },
+ { "atmel_at91rm9200_gpio", _plat[1] },
+ { "atmel_at91rm9200_gpio", _plat[2] },
};
diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
index 89cbeafa20..08ca3edd78 100644
--- a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
@@ -176,9 +176,9 @@ static const struct at91_port_platdata at91sam9260_plat[] =
{
};
U_BOOT_DEVICES(at91sam9260_gpios) = {
- { "gpio_at91", _plat[0] },
- { "gpio_at91", _plat[1] },
- { "gpio_at91", _plat[2] },
- { "gpio_at91", _plat[3] },
- { "gpio_at91", _plat[4] },
+ { "atmel_at91rm9200_gpio", _plat[0] },
+ { "atmel_at91rm9200_gpio", _plat[1] },
+ { "atmel_at91rm9200_gpio", _plat[2] },
+ { "atmel_at91rm9200_gpio", _plat[3] },
+ { "atmel_at91rm9200_gpio", _plat[4] },
};
diff --git a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c
b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c
index 8a0eceb178..daf74a0e2d 100644
--- a/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/syscon_rk3328.c
@@ -13,8 +13,8 @@ static const struct udevice_id rk3328_syscon_ids[] = {
{ }
};
-U_BOOT_DRIVER(syscon_rk3328) = {
- .name = "rk3328_syscon",
[PATCH v2 03/14] dtoc: add support to scan drivers
Currently dtoc scans dtbs to convert them to struct platdata and
to generate U_BOOT_DEVICE entries. These entries need to be filled
with the driver name, but at this moment the information used is the
compatible name present in the dtb. This causes that only nodes with
a compatible name that matches a driver name generate a working
entry.
In order to improve this behaviour, this patch adds to dtoc the
capability of scan drivers source code to generate a list of valid driver
names. This allows to rise a warning in the case that an U_BOOT_DEVICE
entry will try to use a name not valid.
Additionally, in order to add more flexibility to the solution, adds the
U_BOOT_DRIVER_ALIAS macro, which generates no code at all, but allows an
easy way to declare driver name aliases. Thanks to this, dtoc can look
for the driver name based on its alias when it populates the U_BOOT_DEVICE
entry.
Signed-off-by: Walter Lozano
---
drivers/clk/at91/pmc.c| 2 +
drivers/gpio/mxs_gpio.c | 2 +
drivers/gpio/sandbox.c| 2 +
drivers/i2c/rk_i2c.c | 2 +
drivers/mmc/mxsmmc.c | 1 +
drivers/mmc/rockchip_dw_mmc.c | 3 +
drivers/mtd/spi/sf_probe.c| 2 +
drivers/pinctrl/nxp/pinctrl-mxs.c | 2 +
drivers/pinctrl/pinctrl-at91.c| 2 +
drivers/power/pmic/rk8xx.c| 2 +
drivers/serial/ns16550.c | 4 ++
drivers/spi/mxs_spi.c | 2 +
drivers/spi/rk_spi.c | 2 +
include/dm/device.h | 7 +++
tools/dtoc/dtb_platdata.py| 89 +--
tools/dtoc/dtoc_test_driver_alias.dts | 20 ++
tools/dtoc/test_dtoc.py | 33 ++
17 files changed, 173 insertions(+), 4 deletions(-)
create mode 100644 tools/dtoc/dtoc_test_driver_alias.dts
diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c
index 1fede16a0c..793a506d27 100644
--- a/drivers/clk/at91/pmc.c
+++ b/drivers/clk/at91/pmc.c
@@ -30,6 +30,8 @@ U_BOOT_DRIVER(atmel_at91rm9200_pmc) = {
.of_match = at91_pmc_match,
};
+U_BOOT_DRIVER_ALIAS(atmel_at91rm9200_pmc, atmel_at91sam9260_pmc)
+
/*-*/
int at91_pmc_core_probe(struct udevice *dev)
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index e43484d13a..bcdf08c255 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -309,4 +309,6 @@ U_BOOT_DRIVER(fsl_imx23_gpio) = {
.ofdata_to_platdata = mxs_ofdata_to_platdata,
#endif
};
+
+U_BOOT_DRIVER_ALIAS(fsl_imx23_gpio, fsl_imx28_gpio)
#endif /* DM_GPIO */
diff --git a/drivers/gpio/sandbox.c b/drivers/gpio/sandbox.c
index ff46d3c8d1..8923e54867 100644
--- a/drivers/gpio/sandbox.c
+++ b/drivers/gpio/sandbox.c
@@ -253,6 +253,8 @@ U_BOOT_DRIVER(sandbox_gpio) = {
.ops= _sandbox_ops,
};
+U_BOOT_DRIVER_ALIAS(sandbox_gpio, sandbox_gpio_alias)
+
/* pincontrol: used only to check GPIO pin configuration (pinmux command) */
struct sb_pinctrl_priv {
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index eceef80e70..e76c087b1d 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -492,3 +492,5 @@ U_BOOT_DRIVER(rockchip_rk3066_i2c) = {
.priv_auto_alloc_size = sizeof(struct rk_i2c),
.ops= _i2c_ops,
};
+
+U_BOOT_DRIVER_ALIAS(rockchip_rk3066_i2c, rockchip_rk3288_i2c)
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 35c336b499..afa95e57ee 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -724,4 +724,5 @@ U_BOOT_DRIVER(fsl_imx23_mmc) = {
.platdata_auto_alloc_size = sizeof(struct mxsmmc_platdata),
};
+U_BOOT_DRIVER_ALIAS(fsl_imx23_mmc, fsl_imx28_mmc)
#endif /* CONFIG_DM_MMC */
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index ef75367b3e..ac710324c8 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -178,6 +178,9 @@ U_BOOT_DRIVER(rockchip_rk3288_dw_mshc) = {
.platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
};
+U_BOOT_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3328_dw_mshc)
+U_BOOT_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3368_dw_mshc)
+
#ifdef CONFIG_PWRSEQ
static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
{
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 1b44cc68c6..97fa22a4b3 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -180,4 +180,6 @@ U_BOOT_DRIVER(jedec_spi_nor) = {
.ops= _flash_std_ops,
};
+U_BOOT_DRIVER_ALIAS(jedec_spi_nor, spansion_m25p16)
+
#endif /* CONFIG_DM_SPI_FLASH */
diff --git a/drivers/pinctrl/nxp/pinctrl-mxs.c
b/drivers/pinctrl/nxp/pinctrl-mxs.c
index bd434667b1..da6b95acc5 100644
--- a/drivers/pinctrl/nxp/pinctrl-mxs.c
+++ b/drivers/pinctrl/nxp/pinctrl-mxs.c
@@ -190,3 +190,5 @@ U_BOOT_DRIVER(fsl_imx23_pinctrl) = {
.priv_auto_alloc_size =
[PATCH v2 02/14] dtoc: add missing code comments
Add missing information about internal class members in order to make the code easier to follow. Signed-off-by: Walter Lozano --- tools/dtoc/dtb_platdata.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py index ecfe0624d1..bc0de426a9 100644 --- a/tools/dtoc/dtb_platdata.py +++ b/tools/dtoc/dtb_platdata.py @@ -140,6 +140,9 @@ class DtbPlatdata(object): _include_disabled: true to include nodes marked status = "disabled" _outfile: The current output file (sys.stdout or a real file) _lines: Stashed list of output lines for outputting in the future +_aliases: Dict that hold aliases for compatible strings +key: First compatible string declared in a node +value: List of additional compatible strings declared in a node """ def __init__(self, dtb_fname, include_disabled): self._fdt = None -- 2.20.1
Re: [RESEND PATCH v5 2/4] cmd: env: check real location for env info command
On Fri, Jun 19, 2020 at 02:03:35PM +0200, Patrick Delaunay wrote: > Check the current ENV location, dynamically provided by the weak > function env_get_location to be sure that the environment can be > persistent. > > The compilation flag ENV_IS_IN_DEVICE is not enough when the board > dynamically select the available storage location (according boot > device for example). > > This patch solves issue for stm32mp1 platform, when the boot device > is USB. > > Signed-off-by: Patrick Delaunay > Reviewed-by: Simon Glass Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature
Re: [RESEND PATCH v5 1/4] cmd: env: add option for quiet output on env info
On Fri, Jun 19, 2020 at 02:03:34PM +0200, Patrick Delaunay wrote: > The "env info" can be use for test with -d and -p parameter, > in scripting case the output of the command is not needed. > > This patch allows to deactivate this output with a new option "-q". > > For example, we can save the environment if default > environment is used and persistent storage is managed with: > if env info -p -d -q; then env save; fi > > Without the quiet option, I have the unnecessary traces > First boot: > Default environment is used > Environment can be persisted > Saving Environment to EXT4... File System is consistent > > Next boot: > Environment was loaded from persistent storage > Environment can be persisted > > Signed-off-by: Patrick Delaunay > Reviewed-by: Simon Glass Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature
RE: [PATCH v2 5/9] sandbox: support the change of env location
Hi, > From: Tom Rini > Sent: jeudi 18 juin 2020 21:17 > > On Tue, Jun 16, 2020 at 09:40:44AM +0200, Patrick Delaunay wrote: > > > Add support of environment location with a new sandbox command > > 'env_loc'. > > > > When the user change the environment location with the command > > 'env_loc ' the env is reinitialized and saved; the > > GD_FLG_ENV_DEFAULT flag is also updated. > > > > When the user set the same env location, the environment is re-loaded. > > > > Signed-off-by: Patrick Delaunay > > --- > > > > Changes in v2: > > - change cmd_tbl_t to struct cmd_tbl > > > > board/sandbox/sandbox.c | 42 > > - > > 1 file changed, 41 insertions(+), 1 deletion(-) > > This is for testing, which is why it's on sandbox? But I think we should > have this > be a generic opt-in feature as changing where environment is saved at run time > has use cases when we have multiple available. Thanks! Yes in my mind it was only for testing on sandbox But I agree, I can a add a opt-in generic command to select and load ENV on one target. Someting as "env load [] " which loads with the request backend and update gd->env_load_prio With = name of the name define in backend with ENV_NAME macro And using the default location gd->env_load_prio when absent. Or split in 2 new commands - env select - env load Perhaps this last proposal with 2 command is more flexible to be combined with other command (env save / env erase) if this proposal is OK, I will work on it. Patrick
Re: [EXT] Re: [RESEND][Patch v4] net: pfe_eth: Use spi_flash_read API to access flash memory
On Fri, Jun 19, 2020 at 02:13:37PM +, Priyanka Jain wrote:
> >-Original Message-
> >From: Kuldeep Singh
> >Sent: Friday, June 19, 2020 3:40 PM
> >To: Joe Hershberger ; u-boot@lists.denx.de;
> >Priyanka Jain
> >Cc: Tom Rini ; Schrempf Frieder
> >
> >Subject: RE: [EXT] Re: [RESEND][Patch v4] net: pfe_eth: Use spi_flash_read
> >API
> >to access flash memory
> >
> >
> >> -Original Message-
> >> From: Schrempf Frieder
> >> Sent: Thursday, May 28, 2020 1:46 PM
> >> To: Kuldeep Singh ; Joe Hershberger
> >> ; u-boot@lists.denx.de
> >> Cc: Priyanka Jain ; Tom Rini
> >>
> >> Subject: [EXT] Re: [RESEND][Patch v4] net: pfe_eth: Use spi_flash_read
> >> API to access flash memory
> >>
> >> Caution: EXT Email
> >>
> >> On 28.05.20 08:12, Kuldeep Singh wrote:
> >> > Current PFE firmware access spi-nor memory directly. New spi-mem
> >> > framework does not support direct memory access. So, let's use
> >> > spi_flash_read API to access memory instead of directly using it.
> >> >
> >> > Signed-off-by: Kuldeep Singh
> >> > Reviewed-by: Frieder Schrempf
> >>
> >> So this patch has been floating around for about half a year now with
> >> almost no attention from the maintainers! Several pings have been sent
> >> by the author without response.
> >>
> >> In fact this patch was blocking 91afd36f3802 ("spi: Transform the FSL
> >> QuadSPI driver to use the SPI MEM API") that has finally been merged,
> >> ignoring the fact that it will break ls1012a without this being applied
> >> too.
> >>
> >> I don't want to blame anyone, but I want to voice my disappointment
> >> and raise attention that something is obviously wrong here.
> >
> >Hi Priyanka,
> >
> >Could you please help in reviewing this patch. The idea/motivation of these
> >changes are taken from fm driver.
> >The said changes in fm are already accepted in commit 382c53f94631 ("net:
> >fm: add TFABOOT support").
> >You may take a look at code here[1], line: 380.
> >
> >Thanks
> >Kuldeep
> >[1] https://gitlab.denx.de/u-boot/u-boot/-/blob/master/drivers/net/fm/fm.c
>
> Reviewed-by: Priyanka Jain
>
> Joe,
>
> Kindly help to pick this patch.
This is something that should go via the NXP trees, thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH V2 4/5] pinctrl: renesas: Enable R8A774A1 PFC tables
On 6/19/20 4:25 PM, Adam Ford wrote: > On Fri, Jun 19, 2020 at 9:18 AM Marek Vasut wrote: >> >> On 6/19/20 3:58 PM, Adam Ford wrote: >>> The PFC tables for the R8A774A1 are already available, but they >>> not enabled. >>> >>> This patch adds the Kconfig option and builds the corresponding file >>> when PINCTRL_PFC_R8A774A1 is enabled. >> >> [...] >> >>> diff --git a/drivers/pinctrl/renesas/sh_pfc.h >>> b/drivers/pinctrl/renesas/sh_pfc.h >>> index db3d513358..b9ce471007 100644 >>> --- a/drivers/pinctrl/renesas/sh_pfc.h >>> +++ b/drivers/pinctrl/renesas/sh_pfc.h >>> @@ -300,6 +300,7 @@ extern const struct sh_pfc_soc_info r8a7793_pinmux_info; >>> extern const struct sh_pfc_soc_info r8a7794_pinmux_info; >>> extern const struct sh_pfc_soc_info r8a7795_pinmux_info; >>> extern const struct sh_pfc_soc_info r8a7796_pinmux_info; >>> +extern const struct sh_pfc_soc_info r8a774a1_pinmux_info; >>> extern const struct sh_pfc_soc_info r8a77965_pinmux_info; >>> extern const struct sh_pfc_soc_info r8a77970_pinmux_info; >>> extern const struct sh_pfc_soc_info r8a77980_pinmux_info; >> >> Please keep the lists sorted, all of them, where it makes sense. > > I was trying to do that. At least in hex. Doesn't 774a1 comes after > 7796 and before 77965? I honestly don't know how to sort these lists well either, neither option seems particularly good. What does Linux do ?
Re: [PATCH V2 4/5] pinctrl: renesas: Enable R8A774A1 PFC tables
On Fri, Jun 19, 2020 at 9:18 AM Marek Vasut wrote: > > On 6/19/20 3:58 PM, Adam Ford wrote: > > The PFC tables for the R8A774A1 are already available, but they > > not enabled. > > > > This patch adds the Kconfig option and builds the corresponding file > > when PINCTRL_PFC_R8A774A1 is enabled. > > [...] > > > diff --git a/drivers/pinctrl/renesas/sh_pfc.h > > b/drivers/pinctrl/renesas/sh_pfc.h > > index db3d513358..b9ce471007 100644 > > --- a/drivers/pinctrl/renesas/sh_pfc.h > > +++ b/drivers/pinctrl/renesas/sh_pfc.h > > @@ -300,6 +300,7 @@ extern const struct sh_pfc_soc_info r8a7793_pinmux_info; > > extern const struct sh_pfc_soc_info r8a7794_pinmux_info; > > extern const struct sh_pfc_soc_info r8a7795_pinmux_info; > > extern const struct sh_pfc_soc_info r8a7796_pinmux_info; > > +extern const struct sh_pfc_soc_info r8a774a1_pinmux_info; > > extern const struct sh_pfc_soc_info r8a77965_pinmux_info; > > extern const struct sh_pfc_soc_info r8a77970_pinmux_info; > > extern const struct sh_pfc_soc_info r8a77980_pinmux_info; > > Please keep the lists sorted, all of them, where it makes sense. I was trying to do that. At least in hex. Doesn't 774a1 comes after 7796 and before 77965? adam
Re: [PATCH V2 3/5] clk: renesas: Add R8A774A1 clock tables
On 6/19/20 3:58 PM, Adam Ford wrote:
> This sync's the clock tables with the official release from
> Renesas' repo based on U-Boot 2018.09 and modified to build into
> the latest version of U-Boot.
Can you import the clock table from Linux too ?
[...]
> +static const struct mstp_stop_table r8a774a1_mstp_table[] = {
> + { 0x0020, 0x0, 0x0020, 0 },
> + { 0x, 0x0, 0x, 0 },
> + { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 },
> + { 0xFFDF, 0x400, 0xFFDF, 0 },
> + { 0x8184, 0x180, 0x8184, 0 },
> + { 0xC3FF, 0x0, 0xC3FF, 0 },
> + { 0x, 0x0, 0x, 0 },
> + { 0x, 0x0, 0x, 0 },
> + { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 },
> + { 0xFFFE, 0x0, 0xFFFE, 0 },
> + { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 },
> + { 0x00B7, 0x0, 0x00B7, 0 },
> +};
Can you check whether all those bits are really defined in the MSTP
registers of the SoC ?
Re: [PATCH 6/6] ARM: rmobile: Add Beacon EmbeddedWorks RZG2M Dev Kit
On 6/19/20 3:58 PM, Adam Ford wrote:
[...]
> diff --git a/board/beacon/beacon-rzg2m/beacon-rzg2m.c
> b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
> new file mode 100644
> index 00..88702958e0
> --- /dev/null
> +++ b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
> @@ -0,0 +1,112 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2020 Compass Electronics Group, LLC
> + */
> +
> +#include
> +#include
> +#include
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +void s_init(void)
> +{
> +}
> +
> +#define DVFS_MSTP926 BIT(26)
> +#define GPIO2_MSTP910BIT(10)
> +#define GPIO3_MSTP909BIT(9)
> +#define GPIO5_MSTP907BIT(7)
> +#define HSUSB_MSTP704BIT(4) /* HSUSB */
> +
> +int board_early_init_f(void)
> +{
> +#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
> + /* DVFS for reset */
> + mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
> +#endif
> + return 0;
> +}
> +
> +/* HSUSB block registers */
> +#define HSUSB_REG_LPSTS 0xE6590102
> +#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
> +#define HSUSB_REG_UGCTRL20xE6590184
> +#define HSUSB_REG_UGCTRL2_USB0SEL0x30
> +#define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10
> +
> +int board_init(void)
> +{
> + /* address of boot parameters */
> + gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x5;
> +
> + /* USB1 pull-up */
> + setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
> +
> + /* Configure the HSUSB block */
> + mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
> + /* Choice USB0SEL */
> + clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
> + HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
> + /* low power status */
> + setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);
> +
> + return 0;
> +}
Is any of this really needed on your board ?
[...]
> +void board_add_ram_info(int use_default)
> +{
> + int i;
> +
> + printf("\n");
> + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
> + if (!gd->bd->bi_dram[i].size)
> + break;
> + printf("Bank #%d: 0x%09llx - 0x%09llx, ", i,
> +(unsigned long long)(gd->bd->bi_dram[i].start),
> +(unsigned long long)(gd->bd->bi_dram[i].start
> ++ gd->bd->bi_dram[i].size - 1));
> + print_size(gd->bd->bi_dram[i].size, "\n");
> + };
> +}
Is this needed ?
> +void board_cleanup_before_linux(void)
> +{
> + /*
> + * Turn off the clock that was turned on outside
> + * the control of the driver
> + */
> + /* Configure the HSUSB block */
> + mstp_setbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
> +
> + /*
> + * Because of the control order dependency,
> + * turn off a specific clock at this timing
> + */
> + mstp_setbits_le32(SMSTPCR9, SMSTPCR9,
> + GPIO2_MSTP910 | GPIO3_MSTP909 | GPIO5_MSTP907);
> +}
The clock driver should do this clock turning off, should it not ?
> diff --git a/configs/r8a774a1_beacon-rzg2m_defconfig
> b/configs/r8a774a1_beacon-rzg2m_defconfig
> new file mode 100644
> index 00..b2a699f21a
> --- /dev/null
> +++ b/configs/r8a774a1_beacon-rzg2m_defconfig
[...]
> +CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs
> ip=192.168.0.20"
Please don't hard-code user-specific configuration.
[...]
> diff --git a/include/configs/beacon-rzg2m.h b/include/configs/beacon-rzg2m.h
> new file mode 100644
> index 00..d451bfc5ee
> --- /dev/null
> +++ b/include/configs/beacon-rzg2m.h
[...]
> +/* Generic Timer Definitions (use in assembler source) */
> +#define COUNTER_FREQUENCY0xFE502A/* 16.66MHz from CPclk */
Is this needed ?
> +/* Environment in eMMC, at the end of 2nd "boot sector" */
> +/* #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) */
> +#define CONFIG_SYS_MMC_ENV_DEV 1
> +#define CONFIG_SYS_MMC_ENV_PART 2
> +
> +#undef CONFIG_EXTRA_ENV_SETTINGS
> +
> +#define CONFIG_EXTRA_ENV_SETTINGS\
> + "usb_pgood_delay=2000\0"\
> + "fdt_high=0x\0" \
> + "initrd_high=0x\0" \
> + "script=boot.scr\0" \
> + "image=Image\0" \
> + "console=ttySC0,115200\0" \
> + "fdt_addr=0x4800\0" \
> + "loadaddr=0x4808\0" \
> + "fdt_high=0x\0" \
Do not use fdt_high and initrd_high, it breaks booting if the DT is at
4-byte aligned offset instead of 8-byte aligned offset. The gen3 uses
bootm_size to automatically relocate the DT to the correct location.
Also, some of the env entries are defined multiple times.
[...]
> diff --git a/include/dt-bindings/clk/versaclock.h
> b/include/dt-bindings/clk/versaclock.h
I think this should not be part of this patch.
Re: [PATCH V2 5/5] mmc: renesas-sdhi: Enable support for R8A774A1
On 6/19/20 3:58 PM, Adam Ford wrote:
> The renesas-shdi controller can drive the r8a774a1 and shares its
> quirks with R8A7796. This patch adds the compatibilty flag, to
> support the SDHI controller.
>
> Signed-off-by: Adam Ford
> ---
> V2: No Change
>
> diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
> index d6ea99d2ce..8b8e300caf 100644
> --- a/drivers/mmc/renesas-sdhi.c
> +++ b/drivers/mmc/renesas-sdhi.c
> @@ -20,7 +20,6 @@
> #include
> #include
> #include
> -
> #include "tmio-common.h"
>
> #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
> @@ -843,6 +842,7 @@ static const struct udevice_id renesas_sdhi_match[] = {
> { .compatible = "renesas,sdhi-r8a7794", .data = RENESAS_GEN2_QUIRKS },
> { .compatible = "renesas,sdhi-r8a7795", .data = RENESAS_GEN3_QUIRKS },
> { .compatible = "renesas,sdhi-r8a7796", .data = RENESAS_GEN3_QUIRKS },
> + { .compatible = "renesas,sdhi-r8a774a1", .data = RENESAS_GEN3_QUIRKS },
> { .compatible = "renesas,sdhi-r8a77965", .data = RENESAS_GEN3_QUIRKS },
> { .compatible = "renesas,sdhi-r8a77970", .data = RENESAS_GEN3_QUIRKS },
> { .compatible = "renesas,sdhi-r8a77990", .data = RENESAS_GEN3_QUIRKS },
Can you match on 'rcar-gen3-sdhi' instead , so this table won't have to
grow further ?
Re: [PATCH V2 4/5] pinctrl: renesas: Enable R8A774A1 PFC tables
On 6/19/20 3:58 PM, Adam Ford wrote: > The PFC tables for the R8A774A1 are already available, but they > not enabled. > > This patch adds the Kconfig option and builds the corresponding file > when PINCTRL_PFC_R8A774A1 is enabled. [...] > diff --git a/drivers/pinctrl/renesas/sh_pfc.h > b/drivers/pinctrl/renesas/sh_pfc.h > index db3d513358..b9ce471007 100644 > --- a/drivers/pinctrl/renesas/sh_pfc.h > +++ b/drivers/pinctrl/renesas/sh_pfc.h > @@ -300,6 +300,7 @@ extern const struct sh_pfc_soc_info r8a7793_pinmux_info; > extern const struct sh_pfc_soc_info r8a7794_pinmux_info; > extern const struct sh_pfc_soc_info r8a7795_pinmux_info; > extern const struct sh_pfc_soc_info r8a7796_pinmux_info; > +extern const struct sh_pfc_soc_info r8a774a1_pinmux_info; > extern const struct sh_pfc_soc_info r8a77965_pinmux_info; > extern const struct sh_pfc_soc_info r8a77970_pinmux_info; > extern const struct sh_pfc_soc_info r8a77980_pinmux_info; Please keep the lists sorted, all of them, where it makes sense.
RE: [EXT] Re: [RESEND][Patch v4] net: pfe_eth: Use spi_flash_read API to access flash memory
>-Original Message-
>From: Kuldeep Singh
>Sent: Friday, June 19, 2020 3:40 PM
>To: Joe Hershberger ; u-boot@lists.denx.de;
>Priyanka Jain
>Cc: Tom Rini ; Schrempf Frieder
>
>Subject: RE: [EXT] Re: [RESEND][Patch v4] net: pfe_eth: Use spi_flash_read API
>to access flash memory
>
>
>> -Original Message-
>> From: Schrempf Frieder
>> Sent: Thursday, May 28, 2020 1:46 PM
>> To: Kuldeep Singh ; Joe Hershberger
>> ; u-boot@lists.denx.de
>> Cc: Priyanka Jain ; Tom Rini
>>
>> Subject: [EXT] Re: [RESEND][Patch v4] net: pfe_eth: Use spi_flash_read
>> API to access flash memory
>>
>> Caution: EXT Email
>>
>> On 28.05.20 08:12, Kuldeep Singh wrote:
>> > Current PFE firmware access spi-nor memory directly. New spi-mem
>> > framework does not support direct memory access. So, let's use
>> > spi_flash_read API to access memory instead of directly using it.
>> >
>> > Signed-off-by: Kuldeep Singh
>> > Reviewed-by: Frieder Schrempf
>>
>> So this patch has been floating around for about half a year now with
>> almost no attention from the maintainers! Several pings have been sent
>> by the author without response.
>>
>> In fact this patch was blocking 91afd36f3802 ("spi: Transform the FSL
>> QuadSPI driver to use the SPI MEM API") that has finally been merged,
>> ignoring the fact that it will break ls1012a without this being applied too.
>>
>> I don't want to blame anyone, but I want to voice my disappointment
>> and raise attention that something is obviously wrong here.
>
>Hi Priyanka,
>
>Could you please help in reviewing this patch. The idea/motivation of these
>changes are taken from fm driver.
>The said changes in fm are already accepted in commit 382c53f94631 ("net:
>fm: add TFABOOT support").
>You may take a look at code here[1], line: 380.
>
>Thanks
>Kuldeep
>[1] https://gitlab.denx.de/u-boot/u-boot/-/blob/master/drivers/net/fm/fm.c
Reviewed-by: Priyanka Jain
Joe,
Kindly help to pick this patch.
Regards
Priyanka
RE: [PATCH v2 3/9] env: correctly handle result in env_init
Hi Tom and Marek,
> From: Tom Rini
> Sent: jeudi 18 juin 2020 21:16
>
> On Tue, Jun 16, 2020 at 09:40:42AM +0200, Patrick Delaunay wrote:
>
> > Don't return error with ret=-ENOENT when the optional ops drv->init is
> > absent but only if env_driver_lookup doesn't found driver.
> >
> > This patch correct an issue for the code
> > if (!env_init())
> > env_load()
> > When only ext4 is supported (CONFIG_ENV_IS_IN_EXT4), as the backend
> > env/ext4.c doesn't define an ops .init
> >
> > Signed-off-by: Patrick Delaunay
> > ---
> >
> > (no changes since v1)
> >
> > env/env.c | 5 -
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/env/env.c b/env/env.c
> > index dcc25c030b..819c88f729 100644
> > --- a/env/env.c
> > +++ b/env/env.c
> > @@ -295,7 +295,10 @@ int env_init(void)
> > int prio;
> >
> > for (prio = 0; (drv = env_driver_lookup(ENVOP_INIT, prio)); prio++) {
> > - if (!drv->init || !(ret = drv->init()))
> > + ret = 0;
> > + if (drv->init)
> > + ret = drv->init();
> > + if (!ret)
> > env_set_inited(drv->location);
> >
> > debug("%s: Environment %s init done (ret=%d)\n", __func__,
>
> I'm adding in Marek here because this reminds me of similar questions /
> concerns
> I had looking in to his series. At root, I think we're not being consistent
> in each of
> our env backing implementations about where flags such as ENV_VALID are set,
> and return values / checks of functions.
>
> Just outside of the start of the patch context here, we set ret to -ENOENT
> and just
> past this, if still -ENOENT we say ENV_VALID and point at the default
> environment.
>
> But, I don't follow the patch commit message here. If we don't have
> drv->init we call env_set_inited(drv->location) but we won't have change
> ret to 0, which means that later on down the function we go back to default
> environment.
The cause of the issue is because the init() ops is optional in "struct
env_driver".
When this opt is absent, I assume that the initialization is not mandatory but
this inititialization need to be tagged in gd->env_has_init with the call of
env_set_inited() function
And the ENV backend is FOUND (don't return -ENOENT)
else the next call of env_has_inited(drv->location) always failed : in
env_load()
I see the error in EXT4 env backend,.all the other backend as a env_init()
function
But some othe backend don't define the .init operation and have the issue
eeprom.c:235:U_BOOT_ENV_LOCATION(eeprom) = {
ext4.c:135:U_BOOT_ENV_LOCATION(ext4) = {
fat.c:128:U_BOOT_ENV_LOCATION(fat) = {
mmc.c:393:U_BOOT_ENV_LOCATION(mmc) = {
onenand.c:108:U_BOOT_ENV_LOCATION(onenand) = {
sata.c:117:U_BOOT_ENV_LOCATION(sata) = {
ubi.c:179:U_BOOT_ENV_LOCATION(ubi) = {
The other don't have issue:
flash.c:358:U_BOOT_ENV_LOCATION(flash) = {
flash.c:368:.init = env_flash_init,
nand.c:382:U_BOOT_ENV_LOCATION(nand) = {
nand.c:389: .init = env_nand_init,
nowhere.c:30:U_BOOT_ENV_LOCATION(nowhere) = {
nowhere.c:32: .init = env_nowhere_init,
nvram.c:117:U_BOOT_ENV_LOCATION(nvram) = {
nvram.c:122:.init = env_nvram_init,
remote.c:54:U_BOOT_ENV_LOCATION(remote) = {
remote.c:59:.init = env_remote_init,
sf.c:306:U_BOOT_ENV_LOCATION(sf) = {
sf.c:312: .init = env_sf_init,
> So isn't this a problem in most environment cases then? Thanks!
I don't sure which environment configuration can case issue (only one ENV
without drc->init() function)
But no issue if at least one CONFIG_ENV_IS_ is activated with driver
implementing init ops
But I see the issue in SANDBOX when I activate EXT4 only target.
(CONFIG_ENV_IS_IN_EXT4),
And no more issue when I add CONFIG_ENV_IS_NOWHERE.
PS: no direct issue if env_init result is not checked
but I check this result in the sandbox tests in next patches:
if (!env_init())
env_load()
but anyway inconsistent value of gd->env_has_init
which can be a problem for any env_has_inited() calls
Regards
Patrick
[PATCH V2 2/5] ARM: dts: r8a774a1: Import DTS from Linux 5.8-rc1
This patch imports the device tree and required bindings to permit
the device tree to build for the R8Z774A1 (RZ/G2M).
Signed-off-by: Adam Ford
---
V2: No Change
diff --git a/arch/arm/dts/r8a774a1.dtsi b/arch/arm/dts/r8a774a1.dtsi
new file mode 100644
index 00..a603d94797
--- /dev/null
+++ b/arch/arm/dts/r8a774a1.dtsi
@@ -0,0 +1,2787 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the r8a774a1 SoC
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+#include
+#include
+#include
+#include
+
+/ {
+ compatible = "renesas,r8a774a1";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ i2c0 =
+ i2c1 =
+ i2c2 =
+ i2c3 =
+ i2c4 =
+ i2c5 =
+ i2c6 =
+ i2c7 = _dvfs;
+ };
+
+ /*
+* The external audio clocks are configured as 0 Hz fixed frequency
+* clocks by default.
+* Boards that provide audio clocks should override them.
+*/
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock - to be overridden by boards that provide it */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ cluster0_opp: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-5 {
+ opp-hz = /bits/ 64 <5>;
+ opp-microvolt = <82>;
+ clock-latency-ns = <30>;
+ };
+ opp-10 {
+ opp-hz = /bits/ 64 <10>;
+ opp-microvolt = <82>;
+ clock-latency-ns = <30>;
+ };
+ opp-15 {
+ opp-hz = /bits/ 64 <15>;
+ opp-microvolt = <82>;
+ clock-latency-ns = <30>;
+ };
+ };
+
+ cluster1_opp: opp_table1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-8 {
+ opp-hz = /bits/ 64 <8>;
+ opp-microvolt = <82>;
+ clock-latency-ns = <30>;
+ };
+ opp-10 {
+ opp-hz = /bits/ 64 <10>;
+ opp-microvolt = <82>;
+ clock-latency-ns = <30>;
+ };
+ opp-12 {
+ opp-hz = /bits/ 64 <12>;
+ opp-microvolt = <82>;
+ clock-latency-ns = <30>;
+ };
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <_0>;
+ };
+ core1 {
+ cpu = <_1>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <_0>;
+ };
+ core1 {
+ cpu = <_1>;
+ };
+ core2 {
+ cpu = <_2>;
+ };
+ core3 {
+ cpu = <_3>;
+ };
+ };
+ };
+
+ a57_0: cpu@0 {
+ compatible = "arm,cortex-a57";
+ reg = <0x0>;
+ device_type = "cpu";
+ power-domains = < R8A774A1_PD_CA57_CPU0>;
+ next-level-cache = <_CA57>;
+ enable-method = "psci";
+ dynamic-power-coefficient = <854>;
+ clocks = < CPG_CORE R8A774A1_CLK_Z>;
+ operating-points-v2 = <_opp>;
+ capacity-dmips-mhz = <1024>;
+ #cooling-cells = <2>;
+ };
+
+
[PATCH 6/6] ARM: rmobile: Add Beacon EmbeddedWorks RZG2M Dev Kit
The Beacon EmbeddedWorks kit is based on the R8A774A1 SoC also
known as the RZ/G2M.
The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi.
Signed-off-by: Adam Ford
---
V2: New to series
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9900b44274..75e05f18c3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -766,6 +766,7 @@ dtb-$(CONFIG_RCAR_GEN2) += \
r8a7794-silk-u-boot.dtb
dtb-$(CONFIG_RCAR_GEN3) += \
+ r8a774a1-beacon-rzg2m-kit.dtb \
r8a77950-ulcb-u-boot.dtb \
r8a77950-salvator-x-u-boot.dtb \
r8a77960-ulcb-u-boot.dtb \
diff --git a/arch/arm/dts/beacon-renesom-baseboard.dtsi
b/arch/arm/dts/beacon-renesom-baseboard.dtsi
new file mode 100644
index 00..98d9bd934f
--- /dev/null
+++ b/arch/arm/dts/beacon-renesom-baseboard.dtsi
@@ -0,0 +1,622 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2020, Compass Electronics Group, LLC
+ */
+
+#include
+#include
+#include
+
+/ {
+ aliases {
+ serial0 =
+ serial1 =
+ serial2 =
+ serial3 =
+ serial4 =
+ serial5 =
+ spi0 =
+ spi1 =
+ spi2 =
+ spi3 =
+ ethernet0 =
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ power-supply = <_lcd>;
+ enable-gpios = <_exp1 3 GPIO_ACTIVE_HIGH>;
+ pwms = < 0 5>;
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <6>;
+ };
+
+ hdmi0-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi0_con: endpoint {
+ remote-endpoint = <_dw_hdmi0_out>;
+ };
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ key-1 {
+ gpios = < 6 GPIO_ACTIVE_LOW>;
+ linux,code = ;
+ label = "Switch-1";
+ wakeup-source;
+ debounce-interval = <20>;
+ };
+ key-2 {
+ gpios = < 13 GPIO_ACTIVE_LOW>;
+ linux,code = ;
+ label = "Switch-2";
+ wakeup-source;
+ debounce-interval = <20>;
+ };
+ key-3 {
+ gpios = < 17 GPIO_ACTIVE_LOW>;
+ linux,code = ;
+ label = "Switch-3";
+ wakeup-source;
+ debounce-interval = <20>;
+ };
+ key-4 {
+ gpios = < 20 GPIO_ACTIVE_LOW>;
+ linux,code = ;
+ label = "Switch-4";
+ wakeup-source;
+ debounce-interval = <20>;
+ };
+ key-5 {
+ gpios = < 22 GPIO_ACTIVE_LOW>;
+ linux,code = ;
+ label = "Switch-4";
+ wakeup-source;
+ debounce-interval = <20>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <_pins>;
+ pinctrl-names = "default";
+
+ led0 {
+ gpios = < 4 GPIO_ACTIVE_HIGH>;
+ label = "LED0";
+ linux,default-trigger = "heartbeat";
+ };
+ led1 {
+ gpios = < 0 GPIO_ACTIVE_HIGH>;
+ label = "LED1";
+ linux,default-trigger = "heartbeat";
+ };
+ led2 {
+ gpios = < 1 GPIO_ACTIVE_HIGH>;
+ label = "LED2";
+ linux,default-trigger = "heartbeat";
+ };
+ led3 {
+ gpios = < 3 GPIO_ACTIVE_HIGH>;
+ label = "LED3";
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_audio: regulator_audio {
+ compatible = "regulator-fixed";
+ regulator-name = "audio-1.8V";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ gpio = <_exp2 7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_lcd: regulator-lcd {
+ compatible = "regulator-fixed";
+ regulator-name = "lcd_panel_pwr";
+ regulator-min-microvolt = <330>;
+
[PATCH V2 3/5] clk: renesas: Add R8A774A1 clock tables
This sync's the clock tables with the official release from
Renesas' repo based on U-Boot 2018.09 and modified to build into
the latest version of U-Boot.
Signed-off-by: Adam Ford
---
V2: No Change
diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index e78817829b..284e2138b3 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -48,6 +48,13 @@ config CLK_RCAR_GEN3
help
Enable this to support the clocks on Renesas RCar Gen3 SoC.
+config CLK_R8A774A1
+bool "Renesas R8A774A1 clock driver"
+def_bool y if R8A774A1
+depends on CLK_RCAR_GEN3
+help
+ Enable this to support the clocks on Renesas R8A774A1 SoC.
+
config CLK_R8A7795
bool "Renesas R8A7795 clock driver"
depends on CLK_RCAR_GEN3
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index 88339e9d7e..dd599b757e 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -1,5 +1,6 @@
obj-$(CONFIG_CLK_RENESAS) += renesas-cpg-mssr.o
obj-$(CONFIG_CLK_RCAR_GEN2) += clk-rcar-gen2.o
+obj-$(CONFIG_CLK_R8A774A1) += r8a774a1-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7790) += r8a7790-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7791) += r8a7791-cpg-mssr.o
obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o
diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
new file mode 100644
index 00..0341d8e61c
--- /dev/null
+++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
@@ -0,0 +1,343 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Renesas R8A774A1 CPG MSSR driver
+ *
+ * Copyright (C) 2017-2019 Marek Vasut
+ *
+ * Based on the following driver from Linux kernel:
+ * r8a7796 Clock Pulse Generator / Module Standby and Software Reset
+ *
+ * Copyright (C) 2016 Glider bvba
+ */
+
+#include
+#include
+#include
+
+#include
+
+#include "renesas-cpg-mssr.h"
+#include "rcar-gen3-cpg.h"
+
+enum clk_ids {
+ /* Core Clock Outputs exported to DT */
+ LAST_DT_CORE_CLK = R8A774A1_CLK_OSC,
+
+ /* External Input Clocks */
+ CLK_EXTAL,
+ CLK_EXTALR,
+
+ /* Internal Core Clocks */
+ CLK_MAIN,
+ CLK_PLL0,
+ CLK_PLL1,
+ CLK_PLL2,
+ CLK_PLL3,
+ CLK_PLL4,
+ CLK_PLL1_DIV2,
+ CLK_PLL1_DIV4,
+ CLK_S0,
+ CLK_S1,
+ CLK_S2,
+ CLK_S3,
+ CLK_SDSRC,
+ CLK_RPCSRC,
+ CLK_SSPSRC,
+ CLK_RINT,
+
+ /* Module Clocks */
+ MOD_CLK_BASE
+};
+
+static const struct cpg_core_clk r8a774a1_core_clks[] = {
+ /* External Clock Inputs */
+ DEF_INPUT("extal", CLK_EXTAL),
+ DEF_INPUT("extalr", CLK_EXTALR),
+
+ /* Internal Core Clocks */
+ DEF_BASE(".main", CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL),
+ DEF_BASE(".pll0", CLK_PLL0, CLK_TYPE_GEN3_PLL0, CLK_MAIN),
+ DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN),
+ DEF_BASE(".pll2", CLK_PLL2, CLK_TYPE_GEN3_PLL2, CLK_MAIN),
+ DEF_BASE(".pll3", CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN),
+ DEF_BASE(".pll4", CLK_PLL4, CLK_TYPE_GEN3_PLL4, CLK_MAIN),
+
+ DEF_FIXED(".pll1_div2", CLK_PLL1_DIV2, CLK_PLL1, 2, 1),
+ DEF_FIXED(".pll1_div4", CLK_PLL1_DIV4, CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED(".s0",CLK_S0,CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED(".s1",CLK_S1,CLK_PLL1_DIV2, 3, 1),
+ DEF_FIXED(".s2",CLK_S2,CLK_PLL1_DIV2, 4, 1),
+ DEF_FIXED(".s3",CLK_S3,CLK_PLL1_DIV2, 6, 1),
+ DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED(".rpcsrc",CLK_RPCSRC,CLK_PLL1, 2, 1),
+
+ DEF_GEN3_OSC(".r", CLK_RINT, CLK_EXTAL, 32),
+
+ /* Core Clock Outputs */
+ DEF_FIXED("ztr",R8A774A1_CLK_ZTR, CLK_PLL1_DIV2, 6, 1),
+ DEF_FIXED("ztrd2", R8A774A1_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
+ DEF_FIXED("zt", R8A774A1_CLK_ZT,CLK_PLL1_DIV2, 4, 1),
+ DEF_FIXED("zx", R8A774A1_CLK_ZX,CLK_PLL1_DIV2, 2, 1),
+ DEF_FIXED("s0d1", R8A774A1_CLK_S0D1, CLK_S0, 1, 1),
+ DEF_FIXED("s0d2", R8A774A1_CLK_S0D2, CLK_S0, 2, 1),
+ DEF_FIXED("s0d3", R8A774A1_CLK_S0D3, CLK_S0, 3, 1),
+ DEF_FIXED("s0d4", R8A774A1_CLK_S0D4, CLK_S0, 4, 1),
+ DEF_FIXED("s0d6", R8A774A1_CLK_S0D6, CLK_S0, 6, 1),
+ DEF_FIXED("s0d8", R8A774A1_CLK_S0D8, CLK_S0, 8, 1),
+ DEF_FIXED("s0d12", R8A774A1_CLK_S0D12, CLK_S0,12, 1),
+ DEF_FIXED("s1d1", R8A774A1_CLK_S1D1, CLK_S1, 1, 1),
+ DEF_FIXED("s1d2", R8A774A1_CLK_S1D2, CLK_S1, 2, 1),
+ DEF_FIXED("s1d4", R8A774A1_CLK_S1D4, CLK_S1, 4, 1),
+ DEF_FIXED("s2d1", R8A774A1_CLK_S2D1, CLK_S2, 1,
[PATCH V2 1/5] ARM: renesas: Add basic R8A774A1 Support
In order to build boards based on the R8A774A1, there needs to be a config option from which to enable other drivers and/or flags for this SoC. Signed-off-by: Adam Ford --- V2: No Change diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64 index c8f93c68bb..bfd513a361 100644 --- a/arch/arm/mach-rmobile/Kconfig.64 +++ b/arch/arm/mach-rmobile/Kconfig.64 @@ -2,6 +2,9 @@ if RCAR_GEN3 menu "Select Target SoC" +config R8A774A1 +bool "Renesas SoC R8A774A1" + config R8A7795 bool "Renesas SoC R8A7795" imply CLK_R8A7795 -- 2.25.1
[PATCH V2 5/5] mmc: renesas-sdhi: Enable support for R8A774A1
The renesas-shdi controller can drive the r8a774a1 and shares its
quirks with R8A7796. This patch adds the compatibilty flag, to
support the SDHI controller.
Signed-off-by: Adam Ford
---
V2: No Change
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index d6ea99d2ce..8b8e300caf 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -20,7 +20,6 @@
#include
#include
#include
-
#include "tmio-common.h"
#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
@@ -843,6 +842,7 @@ static const struct udevice_id renesas_sdhi_match[] = {
{ .compatible = "renesas,sdhi-r8a7794", .data = RENESAS_GEN2_QUIRKS },
{ .compatible = "renesas,sdhi-r8a7795", .data = RENESAS_GEN3_QUIRKS },
{ .compatible = "renesas,sdhi-r8a7796", .data = RENESAS_GEN3_QUIRKS },
+ { .compatible = "renesas,sdhi-r8a774a1", .data = RENESAS_GEN3_QUIRKS },
{ .compatible = "renesas,sdhi-r8a77965", .data = RENESAS_GEN3_QUIRKS },
{ .compatible = "renesas,sdhi-r8a77970", .data = RENESAS_GEN3_QUIRKS },
{ .compatible = "renesas,sdhi-r8a77990", .data = RENESAS_GEN3_QUIRKS },
--
2.25.1
[PATCH V2 4/5] pinctrl: renesas: Enable R8A774A1 PFC tables
The PFC tables for the R8A774A1 are already available, but they
not enabled.
This patch adds the Kconfig option and builds the corresponding file
when PINCTRL_PFC_R8A774A1 is enabled.
Signed-off-by: Adam Ford
---
V2: Use tables already build into pfc-r8a7796 instead of creating a new file
Fix pfc references so the pinmuxer acutally gets loaded
diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig
index 4d3d68d307..8327bcabd6 100644
--- a/drivers/pinctrl/renesas/Kconfig
+++ b/drivers/pinctrl/renesas/Kconfig
@@ -77,6 +77,16 @@ config PINCTRL_PFC_R8A7796
the GPIO definitions and pin control functions for each available
multiplex function.
+config PINCTRL_PFC_R8A774A1
+bool "Renesas RCar Gen3 R8A774A1 pin control driver"
+depends on PINCTRL_PFC
+help
+ Support pin multiplexing control on Renesas RZG2M R8A774A1 SoCs.
+
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
+
config PINCTRL_PFC_R8A77965
bool "Renesas RCar Gen3 R8A77965 pin control driver"
depends on PINCTRL_PFC
diff --git a/drivers/pinctrl/renesas/Makefile b/drivers/pinctrl/renesas/Makefile
index a92f787a89..f41249ca9d 100644
--- a/drivers/pinctrl/renesas/Makefile
+++ b/drivers/pinctrl/renesas/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7793) += pfc-r8a7791.o
obj-$(CONFIG_PINCTRL_PFC_R8A7794) += pfc-r8a7794.o
obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795.o
obj-$(CONFIG_PINCTRL_PFC_R8A7796) += pfc-r8a7796.o
+obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
obj-$(CONFIG_PINCTRL_PFC_R8A77965) += pfc-r8a77965.o
obj-$(CONFIG_PINCTRL_PFC_R8A77970) += pfc-r8a77970.o
obj-$(CONFIG_PINCTRL_PFC_R8A77980) += pfc-r8a77980.o
diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c
index 1179afd2e7..7ba7849593 100644
--- a/drivers/pinctrl/renesas/pfc.c
+++ b/drivers/pinctrl/renesas/pfc.c
@@ -32,6 +32,7 @@ enum sh_pfc_model {
SH_PFC_R8A7794,
SH_PFC_R8A7795,
SH_PFC_R8A7796,
+ SH_PFC_R8A774A1,
SH_PFC_R8A77965,
SH_PFC_R8A77970,
SH_PFC_R8A77980,
@@ -853,6 +854,10 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev)
if (model == SH_PFC_R8A7796)
priv->pfc.info = _pinmux_info;
#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774A1
+ if (model == SH_PFC_R8A774A1)
+ priv->pfc.info = _pinmux_info;
+#endif
#ifdef CONFIG_PINCTRL_PFC_R8A77965
if (model == SH_PFC_R8A77965)
priv->pfc.info = _pinmux_info;
@@ -924,6 +929,12 @@ static const struct udevice_id sh_pfc_pinctrl_ids[] = {
.data = SH_PFC_R8A7796,
},
#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774A1
+ {
+ .compatible = "renesas,pfc-r8a774a1",
+ .data = SH_PFC_R8A774A1,
+ },
+#endif
#ifdef CONFIG_PINCTRL_PFC_R8A77965
{
.compatible = "renesas,pfc-r8a77965",
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index db3d513358..b9ce471007 100644
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -300,6 +300,7 @@ extern const struct sh_pfc_soc_info r8a7793_pinmux_info;
extern const struct sh_pfc_soc_info r8a7794_pinmux_info;
extern const struct sh_pfc_soc_info r8a7795_pinmux_info;
extern const struct sh_pfc_soc_info r8a7796_pinmux_info;
+extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;
extern const struct sh_pfc_soc_info r8a77965_pinmux_info;
extern const struct sh_pfc_soc_info r8a77970_pinmux_info;
extern const struct sh_pfc_soc_info r8a77980_pinmux_info;
--
2.25.1
[PATCH V2 0/5] Add Basic support for R8A774A1 (RZ/G2M)
The R8A774A1 (RZ/G2M) a commercial SoC based off the automotive R8A7796 SoC. This series will start the foundation to support this SoC by importing porting the device tree and bindings from Linux 5.8-rc1, then porting the clock driver, pinctrl driver, and sdhi drivers from Renesas' RZG2M repo found: https://github.com/renesas-rz/renesas-u-boot-cip/tree/v2018.09/rzg2 Adam Ford (5): ARM: renesas: Add basic R8A774A1 Support ARM: dts: r8a774a1: Import DTS from Linux 5.8-rc1 clk: renesas: Add R8A774A1 clock tables pinctrl: renesas: Enable R8A774A1 PFC tables mmc: renesas-sdhi: Enable support for R8A774A1 arch/arm/dts/r8a774a1.dtsi| 2787 + arch/arm/mach-rmobile/Kconfig.64 |3 + drivers/clk/renesas/Kconfig |7 + drivers/clk/renesas/Makefile |1 + drivers/clk/renesas/r8a774a1-cpg-mssr.c | 343 ++ drivers/mmc/renesas-sdhi.c|2 +- drivers/pinctrl/renesas/Kconfig | 10 + drivers/pinctrl/renesas/Makefile |1 + drivers/pinctrl/renesas/pfc.c | 11 + drivers/pinctrl/renesas/sh_pfc.h |1 + include/dt-bindings/clock/r8a774a1-cpg-mssr.h | 65 + include/dt-bindings/power/r8a774a1-sysc.h | 33 + 12 files changed, 3263 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/r8a774a1.dtsi create mode 100644 drivers/clk/renesas/r8a774a1-cpg-mssr.c create mode 100644 include/dt-bindings/clock/r8a774a1-cpg-mssr.h create mode 100644 include/dt-bindings/power/r8a774a1-sysc.h -- 2.25.1
Re: [PATCH] video: extend stdout video console work-around for 'vga'
On Sat, 23 May 2020 17:11:20 +0200 Anatolij Gustschin ag...@denx.de wrote: > cfb_console driver use 'vga' console name and we still have board > environments defining this name. Re-use existing DM_VIDEO work- > around for console name to support 'vga' name in stdout environment. > > Signed-off-by: Anatolij Gustschin > --- > arch/arm/mach-tegra/Kconfig | 1 - > common/console.c| 7 --- > drivers/video/Kconfig | 16 +--- > 3 files changed, 13 insertions(+), 11 deletions(-) Applied to u-boot-video/next, thanks! -- Anatolij
Re: [PATCH] common/board_f: Respect original FDT size while relocating
On Fri, Jun 19, 2020 at 11:22:18AM +0300, Oleksandr Andrushchenko wrote:
> From: Oleksandr Andrushchenko
>
> While relocating FDT we reserve some memory for the new FDT and
> set the size of the FDT with that respect. But FDT may be placed
> at the end of the RAM leading to memory access beyond it.
> Fix this by copying exact FDT size bytes, not the reserved size.
>
> Signed-off-by: Oleksandr Andrushchenko
> ---
> common/board_f.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/common/board_f.c b/common/board_f.c
> index 01194eaa0e4d..aa1285e94999 100644
> --- a/common/board_f.c
> +++ b/common/board_f.c
> @@ -670,7 +670,7 @@ static int reloc_fdt(void)
> if (gd->flags & GD_FLG_SKIP_RELOC)
> return 0;
> if (gd->new_fdt) {
> - memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
> + memcpy(gd->new_fdt, gd->fdt_blob, fdt_totalsize(gd->fdt_blob));
> gd->fdt_blob = gd->new_fdt;
> }
> #endif
So, I think the problem is placing the fdt so close to the end of memory
and we need to fix that. With the above change, we won't copy past the
end of memory but gd->fdt_blob + gd->fdt_size will still point past it,
yes? Thanks!
--
Tom
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Re: [PATCH] video: ipuv3: remove some useless code to reduce binary size
On Mon, 25 May 2020 14:34:17 +0200 Anatolij Gustschin ag...@denx.de wrote: > To enable DM_VIDEO we must decrease binary size to fix build > breakage for some boards, so drop not needed code. Also add > !DM_VIDEO guards which can be later removed when last non DM > users will be converted. > > Signed-off-by: Anatolij Gustschin > --- > drivers/video/imx/ipu_disp.c | 12 --- > drivers/video/imx/mxc_ipuv3_fb.c | 57 > 2 files changed, 22 insertions(+), 47 deletions(-) Applied to u-boot-video/next, thanks! -- Anatolij
Re: [PATCH] video: make vidconsole commands optional
On Mon, 25 May 2020 21:47:19 +0200 Anatolij Gustschin ag...@denx.de wrote: > Converting some boards to DM_VIDEO results in build breakage due > to increased code size. Make video console specific commands > optional to recude binary size. > > Signed-off-by: Anatolij Gustschin > --- > drivers/video/Kconfig | 8 > drivers/video/vidconsole-uclass.c | 2 ++ > 2 files changed, 10 insertions(+) Applied to u-boot-video/next, thanks! -- Anatolij
Re: [PATCH 6/8] imx: convert gwventana board to DM_VIDEO
On Tue, 26 May 2020 01:41:35 +0200 Anatolij Gustschin ag...@denx.de wrote: > Migration to DM_VIDEO driver is long overdue. Update defconfigs > to enable usage of converted ipuv3 driver DM configuration. > > Signed-off-by: Anatolij Gustschin > Cc: Tim Harvey > --- > configs/gwventana_emmc_defconfig | 9 +++-- > configs/gwventana_gw5904_defconfig | 9 +++-- > configs/gwventana_nand_defconfig | 9 +++-- > 3 files changed, 21 insertions(+), 6 deletions(-) Applied to u-boot-video/next, thanks! -- Anatolij
Re: [PATCH 7/8] imx: convert mx51evk board to DM_VIDEO
On Tue, 26 May 2020 01:41:36 +0200 Anatolij Gustschin ag...@denx.de wrote: > Migration to DM_VIDEO driver is long overdue. Update defconfig > to enable usage of converted ipuv3 driver DM configuration. > > Signed-off-by: Anatolij Gustschin > Cc: Stefano Babic > --- > configs/mx51evk_defconfig | 9 +++-- > 1 file changed, 7 insertions(+), 2 deletions(-) Applied to u-boot-video/next, thanks! -- Anatolij
Re: [PATCH 8/8] imx: convert mx53loco board to DM_VIDEO
On Tue, 26 May 2020 01:41:37 +0200 Anatolij Gustschin ag...@denx.de wrote: > Migration to DM_VIDEO driver is long overdue. Update defconfig > to enable usage of converted ipuv3 driver DM configuration. > > Signed-off-by: Anatolij Gustschin > Cc: Jason Liu > --- > configs/mx53loco_defconfig | 9 +++-- > 1 file changed, 7 insertions(+), 2 deletions(-) Applied to u-boot-video/next, thanks! -- Anatolij
RE: [PATCH] ARM: dts: stm32: Reinstate card detect behavior on DHSOM
Dear Marek > From: Marek Vasut > Sent: jeudi 18 juin 2020 20:35 > > The cd-gpios with (GPIO_ACTIVE_LOW | GPIO_PULL_UP) gpio is thus far > unsupported, reinstate the old cd-gpios behavior until this handling is fully > implemented. This permits the DHSOM to boot from SD again, without this patch > the card detect fails. > > Signed-off-by: Marek Vasut > Cc: Patrick Delaunay > Cc: Patrice Chotard > --- Applied to u-boot-stm/master, thanks! Regards Patrick
Re: [PATCH 3/8] imx: convert dms-ba16 boards to DM_VIDEO
On Tue, 26 May 2020 01:41:32 +0200 Anatolij Gustschin ag...@denx.de wrote: > Migration to DM_VIDEO driver is long overdue. Update defconfigs > to enable usage of converted ipuv3 driver DM configuration. > > Signed-off-by: Anatolij Gustschin > Cc: Akshay Bhat > Cc: Ken Lin > --- > configs/dms-ba16-1g_defconfig| 9 +++-- > configs/dms-ba16_defconfig | 9 +++-- > include/configs/advantech_dms-ba16.h | 2 -- > 3 files changed, 14 insertions(+), 6 deletions(-) Applied to u-boot-video/next, thanks! -- Anatolij
Re: [PATCH 4/8] imx: convert cgtqmx6eval board to DM_VIDEO
On Tue, 26 May 2020 01:41:33 +0200 Anatolij Gustschin ag...@denx.de wrote: > Migration to DM_VIDEO driver is long overdue. Update defconfig > to enable usage of converted ipuv3 driver DM configuration. > > Signed-off-by: Anatolij Gustschin > Cc: Otavio Salvador > --- > board/congatec/cgtqmx6eval/cgtqmx6eval.c | 5 + > configs/cgtqmx6eval_defconfig| 9 +++-- > 2 files changed, 12 insertions(+), 2 deletions(-) Applied to u-boot-video/next, thanks! -- Anatolij
Re: [PATCH 5/8] imx: convert mx6cuboxi board to DM_VIDEO
On Tue, 26 May 2020 01:41:34 +0200 Anatolij Gustschin ag...@denx.de wrote: > Migration to DM_VIDEO driver is long overdue. Update defconfig > to enable usage of converted ipuv3 driver DM configuration. > > Signed-off-by: Anatolij Gustschin > Cc: Baruch Siach > Cc: Fabio Estevam > --- > configs/mx6cuboxi_defconfig | 11 --- > 1 file changed, 8 insertions(+), 3 deletions(-) Applied to u-boot-video/next, thanks! -- Anatolij
[PATCH v3 2/4] mips: octeon: Initial minimal support for the Marvell Octeon SoC
From: Aaron Williams This patch adds very basic support for the Octeon III SoCs. Only CFI parallel NOR flash and UART is supported for now. Please note that the basic Octeon port does not include the DDR3/4 initialization yet. This will be added in some follow-up patches later. To still use U-Boot on with this port, the L2 cache (4MiB on Octeon III CN73xx) is used as RAM. This way, U-Boot can boot to the prompt on such boards. Signed-off-by: Aaron Williams Signed-off-by: Stefan Roese --- Changes in v3: - Don't "relocate" to L2 cache for now - Remove inclusion of "common.h" Changes in v2: - Remove custom start.S and use common start.S. Minimal custom lowlevel init code is currently added in the custom lowlevel_init.S. This needs to be extended with necessary code, like errata handling etc. But for a very first basic port, this seems to be all thats needed to boot on the EBB7304 to the prompt. - Removed select CREATE_ARCH_SYMLINK - Removed Octeon II support, as its currently no added in this patchset - Added cache.c to add the platform specific cache functions as no-ops for Octeon as the platform is cache coherent - Removed CONFIG_MIPS_CACHE_COHERENT - Added CONFIG_CPU_CAVIUM_OCTEON to Kconfig and selected it for Octeon to enable better sync with the Linux files in the future - Add get_tbclk() -> no need to define CONFIG_SYS_MIPS_TIMER_FREQ any more MAINTAINERS | 6 ++ arch/mips/Kconfig | 41 + arch/mips/Makefile| 3 + arch/mips/mach-octeon/Kconfig | 46 +++ arch/mips/mach-octeon/Makefile| 10 arch/mips/mach-octeon/cache.c | 20 +++ arch/mips/mach-octeon/clock.c | 27 + arch/mips/mach-octeon/cpu.c | 57 +++ arch/mips/mach-octeon/dram.c | 28 + arch/mips/mach-octeon/include/ioremap.h | 30 ++ arch/mips/mach-octeon/include/mach/cavm-reg.h | 42 ++ arch/mips/mach-octeon/include/mach/clock.h| 22 +++ arch/mips/mach-octeon/lowlevel_init.S | 19 +++ scripts/config_whitelist.txt | 1 - 14 files changed, 351 insertions(+), 1 deletion(-) create mode 100644 arch/mips/mach-octeon/Kconfig create mode 100644 arch/mips/mach-octeon/Makefile create mode 100644 arch/mips/mach-octeon/cache.c create mode 100644 arch/mips/mach-octeon/clock.c create mode 100644 arch/mips/mach-octeon/cpu.c create mode 100644 arch/mips/mach-octeon/dram.c create mode 100644 arch/mips/mach-octeon/include/ioremap.h create mode 100644 arch/mips/mach-octeon/include/mach/cavm-reg.h create mode 100644 arch/mips/mach-octeon/include/mach/clock.h create mode 100644 arch/mips/mach-octeon/lowlevel_init.S diff --git a/MAINTAINERS b/MAINTAINERS index 1fd975c72f..0aa0357967 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -763,6 +763,12 @@ M: Ezequiel Garcia S: Maintained F: arch/mips/mach-jz47xx/ +MIPS Octeon +M: Aaron Williams +S: Maintained +F: arch/mips/mach-octeon/ +F: arch/mips/include/asm/arch-octeon/ + MMC M: Peng Fan S: Maintained diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index bccd06cb0c..dd56da6dae 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -106,6 +106,23 @@ config ARCH_JZ47XX select OF_CONTROL select DM +config ARCH_OCTEON + bool "Support Marvell Octeon CN7xxx platforms" + select CPU_CAVIUM_OCTEON + select DISPLAY_CPUINFO + select DMA_ADDR_T_64BIT + select DM + select DM_SERIAL + select MIPS_L2_CACHE + select MIPS_TUNE_OCTEON3 + select ROM_EXCEPTION_VECTORS + select SUPPORTS_BIG_ENDIAN + select SUPPORTS_CPU_MIPS64_OCTEON + select PHYS_64BIT + select OF_CONTROL + select OF_LIVE + imply CMD_DM + config MACH_PIC32 bool "Support Microchip PIC32" select DM @@ -160,6 +177,7 @@ source "arch/mips/mach-bmips/Kconfig" source "arch/mips/mach-jz47xx/Kconfig" source "arch/mips/mach-pic32/Kconfig" source "arch/mips/mach-mtmips/Kconfig" +source "arch/mips/mach-octeon/Kconfig" if MIPS @@ -233,6 +251,14 @@ config CPU_MIPS64_R6 Choose this option to build a kernel for release 6 or later of the MIPS64 architecture. +config CPU_MIPS64_OCTEON + bool "Marvell Octeon series of CPUs" + depends on SUPPORTS_CPU_MIPS64_OCTEON + select 64BIT + help +Choose this option for Marvell Octeon CPUs. These CPUs are between +MIPS64 R5 and R6 with other extensions. + endchoice menu "General setup" @@ -408,6 +434,12 @@ config SUPPORTS_CPU_MIPS64_R2 config SUPPORTS_CPU_MIPS64_R6 bool +config SUPPORTS_CPU_MIPS64_OCTEON + bool + +config CPU_CAVIUM_OCTEON + bool + config CPU_MIPS32 bool default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
RE: [PATCH] ARM: dts: stm32: Reinstate card detect behavior on ST boards
Hi, > From: Patrick DELAUNAY > Sent: vendredi 19 juin 2020 11:20 > > The cd-gpios with (GPIO_ACTIVE_LOW | GPIO_PULL_UP) gpio is thus far > unsupported, reinstate the old cd-gpios behavior until this handling is fully > implemented. This avoid potential issue for SDCard boot: > the card detect fails with floating gpio. > > Signed-off-by: Patrick Delaunay > --- > > arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 2 ++ arch/arm/dts/stm32mp157c- > ed1-u-boot.dtsi | 2 ++ > 2 files changed, 4 insertions(+) > Applied to u-boot-stm/master, thanks! But I remove the Commit-note manually (error in patch sent with patman) Regards Patrick
[PATCH v3 1/4] sysreset: Add Octeon sysreset driver
This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC
family.
Signed-off-by: Stefan Roese
---
(no changes since v1)
drivers/sysreset/Kconfig | 7
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_octeon.c | 52 ++
3 files changed, 60 insertions(+)
create mode 100644 drivers/sysreset/sysreset_octeon.c
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 4be7433404..6ebc90e1d3 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -57,6 +57,13 @@ config SYSRESET_MICROBLAZE
help
This is soft reset on Microblaze which does jump to 0x0 address.
+config SYSRESET_OCTEON
+ bool "Enable support for Marvell Octeon SoC family"
+ depends on ARCH_OCTEON
+ help
+ This enables the system reset driver support for Marvell Octeon
+ SoCs.
+
config SYSRESET_PSCI
bool "Enable support for PSCI System Reset"
depends on ARM_PSCI_FW
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 3ed4bab9e3..df2293b848 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
obj-$(CONFIG_SYSRESET_MPC83XX) += sysreset_mpc83xx.o
obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
+obj-$(CONFIG_SYSRESET_OCTEON) += sysreset_octeon.o
obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o
diff --git a/drivers/sysreset/sysreset_octeon.c
b/drivers/sysreset/sysreset_octeon.c
new file mode 100644
index 00..a05dac3226
--- /dev/null
+++ b/drivers/sysreset/sysreset_octeon.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Stefan Roese
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define RST_SOFT_RST 0x0080
+
+struct octeon_sysreset_data {
+ void __iomem *base;
+};
+
+static int octeon_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ struct octeon_sysreset_data *data = dev_get_priv(dev);
+
+ writeq(1, data->base + RST_SOFT_RST);
+
+ return -EINPROGRESS;
+}
+
+static int octeon_sysreset_probe(struct udevice *dev)
+{
+ struct octeon_sysreset_data *data = dev_get_priv(dev);
+
+ data->base = dev_remap_addr(dev);
+
+ return 0;
+}
+
+static struct sysreset_ops octeon_sysreset = {
+ .request = octeon_sysreset_request,
+};
+
+static const struct udevice_id octeon_sysreset_ids[] = {
+ { .compatible = "mrvl,cn7xxx-rst" },
+ { }
+};
+
+U_BOOT_DRIVER(sysreset_octeon) = {
+ .id = UCLASS_SYSRESET,
+ .name = "octeon_sysreset",
+ .priv_auto_alloc_size = sizeof(struct octeon_sysreset_data),
+ .ops= _sysreset,
+ .probe = octeon_sysreset_probe,
+ .of_match = octeon_sysreset_ids,
+};
--
2.27.0
[PATCH v3 3/4] mips: octeon: dts: Add Octeon 3 cn73xx base dtsi file
This patch adds the base dtsi file for the Octeon 3 cn73xx SoC.
Signed-off-by: Stefan Roese
---
(no changes since v1)
MAINTAINERS| 1 +
arch/mips/dts/mrvl,cn73xx.dtsi | 64 ++
2 files changed, 65 insertions(+)
create mode 100644 arch/mips/dts/mrvl,cn73xx.dtsi
diff --git a/MAINTAINERS b/MAINTAINERS
index 0aa0357967..6acdbcf8ac 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -768,6 +768,7 @@ M: Aaron Williams
S: Maintained
F: arch/mips/mach-octeon/
F: arch/mips/include/asm/arch-octeon/
+F: arch/mips/dts/mrvl,cn73xx.dtsi
MMC
M: Peng Fan
diff --git a/arch/mips/dts/mrvl,cn73xx.dtsi b/arch/mips/dts/mrvl,cn73xx.dtsi
new file mode 100644
index 00..a7bd55f8ad
--- /dev/null
+++ b/arch/mips/dts/mrvl,cn73xx.dtsi
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Marvell / Cavium Inc. CN73xx
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ soc0: soc@0 {
+ interrupt-parent = <>;
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges; /* Direct mapping */
+
+ ciu3: interrupt-controller@10100 {
+ compatible = "cavium,octeon-7890-ciu3";
+ interrupt-controller;
+ /*
+* Interrupts are specified by two parts:
+* 1) Source number (20 significant bits)
+* 2) Trigger type: (4 == level, 1 == edge)
+*/
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x10100 0x 0x0 0xb000>;
+ };
+
+ bootbus: bootbus@11800 {
+ compatible = "cavium,octeon-3860-bootbus","simple-bus";
+ reg = <0x11800 0x 0x0 0x200>;
+ /* The chip select number and offset */
+ #address-cells = <2>;
+ /* The size of the chip select region */
+ #size-cells = <1>;
+ };
+
+ reset: reset@1180006001600 {
+ compatible = "mrvl,cn7xxx-rst";
+ reg = <0x11800 0x06001600 0x0 0x200>;
+ };
+
+ uart0: serial@118000800 {
+ compatible = "cavium,octeon-3860-uart","ns16550";
+ reg = <0x11800 0x0800 0x0 0x400>;
+ clock-frequency = <0>;
+ current-speed = <115200>;
+ reg-shift = <3>;
+ interrupts = <0x08000 4>;
+ };
+
+ uart1: serial@118000c00 {
+ compatible = "cavium,octeon-3860-uart","ns16550";
+ reg = <0x11800 0x0c00 0x0 0x400>;
+ clock-frequency = <0>;
+ current-speed = <115200>;
+ reg-shift = <3>;
+ interrupts = <0x08040 4>;
+ };
+ };
+};
--
2.27.0
[PATCH v3 4/4] mips: octeon: Add minimal Octeon 3 EBB7304 EVK support
This patch adds very basic minimal support for the Marvell Octeon 3
CN73xx based EBB7304 EVK. Please note that the basic Octeon port does
not support DDR3/4 initialization yet. To still use U-Boot on with this
port, the L2 cache (4MiB) is used as RAM. This way, U-Boot can boot
to the prompt on this board.
Supported devices:
- UART
- reset
- CFI parallel NOR flash
Signed-off-by: Stefan Roese
---
Changes in v3:
- Remove inclusion of "common.h"
- Slightly change some copyright messages (adjust year)
Changes in v2:
- Removed CONFIG_SYS_MIPS_TIMER_FREQ
arch/mips/dts/Makefile | 1 +
arch/mips/dts/mrvl,octeon-ebb7304.dts| 96
arch/mips/mach-octeon/Kconfig| 14
board/Marvell/octeon_ebb7304/Kconfig | 19 +
board/Marvell/octeon_ebb7304/MAINTAINERS | 7 ++
board/Marvell/octeon_ebb7304/Makefile| 8 ++
board/Marvell/octeon_ebb7304/board.c | 9 +++
configs/octeon_ebb7304_defconfig | 37 +
include/configs/octeon_common.h | 25 ++
include/configs/octeon_ebb7304.h | 20 +
10 files changed, 236 insertions(+)
create mode 100644 arch/mips/dts/mrvl,octeon-ebb7304.dts
create mode 100644 board/Marvell/octeon_ebb7304/Kconfig
create mode 100644 board/Marvell/octeon_ebb7304/MAINTAINERS
create mode 100644 board/Marvell/octeon_ebb7304/Makefile
create mode 100644 board/Marvell/octeon_ebb7304/board.c
create mode 100644 configs/octeon_ebb7304_defconfig
create mode 100644 include/configs/octeon_common.h
create mode 100644 include/configs/octeon_ebb7304.h
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index f711e9fb59..dc85901dca 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -18,6 +18,7 @@ dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb
+dtb-$(CONFIG_TARGET_OCTEON_EBB7304) += mrvl,octeon-ebb7304.dtb
dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f...@st1704.dtb
diff --git a/arch/mips/dts/mrvl,octeon-ebb7304.dts
b/arch/mips/dts/mrvl,octeon-ebb7304.dts
new file mode 100644
index 00..4e9c2de7d4
--- /dev/null
+++ b/arch/mips/dts/mrvl,octeon-ebb7304.dts
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Marvell / Cavium Inc. EVB CN7300
+ */
+
+/dts-v1/;
+
+/include/ "mrvl,cn73xx.dtsi"
+
+/ {
+ model = "cavium,ebb7304";
+ compatible = "cavium,ebb7304";
+
+ aliases {
+ serial0 =
+ };
+
+ chosen {
+ stdout-path =
+ };
+};
+
+ {
+ /*
+* bootbus CS0 for CFI flash is remapped (0x1fc0. -> 1f40.)
+* as the initial size is too small for the 8MiB flash device
+*/
+ ranges = <0 0 0 0x1f40 0xc0>,
+<1 0 0x1 0x1000 0>,
+<2 0 0x1 0x2000 0>,
+<3 0 0x1 0x3000 0>,
+<4 0 0 0x1d02 0x1>,
+<5 0 0x1 0x5000 0>,
+<6 0 0x1 0x6000 0>,
+<7 0 0x1 0x7000 0>;
+
+ cavium,cs-config@0 {
+ compatible = "cavium,octeon-3860-bootbus-config";
+ cavium,cs-index = <0>;
+ cavium,t-adr = <10>;
+ cavium,t-ce = <50>;
+ cavium,t-oe = <50>;
+ cavium,t-we = <35>;
+ cavium,t-rd-hld = <25>;
+ cavium,t-wr-hld = <35>;
+ cavium,t-pause = <0>;
+ cavium,t-wait = <50>;
+ cavium,t-page = <30>;
+ cavium,t-rd-dly = <0>;
+ cavium,page-mode = <1>;
+ cavium,pages = <8>;
+ cavium,bus-width = <8>;
+ };
+
+ cavium,cs-config@4 {
+ compatible = "cavium,octeon-3860-bootbus-config";
+ cavium,cs-index = <4>;
+ cavium,t-adr = <10>;
+ cavium,t-ce = <10>;
+ cavium,t-oe = <160>;
+ cavium,t-we = <100>;
+ cavium,t-rd-hld = <10>;
+ cavium,t-wr-hld = <0>;
+ cavium,t-pause = <50>;
+ cavium,t-wait = <50>;
+ cavium,t-page = <10>;
+ cavium,t-rd-dly = <10>;
+ cavium,pages = <0>;
+ cavium,bus-width = <8>;
+ };
+
+ flash0: nor@0,0 {
+ compatible = "cfi-flash";
+ reg = <0 0 0x80>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "bootloader";
+ reg = <0 0x34>;
+ read-only;
+
[PATCH v3 0/4] mips: Add initial Octeon MIPS64 base support
This patch adds very basic support for the Octeon III SoCs. Only CFI parallel UART, reset and NOR flash are supported for now. Please note that the basic Octeon port does not include the DDR3/4 initialization yet. This will be added in some follow-up patches later. To still use U-Boot on with this port, the L2 cache (4MiB on Octeon III CN73xx) is used as RAM. This way, U-Boot can boot to the prompt on such boards. v3: This version is based on the MIPS start.S rework and Linux header sync from Daniel using this branch: u-boot-mips/header_sync_v2 I removed the very early copy to to L2 cache for now to make the integration into mainline easier. With all the patches already applied and the Linux header sync, the resulting patchset is much smaller. Thanks, Stefan Changes in v3: - Don't "relocate" to L2 cache for now - Remove inclusion of "common.h" - Remove inclusion of "common.h" - Slightly change some copyright messages (adjust year) Changes in v2: - Remove custom start.S and use common start.S. Minimal custom lowlevel init code is currently added in the custom lowlevel_init.S. This needs to be extended with necessary code, like errata handling etc. But for a very first basic port, this seems to be all thats needed to boot on the EBB7304 to the prompt. - Removed select CREATE_ARCH_SYMLINK - Removed Octeon II support, as its currently no added in this patchset - Added cache.c to add the platform specific cache functions as no-ops for Octeon as the platform is cache coherent - Removed CONFIG_MIPS_CACHE_COHERENT - Added CONFIG_CPU_CAVIUM_OCTEON to Kconfig and selected it for Octeon to enable better sync with the Linux files in the future - Add get_tbclk() -> no need to define CONFIG_SYS_MIPS_TIMER_FREQ any more - Removed CONFIG_SYS_MIPS_TIMER_FREQ Aaron Williams (1): mips: octeon: Initial minimal support for the Marvell Octeon SoC Stefan Roese (3): sysreset: Add Octeon sysreset driver mips: octeon: dts: Add Octeon 3 cn73xx base dtsi file mips: octeon: Add minimal Octeon 3 EBB7304 EVK support MAINTAINERS | 7 ++ arch/mips/Kconfig | 41 arch/mips/Makefile| 3 + arch/mips/dts/Makefile| 1 + arch/mips/dts/mrvl,cn73xx.dtsi| 64 + arch/mips/dts/mrvl,octeon-ebb7304.dts | 96 +++ arch/mips/mach-octeon/Kconfig | 60 arch/mips/mach-octeon/Makefile| 10 ++ arch/mips/mach-octeon/cache.c | 20 arch/mips/mach-octeon/clock.c | 27 ++ arch/mips/mach-octeon/cpu.c | 57 +++ arch/mips/mach-octeon/dram.c | 28 ++ arch/mips/mach-octeon/include/ioremap.h | 30 ++ arch/mips/mach-octeon/include/mach/cavm-reg.h | 42 arch/mips/mach-octeon/include/mach/clock.h| 22 + arch/mips/mach-octeon/lowlevel_init.S | 19 board/Marvell/octeon_ebb7304/Kconfig | 19 board/Marvell/octeon_ebb7304/MAINTAINERS | 7 ++ board/Marvell/octeon_ebb7304/Makefile | 8 ++ board/Marvell/octeon_ebb7304/board.c | 9 ++ configs/octeon_ebb7304_defconfig | 37 +++ drivers/sysreset/Kconfig | 7 ++ drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_octeon.c| 52 ++ include/configs/octeon_common.h | 25 + include/configs/octeon_ebb7304.h | 20 scripts/config_whitelist.txt | 1 - 27 files changed, 712 insertions(+), 1 deletion(-) create mode 100644 arch/mips/dts/mrvl,cn73xx.dtsi create mode 100644 arch/mips/dts/mrvl,octeon-ebb7304.dts create mode 100644 arch/mips/mach-octeon/Kconfig create mode 100644 arch/mips/mach-octeon/Makefile create mode 100644 arch/mips/mach-octeon/cache.c create mode 100644 arch/mips/mach-octeon/clock.c create mode 100644 arch/mips/mach-octeon/cpu.c create mode 100644 arch/mips/mach-octeon/dram.c create mode 100644 arch/mips/mach-octeon/include/ioremap.h create mode 100644 arch/mips/mach-octeon/include/mach/cavm-reg.h create mode 100644 arch/mips/mach-octeon/include/mach/clock.h create mode 100644 arch/mips/mach-octeon/lowlevel_init.S create mode 100644 board/Marvell/octeon_ebb7304/Kconfig create mode 100644 board/Marvell/octeon_ebb7304/MAINTAINERS create mode 100644 board/Marvell/octeon_ebb7304/Makefile create mode 100644 board/Marvell/octeon_ebb7304/board.c create mode 100644 configs/octeon_ebb7304_defconfig create mode 100644 drivers/sysreset/sysreset_octeon.c create mode 100644 include/configs/octeon_common.h create mode 100644 include/configs/octeon_ebb7304.h -- 2.27.0
Re: [PATCH 1/8] imx: convert embest boards to DM_VIDEO
On Tue, 26 May 2020 01:41:30 +0200 Anatolij Gustschin ag...@denx.de wrote: > Migration to DM_VIDEO driver is long overdue. Update defconfigs > to enable usage of converted ipuv3 driver DM configuration. > > Signed-off-by: Anatolij Gustschin > --- > configs/marsboard_defconfig | 9 +++-- > configs/riotboard_defconfig | 9 +++-- > configs/riotboard_spl_defconfig | 9 +++-- > 3 files changed, 21 insertions(+), 6 deletions(-) Applied to u-boot-video/next, thanks! -- Anatolij
Re: [PATCH 2/8] imx: convert pico-imx6 to DM_VIDEO
On Tue, 26 May 2020 01:41:31 +0200 Anatolij Gustschin ag...@denx.de wrote: > Update defconfig to enable usage of converted ipuv3 > driver DM configuration. > > Signed-off-by: Anatolij Gustschin > Cc: Fabio Estevam > --- > configs/pico-imx6_defconfig | 8 +++- > 1 file changed, 7 insertions(+), 1 deletion(-) Applied to u-boot-video/next, thanks! -- Anatolij
Re: [PATCH] video: make backlight and panel drivers optional
On Tue, 26 May 2020 00:20:49 +0200 Anatolij Gustschin ag...@denx.de wrote: > Not all boards use these drivers, so allow to disable them to fix > building boards with U-Boot binary image size restrictions. > > Signed-off-by: Anatolij Gustschin > --- > drivers/video/Kconfig | 27 +-- > drivers/video/Makefile | 5 +++-- > 2 files changed, 28 insertions(+), 4 deletions(-) Applied to u-boot-video/next, thanks! -- Anatolij
Re: [PATCH] video: ipuv3: fix building with disabled panel driver
On Tue, 26 May 2020 00:09:22 +0200 Anatolij Gustschin ag...@denx.de wrote: > Panel code might be disabled for some boards, make this > driver code optional. > > Signed-off-by: Anatolij Gustschin > --- > drivers/video/imx/mxc_ipuv3_fb.c | 11 +++ > 1 file changed, 7 insertions(+), 4 deletions(-) Applied to u-boot-video/next, thanks! -- Anatolij
Re: [PATCH] nitrogen6x: update video console name
On Tue, 26 May 2020 12:03:21 +0200 Anatolij Gustschin ag...@denx.de wrote: > After migration to DM 'vga' name is not longer supported, > Update the upgrade script to use 'vidconsole' instead. > > Signed-off-by: Anatolij Gustschin > Cc: Troy Kisky > --- > board/boundary/nitrogen6x/6x_upgrade.txt | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Applied to u-boot-video/next, thanks! -- Anatolij
