Re: [PATCH v2 00/30] x86: Allow Coral to boot into Chrome OS

[Bin Meng]

Hi Simon,

On Mon, Nov 2, 2020 at 11:11 PM Simon Glass  wrote:
>
> Hi Bin,
>
> On Wed, 21 Oct 2020 at 21:03, Simon Glass  wrote:
> >
> > This series adds various minor features and tweaks to allow Coral to boot
> > into Chrome OS from U-Boot.
> >
> > It relies on three other series which have been recently sent:
> >
> >- smbios (u-boot-dm/smbios-working)
> >- bootm (u-boot-dm/bootm-working)
> >- misca (u-boot-dm/misca-working)
> >
> > This should provide a solid base for using ACPI on other Intel Apollo Lake
> > (APL) devices.
> >
> > Changes in v2:
> > - Rename update_fixed_mtrss() to update_fixed_mtrrs()
> > - Add comments to enable_pm_timer_emulation() and cpu_mca_configure()
> > - Convert tabs to spaces for consistency
> > - Use log_err() to report error
> > - Rename struct chromeos_acpi to struct chromeos_acpi_gnvs
> > - Fix comment style
> > - Define CONFIG_CHROMEOS_VBOOT in the Kconfig too
> > - Correct a bisect build error
> > - Drop patch "Store the FADT so we can avoid searching for it"
> > - Drop patch "Move ROM_TABLE_ADDR into the C file"
> >
> > Simon Glass (30):
> >   Add an assembly guard around linux/bitops.h
> >   x86: apl: Add core init for the SoC
> >   x86: Add a layout for Chrome OS verified boot
> >   x86: Add support for private files
> >   x86: Allow writing tables to fail
> >   x86: acpi: Store the ACPI context in global_data
> >   x86: Don't bother clearing global NVS
> >   x86: coral: Drop the duplicate PCIe settings
> >   x86: Add SMBIOS info for Coral
> >   x86: coral: Correct max98357 file
> >   x86: Use if instead of #ifdef in write_tables()
> >   x86: Allow putting some tables in the bloblist
> >   x86: nhlt: Correct output of bytes and 16-bit data
> >   x86: nhlt: Fix a few bugs in the table generation
> >   x86: Show the interrupt pointer with 'irqinfo'
> >   x86: sound: Correct error handling
> >   acpi: Correct reset handling in acpi_device_add_power_res()
> >   x86: acpi: Allow the SSDT to be empty
> >   x86: acpi: Put the generated code first in DSDT
> >   acpi: Don't reset the tables with every new generation
> >   x86: Define the Chrome OS GNVS region
> >   x86: Use CONFIG_CHROMEOS_VBOOT for verified boot
> >   x86: Set up Chrome OS to boot into developer mode
> >   x86: Boot coral into Chrome OS by default
> >   x86: fsp: Convert fsp_dram to use log_debug()
> >   x86: Silence some logging statements
> >   x86: acpi: Include the TPMv1 table only if needed
> >   x86: acpi: Don't show the UART address by default
> >   x86: pinctrl: Silence the warning when a pin is not found
> >   x86: fsp: Adjust calculations for MTRR range and DRAM top
> >
> >  Kconfig   |  17 
> >  arch/x86/cpu/apollolake/acpi.c|  25 --
> >  arch/x86/cpu/apollolake/cpu.c |  84 +
> >  arch/x86/cpu/apollolake/cpu_common.c  |  25 ++
> >  arch/x86/cpu/apollolake/cpu_spl.c |  20 -
> >  arch/x86/cpu/apollolake/fsp_s.c   |   8 +-
> >  arch/x86/cpu/cpu.c|   9 +-
> >  arch/x86/cpu/i386/interrupt.c |  14 +--
> >  arch/x86/cpu/intel_common/acpi.c  |   1 -
> >  arch/x86/cpu/intel_common/cpu.c   |  19 
> >  arch/x86/cpu/intel_common/intel_opregion.c|   2 +-
> >  arch/x86/cpu/intel_common/itss.c  |   8 +-
> >  arch/x86/dts/chromebook_coral.dts |  12 ++-
> >  arch/x86/dts/chromebook_samus.dts |   2 +-
> >  arch/x86/dts/u-boot.dtsi  |   4 +
> >  arch/x86/include/asm/acpi/vbnv_layout.h   |  38 
> >  arch/x86/include/asm/arch-apollolake/cpu.h|  14 +++
> >  arch/x86/include/asm/cpu_common.h |   9 ++
> >  arch/x86/include/asm/intel_gnvs.h |  54 ++-
> >  arch/x86/include/asm/interrupt.h  |  17 
> >  arch/x86/include/asm/msr-index.h  |  20 -
> >  arch/x86/include/asm/tables.h |   4 +-
> >  arch/x86/lib/acpi_nhlt.c  |  19 ++--
> >  arch/x86/lib/acpi_table.c |  78 ++--
> >  arch/x86/lib/fsp/fsp_dram.c   |  35 +---
> >  arch/x86/lib/fsp/fsp_graphics.c   |   2 +-
> >  arch/x86/lib/fsp2/fsp_dram.c  |   8 +-
> >  arch/x86/lib/interrupts.c |   3 +
> >  arch/x86/lib/tables.c |  85 +-
> >  arch/x86/lib/tpl.c|   2 +-
> >  .../max98357-render-2ch-48khz-24b.dat | Bin 0 -> 116 bytes
> >  configs/chromebook_coral_defconfig|  13 ++-
> >  drivers/core/acpi.c   |  10 ++-
> >  drivers/pinctrl/intel/pinctrl.c   |   2 +-
> >  drivers/sound/da7219.c|   4 +-
> >  drivers/sound/max98357a.c |   2 +-
> >  include/acpi/acpi_table.h |  10 +++
> >  include/asm-generic/global_data.h

Re: [PATCH v2 10/30] x86: coral: Correct max98357 file

[Bin Meng]

On Thu, Oct 22, 2020 at 11:03 AM Simon Glass  wrote:
>
> This somehow ended up as an empty file. Fix it.
>
> Signed-off-by: Simon Glass 
> ---
>
> (no changes since v1)
>
>  .../max98357-render-2ch-48khz-24b.dat | Bin 0 -> 116 bytes
>  1 file changed, 0 insertions(+), 0 deletions(-)
>

Acked-by: Bin Meng 

Re: [PATCH] env: env_sf: don't set .init op if not needed

[Wolfgang Denk]

Dear Heiko,

In message  you wrote:
>
> > Apparently the meaning of CONFIG_ENV_IS_NOWHERE is nowhere
> > documented :-(
>
> env/Kconfig says:

Ah, I missed that.  I was only checkng the README and the doc/
files...

> config ENV_IS_NOWHERE
>  bool "Environment is not stored"

OK, but this is a pretty clear statement.

>  help
>Define this if you don't want to or can't have an environment 
> stored
>on a storage medium. In this case the environment will still exist
>while U-Boot is running, but once U-Boot exits it will not be
>stored. U-Boot will therefore always start up with a default
>environment.
>
>
> > But common sense says that "IS NOWHERE" means that there is no
> > storage defined for the environment.  I would expect, that Kconfig
>
> Yes and use default one ...

Correct.  So this matches my understanding of the name of the config
option: use this if there is no storage defined for the environment.

> > does not even allow to enable any CONFIG_ENV_IS_IN_* when
> > CONFIG_ENV_IS_NOWHERE is selected - these are logically exclusive.
>
> Hmm...
>
> > May I suggest that:
> > 
> > 1) our Kconfig files are changed such that CONFIG_ENV_IS_NOWHERE and
> > CONFIG_ENV_IS_IN_* are indeed exclusive, so that we adhere to the
> > POLA [1] ?
>
> Yes if we really want such a hard setting without having an environment!

Well, this is exactly what this config option is supposed to do -
both according to the name and according to the documentation: "the
environment ... will not be stored."

> Currently CONFIG_ENV_IS_NOWHERE is not that hard and means U-Boot has
> no Environment ... it means use the built in default environment...

I would rephrase this: Currently the implemantation does not enforce
the correct behaviour, so it has been misused for other (also
useful) things.  But this is not clean and should be fixed.

> > 2) for cases like this one, where there actually _is_ some storage
> > defined, but it shall be used in a non-standard way, a new
> > CONFIG_ option gets created that expresses in it's name what it
> > does?
>
> Not in a none standard way! Instead you can define more than one
> environment storage devices and load them in a board specific order
> (defined thorugh board specfif function env_get_location())

Yes, agreed.  But this logically impossible if there is no storage
at all, which is what CONFIG_ENV_IS_NOWHERE says.

For such cases we must not define CONFIG_ENV_IS_NOWHERE, but
something else / something new instead.

> For example:
> - load first default environment (and you are correct ENV_IS_NOWHERE
>  is here really a misleading name).
>
> - load environment from SPI NOR ...
>
> May we only should do a simple rename ?
>
> ENV_IS_NOWHERE -> ENV_IS_IN_UBOOT (or ENV_IS_IN_DEFAULT) ?

In my understanding, ENV_IS_IN_* defines the storage device used to
save the persistent copy (the external representation(s)) of the
environment, which get written when you use "env save".  So both
your suggestions are not acceptable, as the the envrionment never
gets saved to the default environment - this is just the data that
is used to initialize it in the same was as in an emergency when the
persistent the environment (more precisely: when all copies of it)
cannot be read (I/O or checksum error).

> If we really want a hard "there is no storage" switch (which really

You miss the fact that we already have this: CONFIG_ENV_IS_NOWHERE

It is just not implemented correctly, and I ask for a cleanup.

> means there is *no* environment ... I do not even know, if U-boot
> works without!) we should introduce a new ENV_IS_IN_DEFAULT which
> loads the default environment...

You misunderstand.  "No storage" means no storage for writing the
_persistent_ environment, see above.  Int his case there is still
the same emergency handling as in cases of corrupted peristent
environment - the fallback to the builtin (socalled "default")
environment.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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lation.   - Blaise Pascal

Re: [PATCH 1/2] cros_ec: Fix up driver names to avoid dtoc warnings

[Bin Meng]

On Tue, Nov 3, 2020 at 2:57 PM Bin Meng  wrote:
>
> On Mon, Oct 5, 2020 at 7:27 PM Simon Glass  wrote:
> >
> > Fix the dtoc warning in these file by using a driver name that matches the
> > compatible string.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> >  drivers/misc/cros_ec_i2c.c | 4 ++--
> >  drivers/misc/cros_ec_lpc.c | 4 ++--
> >  drivers/misc/cros_ec_spi.c | 4 ++--
> >  3 files changed, 6 insertions(+), 6 deletions(-)
> >
>
> Reviewed-by: Bin Meng 

applied to u-boot-x86, thanks!

Re: [PATCH 2/2] x86: Fix up driver names to avoid dtoc warnings

[Bin Meng]

On Tue, Nov 3, 2020 at 2:57 PM Bin Meng  wrote:
>
> On Mon, Oct 5, 2020 at 7:27 PM Simon Glass  wrote:
> >
> > At present there are a lot of dtoc warnings reported when building
> > chromebook_coral, of the form:
> >
> >WARNING: the driver intel_apl_lpc was not found in the driver list
> >
> > Correct these by using driver names that matches their compatible string.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> >  arch/x86/cpu/apollolake/cpu.c| 4 ++--
> >  arch/x86/cpu/apollolake/hostbridge.c | 2 +-
> >  arch/x86/cpu/apollolake/lpc.c| 2 +-
> >  arch/x86/cpu/apollolake/pch.c| 4 ++--
> >  arch/x86/cpu/apollolake/pmc.c| 2 +-
> >  arch/x86/cpu/apollolake/punit.c  | 4 ++--
> >  arch/x86/cpu/apollolake/uart.c   | 2 +-
> >  arch/x86/cpu/intel_common/itss.c | 2 +-
> >  arch/x86/cpu/intel_common/p2sb.c | 2 +-
> >  drivers/gpio/intel_gpio.c| 4 ++--
> >  drivers/pinctrl/intel/pinctrl_apl.c  | 2 +-
> >  drivers/rtc/mc146818.c   | 4 ++--
> >  drivers/sysreset/sysreset_x86.c  | 4 ++--
> >  drivers/timer/tsc_timer.c| 4 ++--
> >  14 files changed, 21 insertions(+), 21 deletions(-)
> >
>
> Reviewed-by: Bin Meng 

applied to u-boot-x86, thanks!

Re: [PATCH v2 14/16] riscv: k210: Rename airam to aisram

[Rick Chen]

> This is more consistent with the naming of other ram banks, and matches
> what Linux is doing.
>
> Reported-by: Damien Le Moal 
> Signed-off-by: Sean Anderson 
> ---
>
> Changes in v2:
> - New
>
>  arch/riscv/dts/k210.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>

Reviewed-by: Rick Chen 

Re: [PATCH v2 22/30] x86: Use CONFIG_CHROMEOS_VBOOT for verified boot

[Bin Meng]

On Thu, Oct 22, 2020 at 11:03 AM Simon Glass  wrote:
>
> At present CONFIG_CHROMEOS is used to determine whether verified boot is
> in use. The code to implement that is not in U-Boot mainline.
>
> However, it is useful to be able to boot a Chromebook in developer mode
> in U-Boot mainline without needing the verified boot code.
>
> To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot
> should be used, and CONFIG_CHROMEOS to indicate that the board supports
> Chrome OS. That allows us to define CONFIG_CHROMEOS on coral.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v2:
> - Define CONFIG_CHROMEOS_VBOOT in the Kconfig too
> - Correct a bisect build error
>
>  Kconfig| 17 +
>  arch/x86/cpu/apollolake/acpi.c |  3 ++-
>  arch/x86/dts/chromebook_coral.dts  |  2 +-
>  arch/x86/dts/chromebook_samus.dts  |  2 +-
>  arch/x86/include/asm/intel_gnvs.h  |  3 ---
>  arch/x86/lib/tpl.c |  2 +-
>  configs/chromebook_coral_defconfig |  3 ++-
>  7 files changed, 24 insertions(+), 8 deletions(-)
>

Reviewed-by: Bin Meng 

Re: [PATCH v2 21/30] x86: Define the Chrome OS GNVS region

[Bin Meng]

On Thu, Oct 22, 2020 at 11:03 AM Simon Glass  wrote:
>
> It is not possible to boot Chrome OS properly without passing some basic
> information from U-Boot. This applies even if verified boot is not being
> used. Add a structure definition for this.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v2:
> - Rename struct chromeos_acpi to struct chromeos_acpi_gnvs
> - Fix comment style
>
>  arch/x86/include/asm/intel_gnvs.h | 51 ++-
>  1 file changed, 50 insertions(+), 1 deletion(-)
>

Reviewed-by: Bin Meng 

Re: [PATCH v2 02/30] x86: apl: Add core init for the SoC

[Bin Meng]

On Thu, Oct 22, 2020 at 11:03 AM Simon Glass  wrote:
>
> Set up MSRs required for Apollo Lake. This enables Linux to use the
> timers correctly. Also write the fixed MSRs for this platform.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v2:
> - Rename update_fixed_mtrss() to update_fixed_mtrrs()
> - Add comments to enable_pm_timer_emulation() and cpu_mca_configure()
>
>  arch/x86/cpu/apollolake/cpu.c  | 84 ++
>  arch/x86/cpu/apollolake/cpu_common.c   | 25 +++
>  arch/x86/cpu/apollolake/cpu_spl.c  | 20 --
>  arch/x86/cpu/intel_common/cpu.c| 19 +
>  arch/x86/include/asm/arch-apollolake/cpu.h | 14 
>  arch/x86/include/asm/cpu_common.h  |  9 +++
>  arch/x86/include/asm/msr-index.h   | 20 +-
>  7 files changed, 170 insertions(+), 21 deletions(-)
>

Reviewed-by: Bin Meng 

Re: [PATCH v2 03/30] x86: Add a layout for Chrome OS verified boot

[Bin Meng]

Hi Simon,

On Thu, Oct 22, 2020 at 11:03 AM Simon Glass  wrote:
>
> Add definitions for part of the vboot context used with verified boot.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v2:
> - Convert tabs to spaces for consistency

I think in U-Boot tabs are preferred over spaces.

>
>  arch/x86/include/asm/acpi/vbnv_layout.h | 38 +
>  1 file changed, 38 insertions(+)
>  create mode 100644 arch/x86/include/asm/acpi/vbnv_layout.h
>

Otherwise,
Reviewed-by: Bin Meng 

Regards,
Bin

Re: [PATCH v2 13/16] riscv: Enable AI ram on K210

[Rick Chen]

> CONFIG_SYS_SDRAM_{BASE,SIZE} are no longer necessary. The default
> get_effective_memsize will also work. The clock driver creates a bunch of
> devices, so we need to increase the pre-reloc malloc arena.
>
> Signed-off-by: Sean Anderson 
> ---
>
> (no changes since v1)
>
>  board/sipeed/maix/Kconfig  |  2 ++
>  board/sipeed/maix/maix.c   | 26 --
>  configs/sipeed_maix_bitm_defconfig |  1 +
>  include/configs/sipeed-maix.h  |  4 
>  4 files changed, 3 insertions(+), 30 deletions(-)
>

Reviewed-by: Rick Chen 

Re: [PATCH v2 12/16] riscv: Probe ram in dram_init

[Rick Chen]

> If CONFIG_RAM is enabled, use the ram device to get the base/size of
> memory. This provides an easy way for boards/cpus to hook into the
> dram_init logic, without needing to provide a second SYS_CPU.
>
> Signed-off-by: Sean Anderson 
> ---
>
> (no changes since v1)
>
>  arch/riscv/cpu/generic/dram.c | 26 ++
>  1 file changed, 26 insertions(+)
>

Reviewed-by: Rick Chen 

[PATCH v2] mmc: fsl_esdhc_imx: add wait_dat0() support

[haibo . chen]

From: Haibo Chen 

Add wait_dat0() support, upper layer will use this callback.

Signed-off-by: Haibo Chen 
---
 drivers/mmc/fsl_esdhc_imx.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 22040c67a8..3843d61d71 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1646,6 +1646,28 @@ static int fsl_esdhc_set_enhanced_strobe(struct udevice 
*dev)
 }
 #endif
 
+static int fsl_esdhc_wait_dat0(struct udevice *dev, int state,
+   int timeout_us)
+{
+   int ret = -ETIMEDOUT;
+   bool dat0_high;
+   bool target_dat0_high = !!state;
+   struct fsl_esdhc_priv *priv = dev_get_priv(dev);
+   struct fsl_esdhc *regs = priv->esdhc_regs;
+
+   timeout_us = DIV_ROUND_UP(timeout_us, 10); /* check every 10 us. */
+   while (timeout_us--) {
+   dat0_high = !!(esdhc_read32(®s->prsstat) & PRSSTAT_DAT0);
+   if (dat0_high == target_dat0_high) {
+   ret = 0;
+   break;
+   }
+   udelay(10);
+   }
+
+   return ret;
+}
+
 static const struct dm_mmc_ops fsl_esdhc_ops = {
.get_cd = fsl_esdhc_get_cd,
.send_cmd   = fsl_esdhc_send_cmd,
@@ -1656,6 +1678,7 @@ static const struct dm_mmc_ops fsl_esdhc_ops = {
 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
.set_enhanced_strobe = fsl_esdhc_set_enhanced_strobe,
 #endif
+   .wait_dat0 = fsl_esdhc_wait_dat0,
 };
 #endif
 
-- 
2.17.1

RE: [PATCH] mmc: fsl_esdhc_imx: add wait_dat0() support

[Bough Chen]

> -Original Message-
> From: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
> Sent: 2020年11月3日 5:52
> To: Bough Chen ; Peng Fan ;
> u-boot@lists.denx.de
> Cc: dl-uboot-imx 
> Subject: Re: [PATCH] mmc: fsl_esdhc_imx: add wait_dat0() support
> 
> On 11/2/20 8:17 PM, haibo.c...@nxp.com wrote:
> > From: Haibo Chen 
> >
> > Add wait_dat0() support, upper layer will use this callback.
> >
> > Signed-off-by: Haibo Chen 
> > ---
> >  drivers/mmc/fsl_esdhc_imx.c | 23 +++
> >  1 file changed, 23 insertions(+)
> >
> > diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
> > index 22040c67a8..dc6a6006fa 100644
> > --- a/drivers/mmc/fsl_esdhc_imx.c
> > +++ b/drivers/mmc/fsl_esdhc_imx.c
> > @@ -1646,6 +1646,28 @@ static int
> fsl_esdhc_set_enhanced_strobe(struct
> > udevice *dev)  }  #endif
> >
> > +static int fsl_esdhc_wait_dat0(struct udevice *dev, int state,
> > +   int timeout_us)
> > +{
> > +   int ret = -ETIMEDOUT;
> > +   bool dat0_high;
> > +   bool target_dat0_high = !!state;
> > +   struct fsl_esdhc_priv *priv = dev_get_priv(dev);
> > +   struct fsl_esdhc *regs = priv->esdhc_regs;
> > +
> > +   timeout_us = DIV_ROUND_UP(timeout_us, 10); /* check every 10 us. */
> > +   while (timeout_us--) {
> > +   dat0_high = !!(esdhc_read32(®s->prsstat) & PRSSTAT_DAT0);
> > +   if (dat0_high == target_dat0_high) {
> > +   ret = 0;
> > +   break;
> > +   }
> > +   udelay(10);
> 
> Fix indent.

Yes, will fix.

> And can't use wait_for_bit_xx()?

Just to align with the mmc_wait_dat0() defined in mmc-uclass.c, named 
fsl_esdhc_wait_dat0 should be more readable.

Best Regards
Haibo Chen
> 
> Best  Regards,
> Jaehoon Chung
> 
> > +   }
> > +
> > +   return ret;
> > +}
> > +
> >  static const struct dm_mmc_ops fsl_esdhc_ops = {
> > .get_cd = fsl_esdhc_get_cd,
> > .send_cmd   = fsl_esdhc_send_cmd,
> > @@ -1656,6 +1678,7 @@ static const struct dm_mmc_ops fsl_esdhc_ops
> = {
> > #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
> > .set_enhanced_strobe = fsl_esdhc_set_enhanced_strobe,  #endif
> > +   .wait_dat0 = fsl_esdhc_wait_dat0,
> >  };
> >  #endif
> >
> >

Re: [PATCH v2 1/2] smbios: add parsing API

[Bin Meng]

On Mon, Nov 2, 2020 at 5:21 PM Christian Gmeiner
 wrote:
>
> ping and a short question: would it make more sense to put the parsing
> code into smbios.c and unconditionally compile it?

I think it's fine to leave this as a separte module.

Reviewed-by: Bin Meng 

But nits below:

>
> Am Mi., 7. Okt. 2020 um 14:33 Uhr schrieb Christian Gmeiner
> :
> >
> > Add an very simple API to be able to access SMBIOS strings

an -> a

> > like vendor, model and bios version.
> >
> > Signed-off-by: Christian Gmeiner 
> > ---
> >  include/smbios.h| 27 +
> >  lib/Kconfig |  6 +++
> >  lib/Makefile|  1 +
> >  lib/smbios-parser.c | 96 +
> >  4 files changed, 130 insertions(+)
> >  create mode 100644 lib/smbios-parser.c
> >
> > diff --git a/include/smbios.h b/include/smbios.h
> > index 97b9ddce23..ed60c00fae 100644
> > --- a/include/smbios.h
> > +++ b/include/smbios.h
> > @@ -237,4 +237,31 @@ typedef int (*smbios_write_type)(ulong *addr, int 
> > handle);
> >   */
> >  ulong write_smbios_table(ulong addr);
> >
> > +/**
> > + * smbios_entry() - Get a vaild struct smbios_entry pointer

typo: valid

> > + *
> > + * @address:   address where smbios tables is located
> > + * @size:  size of smbios table
> > + * @return:NULL or a valid pointer to a struct smbios_entry
> > + */
> > +const struct smbios_entry *smbios_entry(u64 address, u32 size);
> > +
> > +/**
> > + * smbios_header() - Search for SMBIOS header type
> > + *
> > + * @entry: pointer to a struct smbios_entry
> > + * @type:  SMBIOS type
> > + * @return:NULL or a valid pointer to a struct smbios_header
> > + */
> > +const struct smbios_header *smbios_header(const struct smbios_entry 
> > *entry, int type);
> > +
> > +/**
> > + * smbios_string() - Return string from SMBIOS
> > + *
> > + * @header:pointer to struct smbios_header
> > + * @index: string index
> > + * @return:NULL or a valid const char pointer
> > + */
> > +const char *smbios_string(const struct smbios_header *header, int index);
> > +
> >  #endif /* _SMBIOS_H_ */
> > diff --git a/lib/Kconfig b/lib/Kconfig
> > index 8efb154f73..c92131b7bc 100644
> > --- a/lib/Kconfig
> > +++ b/lib/Kconfig
> > @@ -667,6 +667,12 @@ config OID_REGISTRY
> > help
> >   Enable fast lookup object identifier registry.
> >
> > +config SMBIOS_PARSER
> > +   bool "SMBIOS parser"
> > +   default n

nits: remove default n, because it is Kconfig default

> > +   help
> > + A simple parser for SMBIOS data.
> > +
> >  source lib/efi/Kconfig
> >  source lib/efi_loader/Kconfig
> >  source lib/optee/Kconfig
> > diff --git a/lib/Makefile b/lib/Makefile
> > index 0cd7bea282..0383fddf2c 100644
> > --- a/lib/Makefile
> > +++ b/lib/Makefile
> > @@ -37,6 +37,7 @@ obj-$(CONFIG_FIT) += fdtdec_common.o
> >  obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
> >  obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
> >  obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o
> > +obj-$(CONFIG_SMBIOS_PARSER) += smbios-parser.o
> >  obj-$(CONFIG_IMAGE_SPARSE) += image-sparse.o
> >  obj-y += ldiv.o
> >  obj-$(CONFIG_XXHASH) += xxhash.o
> > diff --git a/lib/smbios-parser.c b/lib/smbios-parser.c
> > new file mode 100644
> > index 00..b89f988ef9
> > --- /dev/null
> > +++ b/lib/smbios-parser.c
> > @@ -0,0 +1,96 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2020, Bachmann electronic GmbH
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +static inline int verify_checksum(const struct smbios_entry *e)
> > +{
> > +   /*
> > +* Checksums for SMBIOS tables are calculated to have a value, so 
> > that
> > +* the sum over all bytes yields zero (using unsigned 8 bit 
> > arithmetic).
> > +*/
> > +   u8 *byte = (u8 *)e;
> > +   u8 sum = 0;
> > +
> > +   for (int i = 0; i < e->length; i++)
> > +   sum += byte[i];
> > +
> > +   return sum;
> > +}
> > +
> > +const struct smbios_entry *smbios_entry(u64 address, u32 size)
> > +{
> > +   const struct smbios_entry *entry = (struct smbios_entry 
> > *)(uintptr_t)address;
> > +
> > +   if (!address | !size)
> > +   return NULL;
> > +
> > +   if (memcmp(entry->anchor, "_SM_", 4))
> > +   return NULL;
> > +
> > +   if (verify_checksum(entry))
> > +   return NULL;
> > +
> > +   return entry;
> > +}
> > +
> > +static const struct smbios_header *next_header(const struct smbios_header 
> > *curr)
> > +{
> > +   u8 *pos = ((u8 *)curr) + curr->length;
> > +
> > +   /* search for _double_ NULL bytes */
> > +   while (!((*pos == 0) && (*(pos + 1) == 0)))
> > +   pos++;
> > +
> > +   /* step behind the double NULL bytes */
> > +   pos += 2;
> > +
> > +   return (struct smbios_header *)pos;
> > +}
> > +
> > +const struct smbios_header *smbios_header(const struct smbios_entry 
> > *entry, int type)
> > +{
> > +   const unsigned int num_he

Re: [PATCH v2 2/2] coreboot: make use of smbios parser

[Bin Meng]

On Wed, Oct 7, 2020 at 8:33 PM Christian Gmeiner
 wrote:
>
> If u-boot gets used as coreboot payload it might be nice to get
> vendor, model and bios version from smbios. I am not sure about
> the output of all the read information.
>
> With qemu target for coreboot this could look this:
>
> CBFS: Found @ offset 14f40 size 3b188
> Checking segment from ROM address 0xffc15178
> Checking segment from ROM address 0xffc15194
> Loading segment from ROM address 0xffc15178
>   code (compression=1)
>   New segment dstaddr 0x0111 memsize 0x889ef srcaddr 0xffc151b0 filesize 
> 0x3b150
> Loading Segment: addr: 0x0111 memsz: 0x000889ef filesz: 
> 0x0003b150
> using LZMA
> Loading segment from ROM address 0xffc15194
>   Entry Point 0x0111
> BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms
> Jumping to boot code at 0x0111(0x07fa7000)
>
> U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200)
>
> CPU: x86_64, vendor AMD, device 663h
> DRAM:  127.1 MiB
> MMC:
> Video: No video mode configured in coreboot!
> Video: No video mode configured in coreboot!
> Vendor: QEMU
> Model: Standard PC (i440FX + PIIX, 1996)
> Bios Version: 4.12-3152-g326a499f6f-dirty
> Net:   e1000: 52:54:00:12:34:56
>eth0: e1000#0
> No working controllers found
> Finalizing coreboot
> Hit any key to stop autoboot:  0
>
> Signed-off-by: Christian Gmeiner 
> ---
>  board/coreboot/coreboot/coreboot.c | 45 ++
>  configs/coreboot_defconfig |  1 +
>  2 files changed, 46 insertions(+)
>
> diff --git a/board/coreboot/coreboot/coreboot.c 
> b/board/coreboot/coreboot/coreboot.c
> index b791b82ef4..afb457212a 100644
> --- a/board/coreboot/coreboot/coreboot.c
> +++ b/board/coreboot/coreboot/coreboot.c
> @@ -4,7 +4,9 @@
>   */
>
>  #include 
> +#include 
>  #include 
> +#include 
>
>  int board_early_init_r(void)
>  {
> @@ -16,3 +18,46 @@ int board_early_init_r(void)
>
> return 0;
>  }
> +
> +#ifdef CONFIG_SMBIOS_PARSER
> +int show_board_info(void)
> +{
> +   const struct smbios_entry *smbios = 
> smbios_entry(lib_sysinfo.smbios_start, lib_sysinfo.smbios_size);
> +
> +   if (!smbios)
> +   goto fallback;
> +
> +   const struct smbios_header *bios = smbios_header(smbios, 
> SMBIOS_BIOS_INFORMATION);
> +   const struct smbios_header *system = smbios_header(smbios, 
> SMBIOS_SYSTEM_INFORMATION);
> +   const struct smbios_type0 *t0 = (struct smbios_type0 *)bios;
> +   const struct smbios_type1 *t1 = (struct smbios_type1 *)system;
> +
> +   if (!t0 || !t1)
> +   goto fallback;
> +
> +   const char *bios_ver = smbios_string(bios, t0->bios_ver);
> +   const char *model = smbios_string(system, t1->product_name);
> +   const char *manufacturer = smbios_string(system, t1->manufacturer);
> +
> +   if (!model || !manufacturer || !bios_ver)
> +   goto fallback;
> +
> +   printf("Vendor: %s\n", manufacturer);
> +   printf("Model: %s\n", model);
> +   printf("Bios Version: %s\n", bios_ver);

nits: Bios -> BIOS

> +
> +   return 0;
> +
> +fallback:
> +#ifdef CONFIG_OF_CONTROL
> +   DECLARE_GLOBAL_DATA_PTR;
> +
> +   model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
> +
> +   if (model)
> +   printf("Model: %s\n", model);
> +#endif
> +
> +   return checkboard();
> +}
> +#endif
> diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig
> index 3249b2fb2f..501a20e790 100644
> --- a/configs/coreboot_defconfig
> +++ b/configs/coreboot_defconfig
> @@ -43,3 +43,4 @@ CONFIG_SOUND=y
>  CONFIG_SOUND_I8254=y
>  CONFIG_CONSOLE_SCROLL_LINES=5
>  # CONFIG_GZIP is not set
> +CONFIG_SMBIOS_PARSER=y

Please make sure the Kconfig option is inserted in a correct order

Otherwise:
Reviewed-by: Bin Meng 

Regards,
Bin

Re: [PATCH v2 11/16] ram: sifive: Default to y only if compiling for fu540

[Rick Chen]

> Other RISC-V targets should not have RAM_SIFIVE enabled by default.
>
> Signed-off-by: Sean Anderson 
> Reviewed-by: Pragnesh Patel 
> ---
>
> (no changes since v1)
>
>  drivers/ram/sifive/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Reviewed-by: Rick Chen 

Re: [PATCH v2 10/16] ram: Add driver for K210 SRAM

[Rick Chen]

> This adds a driver to handle enabling the clock for the AI SRAM. This was
> previously done in board_init, but it needs to happen before relocation
> now. An alternative would be to move this to board_init_early_f, but by
> doing it this way we can use clk_bulk.
>
> Signed-off-by: Sean Anderson 
> Reviewed-by: Simon Glass 
> ---
>
> (no changes since v1)
>
>  MAINTAINERS|  1 +
>  drivers/ram/Kconfig|  7 ++
>  drivers/ram/Makefile   |  1 +
>  drivers/ram/kendryte.c | 56 ++
>  4 files changed, 65 insertions(+)
>  create mode 100644 drivers/ram/kendryte.c
>

Reviewed-by: Rick Chen 

Re: [PATCH v2 08/16] lib: fdt: Add fdtdec_setup_mem_size_base_highest

[Rick Chen]

> This is very similar to fdtdec_setup_mem_size_base_lowest, except we pick
> the highest ram bank, instead of the lowest. This is helpful for boards
> which use separate but contiguous ram banks, as it leaves the most space
> for loading programs.
>
> Signed-off-by: Sean Anderson 
> Reviewed-by: Simon Glass 
> ---
>
> (no changes since v1)
>
>  include/fdtdec.h | 19 ++-
>  lib/fdtdec.c | 34 +-
>  2 files changed, 47 insertions(+), 6 deletions(-)
>

Reviewed-by: Rick Chen 

Re: [PATCH v2 06/16] clk: Add support for the k210 clock driver pre-relocation

[Rick Chen]

> Variables which had previously been stored in .bss are moved to .data. In
> addition, probed needs to be reset when the clock driver is re-bound
> post-relocation.
>
> Signed-off-by: Sean Anderson 
> ---
>
> (no changes since v1)
>
>  drivers/clk/kendryte/clk.c | 10 +-
>  1 file changed, 9 insertions(+), 1 deletion(-)
>

Reviewed-by: Rick Chen 

Re: [PATCH v2 07/16] riscv: Enable some devices pre-relocation

[Rick Chen]

> These devices are necessary for the clock driver, which is required by the
> sram driver, to run pre-relocation.
>
> Signed-off-by: Sean Anderson 
> ---
>
> (no changes since v1)
>
>  arch/riscv/dts/k210.dtsi | 4 
>  1 file changed, 4 insertions(+)
>

Reviewed-by: Rick Chen 

Re: Linking Error on env_get("loadaddr")

[Oliver Graute]

On 03/11/20, Jaehoon Chung wrote:
> On 11/2/20 11:09 PM, Oliver Graute wrote:
> > Hello list,
> > 
> > I try to use env_get("loadaddr") for a board specific CMD and included
> > env.h. But I get the following linking error in nvedit.c. Some clue what
> > I miss here? I still use v2020.07.
> 
> Did you check whether CONFIG_SPL_ENV_SUPPORT is enabled?

thx this solved my issue. 

Best Regards,

Oliver

Re: [PATCH v2 02/16] clk: k210: Fix PLL enable always getting taken

[Rick Chen]

> This conditional always evaluated as false, regardless of the value of reg.
> Fix it so that it properly tests the bits in the PLL register. Also test
> PLL_EN, now that we set it.
>
> Reported-by: Damien Le Moal 
> Signed-off-by: Sean Anderson 
> ---
>
> Changes in v2:
> - New
>
>  drivers/clk/kendryte/pll.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>

Reviewed-by: Rick Chen 

Re: [PATCH v2 01/16] clk: k210: Fix PLLs not being enabled

[Rick Chen]

> After starting or setting the rate of a PLL, the enable bit must be set.
>
> This fixes a bug where the AI ram would not be accessible, because it
> requires PLL1 to be running.
>
> Signed-off-by: Sean Anderson 
> ---
>
> (no changes since v1)
>
>  drivers/clk/kendryte/pll.c | 2 ++
>  1 file changed, 2 insertions(+)
>

Reviewed-by: Rick Chen 

Re: [PATCH 1/2] cros_ec: Fix up driver names to avoid dtoc warnings

[Bin Meng]

On Mon, Oct 5, 2020 at 7:27 PM Simon Glass  wrote:
>
> Fix the dtoc warning in these file by using a driver name that matches the
> compatible string.
>
> Signed-off-by: Simon Glass 
> ---
>
>  drivers/misc/cros_ec_i2c.c | 4 ++--
>  drivers/misc/cros_ec_lpc.c | 4 ++--
>  drivers/misc/cros_ec_spi.c | 4 ++--
>  3 files changed, 6 insertions(+), 6 deletions(-)
>

Reviewed-by: Bin Meng 

Re: [PATCH 2/2] x86: Fix up driver names to avoid dtoc warnings

[Bin Meng]

On Mon, Oct 5, 2020 at 7:27 PM Simon Glass  wrote:
>
> At present there are a lot of dtoc warnings reported when building
> chromebook_coral, of the form:
>
>WARNING: the driver intel_apl_lpc was not found in the driver list
>
> Correct these by using driver names that matches their compatible string.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/cpu/apollolake/cpu.c| 4 ++--
>  arch/x86/cpu/apollolake/hostbridge.c | 2 +-
>  arch/x86/cpu/apollolake/lpc.c| 2 +-
>  arch/x86/cpu/apollolake/pch.c| 4 ++--
>  arch/x86/cpu/apollolake/pmc.c| 2 +-
>  arch/x86/cpu/apollolake/punit.c  | 4 ++--
>  arch/x86/cpu/apollolake/uart.c   | 2 +-
>  arch/x86/cpu/intel_common/itss.c | 2 +-
>  arch/x86/cpu/intel_common/p2sb.c | 2 +-
>  drivers/gpio/intel_gpio.c| 4 ++--
>  drivers/pinctrl/intel/pinctrl_apl.c  | 2 +-
>  drivers/rtc/mc146818.c   | 4 ++--
>  drivers/sysreset/sysreset_x86.c  | 4 ++--
>  drivers/timer/tsc_timer.c| 4 ++--
>  14 files changed, 21 insertions(+), 21 deletions(-)
>

Reviewed-by: Bin Meng 

Re: [PATCH] rockchip: rk3399: Add Nanopi M4V2 board support

[Kever Yang]

Hi Shuying,

    I can't find a rk3399-nanopi-m4v2.dts at mainline kernel, does this 
a copy of rk3399-nanopi-m4.dts?


    What's the difference between m4 and m4v2, is it possible to use 
the same dts in U-Boot?


Thanks,
- Kever
On 2020/10/18 下午1:25, Shuying Li wrote:

From: Libunko 

Add initial support for Nanopi M4V2 board.

Specification
- Rockchip RK3399
- Dual-Channel 4GB LPDDR4
- SD card slot
- eMMC socket
- RTL8211E 1Gbps
- AP6356S WiFI/BT
- HDMI In/Out, MIPI DSI/CSI
- USB 3.0 x4
- USB Type C power and data
- GPIO1, GPIO2 expansion ports
- DC5V/3A

Signed-off-by: Shuying Li 
---
  arch/arm/dts/Makefile   |  1 +
  arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi |  7 +++
  arch/arm/dts/rk3399-nanopi-m4v2.dts | 67 +
  board/rockchip/evb_rk3399/MAINTAINERS   |  6 ++
  configs/nanopi-m4v2-rk3399_defconfig| 61 +++
  doc/board/rockchip/rockchip.rst |  1 +
  6 files changed, 143 insertions(+)
  create mode 100644 arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi
  create mode 100644 arch/arm/dts/rk3399-nanopi-m4v2.dts
  create mode 100644 configs/nanopi-m4v2-rk3399_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f8f529435b..7e8dfcef88 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -130,6 +130,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-nanopc-t4.dtb \
rk3399-nanopi-m4.dtb \
rk3399-nanopi-m4-2gb.dtb \
+   rk3399-nanopi-m4v2.dtb \
rk3399-nanopi-neo4.dtb \
rk3399-orangepi.dtb \
rk3399-pinebook-pro.dtb \
diff --git a/arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi 
b/arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi
new file mode 100644
index 00..ff8e99cb7f
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Shuying Li 
+ */
+
+#include "rk3399-nanopi4-u-boot.dtsi"
+#include "rk3399-sdram-lpddr4-100.dtsi"
diff --git a/arch/arm/dts/rk3399-nanopi-m4v2.dts 
b/arch/arm/dts/rk3399-nanopi-m4v2.dts
new file mode 100644
index 00..03d956d2c4
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi-m4v2.dts
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * FriendlyElec NanoPi M4V2 board device tree source
+ *
+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ * Copyright (c) 2019 Arm Ltd.
+ * Copyright (C) 2020 Shuying Li 
+ */
+
+/dts-v1/;
+#include "rk3399-nanopi4.dtsi"
+
+/ {
+   model = "FriendlyElec NanoPi M4V2";
+   compatible = "friendlyarm,nanopi-m4v2", "rockchip,rk3399";
+
+   vdd_5v: vdd-5v {
+   compatible = "regulator-fixed";
+   regulator-name = "vdd_5v";
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   vcc5v0_core: vcc5v0-core {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc5v0_core";
+   regulator-always-on;
+   regulator-boot-on;
+   vin-supply = <&vdd_5v>;
+   };
+
+   vcc5v0_usb1: vcc5v0-usb1 {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc5v0_usb1";
+   regulator-always-on;
+   regulator-boot-on;
+   vin-supply = <&vcc5v0_sys>;
+   };
+
+   vcc5v0_usb2: vcc5v0-usb2 {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc5v0_usb2";
+   regulator-always-on;
+   regulator-boot-on;
+   vin-supply = <&vcc5v0_sys>;
+   };
+};
+
+&vcc3v3_sys {
+   vin-supply = <&vcc5v0_core>;
+};
+
+&u2phy0_host {
+   phy-supply = <&vcc5v0_usb1>;
+};
+
+&u2phy1_host {
+   phy-supply = <&vcc5v0_usb2>;
+};
+
+&vbus_typec {
+   regulator-always-on;
+   vin-supply = <&vdd_5v>;
+};
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS 
b/board/rockchip/evb_rk3399/MAINTAINERS
index 4c889e06a6..9967d68a88 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -49,6 +49,12 @@ S:   Maintained
  F:configs/nanopi-m4-2gb-rk3399_defconfig
  F:arch/arm/dts/rk3399-nanopi-m4-2gb-u-boot.dtsi
  
+NANOPC-M4V2

+M: Shuying Li 
+S: Maintained
+F: configs/nanopi-m4v2-rk3399_defconfig
+F: arch/arm/dts/rk3399-nanopi-m4v2-u-boot.dtsi
+
  NANOPI-NEO4
  M:Jagan Teki 
  S:Maintained
diff --git a/configs/nanopi-m4v2-rk3399_defconfig 
b/configs/nanopi-m4v2-rk3399_defconfig
new file mode 100644
index 00..d5c58d549f
--- /dev/null
+++ b/configs/nanopi-m4v2-rk3399_defconfig
@@ -0,0 +1,61 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x0020
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_DEBUG_UART_BASE=0xFF1A
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-

Re: [PATCH 2/2] pinctrl: k210: Rename power domains to match datasheet

[Rick Chen]

> This renames power domains to match the names on the k210 datasheet.
>
> Signed-off-by: Sean Anderson 
> Reported-by: Damien Le Moal 
> ---
>
>  .../pinctrl/kendryte,k210-fpioa.txt|  2 +-
>  drivers/pinctrl/pinctrl-kendryte.c | 10 +-
>  2 files changed, 6 insertions(+), 6 deletions(-)
>

Reviewed-by: Rick Chen 

Re: [PATCH 1/2] pinctrl: k210: Fix inverted IE and OE for I2C

[Rick Chen]

> I2C and SCCB previously shared defaults. However, SCCB needs OE_INV and
> IE_INV set, but I2C cannot have those bits set. This adds a separate
> default for SCCB.
>
> Signed-off-by: Sean Anderson 
> Reported-by: Damien Le Moal 
> ---
>
>  drivers/pinctrl/pinctrl-kendryte.c | 10 ++
>  1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-kendryte.c 
> b/drivers/pinctrl/pinctrl-kendryte.c
> index 5ad049d955..259a0b507b 100644
> --- a/drivers/pinctrl/pinctrl-kendryte.c
> +++ b/drivers/pinctrl/pinctrl-kendryte.c
> @@ -55,8 +55,9 @@
>

Reviewed-by: Rick Chen 

Re: [PATCH] env: env_sf: don't set .init op if not needed

[Heiko Schocher]

Hello Wolfgang,

Am 02.11.2020 um 13:51 schrieb Wolfgang Denk:

Dear Heiko,

In message  you wrote:


I enabled now ENV_APPEND on this board and

CONFIG_ENV_IS_NOWHERE
CONFIG_ENV_IS_IN_SPI_FLASH


This gives me the creeps.  I know this is not cause by anything in
your patch, but anyway...

Apparently the meaning of CONFIG_ENV_IS_NOWHERE is nowhere
documented :-(


env/Kconfig says:

config ENV_IS_NOWHERE
bool "Environment is not stored"
default y if !ENV_IS_IN_EEPROM && !ENV_IS_IN_EXT4 && \
 !ENV_IS_IN_FAT && !ENV_IS_IN_FLASH && \
 !ENV_IS_IN_MMC && !ENV_IS_IN_NAND && \
 !ENV_IS_IN_NVRAM && !ENV_IS_IN_ONENAND && \
 !ENV_IS_IN_REMOTE && !ENV_IS_IN_SPI_FLASH && \
 !ENV_IS_IN_UBI
help
  Define this if you don't want to or can't have an environment stored
  on a storage medium. In this case the environment will still exist
  while U-Boot is running, but once U-Boot exits it will not be
  stored. U-Boot will therefore always start up with a default
  environment.



But common sense says that "IS NOWHERE" means that there is no
storage defined for the environment.  I would expect, that Kconfig


Yes and use default one ...


does not even allow to enable any CONFIG_ENV_IS_IN_* when
CONFIG_ENV_IS_NOWHERE is selected - these are logically exclusive.


Hmm...


May I suggest that:

1) our Kconfig files are changed such that CONFIG_ENV_IS_NOWHERE and
CONFIG_ENV_IS_IN_* are indeed exclusive, so that we adhere to the
POLA [1] ?


Yes if we really want such a hard setting without having an environment!

Currently CONFIG_ENV_IS_NOWHERE is not that hard and means U-Boot has
no Environment ... it means use the built in default environment...


2) for cases like this one, where there actually _is_ some storage
defined, but it shall be used in a non-standard way, a new
CONFIG_ option gets created that expresses in it's name what it
does?


Not in a none standard way! Instead you can define more than one
environment storage devices and load them in a board specific order
(defined thorugh board specfif function env_get_location())

For example:
- load first default environment (and you are correct ENV_IS_NOWHERE
is here really a misleading name).

- load environment from SPI NOR ...

May we only should do a simple rename ?

ENV_IS_NOWHERE -> ENV_IS_IN_UBOOT (or ENV_IS_IN_DEFAULT) ?

If we really want a hard "there is no storage" switch (which really
means there is *no* environment ... I do not even know, if U-boot
works without!) we should introduce a new ENV_IS_IN_DEFAULT which
loads the default environment...

(I do not like this, as all? boards have a default environment, so
 it is enabled for all? boards ... which makes it obsolete...)

better suggestions?

bye,
Heiko


[1] https://en.wikipedia.org/wiki/Principle_of_least_astonishment

Thanks!

Best regards,

Wolfgang Denk



--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de

Re: [PATCH] env: env_sf: don't set .init op if not needed

[Heiko Schocher]

Hello Michael,

Am 02.11.2020 um 21:15 schrieb Michael Walle:

Am 2020-11-02 08:00, schrieb Heiko Schocher:

Hello Michael,

Am 01.11.2020 um 14:38 schrieb Michael Walle:

Commit 92765f45bb95 ("env: Access Environment in SPI flashes before
relocation") at least breaks the Kontron sl28 board. I guess it also
breaks others which use a (late) SPI environment.

Unfortunately, we cannot set the .init op and fall back to the same
behavior as it would be unset. Thus guard the .init op by #if's.

Fixes: 92765f45bb95 ("env: Access Environment in SPI flashes before relocation")
Signed-off-by: Michael Walle 
---
  env/sf.c | 13 ++---
  1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/env/sf.c b/env/sf.c
index 2eb2de1a4e..18d44a7ddc 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -385,7 +385,7 @@ out:
  }
  #endif
  -static int env_sf_init(void)
+static int __maybe_unused env_sf_init(void)
  {
  #if defined(INITENV) && (CONFIG_ENV_ADDR != 0x0)
  return env_sf_init_addr();
@@ -393,8 +393,13 @@ static int env_sf_init(void)
  return env_sf_init_early();
  #endif
  /*
- * we must return with 0 if there is nothing done,
- * else env_set_inited() get not called in env_init()
+ * We shouldn't end up here. Unfortunately, there is no
+ * way to return a value which yields the same behavior
+ * as if the .init op wouldn't be set at all. See
+ * env_init(); env_set_inited() is only called if we
+ * return 0, but the default environment is only loaded
+ * if -ENOENT is returned. Therefore, we need the ugly
+ * ifdeferry for the .init op.
   */
  return 0;
  }
@@ -404,5 +409,7 @@ U_BOOT_ENV_LOCATION(sf) = {
  ENV_NAME("SPIFlash")
  .load    = env_sf_load,
  .save    = CONFIG_IS_ENABLED(SAVEENV) ? ENV_SAVE_PTR(env_sf_save) : 
NULL,
+#if (defined(INITENV) && (CONFIG_ENV_ADDR != 0x0)) || 
defined(CONFIG_ENV_SPI_EARLY)
  .init    = env_sf_init,
+#endif
  };



Ok, tested this patch on an imx6 based board with SPI NOR and it works.

But there is a problem with environment in spi nor and ENV_APPEND
enabled, with current implementation (also before my patches applied):

I enabled now ENV_APPEND on this board and

CONFIG_ENV_IS_NOWHERE
CONFIG_ENV_IS_IN_SPI_FLASH

and the Environment from SPI NOR never loaded as gd->env_valid is
always ENV_INVALID and env_load() never called from env_relocate().

What do you think about following patch:

diff --git a/env/sf.c b/env/sf.c
index 2eb2de1a4e..7f3491b458 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -393,9 +393,13 @@ static int env_sf_init(void)
    return env_sf_init_early();
 #endif
    /*
-    * we must return with 0 if there is nothing done,
-    * else env_set_inited() get not called in env_init()
+    * We must return with 0 if there is nothing done,
+    * to get inited bit set in env_init().
+    * We need to set env_valid to ENV_VALID, so later
+    * env_load() loads the Environment from SPI NOR.
 */
+   gd->env_addr = (ulong)&default_environment[0];
+   gd->env_valid = ENV_VALID;
    return 0;
 }

Can you try it?


This works for me...


Another option would be to reutrn -ENOENT and set init bit also
when a init function returns -ENOENT:

diff --git a/env/env.c b/env/env.c
index 42c7d8155e..37b4b54cb7 100644
--- a/env/env.c
+++ b/env/env.c
@@ -329,6 +329,8 @@ int env_init(void)
    for (prio = 0; (drv = env_driver_lookup(ENVOP_INIT, prio)); prio++) {
    if (!drv->init || !(ret = drv->init()))
    env_set_inited(drv->location);
+   if (ret == -ENOENT)
+   env_set_inited(drv->location);

    debug("%s: Environment %s init done (ret=%d)\n", __func__,
  drv->name, ret);
diff --git a/env/sf.c b/env/sf.c
index 2eb2de1a4e..66279fb4f4 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -396,7 +396,7 @@ static int env_sf_init(void)
 * we must return with 0 if there is nothing done,
 * else env_set_inited() get not called in env_init()
 */
-   return 0;
+   return -ENOENT;
 }

But this may has impact on other environment drivers ... but may is
the cleaner approach as env_init() later sets the default environment
if ret is -ENOENT ...


.. and also this.

So we have four solutions
(1) revert the series
(2) apply my patch
(3) use the first solution from Heiko
(4) use the second solution from Heiko

I'm fine with all four. If it will be (3) or (4) will you prepare a
patch, Heiko?


I tend to implement solution [4] ... I can send a patch...

Simon? Tom? Any suggestions?

bye,
Heiko
--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de

[PATCH v3] sunxi: a64: Add a defconfig for the PinePhone

[Samuel Holland]

The PinePhone is a smartphone produced by Pine64, with an A64 SoC,
2 or 3 GiB LPDDR3 RAM, 16 or 32 GiB eMMC, 720x1440 MIPI-DSI panel,
and Quectel EG25-G modem.

There are two main board revisions: 1.1 for early adopters, and 1.2
for mass production. Since there is code to detect the board revision
at boot, one config/image can support both boards.

Acked-by: Maxime Ripard 
Signed-off-by: Samuel Holland 
---

Changes v2->v3:
  - All other patches merged
  - Added entry to MAINTAINERS

Changes v1->v2:
  - Regenerated defconfig with `make savedefconfig`
  - Added Acked-by tag

 board/sunxi/MAINTAINERS |  5 +
 configs/pinephone_defconfig | 12 
 2 files changed, 17 insertions(+)
 create mode 100644 configs/pinephone_defconfig

diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 1180b86db3..d3755ae41a 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -451,6 +451,11 @@ M: Icenowy Zheng 
 S: Maintained
 F: configs/pine_h64_defconfig
 
+PINEPHONE BOARD
+M: Samuel Holland 
+S: Maintained
+F: configs/pinephone_defconfig
+
 R16 EVB PARROT BOARD
 M: Quentin Schulz 
 S: Maintained
diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig
new file mode 100644
index 00..64ecef59c9
--- /dev/null
+++ b/configs/pinephone_defconfig
@@ -0,0 +1,12 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_MACH_SUN50I=y
+CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y
+CONFIG_DRAM_CLK=552
+CONFIG_DRAM_ZQ=3881949
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_PINEPHONE_DT_SELECTION=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pinephone-1.2"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2"
-- 
2.26.2

Re: [PATCH v3 7/8] sandbox: update function descriptions in os.h

[Heinrich Schuchardt]

Am 3. November 2020 01:06:00 MEZ schrieb Simon Glass :
>Hi Heinrich,
>
>On Tue, 27 Oct 2020 at 13:29, Heinrich Schuchardt 
>wrote:
>>
>> Use Sphinx style function descriptions.
>>
>> Signed-off-by: Heinrich Schuchardt 
>> ---
>> v3:
>> no change
>> v2:
>> new patch
>> ---
>>  include/os.h | 223
>++-
>>  1 file changed, 130 insertions(+), 93 deletions(-)
>>
>> diff --git a/include/os.h b/include/os.h
>> index 88dfb71c1a..1fe44f3510 100644
>> --- a/include/os.h
>> +++ b/include/os.h
>> @@ -19,30 +19,30 @@ struct sandbox_state;
>>  /**
>>   * Access to the OS read() system call
>>   *
>> - * \param fd   File descriptor as returned by os_open()
>> - * \param buf  Buffer to place data
>> - * \param countNumber of bytes to read
>> - * \return number of bytes read, or -1 on error
>> + * @fd:File descriptor as returned by os_open()
>> + * @buf:   Buffer to place data
>> + * @count: Number of bytes to read
>> + * Return: number of bytes read, or -1 on error
>>   */
>>  ssize_t os_read(int fd, void *buf, size_t count);
>>
>>  /**
>>   * Access to the OS write() system call
>>   *
>> - * \param fd   File descriptor as returned by os_open()
>> - * \param buf  Buffer containing data to write
>> - * \param countNumber of bytes to write
>> - * \return number of bytes written, or -1 on error
>> + * @fd:File descriptor as returned by os_open()
>> + * @buf:   Buffer containing data to write
>> + * @count: Number of bytes to write
>> + * Return: number of bytes written, or -1 on error
>>   */
>>  ssize_t os_write(int fd, const void *buf, size_t count);
>>
>>  /**
>>   * Access to the OS lseek() system call
>>   *
>> - * \param fd   File descriptor as returned by os_open()
>> - * \param offset   File offset (based on whence)
>> - * \param whence   Position offset is relative to (see below)
>> - * \return new file offset
>> + * @fd:File descriptor as returned by os_open()
>> + * @offset:File offset (based on whence)
>> + * @whence:Position offset is relative to (see below)
>> + * Return: new file offset
>>   */
>>  off_t os_lseek(int fd, off_t offset, int whence);
>>
>> @@ -54,9 +54,9 @@ off_t os_lseek(int fd, off_t offset, int whence);
>>  /**
>>   * Access to the OS open() system call
>>   *
>> - * \param pathname Pathname of file to open
>> - * \param flagsFlags, like OS_O_RDONLY, OS_O_RDWR
>> - * \return file descriptor, or -1 on error
>> + * @pathname:  Pathname of file to open
>> + * @flags: Flags, like OS_O_RDONLY, OS_O_RDWR
>> + * Return: file descriptor, or -1 on error
>>   */
>>  int os_open(const char *pathname, int flags);
>>
>> @@ -68,42 +68,42 @@ int os_open(const char *pathname, int flags);
>>  #define OS_O_TRUNC 01000
>>
>>  /**
>> - * Access to the OS close() system call
>> + * os_close() - access to the OS close() system call
>>   *
>> - * \param fd   File descriptor to close
>> - * \return 0 on success, -1 on error
>> + * @fd:File descriptor to close
>> + * Return: 0 on success, -1 on error
>>   */
>>  int os_close(int fd);
>>
>>  /**
>> - * Access to the OS unlink() system call
>> + * os_unlink() - access to the OS unlink() system call
>>   *
>> - * \param pathname Path of file to delete
>> - * \return 0 for success, other for error
>> + * @pathname:  Path of file to delete
>> + * Return: 0 for success, other for error
>>   */
>>  int os_unlink(const char *pathname);
>>
>>  /**
>> - * Access to the OS exit() system call
>> + * os_exit() - access to the OS exit() system call
>>   *
>>   * This exits with the supplied return code, which should be 0 to
>indicate
>>   * success.
>>   *
>> - * @param exit_codeexit code for U-Boot
>> + * @exit_code: exit code for U-Boot
>>   */
>>  void os_exit(int exit_code) __attribute__((noreturn));
>>
>>  /**
>> - * Put tty into raw mode to mimic serial console better
>> + * os_tty_raw() - put tty into raw mode to mimic serial console
>better
>>   *
>> - * @param fd   File descriptor of stdin (normally 0)
>> - * @param allow_sigs   Allow Ctrl-C, Ctrl-Z to generate signals
>rather than
>> - * be handled by U-Boot
>> + * @fd:File descriptor of stdin (normally 0)
>> + * @allow_sigs:Allow Ctrl-C, Ctrl-Z to generate signals
>rather than
>> + * be handled by U-Boot
>>   */
>>  void os_tty_raw(int fd, bool allow_sigs);
>>
>>  /**
>> - * Restore the tty to its original mode
>> + * os_fs_restore() - restore the tty to its original mode
>>   *
>>   * Call this to restore the original terminal mode, after it has
>been changed
>>   * by os_tty_raw(). This is an internal function.
>> @@ -111,144 +111,180 @@ void os_tty_raw(int fd, bool allow_sigs);
>>  void os_fd_restore(void);
>>
>>  /**
>> - * Acquires some memory from the underlying os.
>> + * os_malloc() - aquires some memory from the underlyin

Re: [PATCH v3 5/8] sandbox: implement reset

[Simon Glass]

On Tue, 27 Oct 2020 at 13:29, Heinrich Schuchardt  wrote:
>
> Up to now the sandbox would shutdown upon a cold reset request. Instead it
> should be reset.
>
> In our coding we use static variables like LIST_HEAD(efi_obj_list). A reset
> can occur at any time, e.g. via an UEFI binary calling the reset service.
> The only safe way to return to an initial state is to relaunch the U-Boot
> binary.
>
> The reset implementation uses execv() to relaunch U-Boot.
>
> Signed-off-by: Heinrich Schuchardt 
> ---
> v3:
> update commit message
> v2:
> avoid longjmp()
> add more comments
> ---
>  arch/sandbox/cpu/os.c |  6 ++
>  arch/sandbox/cpu/start.c  | 26 +++
>  arch/sandbox/cpu/state.c  |  1 +
>  arch/sandbox/include/asm/u-boot-sandbox.h | 10 +
>  drivers/sysreset/sysreset_sandbox.c   |  3 +++
>  include/os.h  | 15 +
>  6 files changed, 61 insertions(+)

Reviewed-by: Simon Glass 

Re: [PATCH v3 8/8] doc: add sandbox API

[Simon Glass]

On Tue, 27 Oct 2020 at 13:29, Heinrich Schuchardt  wrote:
>
> Add sandbox API to generated HTML documentation
>
> Signed-off-by: Heinrich Schuchardt 
> ---
> v3:
> no change
> v2:
> new patch
> ---
>  doc/api/index.rst   | 1 +
>  doc/api/sandbox.rst | 9 +
>  2 files changed, 10 insertions(+)
>  create mode 100644 doc/api/sandbox.rst

Reviewed-by: Simon Glass 

Re: [PATCH v3 4/8] sandbox: use O_CLOEXEC in os_open()

[Simon Glass]

On Tue, 27 Oct 2020 at 13:29, Heinrich Schuchardt  wrote:
>
> During a cold reset execv() is used to relaunch the U-Boot binary.
> We must ensure that all files are closed in this case.
>
> Signed-off-by: Heinrich Schuchardt 
> ---
> v3:
> no change
> v2:
> new patch
> ---
>  arch/sandbox/cpu/os.c | 5 +
>  1 file changed, 5 insertions(+)
>

Reviewed-by: Simon Glass 

Re: [PATCH v3 7/8] sandbox: update function descriptions in os.h

[Simon Glass]

Hi Heinrich,

On Tue, 27 Oct 2020 at 13:29, Heinrich Schuchardt  wrote:
>
> Use Sphinx style function descriptions.
>
> Signed-off-by: Heinrich Schuchardt 
> ---
> v3:
> no change
> v2:
> new patch
> ---
>  include/os.h | 223 ++-
>  1 file changed, 130 insertions(+), 93 deletions(-)
>
> diff --git a/include/os.h b/include/os.h
> index 88dfb71c1a..1fe44f3510 100644
> --- a/include/os.h
> +++ b/include/os.h
> @@ -19,30 +19,30 @@ struct sandbox_state;
>  /**
>   * Access to the OS read() system call
>   *
> - * \param fd   File descriptor as returned by os_open()
> - * \param buf  Buffer to place data
> - * \param countNumber of bytes to read
> - * \return number of bytes read, or -1 on error
> + * @fd:File descriptor as returned by os_open()
> + * @buf:   Buffer to place data
> + * @count: Number of bytes to read
> + * Return: number of bytes read, or -1 on error
>   */
>  ssize_t os_read(int fd, void *buf, size_t count);
>
>  /**
>   * Access to the OS write() system call
>   *
> - * \param fd   File descriptor as returned by os_open()
> - * \param buf  Buffer containing data to write
> - * \param countNumber of bytes to write
> - * \return number of bytes written, or -1 on error
> + * @fd:File descriptor as returned by os_open()
> + * @buf:   Buffer containing data to write
> + * @count: Number of bytes to write
> + * Return: number of bytes written, or -1 on error
>   */
>  ssize_t os_write(int fd, const void *buf, size_t count);
>
>  /**
>   * Access to the OS lseek() system call
>   *
> - * \param fd   File descriptor as returned by os_open()
> - * \param offset   File offset (based on whence)
> - * \param whence   Position offset is relative to (see below)
> - * \return new file offset
> + * @fd:File descriptor as returned by os_open()
> + * @offset:File offset (based on whence)
> + * @whence:Position offset is relative to (see below)
> + * Return: new file offset
>   */
>  off_t os_lseek(int fd, off_t offset, int whence);
>
> @@ -54,9 +54,9 @@ off_t os_lseek(int fd, off_t offset, int whence);
>  /**
>   * Access to the OS open() system call
>   *
> - * \param pathname Pathname of file to open
> - * \param flagsFlags, like OS_O_RDONLY, OS_O_RDWR
> - * \return file descriptor, or -1 on error
> + * @pathname:  Pathname of file to open
> + * @flags: Flags, like OS_O_RDONLY, OS_O_RDWR
> + * Return: file descriptor, or -1 on error
>   */
>  int os_open(const char *pathname, int flags);
>
> @@ -68,42 +68,42 @@ int os_open(const char *pathname, int flags);
>  #define OS_O_TRUNC 01000
>
>  /**
> - * Access to the OS close() system call
> + * os_close() - access to the OS close() system call
>   *
> - * \param fd   File descriptor to close
> - * \return 0 on success, -1 on error
> + * @fd:File descriptor to close
> + * Return: 0 on success, -1 on error
>   */
>  int os_close(int fd);
>
>  /**
> - * Access to the OS unlink() system call
> + * os_unlink() - access to the OS unlink() system call
>   *
> - * \param pathname Path of file to delete
> - * \return 0 for success, other for error
> + * @pathname:  Path of file to delete
> + * Return: 0 for success, other for error
>   */
>  int os_unlink(const char *pathname);
>
>  /**
> - * Access to the OS exit() system call
> + * os_exit() - access to the OS exit() system call
>   *
>   * This exits with the supplied return code, which should be 0 to indicate
>   * success.
>   *
> - * @param exit_codeexit code for U-Boot
> + * @exit_code: exit code for U-Boot
>   */
>  void os_exit(int exit_code) __attribute__((noreturn));
>
>  /**
> - * Put tty into raw mode to mimic serial console better
> + * os_tty_raw() - put tty into raw mode to mimic serial console better
>   *
> - * @param fd   File descriptor of stdin (normally 0)
> - * @param allow_sigs   Allow Ctrl-C, Ctrl-Z to generate signals rather than
> - * be handled by U-Boot
> + * @fd:File descriptor of stdin (normally 0)
> + * @allow_sigs:Allow Ctrl-C, Ctrl-Z to generate signals rather than
> + * be handled by U-Boot
>   */
>  void os_tty_raw(int fd, bool allow_sigs);
>
>  /**
> - * Restore the tty to its original mode
> + * os_fs_restore() - restore the tty to its original mode
>   *
>   * Call this to restore the original terminal mode, after it has been changed
>   * by os_tty_raw(). This is an internal function.
> @@ -111,144 +111,180 @@ void os_tty_raw(int fd, bool allow_sigs);
>  void os_fd_restore(void);
>
>  /**
> - * Acquires some memory from the underlying os.
> + * os_malloc() - aquires some memory from the underlying os.
>   *
> - * \param length   Number of bytes to be allocated
> - * \return Pointer to length bytes or NULL on error
> + * @length:Number of bytes to be allocated
> + * Return: Pointer

Re: Linking Error on env_get("loadaddr")

[Jaehoon Chung]

On 11/2/20 11:09 PM, Oliver Graute wrote:
> Hello list,
> 
> I try to use env_get("loadaddr") for a board specific CMD and included
> env.h. But I get the following linking error in nvedit.c. Some clue what
> I miss here? I still use v2020.07.

Did you check whether CONFIG_SPL_ENV_SUPPORT is enabled?

> 
> start=$(aarch64-linux-gnu-nm u-boot | grep __rel_dyn_start | cut -f 1 -d ' 
> '); end=$(aarch64-linux-gnu-nm u-boot | grep __rel_dyn_end | cut -f 1 -d ' 
> '); tools/relocate-rela u-boot-nodtb.bin 0x8002 $start $end
>   CC  spl/arch/arm/cpu/armv8/fwcall.o
>   LD  spl/arch/arm/cpu/armv8/built-in.o
>   CC  spl/common/spl/spl.o
>   LD  spl/common/spl/built-in.o
>   CC  spl/lib/display_options.o
>   LD  spl/lib/built-in.o
>   LD  spl/u-boot-spl
> cmd/built-in.o: In function `env_match':
> /home/graute/u-boot-test/cmd/nvedit.c:804: undefined reference to 
> `env_get_char'
> /home/graute/u-boot-test/cmd/nvedit.c:808: undefined reference to 
> `env_get_char'
> cmd/built-in.o: In function `env_get_f':
> /home/graute/u-boot-test/cmd/nvedit.c:713: undefined reference to 
> `env_get_char'
> /home/graute/u-boot-test/cmd/nvedit.c:716: undefined reference to 
> `env_get_char'
> /home/graute/u-boot-test/cmd/nvedit.c:729: undefined reference to 
> `env_get_char'
> cmd/built-in.o: In function `env_get':
> /home/graute/u-boot-test/cmd/nvedit.c:677: undefined reference to `env_htab'
> /home/graute/u-boot-test/cmd/nvedit.c:677: undefined reference to `env_htab'
> lib/built-in.o: In function `hsearch_r':
> /home/graute/u-boot-test/lib/hashtable.c:402: undefined reference to 
> `env_flags_init'
> scripts/Makefile.spl:422: recipe for target 'spl/u-boot-spl' failed
> make[1]: *** [spl/u-boot-spl] Error 1
> Makefile:1926: recipe for target 'spl/u-boot-spl' failed
> make: *** [spl/u-boot-spl] Error 2
> 
> 
> Best Regards,
> 
> Oliver
> 

Re: [RFC PATCH] dfu: add DFU_SKIP layout concept

[Jaehoon Chung]

Hi Lukasz,

On 11/2/20 6:55 PM, Lukasz Majewski wrote:
> Hi Jaehoon,
> 
>> Add DFU_SKIP layout cencept.
>> If layout is "skip", it will be skipped after nothing to do.
>> It's useful to support multiple board with one tar file.
>>
>> Signed-off-by: Jaehoon Chung 
>> ---
>>  drivers/dfu/dfu.c | 2 +-
>>  drivers/dfu/dfu_mmc.c | 9 +
>>  include/dfu.h | 1 +
>>  3 files changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
>> index a298c2c43999..f679f1fa5fe5 100644
>> --- a/drivers/dfu/dfu.c
>> +++ b/drivers/dfu/dfu.c
>> @@ -614,7 +614,7 @@ const char *dfu_get_dev_type(enum dfu_device_type
>> t) const char *dfu_get_layout(enum dfu_layout l)
>>  {
>>  const char *const dfu_layout[] = {NULL, "RAW_ADDR", "FAT",
>> "EXT2",
>> -  "EXT3", "EXT4", "RAM_ADDR"
>> };
>> +  "EXT3", "EXT4",
>> "RAM_ADDR", "SKIP" }; return dfu_layout[l];
>>  }
>>  
>> diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
>> index 691d01c7ebdf..c7c324b0a986 100644
>> --- a/drivers/dfu/dfu_mmc.c
>> +++ b/drivers/dfu/dfu_mmc.c
>> @@ -108,6 +108,8 @@ static int mmc_file_op(enum dfu_op op, struct
>> dfu_entity *dfu, case DFU_FS_EXT4:
>>  fstype = FS_TYPE_EXT;
>>  break;
>> +case DFU_SKIP:
>> +return 0;
>>  default:
>>  printf("%s: Layout (%s) not (yet) supported!\n",
>> __func__, dfu_get_layout(dfu->layout));
>> @@ -204,6 +206,9 @@ int dfu_write_medium_mmc(struct dfu_entity *dfu,
>>  case DFU_FS_EXT4:
>>  ret = mmc_file_buf_write(dfu, offset, buf, len);
>>  break;
>> +case DFU_SKIP:
>> +ret = 0;
>> +break;
>>  default:
>>  printf("%s: Layout (%s) not (yet) supported!\n",
>> __func__, dfu_get_layout(dfu->layout));
>> @@ -238,6 +243,8 @@ int dfu_get_medium_size_mmc(struct dfu_entity
>> *dfu, u64 *size) if (ret < 0)
>>  return ret;
>>  return 0;
>> +case DFU_SKIP:
>> +return 0;
>>  default:
>>  printf("%s: Layout (%s) not (yet) supported!\n",
>> __func__, dfu_get_layout(dfu->layout));
>> @@ -399,6 +406,8 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu,
>> char *devstr, char *s) dfu->layout = DFU_FS_FAT;
>>  } else if (!strcmp(entity_type, "ext4")) {
>>  dfu->layout = DFU_FS_EXT4;
>> +} else if (!strcmp(entity_type, "skip")) {
>> +dfu->layout = DFU_SKIP;
>>  } else {
>>  pr_err("Memory layout (%s) not supported!\n",
>> entity_type); return -ENODEV;
>> diff --git a/include/dfu.h b/include/dfu.h
>> index 84abdc79acd1..2e8276c69c9f 100644
>> --- a/include/dfu.h
>> +++ b/include/dfu.h
>> @@ -33,6 +33,7 @@ enum dfu_layout {
>>  DFU_FS_EXT3,
>>  DFU_FS_EXT4,
>>  DFU_RAM_ADDR,
>> +DFU_SKIP,
>>  };
>>  
>>  enum dfu_op {
> 
> Fine for me. Please add a verbose description to doc/DFU.readme with
> some examples (i.e. which target board and how you plan to use this
> feature).

Thanks for reviewing. I will resend the patch.
I have tested with only thor protocol.

Best Regards,
Jaehoon Chung

> 
> 
> Best regards,
> 
> Lukasz Majewski
> 
> --
> 
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de
> 

Re: [PATCH] mmc: fsl_esdhc_imx: add wait_dat0() support

[Jaehoon Chung]

On 11/2/20 8:17 PM, haibo.c...@nxp.com wrote:
> From: Haibo Chen 
> 
> Add wait_dat0() support, upper layer will use this callback.
> 
> Signed-off-by: Haibo Chen 
> ---
>  drivers/mmc/fsl_esdhc_imx.c | 23 +++
>  1 file changed, 23 insertions(+)
> 
> diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
> index 22040c67a8..dc6a6006fa 100644
> --- a/drivers/mmc/fsl_esdhc_imx.c
> +++ b/drivers/mmc/fsl_esdhc_imx.c
> @@ -1646,6 +1646,28 @@ static int fsl_esdhc_set_enhanced_strobe(struct 
> udevice *dev)
>  }
>  #endif
>  
> +static int fsl_esdhc_wait_dat0(struct udevice *dev, int state,
> + int timeout_us)
> +{
> + int ret = -ETIMEDOUT;
> + bool dat0_high;
> + bool target_dat0_high = !!state;
> + struct fsl_esdhc_priv *priv = dev_get_priv(dev);
> + struct fsl_esdhc *regs = priv->esdhc_regs;
> +
> + timeout_us = DIV_ROUND_UP(timeout_us, 10); /* check every 10 us. */
> + while (timeout_us--) {
> + dat0_high = !!(esdhc_read32(®s->prsstat) & PRSSTAT_DAT0);
> + if (dat0_high == target_dat0_high) {
> + ret = 0;
> + break;
> + }
> + udelay(10);

Fix indent. 
And can't use wait_for_bit_xx()?

Best  Regards,
Jaehoon Chung

> + }
> +
> + return ret;
> +}
> +
>  static const struct dm_mmc_ops fsl_esdhc_ops = {
>   .get_cd = fsl_esdhc_get_cd,
>   .send_cmd   = fsl_esdhc_send_cmd,
> @@ -1656,6 +1678,7 @@ static const struct dm_mmc_ops fsl_esdhc_ops = {
>  #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
>   .set_enhanced_strobe = fsl_esdhc_set_enhanced_strobe,
>  #endif
> + .wait_dat0 = fsl_esdhc_wait_dat0,
>  };
>  #endif
>  
> 

Re: [PATCH v6 6/7] mmc: renesas-sdhi: Add SDHI quirks for R-Car H3 and RZ/G2H

[Jaehoon Chung]

Hi,

On 11/3/20 1:16 AM, Biju Das wrote:
> Add SDHI quirks for R-Car H3 and RZ/G2H SoC.

Does it needs to use quirks? IMO, Using fixup for each SoC is better than 
quirks.

Best Regards,
Jaehoon Chung

> 
> Signed-off-by: Biju Das 
> Reviewed-by: Lad Prabhakar 
> ---
>  v6: New patch. Quirks using soc_device_match.
> ---
>  drivers/mmc/renesas-sdhi.c | 37 -
>  1 file changed, 36 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
> index 0e4a44d973..e19daf8bf8 100644
> --- a/drivers/mmc/renesas-sdhi.c
> +++ b/drivers/mmc/renesas-sdhi.c
> @@ -875,6 +875,16 @@ static const struct renesas_sdhi_quirks 
> sdhi_quirks_4tap_nohs400 = {
>   .hs400_4taps = true,
>  };
>  
> +static const struct renesas_sdhi_quirks sdhi_quirks_4tap = {
> + .hs400_4taps = true,
> + .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
> +};
> +
> +static const struct renesas_sdhi_quirks sdhi_quirks_r8a7795_es30 = {
> + .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
> + .hs400_calib_table = r8a7795_calib_table,
> +};
> +
>  static const struct renesas_sdhi_quirks sdhi_quirks_r8a7796_es12 = {
>   .hs400_4taps = true,
>   .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
> @@ -916,6 +926,30 @@ static const struct soc_attr sdhi_quirks_match[]  = {
>   { .soc_id = "r8a774b1",
> .data = &sdhi_quirks_r8a77965
>   },
> + { .soc_id = "r8a774e1",
> +   .revision = "ES2.0",
> +   .data = &sdhi_quirks_4tap
> + },
> + { .soc_id = "r8a774e1",
> +   .revision = "ES3.0",
> +   .data = &sdhi_quirks_r8a7795_es30
> + },
> + { .soc_id = "r8a7795",
> +   .revision = "ES1.0",
> +   .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
> + },
> + { .soc_id = "r8a7795",
> +   .revision = "ES1.1",
> +   .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
> + },
> + { .soc_id = "r8a7795",
> +   .revision = "ES2.0",
> +   .data = &sdhi_quirks_4tap
> + },
> + { .soc_id = "r8a7795",
> +   .revision = "ES3.0",
> +   .data = &sdhi_quirks_r8a7795_es30
> + },
>   { .soc_id = "r8a7796",
> .revision = "ES1.0",
> .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
> @@ -965,7 +999,8 @@ static void renesas_sdhi_add_quirks(struct tmio_sd_plat 
> *plat,
>   if (quirks == &sdhi_quirks_r8a7796_es12 ||
>   quirks == &sdhi_quirks_r8a77965)
>   priv->adjust_hs400_offset = 3;
> - else if (quirks == &sdhi_quirks_r8a7796_es13)
> + else if (quirks == &sdhi_quirks_r8a7796_es13 ||
> +  quirks == &sdhi_quirks_r8a7795_es30)
>   priv->adjust_hs400_offset = 0;
>   }
>  }
> 

Re: [PATCH v6 2/7] mmc: renesas-sdhi: Add SDHI quirks for R-Car M3-W and RZ/G2M

[Jaehoon Chung]

On 11/3/20 1:16 AM, Biju Das wrote:
> Add SDHI quirks for R-Car M3-W and RZ/G2M SoC.
> 
> Signed-off-by: Biju Das 
> Reviewed-by: Lad Prabhakar 
> ---
>  v5->v6: Used soc_device_match api to add quirks.
>  v5 : New Patch
> (Ref: 
> https://protect2.fireeye.com/v1/url?k=38bf0561-67243c69-38be8e2e-0cc47a31c8b4-1ef3629e787f84b8&q=1&e=36446b2d-ef7f-49cd-b2d1-5ec122c2b61e&u=https%3A%2F%2Fpatchwork.ozlabs.org%2Fproject%2Fuboot%2Fpatch%2F20201008085941.3600-2-biju.das.jz%40bp.renesas.com%2F)
> ---
>  drivers/mmc/renesas-sdhi.c | 110 +
>  1 file changed, 110 insertions(+)
> 
> diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
> index d80b3fc28f..39deeb94d8 100644
> --- a/drivers/mmc/renesas-sdhi.c
> +++ b/drivers/mmc/renesas-sdhi.c
> @@ -19,6 +19,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include "tmio-common.h"
>  
> @@ -105,6 +106,15 @@ static const u8 r8a77990_calib_table[2][CALIB_TABLE_MAX] 
> = {
>12, 13, 14, 16, 17, 18, 18, 18, 19, 19, 20, 24, 26, 26, 26, 26 }
>  };
>  
> +#define SDHI_CALIB_TABLE_MAX 32
> +
> +struct renesas_sdhi_quirks {
> + bool hs400_disabled;
> + bool hs400_4taps;
> + u32 hs400_bad_taps;
> + const u8 (*hs400_calib_table)[SDHI_CALIB_TABLE_MAX];
> +};
> +
>  static int rmobile_is_gen3_mmc0(struct tmio_sd_priv *priv)
>  {
>   /* On R-Car Gen3, MMC0 is at 0xee14 */
> @@ -855,6 +865,99 @@ static ulong renesas_sdhi_clk_get_rate(struct 
> tmio_sd_priv *priv)
>   return clk_get_rate(&priv->clk);
>  }
>  
> +static const struct renesas_sdhi_quirks sdhi_quirks_4tap_nohs400_b17_dtrend 
> = {
> + .hs400_disabled = true,
> + .hs400_4taps = true,
> +};
> +
> +static const struct renesas_sdhi_quirks sdhi_quirks_4tap_nohs400 = {
> + .hs400_disabled = true,
> + .hs400_4taps = true,
> +};
> +
> +static const struct renesas_sdhi_quirks sdhi_quirks_r8a7796_es12 = {
> + .hs400_4taps = true,
> + .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),

Use Macro, not magic code. We don't know what mean BIT(2), BIT(3), BIT(6)..

> + .hs400_calib_table = r8a7796_rev1_calib_table,
> +};
> +
> +static const struct renesas_sdhi_quirks sdhi_quirks_r8a7796_es13 = {
> + .hs400_bad_taps = BIT(1) | BIT(3) | BIT(5) | BIT(7),

Ditto.

> + .hs400_calib_table = r8a7796_rev3_calib_table,
> +};
> +
> +/*
> + * Note for r8a7796 / r8a774a1: we can't distinguish ES1.1 and 1.2 as of now.
> + * So, we want to treat them equally and only have a match for ES1.2 to 
> enforce
> + * this if there ever will be a way to distinguish ES1.2.
> + */
> +static const struct soc_attr sdhi_quirks_match[]  = {
> + { .soc_id = "r8a774a1",
> +   .revision = "ES1.0",
> +   .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
> + },
> + { .soc_id = "r8a774a1",
> +   .revision = "ES1.1",
> +   .data = &sdhi_quirks_4tap_nohs400
> + },
> + { .soc_id = "r8a774a1",
> +   .revision = "ES1.2",
> +   .data = &sdhi_quirks_r8a7796_es12
> + },
> + { .soc_id = "r8a774a1",
> +   .revision = "ES1.3",
> +   .data = &sdhi_quirks_r8a7796_es13
> + },
> + { .soc_id = "r8a7796",
> +   .revision = "ES1.0",
> +   .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
> + },
> + { .soc_id = "r8a7796",
> +   .revision = "ES1.1",
> +   .data = &sdhi_quirks_4tap_nohs400
> + },
> + { .soc_id = "r8a7796",
> +   .revision = "ES1.2",
> +   .data = &sdhi_quirks_r8a7796_es12
> + },
> + { .soc_id = "r8a7796",
> +   .revision = "ES1.3",
> +   .data = &sdhi_quirks_r8a7796_es13
> + },
> + { /* Sentinel. */ },
> +};
> +
> +static void renesas_sdhi_add_quirks(struct tmio_sd_plat *plat,
> + struct tmio_sd_priv *priv,
> + const struct renesas_sdhi_quirks *quirks)
> +{
> + priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2;
> +
> + if (quirks && quirks->hs400_disabled) {
> + plat->cfg.host_caps &= ~MMC_MODE_HS400;
> + if (quirks == &sdhi_quirks_4tap_nohs400_b17_dtrend)
> + priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD;
> + }
> +
> + if (quirks && quirks->hs400_4taps)
> + priv->nrtaps = 4;
> + else
> + priv->nrtaps = 8;

priv->nrtraps = 8 should be default value.
And it needs to check one time about quirks's present at first time.
Then it can be changed to below..

priv->read_poll_flag = TMIO...;
priv->nrtaps = 8;

if (!quriks)
return;
if (quirks-.hs400_disabld) {
...
}

if (quirks->hs400_4taps)
priv->nrtaps = 4;

...

Then it's more readable..

Best Regards,
Jaehoon Chung

> +
> + if (quirks && quirks->hs400_bad_taps)
> + priv->hs400_bad_tap = quirks->hs400_bad_taps;> +
> + if (quirks && quirks->hs400_calib_table) {
> + priv->adjust_hs400_enable = true;
> + priv->adjust_hs400_calib_table =
> +

[PATCH v2] arm: fsl: common: Improve NXP VID driver PMBus support

[Stephen Carlson]

This patch adds support for more PMBus compatible devices to the NXP
drivers for its QorIQ family devices. At runtime, the voltage regulator is
queried over I2C, and the required voltage multiplier determined. This
change supports the DIRECT and LINEAR PMBus voltage reporting modes.

Previously, the driver only supported a few specific devices such as the
IR36021 and LTC3882, so this change allows the QorIQ series to be used
with a much larger variety of core voltage regulator devices.

checkpatch warning "Use if (IS_DEFINED (...))" was ignored to maintain
consistency with the existing code.

Signed-off-by: Stephen Carlson 
Cc: Priyanka Jain 
---
 board/freescale/common/Kconfig|  27 +-
 board/freescale/common/vid.c  | 815 --
 board/freescale/common/vid.h  |  13 +-
 board/freescale/ls1028a/ls1028a.c |  42 ++
 board/freescale/ls1088a/ls1088a.c |  40 ++
 board/freescale/ls2080a/ls2080a.c |  49 ++
 board/freescale/lx2160a/lx2160a.c |  42 ++
 include/configs/ls1088aqds.h  |   6 -
 include/configs/ls1088ardb.h  |   8 +-
 9 files changed, 526 insertions(+), 516 deletions(-)

diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig
index 1b1fd69cb2..17db755951 100644
--- a/board/freescale/common/Kconfig
+++ b/board/freescale/common/Kconfig
@@ -21,18 +21,37 @@ config CMD_ESBC_VALIDATE
esbc_validate - validate signature using RSA verification
esbc_halt - put the core in spin loop (Secure Boot Only)

+config VID
+   depends on DM_I2C
+   bool "Enable Freescale VID"
+   help
+This option enables setting core voltage based on individual
+values saved in SoC fuses.
+
 config VOL_MONITOR_LTC3882_READ
depends on VID
bool "Enable the LTC3882 voltage monitor read"
-   default n
help
 This option enables LTC3882 voltage monitor read
-functionality. It is used by common VID driver.
+functionality. It is used by the common VID driver.

 config VOL_MONITOR_LTC3882_SET
depends on VID
bool "Enable the LTC3882 voltage monitor set"
-   default n
help
 This option enables LTC3882 voltage monitor set
-functionality. It is used by common VID driver.
+functionality. It is used by the common VID driver.
+
+config VOL_MONITOR_ISL68233_READ
+   depends on VID
+   bool "Enable the ISL68233 voltage monitor read"
+   help
+This option enables ISL68233 voltage monitor read
+functionality. It is used by the common VID driver.
+
+config VOL_MONITOR_ISL68233_SET
+   depends on VID
+   bool "Enable the ISL68233 voltage monitor set"
+   help
+This option enables ISL68233 voltage monitor set
+functionality. It is used by the common VID driver.
diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index 9c51f50260..2df3adf3bc 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -1,6 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * Copyright 2020 Stephen Carlson 
  */

 #include 
@@ -20,14 +22,22 @@
 #include 
 #include "vid.h"

+/* Voltages are generally handled in mV to keep them as integers */
+#define MV_PER_V 1000
+
+/*
+ * Select the channel on the I2C mux (on some NXP boards) that contains
+ * the voltage regulator to use for VID. Return 0 for success or nonzero
+ * for failure.
+ */
 int __weak i2c_multiplexer_select_vid_channel(u8 channel)
 {
return 0;
 }

 /*
- * Compensate for a board specific voltage drop between regulator and SoC
- * return a value in mV
+ * Compensate for a board specific voltage drop between regulator and SoC.
+ * Returns the voltage offset in mV.
  */
 int __weak board_vdd_drop_compensation(void)
 {
@@ -35,13 +45,90 @@ int __weak board_vdd_drop_compensation(void)
 }

 /*
- * Board specific settings for specific voltage value
+ * Performs any board specific adjustments after the VID voltage has been
+ * set. Return 0 for success or nonzero for failure.
  */
 int __weak board_adjust_vdd(int vdd)
 {
return 0;
 }

+/*
+ * Processor specific method of converting the fuse value read from VID
+ * registers into the core voltage to supply. Return the voltage in mV.
+ */
+u16 __weak soc_get_fuse_vid(int vid_index)
+{
+   /* Default VDD for Layerscape Chassis 1 devices */
+   static const u16 vdd[32] = {
+   0,  /* unused */
+   9875,   /* 0.9875V */
+   9750,
+   9625,
+   9500,
+   9375,
+   9250,
+   9125,
+   9000,
+   8875,
+   8750,
+   8625,
+   8500,
+   8375,
+   8250,
+   8125,
+   1,  /* 1.V */
+   10125,
+   10250,
+   10375,
+   10500,
+   106

Re: [PATCH 4/4] fs: btrfs: initialize @ii in show_dir() to make coverity happy

[Tom Rini]

On Mon, Nov 02, 2020 at 08:24:09AM +0100, Marek Behun wrote:
> On Mon, 2 Nov 2020 08:27:16 +0800
> Qu Wenruo  wrote:
> 
> > Thus I really tend to believe it's just a bug in coverity.
> > All locations accessing @ii all have its key.type checked to ensure it get 
> > filled in the first place.
> 
> If this is a bug in coverity, we should fix coverity, not add extra
> code to U-Boot, even if it is just one instruction. That simply stinks
> the same way like when systemd crashed when "debug" parameter was
> present in /proc/cmdline, and they sent a patch to kernel which removed
> the "debug" parameter, instead of fixing systemd. IMO.

To be clear, I am quite happy to mark as intentional any issues that are
flagged by Coverity but, well, intentional and not a problem.  We may
also benefit from adding a "modeling" file to help Coverity know when
some cases of issues are handled by us already.

-- 
Tom


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Re: [PATCH] env: env_sf: don't set .init op if not needed

[Michael Walle]

Am 2020-11-02 08:00, schrieb Heiko Schocher:

Hello Michael,

Am 01.11.2020 um 14:38 schrieb Michael Walle:

Commit 92765f45bb95 ("env: Access Environment in SPI flashes before
relocation") at least breaks the Kontron sl28 board. I guess it also
breaks others which use a (late) SPI environment.

Unfortunately, we cannot set the .init op and fall back to the same
behavior as it would be unset. Thus guard the .init op by #if's.

Fixes: 92765f45bb95 ("env: Access Environment in SPI flashes before 
relocation")

Signed-off-by: Michael Walle 
---
  env/sf.c | 13 ++---
  1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/env/sf.c b/env/sf.c
index 2eb2de1a4e..18d44a7ddc 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -385,7 +385,7 @@ out:
  }
  #endif
  -static int env_sf_init(void)
+static int __maybe_unused env_sf_init(void)
  {
  #if defined(INITENV) && (CONFIG_ENV_ADDR != 0x0)
return env_sf_init_addr();
@@ -393,8 +393,13 @@ static int env_sf_init(void)
return env_sf_init_early();
  #endif
/*
-* we must return with 0 if there is nothing done,
-* else env_set_inited() get not called in env_init()
+* We shouldn't end up here. Unfortunately, there is no
+* way to return a value which yields the same behavior
+* as if the .init op wouldn't be set at all. See
+* env_init(); env_set_inited() is only called if we
+* return 0, but the default environment is only loaded
+* if -ENOENT is returned. Therefore, we need the ugly
+* ifdeferry for the .init op.
 */
return 0;
  }
@@ -404,5 +409,7 @@ U_BOOT_ENV_LOCATION(sf) = {
ENV_NAME("SPIFlash")
.load   = env_sf_load,
  	.save		= CONFIG_IS_ENABLED(SAVEENV) ? ENV_SAVE_PTR(env_sf_save) : 
NULL,
+#if (defined(INITENV) && (CONFIG_ENV_ADDR != 0x0)) || 
defined(CONFIG_ENV_SPI_EARLY)

.init   = env_sf_init,
+#endif
  };



Ok, tested this patch on an imx6 based board with SPI NOR and it works.

But there is a problem with environment in spi nor and ENV_APPEND
enabled, with current implementation (also before my patches applied):

I enabled now ENV_APPEND on this board and

CONFIG_ENV_IS_NOWHERE
CONFIG_ENV_IS_IN_SPI_FLASH

and the Environment from SPI NOR never loaded as gd->env_valid is
always ENV_INVALID and env_load() never called from env_relocate().

What do you think about following patch:

diff --git a/env/sf.c b/env/sf.c
index 2eb2de1a4e..7f3491b458 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -393,9 +393,13 @@ static int env_sf_init(void)
return env_sf_init_early();
 #endif
/*
-* we must return with 0 if there is nothing done,
-* else env_set_inited() get not called in env_init()
+* We must return with 0 if there is nothing done,
+* to get inited bit set in env_init().
+* We need to set env_valid to ENV_VALID, so later
+* env_load() loads the Environment from SPI NOR.
 */
+   gd->env_addr = (ulong)&default_environment[0];
+   gd->env_valid = ENV_VALID;
return 0;
 }

Can you try it?


This works for me...


Another option would be to reutrn -ENOENT and set init bit also
when a init function returns -ENOENT:

diff --git a/env/env.c b/env/env.c
index 42c7d8155e..37b4b54cb7 100644
--- a/env/env.c
+++ b/env/env.c
@@ -329,6 +329,8 @@ int env_init(void)
for (prio = 0; (drv = env_driver_lookup(ENVOP_INIT, prio)); 
prio++) {

if (!drv->init || !(ret = drv->init()))
env_set_inited(drv->location);
+   if (ret == -ENOENT)
+   env_set_inited(drv->location);

debug("%s: Environment %s init done (ret=%d)\n", 
__func__,

  drv->name, ret);
diff --git a/env/sf.c b/env/sf.c
index 2eb2de1a4e..66279fb4f4 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -396,7 +396,7 @@ static int env_sf_init(void)
 * we must return with 0 if there is nothing done,
 * else env_set_inited() get not called in env_init()
 */
-   return 0;
+   return -ENOENT;
 }

But this may has impact on other environment drivers ... but may is
the cleaner approach as env_init() later sets the default environment
if ret is -ENOENT ...


.. and also this.

So we have four solutions
(1) revert the series
(2) apply my patch
(3) use the first solution from Heiko
(4) use the second solution from Heiko

I'm fine with all four. If it will be (3) or (4) will you prepare a
patch, Heiko?

-michael

[PATCH 2/2] binman: Correct calculation for image-pos

[Simon Glass]

A recent change removed the base offset from the calculation. This is
used on coral to find the FSP-S binary. Fix it.

Fixes: a9fad07d4b8 ("binman: Avoid reporting image-pos with compression")

Signed-off-by: Simon Glass 
---

 tools/binman/entry.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/binman/entry.py b/tools/binman/entry.py
index 68e694e7d15..2be0d8e0532 100644
--- a/tools/binman/entry.py
+++ b/tools/binman/entry.py
@@ -245,7 +245,7 @@ class Entry(object):
 state.SetInt(self._node, 'size', self.size)
 base = self.section.GetRootSkipAtStart() if self.section else 0
 if self.image_pos is not None:
-state.SetInt(self._node, 'image-pos', self.image_pos)
+state.SetInt(self._node, 'image-pos', self.image_pos - base)
 if self.GetImage().allow_repack:
 if self.orig_offset is not None:
 state.SetInt(self._node, 'orig-offset', self.orig_offset, True)
-- 
2.29.1.341.ge80a0c044ae-goog

[PATCH 1/2] binman: Update intel_ifwi to store padded section

[Simon Glass]

With a recent change this entry stores only part of the section data,
leaving out the padding at the end. Fix this by using GetPaddedData() to
get the data. Add this function to the base Entry class also.

Fixes: d1d3ad7d1fe ("binman: Move section padding to the parent")

Signed-off-by: Simon Glass 
---

 tools/binman/entry.py| 16 
 tools/binman/etype/intel_ifwi.py |  2 +-
 2 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/tools/binman/entry.py b/tools/binman/entry.py
index 8946d2bc02f..68e694e7d15 100644
--- a/tools/binman/entry.py
+++ b/tools/binman/entry.py
@@ -456,6 +456,22 @@ class Entry(object):
 self.Detail('GetData: size %s' % ToHexSize(self.data))
 return self.data
 
+def GetPaddedData(self, data=None):
+"""Get the data for an entry including any padding
+
+Gets the entry data and uses its section's pad-byte value to add 
padding
+before and after as defined by the pad-before and pad-after properties.
+
+This does not consider alignment.
+
+Returns:
+Contents of the entry along with any pad bytes before and
+after it (bytes)
+"""
+if data is None:
+data = self.GetData()
+return self.section.GetPaddedDataForEntry(self, data)
+
 def GetOffsets(self):
 """Get the offsets for siblings
 
diff --git a/tools/binman/etype/intel_ifwi.py b/tools/binman/etype/intel_ifwi.py
index 76b3357c252..1a0e481c198 100644
--- a/tools/binman/etype/intel_ifwi.py
+++ b/tools/binman/etype/intel_ifwi.py
@@ -71,7 +71,7 @@ class Entry_intel_ifwi(Entry_blob_ext):
 
 for entry in self._ifwi_entries.values():
 # First get the input data and put it in a file
-data = entry.GetData()
+data = entry.GetPaddedData()
 uniq = self.GetUniqueName()
 input_fname = tools.GetOutputFilename('input.%s' % uniq)
 tools.WriteFile(input_fname, data)
-- 
2.29.1.341.ge80a0c044ae-goog

Re: [PATCH v5 1/2] arm: rmobile: Add RZ/G2[HMNE] SoC support

[Marek Vasut]

On 11/1/20 8:26 PM, Biju Das wrote:

Hi Marek,


Hi,

[...]


@@ -23,7 +48,9 @@ static u32 rmobile_get_prr(void)

  u32 rmobile_get_cpu_type(void)
  {
-   return (rmobile_get_prr() & 0x7F00) >> 8;
+   const u32 soc_id = (rmobile_get_prr() & 0x7F00) >> 8;


The soc_id = ... can be inlined into get_cpu_type().

However, you might want to cache the result of rmobile_get_cpu_type() ,
because doing OF match every time this is called is expensive.


I agree calling OF match is expensive. So I have ported Renesas SoC 
identification driver  from Linux to u-boot
which will cache the family type, soc_id and revision. I already sent a patch 
for supporting soc_id in UCLASS_SOC in ML[4]
[4]  
http://patchwork.ozlabs.org/project/uboot/patch/20201030140724.12773-1-biju.das...@bp.renesas.com/

On the next version, I will send Renesas SoC identification driver, which 
supports caching family type which
can be used to provide unique identification for CPU type.


Please make sure to check it on RCar2 as well, those use SPL and the SPL 
size is quite limited.


[...]

Re: [PATCH v6 0/7] Add HiHope RZ/G2[HMN] board support

[Marek Vasut]

On 11/2/20 5:16 PM, Biju Das wrote:

This patch series adds the required SoC/Board support to boot HopeRun
HiHope RZ/G2[HMN] boards.

It uses SoC driver for unique cpu identification for RZ/G and R-Car SoC's,
since they share same PRR ID.

SDHI quirks added using soc_device_match api.


Can you please split this into driver patch series and board patch 
series ? And before you resend it, lets figure out the SoC 
identification first.


Note that the driver patches look _much_ nicer, thanks.

[PATCH 1/1] efi_loader: non-volatile variable not deleted from file

[Heinrich Schuchardt]

SetVariable() may be called with attributes == 0 to delete a variable. To
determine if the deletion shall be persisted we have to consider the
non-volatile flag in the attributes of the deleted variable and not the
value passed in the call parameter.

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/efi_variable.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index a10b9caa8b..0c689cfb47 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -393,6 +393,7 @@ efi_status_t efi_set_variable_int(u16 *variable_name, const 
efi_guid_t *vendor,

if (delete) {
/* EFI_NOT_FOUND has been handled before */
+   attributes = var->attr;
ret = EFI_SUCCESS;
} else if (append) {
u16 *old_data = var->name;
--
2.28.0

Re: [PULL] u-boot-atmel-fixes-2021.01-a

[Tom Rini]

On Mon, Nov 02, 2020 at 11:01:51AM +, eugen.hris...@microchip.com wrote:

> Hello Tom,
> 
> Please pull tag u-boot-atmel-fixes-2021.01-a , the first set of atmel 
> fixes for 2021.01 cycle.
> 
> This specific feature set includes the patches for DT required to fix 
> the warnings for newer DTC version (1.6.0+), i2c and spi bus unit address.
> 
> Thanks !
> 
> Eugen
> 
> 
> The following changes since commit 81a659e10a10020cfb03abd4794103194add1f3a:
> 
>Prepare v2021.01-rc1 (2020-10-28 16:30:06 -0400)
> 
> are available in the Git repository at:
> 
>https://gitlab.denx.de/u-boot/custodians/u-boot-atmel.git 
> tags/u-boot-atmel-fixes-2021.01-a
> 
> for you to fetch changes up to ef8f34aea56465e1584ab60b6ae3f3340aab55de:
> 
>ARM: dts: at91: sama5d3xmb_cmp: fix SPI bus unit address (2020-11-02 
> 08:58:38 +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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RE: [PATCH v6 2/7] mmc: renesas-sdhi: Add SDHI quirks for R-Car M3-W and RZ/G2M

[Biju Das]

Hi All,

Please ignore this patch, it is giving compilation error for ARM 32 platforms. 
I will post v7 fixing this error.

   arm:  +   blanche
+drivers/mmc/renesas-sdhi.c:868:21: error: variable 
'sdhi_quirks_4tap_nohs400_b17_dtrend' has initializer but incomplete type
+  868 | static const struct renesas_sdhi_quirks 
sdhi_quirks_4tap_nohs400_b17_dtrend = {
+  |

Regards,
Biju

> Subject: [PATCH v6 2/7] mmc: renesas-sdhi: Add SDHI quirks for R-Car M3-W
> and RZ/G2M
> 
> Add SDHI quirks for R-Car M3-W and RZ/G2M SoC.
> 
> Signed-off-by: Biju Das 
> Reviewed-by: Lad Prabhakar 
> ---
>  v5->v6: Used soc_device_match api to add quirks.
>  v5 : New Patch
> (Ref:
> https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch
> work.ozlabs.org%2Fproject%2Fuboot%2Fpatch%2F20201008085941.3600-2-
> biju.das.jz%40bp.renesas.com%2F&data=04%7C01%7Cbiju.das.jz%40bp
> .renesas.com%7Ca8731933d03d4e7e826f08d87f4ab9bd%7C53d82571da1947e
> 49cb4625a166a4a2a%7C0%7C0%7C637399306207070943%7CUnknown%7CTW
> FpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJX
> VCI6Mn0%3D%7C1000&sdata=YEZTOITdq0M0iLuBr%2BLd9QTo3oe6hfy
> wNTl9bODUS6c%3D&reserved=0)
> ---
>  drivers/mmc/renesas-sdhi.c | 110
> +
>  1 file changed, 110 insertions(+)
> 
> diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index
> d80b3fc28f..39deeb94d8 100644
> --- a/drivers/mmc/renesas-sdhi.c
> +++ b/drivers/mmc/renesas-sdhi.c
> @@ -19,6 +19,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include "tmio-common.h"
> 
> @@ -105,6 +106,15 @@ static const u8
> r8a77990_calib_table[2][CALIB_TABLE_MAX] = {
>12, 13, 14, 16, 17, 18, 18, 18, 19, 19, 20, 24, 26, 26, 26, 26 }  };
> 
> +#define SDHI_CALIB_TABLE_MAX 32
> +
> +struct renesas_sdhi_quirks {
> + bool hs400_disabled;
> + bool hs400_4taps;
> + u32 hs400_bad_taps;
> + const u8 (*hs400_calib_table)[SDHI_CALIB_TABLE_MAX];
> +};
> +
>  static int rmobile_is_gen3_mmc0(struct tmio_sd_priv *priv)  {
>   /* On R-Car Gen3, MMC0 is at 0xee14 */ @@ -855,6 +865,99 @@
> static ulong renesas_sdhi_clk_get_rate(struct tmio_sd_priv *priv)
>   return clk_get_rate(&priv->clk);
>  }
> 
> +static const struct renesas_sdhi_quirks
> sdhi_quirks_4tap_nohs400_b17_dtrend = {
> + .hs400_disabled = true,
> + .hs400_4taps = true,
> +};
> +
> +static const struct renesas_sdhi_quirks sdhi_quirks_4tap_nohs400 = {
> + .hs400_disabled = true,
> + .hs400_4taps = true,
> +};
> +
> +static const struct renesas_sdhi_quirks sdhi_quirks_r8a7796_es12 = {
> + .hs400_4taps = true,
> + .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
> + .hs400_calib_table = r8a7796_rev1_calib_table, };
> +
> +static const struct renesas_sdhi_quirks sdhi_quirks_r8a7796_es13 = {
> + .hs400_bad_taps = BIT(1) | BIT(3) | BIT(5) | BIT(7),
> + .hs400_calib_table = r8a7796_rev3_calib_table, };
> +
> +/*
> + * Note for r8a7796 / r8a774a1: we can't distinguish ES1.1 and 1.2 as of now.
> + * So, we want to treat them equally and only have a match for ES1.2 to
> +enforce
> + * this if there ever will be a way to distinguish ES1.2.
> + */
> +static const struct soc_attr sdhi_quirks_match[]  = {
> + { .soc_id = "r8a774a1",
> +   .revision = "ES1.0",
> +   .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
> + },
> + { .soc_id = "r8a774a1",
> +   .revision = "ES1.1",
> +   .data = &sdhi_quirks_4tap_nohs400
> + },
> + { .soc_id = "r8a774a1",
> +   .revision = "ES1.2",
> +   .data = &sdhi_quirks_r8a7796_es12
> + },
> + { .soc_id = "r8a774a1",
> +   .revision = "ES1.3",
> +   .data = &sdhi_quirks_r8a7796_es13
> + },
> + { .soc_id = "r8a7796",
> +   .revision = "ES1.0",
> +   .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
> + },
> + { .soc_id = "r8a7796",
> +   .revision = "ES1.1",
> +   .data = &sdhi_quirks_4tap_nohs400
> + },
> + { .soc_id = "r8a7796",
> +   .revision = "ES1.2",
> +   .data = &sdhi_quirks_r8a7796_es12
> + },
> + { .soc_id = "r8a7796",
> +   .revision = "ES1.3",
> +   .data = &sdhi_quirks_r8a7796_es13
> + },
> + { /* Sentinel. */ },
> +};
> +
> +static void renesas_sdhi_add_quirks(struct tmio_sd_plat *plat,
> + struct tmio_sd_priv *priv,
> + const struct renesas_sdhi_quirks *quirks) {
> + priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2;
> +
> + if (quirks && quirks->hs400_disabled) {
> + plat->cfg.host_caps &= ~MMC_MODE_HS400;
> + if (quirks == &sdhi_quirks_4tap_nohs400_b17_dtrend)
> + priv->read_poll_flag =
> TMIO_SD_DMA_INFO1_END_RD;
> + }
> +
> + if (quirks && quirks->hs400_4taps)
> + priv->nrtaps = 4;
> + else
> + priv->nrtaps = 8;
> +
> + if (quirks && quirks->hs400_bad_taps)
> + priv->hs4

[PATCH v6 7/7] arm: rmobile: Add HopeRun HiHope RZ/G2H board support

[Biju Das]

The HiHope RZ/G2H board from HopeRun consists of main board
(HopeRun HiHope RZ/G2H main board) and sub board(HopeRun
HiHope RZ/G2H sub board). The HiHope RZ/G2H sub board sits
below the HiHope RZ/G2H main board.

DTS files apart from r8a774e1-hihope-rzg2h-u-boot.dts and
r8a774e1-u-boot.dtsi have been imported from linux 5.9 commit
bbf5c979011a ("Linux 5.9").

This patch adds the required board support to boot HopeRun HiHope
RZ/G2H board.

Signed-off-by: Biju Das 
Reviewed-by: Lad Prabhakar 
---
 v6: New patch.
---
 arch/arm/dts/Makefile |  1 +
 arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts | 15 +++
 arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts | 27 +++
 arch/arm/dts/r8a774e1-hihope-rzg2h.dts| 26 ++
 arch/arm/dts/r8a774e1-u-boot.dtsi | 25 +
 arch/arm/mach-rmobile/Kconfig.64  |  1 +
 board/hoperun/hihope-rzg2/hihope-rzg2.c   |  6 -
 configs/hihope_rzg2_defconfig |  2 +-
 8 files changed, 101 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts
 create mode 100644 arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts
 create mode 100644 arch/arm/dts/r8a774e1-hihope-rzg2h.dts
 create mode 100644 arch/arm/dts/r8a774e1-u-boot.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9f14fb13ec..3715640bbb 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -794,6 +794,7 @@ dtb-$(CONFIG_RCAR_GEN3) += \
r8a774a1-beacon-rzg2m-kit.dtb \
r8a774a1-hihope-rzg2m-u-boot.dtb \
r8a774b1-hihope-rzg2n-u-boot.dtb \
+   r8a774e1-hihope-rzg2h-u-boot.dtb \
r8a77950-ulcb-u-boot.dtb \
r8a77950-salvator-x-u-boot.dtb \
r8a77960-ulcb-u-boot.dtb \
diff --git a/arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts 
b/arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts
new file mode 100644
index 00..265355e0de
--- /dev/null
+++ b/arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2H sub board
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a774e1-hihope-rzg2h.dts"
+#include "hihope-rzg2-ex.dtsi"
+
+/ {
+   model = "HopeRun HiHope RZ/G2H with sub board";
+   compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2h",
+"renesas,r8a774e1";
+};
diff --git a/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts 
b/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts
new file mode 100644
index 00..03a17bac7e
--- /dev/null
+++ b/arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the Hihope RZ/G2H board
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a774e1-hihope-rzg2h-ex.dts"
+#include "r8a774e1-u-boot.dtsi"
+
+&gpio3 {
+   bt_reg_on{
+   gpio-hog;
+   gpios = <13 GPIO_ACTIVE_HIGH>;
+   output-low;
+   line-name = "bt-reg-on";
+   };
+};
+
+&gpio4 {
+   wlan_reg_on{
+   gpio-hog;
+   gpios = <6 GPIO_ACTIVE_HIGH>;
+   output-low;
+   line-name = "wlan-reg-on";
+   };
+};
diff --git a/arch/arm/dts/r8a774e1-hihope-rzg2h.dts 
b/arch/arm/dts/r8a774e1-hihope-rzg2h.dts
new file mode 100644
index 00..cdbe527e93
--- /dev/null
+++ b/arch/arm/dts/r8a774e1-hihope-rzg2h.dts
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2H main board
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a774e1.dtsi"
+#include "hihope-rev4.dtsi"
+
+/ {
+   model = "HopeRun HiHope RZ/G2H main board based on r8a774e1";
+   compatible = "hoperun,hihope-rzg2h", "renesas,r8a774e1";
+
+   memory@4800 {
+   device_type = "memory";
+   /* first 128MB is reserved for secure area. */
+   reg = <0x0 0x4800 0x0 0x7800>;
+   };
+
+   memory@5 {
+   device_type = "memory";
+   reg = <0x5 0x 0x0 0x8000>;
+   };
+};
diff --git a/arch/arm/dts/r8a774e1-u-boot.dtsi 
b/arch/arm/dts/r8a774e1-u-boot.dtsi
new file mode 100644
index 00..30c38dcfba
--- /dev/null
+++ b/arch/arm/dts/r8a774e1-u-boot.dtsi
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot on RZ/G2 R8A774E1 SoC
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a779x-u-boot.dtsi"
+
+&extalr_clk {
+   u-boot,dm-pre-reloc;
+};
+
+/delete-node/ &can0;
+/delete-node/ &can1;
+/delete-node/ &canfd;
+/delete-node/ &du;
+/delete-node/ &hdmi0;
+/delete-node/ &rcar_sound;
+/delete-node/ &sdhi2;
+/delete-node/ &sound_card;
+
+/ {
+   /delete-node/ hdmi0-out;
+};
diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index 18153a809e..56c

[PATCH v6 5/7] arm: rmobile: Add HopeRun HiHope RZ/G2N board support

[Biju Das]

The HiHope RZ/G2N board from HopeRun consists of main board
(HopeRun HiHope RZ/G2N main board) and sub board(HopeRun
HiHope RZ/G2N sub board). The HiHope RZ/G2N sub board sits
below the HiHope RZ/G2N main board.

DTS files apart from r8a774b1-hihope-rzg2n-u-boot.dts and
r8a774b1-u-boot.dtsi have been imported from linux 5.9 commit
bbf5c979011a ("Linux 5.9")

This patch adds the required board support to boot HopeRun HiHope
RZ/G2N board.

Signed-off-by: Biju Das 
Reviewed-by: Lad Prabhakar 
---
 v6: New patch
---
 arch/arm/dts/Makefile |  1 +
 arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts | 16 ++
 arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts | 27 ++
 arch/arm/dts/r8a774b1-hihope-rzg2n.dts| 41 ++
 arch/arm/dts/r8a774b1-u-boot.dtsi | 53 +++
 arch/arm/mach-rmobile/Kconfig.64  |  1 +
 board/hoperun/hihope-rzg2/hihope-rzg2.c   |  6 ++-
 configs/hihope_rzg2_defconfig |  2 +-
 8 files changed, 145 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts
 create mode 100644 arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts
 create mode 100644 arch/arm/dts/r8a774b1-hihope-rzg2n.dts
 create mode 100644 arch/arm/dts/r8a774b1-u-boot.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ba46785078..9f14fb13ec 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -793,6 +793,7 @@ dtb-$(CONFIG_RCAR_GEN2) += \
 dtb-$(CONFIG_RCAR_GEN3) += \
r8a774a1-beacon-rzg2m-kit.dtb \
r8a774a1-hihope-rzg2m-u-boot.dtb \
+   r8a774b1-hihope-rzg2n-u-boot.dtb \
r8a77950-ulcb-u-boot.dtb \
r8a77950-salvator-x-u-boot.dtb \
r8a77960-ulcb-u-boot.dtb \
diff --git a/arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts 
b/arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts
new file mode 100644
index 00..a3edd55113
--- /dev/null
+++ b/arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2N Rev.3.0/4.0 connected to
+ * sub board
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a774b1-hihope-rzg2n.dts"
+#include "hihope-rzg2-ex.dtsi"
+
+/ {
+   model = "HopeRun HiHope RZ/G2N with sub board";
+   compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2n",
+"renesas,r8a774b1";
+};
diff --git a/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts 
b/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts
new file mode 100644
index 00..09378a70a2
--- /dev/null
+++ b/arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the Hihope RZ/G2N board
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a774b1-hihope-rzg2n-ex.dts"
+#include "r8a774b1-u-boot.dtsi"
+
+&gpio3 {
+   bt_reg_on{
+   gpio-hog;
+   gpios = <13 GPIO_ACTIVE_HIGH>;
+   output-low;
+   line-name = "bt-reg-on";
+   };
+};
+
+&gpio4 {
+   wlan_reg_on{
+   gpio-hog;
+   gpios = <6 GPIO_ACTIVE_HIGH>;
+   output-low;
+   line-name = "wlan-reg-on";
+   };
+};
diff --git a/arch/arm/dts/r8a774b1-hihope-rzg2n.dts 
b/arch/arm/dts/r8a774b1-hihope-rzg2n.dts
new file mode 100644
index 00..f1883cbd1a
--- /dev/null
+++ b/arch/arm/dts/r8a774b1-hihope-rzg2n.dts
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2N main board Rev.3.0/4.0
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a774b1.dtsi"
+#include "hihope-rev4.dtsi"
+
+/ {
+   model = "HopeRun HiHope RZ/G2N main board based on r8a774b1";
+   compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1";
+
+   memory@4800 {
+   device_type = "memory";
+   /* first 128MB is reserved for secure area. */
+   reg = <0x0 0x4800 0x0 0x7800>;
+   };
+
+   memory@48000 {
+   device_type = "memory";
+   reg = <0x4 0x8000 0x0 0x8000>;
+   };
+};
+
+&du {
+   clocks = <&cpg CPG_MOD 724>,
+<&cpg CPG_MOD 723>,
+<&cpg CPG_MOD 721>,
+<&versaclock5 1>,
+<&x302_clk>,
+<&versaclock5 2>;
+   clock-names = "du.0", "du.1", "du.3",
+ "dclkin.0", "dclkin.1", "dclkin.3";
+};
+
+&sdhi3 {
+   mmc-hs400-1_8v;
+};
diff --git a/arch/arm/dts/r8a774b1-u-boot.dtsi 
b/arch/arm/dts/r8a774b1-u-boot.dtsi
new file mode 100644
index 00..2c0319fc39
--- /dev/null
+++ b/arch/arm/dts/r8a774b1-u-boot.dtsi
@@ -0,0 +1,53 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot on RZ/G2 R8A774B1 SoC
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include "r8a779x-u-boot.dtsi"
+
+&extalr_

[PATCH v6 2/7] mmc: renesas-sdhi: Add SDHI quirks for R-Car M3-W and RZ/G2M

[Biju Das]

Add SDHI quirks for R-Car M3-W and RZ/G2M SoC.

Signed-off-by: Biju Das 
Reviewed-by: Lad Prabhakar 
---
 v5->v6: Used soc_device_match api to add quirks.
 v5 : New Patch
(Ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20201008085941.3600-2-biju.das...@bp.renesas.com/)
---
 drivers/mmc/renesas-sdhi.c | 110 +
 1 file changed, 110 insertions(+)

diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index d80b3fc28f..39deeb94d8 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include "tmio-common.h"
 
@@ -105,6 +106,15 @@ static const u8 r8a77990_calib_table[2][CALIB_TABLE_MAX] = 
{
 12, 13, 14, 16, 17, 18, 18, 18, 19, 19, 20, 24, 26, 26, 26, 26 }
 };
 
+#define SDHI_CALIB_TABLE_MAX 32
+
+struct renesas_sdhi_quirks {
+   bool hs400_disabled;
+   bool hs400_4taps;
+   u32 hs400_bad_taps;
+   const u8 (*hs400_calib_table)[SDHI_CALIB_TABLE_MAX];
+};
+
 static int rmobile_is_gen3_mmc0(struct tmio_sd_priv *priv)
 {
/* On R-Car Gen3, MMC0 is at 0xee14 */
@@ -855,6 +865,99 @@ static ulong renesas_sdhi_clk_get_rate(struct tmio_sd_priv 
*priv)
return clk_get_rate(&priv->clk);
 }
 
+static const struct renesas_sdhi_quirks sdhi_quirks_4tap_nohs400_b17_dtrend = {
+   .hs400_disabled = true,
+   .hs400_4taps = true,
+};
+
+static const struct renesas_sdhi_quirks sdhi_quirks_4tap_nohs400 = {
+   .hs400_disabled = true,
+   .hs400_4taps = true,
+};
+
+static const struct renesas_sdhi_quirks sdhi_quirks_r8a7796_es12 = {
+   .hs400_4taps = true,
+   .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
+   .hs400_calib_table = r8a7796_rev1_calib_table,
+};
+
+static const struct renesas_sdhi_quirks sdhi_quirks_r8a7796_es13 = {
+   .hs400_bad_taps = BIT(1) | BIT(3) | BIT(5) | BIT(7),
+   .hs400_calib_table = r8a7796_rev3_calib_table,
+};
+
+/*
+ * Note for r8a7796 / r8a774a1: we can't distinguish ES1.1 and 1.2 as of now.
+ * So, we want to treat them equally and only have a match for ES1.2 to enforce
+ * this if there ever will be a way to distinguish ES1.2.
+ */
+static const struct soc_attr sdhi_quirks_match[]  = {
+   { .soc_id = "r8a774a1",
+ .revision = "ES1.0",
+ .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
+   },
+   { .soc_id = "r8a774a1",
+ .revision = "ES1.1",
+ .data = &sdhi_quirks_4tap_nohs400
+   },
+   { .soc_id = "r8a774a1",
+ .revision = "ES1.2",
+ .data = &sdhi_quirks_r8a7796_es12
+   },
+   { .soc_id = "r8a774a1",
+ .revision = "ES1.3",
+ .data = &sdhi_quirks_r8a7796_es13
+   },
+   { .soc_id = "r8a7796",
+ .revision = "ES1.0",
+ .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
+   },
+   { .soc_id = "r8a7796",
+ .revision = "ES1.1",
+ .data = &sdhi_quirks_4tap_nohs400
+   },
+   { .soc_id = "r8a7796",
+ .revision = "ES1.2",
+ .data = &sdhi_quirks_r8a7796_es12
+   },
+   { .soc_id = "r8a7796",
+ .revision = "ES1.3",
+ .data = &sdhi_quirks_r8a7796_es13
+   },
+   { /* Sentinel. */ },
+};
+
+static void renesas_sdhi_add_quirks(struct tmio_sd_plat *plat,
+   struct tmio_sd_priv *priv,
+   const struct renesas_sdhi_quirks *quirks)
+{
+   priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2;
+
+   if (quirks && quirks->hs400_disabled) {
+   plat->cfg.host_caps &= ~MMC_MODE_HS400;
+   if (quirks == &sdhi_quirks_4tap_nohs400_b17_dtrend)
+   priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD;
+   }
+
+   if (quirks && quirks->hs400_4taps)
+   priv->nrtaps = 4;
+   else
+   priv->nrtaps = 8;
+
+   if (quirks && quirks->hs400_bad_taps)
+   priv->hs400_bad_tap = quirks->hs400_bad_taps;
+
+   if (quirks && quirks->hs400_calib_table) {
+   priv->adjust_hs400_enable = true;
+   priv->adjust_hs400_calib_table =
+   quirks->hs400_calib_table[!rmobile_is_gen3_mmc0(priv)];
+   if (quirks == &sdhi_quirks_r8a7796_es12)
+   priv->adjust_hs400_offset = 3;
+   else if (quirks == &sdhi_quirks_r8a7796_es13)
+   priv->adjust_hs400_offset = 0;
+   }
+}
+
 static void renesas_sdhi_filter_caps(struct udevice *dev)
 {
struct tmio_sd_priv *priv = dev_get_priv(dev);
@@ -866,6 +969,13 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
 CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
 CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
struct tmio_sd_plat *plat = dev_get_platdata(dev);
+   const struct soc_attr *attr;
+
+   attr = soc_device_match(sdhi_quirks_match);
+   if (attr) {
+   renesas_sdhi_add_quirks

[PATCH v6 1/7] arm: rmobile: Add RZ/G2[HMNE] SoC support

[Biju Das]

RZ/G2 SoC's are identical to R-Car Gen3 SoC's apart from some
automotive peripherals.

RZ/G2H (R8A774E1) = R-Car H3-N (R8A77951).
RZ/G2M (R8A774A1) = R-Car M3-W (R8A77960).
RZ/G2N (R8A774B1) = R-Car M3-N (R8A77965).
RZ/G2E (R8A774C0) = R-Car E3 (R8A77990).

As the devices are the same they also have the same SoC PRR
register values. SoC driver is used to distinguish the
cpu type based on the family.

Signed-off-by: Biju Das 
Reviewed-by: Lad Prabhakar 
---
 v5->v6
   * Optimized the unique CPU identification method by using Renesas SoC 
identification driver.
 v4->v5
   * Add support for unique identification of RZ/G2 CPU types
 (Ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20201008085941.3600-1-biju.das...@bp.renesas.com/)
 v3->v4
   * Dropped CPU info reporting logic for RZ/G2. Will address this later.
   * Added PRRID's for RZG2[HMNE]
   (Ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20201001103658.4835-1-biju.das...@bp.renesas.com/)

 v2->v3  
   * Reworked as per Marek's suggestion
   * Added rzg2_get_cpu_type function to get cpu_type by matching TFA 
compatible string
   * Removed SoC family type Enum
   (Ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20200922160317.16296-2-biju.das...@bp.renesas.com/)

 v1->v2:
  * Add comment's related to loop logic
   (ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20200918160307.14323-1-biju.das...@bp.renesas.com/)

 v1:
  * New patch
  
(ref:https://patchwork.ozlabs.org/project/uboot/patch/20200915143630.7678-4-biju.das...@bp.renesas.com/
---
 arch/arm/mach-rmobile/cpu_info-rcar.c| 22 ++-
 arch/arm/mach-rmobile/cpu_info.c | 10 +++-
 arch/arm/mach-rmobile/include/mach/rmobile.h | 60 +++-
 3 files changed, 73 insertions(+), 19 deletions(-)

diff --git a/arch/arm/mach-rmobile/cpu_info-rcar.c 
b/arch/arm/mach-rmobile/cpu_info-rcar.c
index 5bde24ae0e..08345503a2 100644
--- a/arch/arm/mach-rmobile/cpu_info-rcar.c
+++ b/arch/arm/mach-rmobile/cpu_info-rcar.c
@@ -6,6 +6,7 @@
  */
 #include 
 #include 
+#include 
 
 #define PRR_MASK   0x7fff
 #define R8A7796_REV_1_00x5200
@@ -21,9 +22,28 @@ static u32 rmobile_get_prr(void)
 #endif
 }
 
+static bool is_rzg_family(void)
+{
+   bool rzg_family_type = false;
+   struct udevice *soc;
+   char name[16];
+
+   if (!(soc_get(&soc) || soc_get_family(soc, name, 16))) {
+   if (!strcmp(name, "RZ/G2"))
+   rzg_family_type = true;
+   }
+
+   return rzg_family_type;
+}
+
 u32 rmobile_get_cpu_type(void)
 {
-   return (rmobile_get_prr() & 0x7F00) >> 8;
+   u32 soc_id = (rmobile_get_prr() & 0x7F00) >> 8;
+
+   if (is_rzg_family())
+   soc_id |= RZG_CPU_MASK;
+
+   return soc_id;
 }
 
 u32 rmobile_get_cpu_rev_integer(void)
diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c
index fdbbd72e28..b19b7e3044 100644
--- a/arch/arm/mach-rmobile/cpu_info.c
+++ b/arch/arm/mach-rmobile/cpu_info.c
@@ -3,12 +3,12 @@
  * (C) Copyright 2012 Nobuhiro Iwamatsu 
  * (C) Copyright 2012 Renesas Solutions Corp.
  */
-#include 
-#include 
 #include 
-#include 
 #include 
+#include 
+#include 
 #include 
+#include 
 #include 
 
 #ifdef CONFIG_ARCH_CPU_INIT
@@ -59,6 +59,10 @@ static const struct {
 } rmobile_cpuinfo[] = {
{ RMOBILE_CPU_TYPE_SH73A0, "SH73A0" },
{ RMOBILE_CPU_TYPE_R8A7740, "R8A7740" },
+   { RMOBILE_CPU_TYPE_R8A774A1, "R8A774A1" },
+   { RMOBILE_CPU_TYPE_R8A774B1, "R8A774B1" },
+   { RMOBILE_CPU_TYPE_R8A774C0, "R8A774C0" },
+   { RMOBILE_CPU_TYPE_R8A774E1, "R8A774E1" },
{ RMOBILE_CPU_TYPE_R8A7790, "R8A7790" },
{ RMOBILE_CPU_TYPE_R8A7791, "R8A7791" },
{ RMOBILE_CPU_TYPE_R8A7792, "R8A7792" },
diff --git a/arch/arm/mach-rmobile/include/mach/rmobile.h 
b/arch/arm/mach-rmobile/include/mach/rmobile.h
index a50249dc96..da099fa4c3 100644
--- a/arch/arm/mach-rmobile/include/mach/rmobile.h
+++ b/arch/arm/mach-rmobile/include/mach/rmobile.h
@@ -24,21 +24,51 @@
 #endif
 #endif /* CONFIG_ARCH_RMOBILE */
 
-/* PRR CPU IDs */
-#define RMOBILE_CPU_TYPE_SH73A00x37
-#define RMOBILE_CPU_TYPE_R8A7740   0x40
-#define RMOBILE_CPU_TYPE_R8A7790   0x45
-#define RMOBILE_CPU_TYPE_R8A7791   0x47
-#define RMOBILE_CPU_TYPE_R8A7792   0x4A
-#define RMOBILE_CPU_TYPE_R8A7793   0x4B
-#define RMOBILE_CPU_TYPE_R8A7794   0x4C
-#define RMOBILE_CPU_TYPE_R8A7795   0x4F
-#define RMOBILE_CPU_TYPE_R8A7796   0x52
-#define RMOBILE_CPU_TYPE_R8A77965  0x55
-#define RMOBILE_CPU_TYPE_R8A77970  0x54
-#define RMOBILE_CPU_TYPE_R8A77980  0x56
-#define RMOBILE_CPU_TYPE_R8A77990  0x57
-#define RMOBILE_CPU_TYPE_R8A77995  0x58
+/* PRR IDs */
+#define SOC_ID_SH73A0  0x37
+#define SOC_ID_R8A7740 0x40
+#define SOC_ID_R8A774A10x52
+#define SOC_ID_R8A774B10x55
+#define SOC_ID_R8A774C00x57
+#define SOC_ID_

[PATCH v6 6/7] mmc: renesas-sdhi: Add SDHI quirks for R-Car H3 and RZ/G2H

[Biju Das]

Add SDHI quirks for R-Car H3 and RZ/G2H SoC.

Signed-off-by: Biju Das 
Reviewed-by: Lad Prabhakar 
---
 v6: New patch. Quirks using soc_device_match.
---
 drivers/mmc/renesas-sdhi.c | 37 -
 1 file changed, 36 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 0e4a44d973..e19daf8bf8 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -875,6 +875,16 @@ static const struct renesas_sdhi_quirks 
sdhi_quirks_4tap_nohs400 = {
.hs400_4taps = true,
 };
 
+static const struct renesas_sdhi_quirks sdhi_quirks_4tap = {
+   .hs400_4taps = true,
+   .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
+};
+
+static const struct renesas_sdhi_quirks sdhi_quirks_r8a7795_es30 = {
+   .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
+   .hs400_calib_table = r8a7795_calib_table,
+};
+
 static const struct renesas_sdhi_quirks sdhi_quirks_r8a7796_es12 = {
.hs400_4taps = true,
.hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
@@ -916,6 +926,30 @@ static const struct soc_attr sdhi_quirks_match[]  = {
{ .soc_id = "r8a774b1",
  .data = &sdhi_quirks_r8a77965
},
+   { .soc_id = "r8a774e1",
+ .revision = "ES2.0",
+ .data = &sdhi_quirks_4tap
+   },
+   { .soc_id = "r8a774e1",
+ .revision = "ES3.0",
+ .data = &sdhi_quirks_r8a7795_es30
+   },
+   { .soc_id = "r8a7795",
+ .revision = "ES1.0",
+ .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
+   },
+   { .soc_id = "r8a7795",
+ .revision = "ES1.1",
+ .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
+   },
+   { .soc_id = "r8a7795",
+ .revision = "ES2.0",
+ .data = &sdhi_quirks_4tap
+   },
+   { .soc_id = "r8a7795",
+ .revision = "ES3.0",
+ .data = &sdhi_quirks_r8a7795_es30
+   },
{ .soc_id = "r8a7796",
  .revision = "ES1.0",
  .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
@@ -965,7 +999,8 @@ static void renesas_sdhi_add_quirks(struct tmio_sd_plat 
*plat,
if (quirks == &sdhi_quirks_r8a7796_es12 ||
quirks == &sdhi_quirks_r8a77965)
priv->adjust_hs400_offset = 3;
-   else if (quirks == &sdhi_quirks_r8a7796_es13)
+   else if (quirks == &sdhi_quirks_r8a7796_es13 ||
+quirks == &sdhi_quirks_r8a7795_es30)
priv->adjust_hs400_offset = 0;
}
 }
-- 
2.17.1

[PATCH v6 4/7] mmc: renesas-sdhi: Add SDHI quirks for R-Car M3-N and RZ/G2N

[Biju Das]

Add SDHI quirks for R-Car M3-N and RZ/G2N SoC.

Signed-off-by: Biju Das 
Reviewed-by: Lad Prabhakar 
---
 v6: New patch. quirks using soc_device_match.
---
 drivers/mmc/renesas-sdhi.c | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 39deeb94d8..0e4a44d973 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -886,6 +886,11 @@ static const struct renesas_sdhi_quirks 
sdhi_quirks_r8a7796_es13 = {
.hs400_calib_table = r8a7796_rev3_calib_table,
 };
 
+static const struct renesas_sdhi_quirks sdhi_quirks_r8a77965 = {
+   .hs400_bad_taps = BIT(2) | BIT(3) | BIT(6) | BIT(7),
+   .hs400_calib_table = r8a77965_calib_table,
+};
+
 /*
  * Note for r8a7796 / r8a774a1: we can't distinguish ES1.1 and 1.2 as of now.
  * So, we want to treat them equally and only have a match for ES1.2 to enforce
@@ -908,6 +913,9 @@ static const struct soc_attr sdhi_quirks_match[]  = {
  .revision = "ES1.3",
  .data = &sdhi_quirks_r8a7796_es13
},
+   { .soc_id = "r8a774b1",
+ .data = &sdhi_quirks_r8a77965
+   },
{ .soc_id = "r8a7796",
  .revision = "ES1.0",
  .data = &sdhi_quirks_4tap_nohs400_b17_dtrend
@@ -924,6 +932,9 @@ static const struct soc_attr sdhi_quirks_match[]  = {
  .revision = "ES1.3",
  .data = &sdhi_quirks_r8a7796_es13
},
+   { .soc_id = "r8a77965",
+ .data = &sdhi_quirks_r8a77965
+   },
{ /* Sentinel. */ },
 };
 
@@ -951,7 +962,8 @@ static void renesas_sdhi_add_quirks(struct tmio_sd_plat 
*plat,
priv->adjust_hs400_enable = true;
priv->adjust_hs400_calib_table =
quirks->hs400_calib_table[!rmobile_is_gen3_mmc0(priv)];
-   if (quirks == &sdhi_quirks_r8a7796_es12)
+   if (quirks == &sdhi_quirks_r8a7796_es12 ||
+   quirks == &sdhi_quirks_r8a77965)
priv->adjust_hs400_offset = 3;
else if (quirks == &sdhi_quirks_r8a7796_es13)
priv->adjust_hs400_offset = 0;
-- 
2.17.1

[PATCH v6 0/7] Add HiHope RZ/G2[HMN] board support

[Biju Das]

This patch series adds the required SoC/Board support to boot HopeRun 
HiHope RZ/G2[HMN] boards.

It uses SoC driver for unique cpu identification for RZ/G and R-Car SoC's,
since they share same PRR ID.

SDHI quirks added using soc_device_match api.

This patch series depend upon [1]
[1] https://lists.denx.de/pipermail/u-boot/2020-November/431539.html

Note:
 1) This patch series tested on RZ/G2[HMN] boards.
 2) SOC_DEVICE_RENESAS option enabled only RZ/G2[HMN] boards. After testing
this needs to be enabled for other boards.


Biju Das (7):
  arm: rmobile: Add RZ/G2[HMNE] SoC support
  mmc: renesas-sdhi: Add SDHI quirks for R-Car M3-W and RZ/G2M
  arm: rmobile: Add HopeRun HiHope RZ/G2M board support
  mmc: renesas-sdhi: Add SDHI quirks for R-Car M3-N and RZ/G2N
  arm: rmobile: Add HopeRun HiHope RZ/G2N board support
  mmc: renesas-sdhi: Add SDHI quirks for R-Car H3 and RZ/G2H
  arm: rmobile: Add HopeRun HiHope RZ/G2H board support

 arch/arm/dts/Makefile |   3 +
 arch/arm/dts/hihope-common.dtsi   | 377 ++
 arch/arm/dts/hihope-rev4.dtsi | 124 ++
 arch/arm/dts/hihope-rzg2-ex.dtsi  |  92 +
 arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts |  21 +
 arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts |  27 ++
 arch/arm/dts/r8a774a1-hihope-rzg2m.dts|  37 ++
 arch/arm/dts/r8a774a1-u-boot.dtsi |  55 +++
 arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts |  16 +
 arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts |  27 ++
 arch/arm/dts/r8a774b1-hihope-rzg2n.dts|  41 ++
 arch/arm/dts/r8a774b1-u-boot.dtsi |  53 +++
 arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts |  15 +
 arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts |  27 ++
 arch/arm/dts/r8a774e1-hihope-rzg2h.dts|  26 ++
 arch/arm/dts/r8a774e1-u-boot.dtsi |  25 ++
 arch/arm/mach-rmobile/Kconfig.64  |  16 +
 arch/arm/mach-rmobile/cpu_info-rcar.c |  22 +-
 arch/arm/mach-rmobile/cpu_info.c  |  10 +-
 arch/arm/mach-rmobile/include/mach/rmobile.h  |  60 ++-
 board/hoperun/hihope-rzg2/Kconfig |  15 +
 board/hoperun/hihope-rzg2/MAINTAINERS |   6 +
 board/hoperun/hihope-rzg2/Makefile|   9 +
 board/hoperun/hihope-rzg2/hihope-rzg2.c   |  99 +
 configs/hihope_rzg2_defconfig |  77 
 drivers/mmc/renesas-sdhi.c| 157 
 include/configs/hihope-rzg2.h |  20 +
 27 files changed, 1438 insertions(+), 19 deletions(-)
 create mode 100644 arch/arm/dts/hihope-common.dtsi
 create mode 100644 arch/arm/dts/hihope-rev4.dtsi
 create mode 100644 arch/arm/dts/hihope-rzg2-ex.dtsi
 create mode 100644 arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts
 create mode 100644 arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts
 create mode 100644 arch/arm/dts/r8a774a1-hihope-rzg2m.dts
 create mode 100644 arch/arm/dts/r8a774a1-u-boot.dtsi
 create mode 100644 arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts
 create mode 100644 arch/arm/dts/r8a774b1-hihope-rzg2n-u-boot.dts
 create mode 100644 arch/arm/dts/r8a774b1-hihope-rzg2n.dts
 create mode 100644 arch/arm/dts/r8a774b1-u-boot.dtsi
 create mode 100644 arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts
 create mode 100644 arch/arm/dts/r8a774e1-hihope-rzg2h-u-boot.dts
 create mode 100644 arch/arm/dts/r8a774e1-hihope-rzg2h.dts
 create mode 100644 arch/arm/dts/r8a774e1-u-boot.dtsi
 create mode 100644 board/hoperun/hihope-rzg2/Kconfig
 create mode 100644 board/hoperun/hihope-rzg2/MAINTAINERS
 create mode 100644 board/hoperun/hihope-rzg2/Makefile
 create mode 100644 board/hoperun/hihope-rzg2/hihope-rzg2.c
 create mode 100644 configs/hihope_rzg2_defconfig
 create mode 100644 include/configs/hihope-rzg2.h

-- 
2.17.1

[PATCH v6 3/7] arm: rmobile: Add HopeRun HiHope RZ/G2M board support

[Biju Das]

The HiHope RZ/G2M board from HopeRun consists of main board
(HopeRun HiHope RZ/G2M main board) and sub board(HopeRun
HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits
below the HiHope RZ/G2M main board.

DTS files apart from r8a774a1-hihope-rzg2m-u-boot.dts and
r8a774a1-u-boot.dtsi have been imported from linux 5.9 commit
bbf5c979011a ("Linux 5.9").

This patch adds the required board support to boot HopeRun HiHope
RZ/G2M board.

Signed-off-by: Biju Das 
Reviewed-by: Lad Prabhakar 
---
v5->v6
  * Rebased to U-boot-sh/master
  * Changed the logic for USB0 channel0 Host support.
  * Enabled CONFIG_SOC_DEVICE_RENESAS option

V4->V5
  * Rebased to U-boot-sh/next
  (Ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20201012151616.5384-4-biju.das...@bp.renesas.com/)

V3->V4
  * Added USB0 channel0 Host support
(Ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20201001103658.4835-2-biju.das...@bp.renesas.com/)
V2->V3  
   * Reworked as per Marek's suggestion
   * Added rzg2_get_cpu_type function to get cpu_type by matching TFA 
compatible string
   * Removed SoC family type Enum
   Ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20200922160317.16296-3-biju.das...@bp.renesas.com/

V1->V2
 * Fixed indentation for R8A774A1 config
 * Used GPIO hog for setting WLAN/BT REG ON
 * Removed USB related initialization
  Ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20200918160307.14323-2-biju.das...@bp.renesas.com/

V1:-
 * New Patch
 Ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20200915143630.7678-5-biju.das...@bp.renesas.com/
---
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/hihope-common.dtsi   | 377 ++
 arch/arm/dts/hihope-rev4.dtsi | 124 ++
 arch/arm/dts/hihope-rzg2-ex.dtsi  |  92 +
 arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts |  21 +
 arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts |  27 ++
 arch/arm/dts/r8a774a1-hihope-rzg2m.dts|  37 ++
 arch/arm/dts/r8a774a1-u-boot.dtsi |  55 +++
 arch/arm/mach-rmobile/Kconfig.64  |  14 +
 board/hoperun/hihope-rzg2/Kconfig |  15 +
 board/hoperun/hihope-rzg2/MAINTAINERS |   6 +
 board/hoperun/hihope-rzg2/Makefile|   9 +
 board/hoperun/hihope-rzg2/hihope-rzg2.c   |  91 +
 configs/hihope_rzg2_defconfig |  77 
 include/configs/hihope-rzg2.h |  20 +
 15 files changed, 966 insertions(+)
 create mode 100644 arch/arm/dts/hihope-common.dtsi
 create mode 100644 arch/arm/dts/hihope-rev4.dtsi
 create mode 100644 arch/arm/dts/hihope-rzg2-ex.dtsi
 create mode 100644 arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts
 create mode 100644 arch/arm/dts/r8a774a1-hihope-rzg2m-u-boot.dts
 create mode 100644 arch/arm/dts/r8a774a1-hihope-rzg2m.dts
 create mode 100644 arch/arm/dts/r8a774a1-u-boot.dtsi
 create mode 100644 board/hoperun/hihope-rzg2/Kconfig
 create mode 100644 board/hoperun/hihope-rzg2/MAINTAINERS
 create mode 100644 board/hoperun/hihope-rzg2/Makefile
 create mode 100644 board/hoperun/hihope-rzg2/hihope-rzg2.c
 create mode 100644 configs/hihope_rzg2_defconfig
 create mode 100644 include/configs/hihope-rzg2.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5362b73441..ba46785078 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -792,6 +792,7 @@ dtb-$(CONFIG_RCAR_GEN2) += \
 
 dtb-$(CONFIG_RCAR_GEN3) += \
r8a774a1-beacon-rzg2m-kit.dtb \
+   r8a774a1-hihope-rzg2m-u-boot.dtb \
r8a77950-ulcb-u-boot.dtb \
r8a77950-salvator-x-u-boot.dtb \
r8a77960-ulcb-u-boot.dtb \
diff --git a/arch/arm/dts/hihope-common.dtsi b/arch/arm/dts/hihope-common.dtsi
new file mode 100644
index 00..51eb74fbe9
--- /dev/null
+++ b/arch/arm/dts/hihope-common.dtsi
@@ -0,0 +1,377 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the HiHope RZ/G2H Rev.4.0 and
+ * HiHope RZ/G2[MN] Rev.[2.0/3.0/4.0] main board common parts
+ *
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+
+#include 
+
+/ {
+   aliases {
+   serial0 = &scif2;
+   serial1 = &hscif0;
+   };
+
+   chosen {
+   bootargs = "ignore_loglevel";
+   stdout-path = "serial0:115200n8";
+   };
+
+   hdmi0-out {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi0_con: endpoint {
+   remote-endpoint = <&rcar_dw_hdmi0_out>;
+   };
+   };
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   led1 {
+   gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
+   };
+
+   led2 {
+   gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
+   };
+
+   led3 {
+   gpios = <&gpio0  0 GPIO_ACTIVE_HIGH>;
+   };
+
+   led4 {

Re: [PATCH v2 00/30] x86: Allow Coral to boot into Chrome OS

[Simon Glass]

Hi Bin,

On Wed, 21 Oct 2020 at 21:03, Simon Glass  wrote:
>
> This series adds various minor features and tweaks to allow Coral to boot
> into Chrome OS from U-Boot.
>
> It relies on three other series which have been recently sent:
>
>- smbios (u-boot-dm/smbios-working)
>- bootm (u-boot-dm/bootm-working)
>- misca (u-boot-dm/misca-working)
>
> This should provide a solid base for using ACPI on other Intel Apollo Lake
> (APL) devices.
>
> Changes in v2:
> - Rename update_fixed_mtrss() to update_fixed_mtrrs()
> - Add comments to enable_pm_timer_emulation() and cpu_mca_configure()
> - Convert tabs to spaces for consistency
> - Use log_err() to report error
> - Rename struct chromeos_acpi to struct chromeos_acpi_gnvs
> - Fix comment style
> - Define CONFIG_CHROMEOS_VBOOT in the Kconfig too
> - Correct a bisect build error
> - Drop patch "Store the FADT so we can avoid searching for it"
> - Drop patch "Move ROM_TABLE_ADDR into the C file"
>
> Simon Glass (30):
>   Add an assembly guard around linux/bitops.h
>   x86: apl: Add core init for the SoC
>   x86: Add a layout for Chrome OS verified boot
>   x86: Add support for private files
>   x86: Allow writing tables to fail
>   x86: acpi: Store the ACPI context in global_data
>   x86: Don't bother clearing global NVS
>   x86: coral: Drop the duplicate PCIe settings
>   x86: Add SMBIOS info for Coral
>   x86: coral: Correct max98357 file
>   x86: Use if instead of #ifdef in write_tables()
>   x86: Allow putting some tables in the bloblist
>   x86: nhlt: Correct output of bytes and 16-bit data
>   x86: nhlt: Fix a few bugs in the table generation
>   x86: Show the interrupt pointer with 'irqinfo'
>   x86: sound: Correct error handling
>   acpi: Correct reset handling in acpi_device_add_power_res()
>   x86: acpi: Allow the SSDT to be empty
>   x86: acpi: Put the generated code first in DSDT
>   acpi: Don't reset the tables with every new generation
>   x86: Define the Chrome OS GNVS region
>   x86: Use CONFIG_CHROMEOS_VBOOT for verified boot
>   x86: Set up Chrome OS to boot into developer mode
>   x86: Boot coral into Chrome OS by default
>   x86: fsp: Convert fsp_dram to use log_debug()
>   x86: Silence some logging statements
>   x86: acpi: Include the TPMv1 table only if needed
>   x86: acpi: Don't show the UART address by default
>   x86: pinctrl: Silence the warning when a pin is not found
>   x86: fsp: Adjust calculations for MTRR range and DRAM top
>
>  Kconfig   |  17 
>  arch/x86/cpu/apollolake/acpi.c|  25 --
>  arch/x86/cpu/apollolake/cpu.c |  84 +
>  arch/x86/cpu/apollolake/cpu_common.c  |  25 ++
>  arch/x86/cpu/apollolake/cpu_spl.c |  20 -
>  arch/x86/cpu/apollolake/fsp_s.c   |   8 +-
>  arch/x86/cpu/cpu.c|   9 +-
>  arch/x86/cpu/i386/interrupt.c |  14 +--
>  arch/x86/cpu/intel_common/acpi.c  |   1 -
>  arch/x86/cpu/intel_common/cpu.c   |  19 
>  arch/x86/cpu/intel_common/intel_opregion.c|   2 +-
>  arch/x86/cpu/intel_common/itss.c  |   8 +-
>  arch/x86/dts/chromebook_coral.dts |  12 ++-
>  arch/x86/dts/chromebook_samus.dts |   2 +-
>  arch/x86/dts/u-boot.dtsi  |   4 +
>  arch/x86/include/asm/acpi/vbnv_layout.h   |  38 
>  arch/x86/include/asm/arch-apollolake/cpu.h|  14 +++
>  arch/x86/include/asm/cpu_common.h |   9 ++
>  arch/x86/include/asm/intel_gnvs.h |  54 ++-
>  arch/x86/include/asm/interrupt.h  |  17 
>  arch/x86/include/asm/msr-index.h  |  20 -
>  arch/x86/include/asm/tables.h |   4 +-
>  arch/x86/lib/acpi_nhlt.c  |  19 ++--
>  arch/x86/lib/acpi_table.c |  78 ++--
>  arch/x86/lib/fsp/fsp_dram.c   |  35 +---
>  arch/x86/lib/fsp/fsp_graphics.c   |   2 +-
>  arch/x86/lib/fsp2/fsp_dram.c  |   8 +-
>  arch/x86/lib/interrupts.c |   3 +
>  arch/x86/lib/tables.c |  85 +-
>  arch/x86/lib/tpl.c|   2 +-
>  .../max98357-render-2ch-48khz-24b.dat | Bin 0 -> 116 bytes
>  configs/chromebook_coral_defconfig|  13 ++-
>  drivers/core/acpi.c   |  10 ++-
>  drivers/pinctrl/intel/pinctrl.c   |   2 +-
>  drivers/sound/da7219.c|   4 +-
>  drivers/sound/max98357a.c |   2 +-
>  include/acpi/acpi_table.h |  10 +++
>  include/asm-generic/global_data.h |   5 ++
>  include/configs/chromebook_coral.h|   9 +-
>  include/dm/acpi.h |   9 ++
>  include/linux/bitops.h|   4 +-
>  lib/Kconfig   |   9 ++
>  lib

[PATCH v2 2/3] dm: soc: Add SoC id for attribute matching

[Biju Das]

Add SoC identification string for attribute matching.
Also changed the comments from "an SOC" to "an SoC".

Signed-off-by: Biju Das 
Reviewed-by: Lad Prabhakar 
---
v1->v2: Changed the comments from "a SoC" to "an SoC"
 Ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20201030140724.12773-1-biju.das...@bp.renesas.com/
---
 drivers/soc/soc-uclass.c  | 19 ++-
 drivers/soc/soc_sandbox.c |  8 
 include/soc.h | 39 +--
 test/dm/soc.c |  8 
 4 files changed, 67 insertions(+), 7 deletions(-)

diff --git a/drivers/soc/soc-uclass.c b/drivers/soc/soc-uclass.c
index c32d647864..a3f8be841b 100644
--- a/drivers/soc/soc-uclass.c
+++ b/drivers/soc/soc-uclass.c
@@ -46,6 +46,16 @@ int soc_get_revision(struct udevice *dev, char *buf, int 
size)
return ops->get_revision(dev, buf, size);
 }
 
+int soc_get_soc_id(struct udevice *dev, char *buf, int size)
+{
+   struct soc_ops *ops = soc_get_ops(dev);
+
+   if (!ops->get_soc_id)
+   return -ENOSYS;
+
+   return ops->get_soc_id(dev, buf, size);
+}
+
 const struct soc_attr *
 soc_device_match(const struct soc_attr *matches)
 {
@@ -61,7 +71,7 @@ soc_device_match(const struct soc_attr *matches)
 
while (1) {
if (!(matches->machine || matches->family ||
- matches->revision))
+ matches->revision || matches->soc_id))
break;
 
match = true;
@@ -87,6 +97,13 @@ soc_device_match(const struct soc_attr *matches)
}
}
 
+   if (matches->soc_id) {
+   if (!soc_get_soc_id(soc, str, SOC_MAX_STR_SIZE)) {
+   if (strcmp(matches->soc_id, str))
+   match = false;
+   }
+   }
+
if (match)
return matches;
 
diff --git a/drivers/soc/soc_sandbox.c b/drivers/soc/soc_sandbox.c
index 5c82ad84fc..1a81d3562a 100644
--- a/drivers/soc/soc_sandbox.c
+++ b/drivers/soc/soc_sandbox.c
@@ -31,10 +31,18 @@ int soc_sandbox_get_revision(struct udevice *dev, char 
*buf, int size)
return 0;
 }
 
+int soc_sandbox_get_soc_id(struct udevice *dev, char *buf, int size)
+{
+   snprintf(buf, size, "r8a774a1");
+
+   return 0;
+}
+
 static const struct soc_ops soc_sandbox_ops = {
.get_family = soc_sandbox_get_family,
.get_revision = soc_sandbox_get_revision,
.get_machine = soc_sandbox_get_machine,
+   .get_soc_id = soc_sandbox_get_soc_id,
 };
 
 int soc_sandbox_probe(struct udevice *dev)
diff --git a/include/soc.h b/include/soc.h
index a55eb1b572..db0e8880d1 100644
--- a/include/soc.h
+++ b/include/soc.h
@@ -20,18 +20,20 @@
  *variants. Example: am33
  * @machine  - Name of a specific SoC. Example: am3352
  * @revision - Name of a specific SoC revision. Example: SR1.1
+ * @soc_id   - SoC identification string. Example: r8a774a1
  * @data - A pointer to user data for the SoC variant
  */
 struct soc_attr {
const char *family;
const char *machine;
const char *revision;
+   const char *soc_id;
const void *data;
 };
 
 struct soc_ops {
/**
-* get_machine() - Get machine name of an SOC
+* get_machine() - Get machine name of an SoC
 *
 * @dev:Device to check (UCLASS_SOC)
 * @buf:Buffer to place string
@@ -41,7 +43,7 @@ struct soc_ops {
int (*get_machine)(struct udevice *dev, char *buf, int size);
 
/**
-* get_revision() - Get revision name of a SOC
+* get_revision() - Get revision name of an SoC
 *
 * @dev:Device to check (UCLASS_SOC)
 * @buf:Buffer to place string
@@ -51,7 +53,7 @@ struct soc_ops {
int (*get_revision)(struct udevice *dev, char *buf, int size);
 
/**
-* get_family() - Get family name of an SOC
+* get_family() - Get family name of an SoC
 *
 * @dev:Device to check (UCLASS_SOC)
 * @buf:Buffer to place string
@@ -59,6 +61,16 @@ struct soc_ops {
 * @return 0 if OK, -ENOSPC if buffer is too small, other -ve on error
 */
int (*get_family)(struct udevice *dev, char *buf, int size);
+
+   /**
+* get_soc_id() - Get SoC identification name of an SoC
+*
+* @dev:Device to check (UCLASS_SOC)
+* @buf:Buffer to place string
+* @size:   Size of string space
+* @return 0 if OK, -ENOSPC if buffer is too small, other -ve on error
+*/
+   int (*get_soc_id)(struct udevice *dev, char *buf, int size);
 };
 
 #define soc_get_ops(dev)((struct soc_ops *)(dev)->driver->ops)
@@ -76,7 +88,7 @@ struct soc_ops {
 int soc_get(struct udevice **devp);
 
 /**
- * soc_get_machine() - Get machine name of a

[PATCH v2 3/3] dm: soc: SoC identification driver for Renesas SoC's

[Biju Das]

Add SoC identification driver for Renesas SoC's. This allows
to identify the SoC type and revision based on Product Register.

This can be checked where needed using soc_device_match().

Signed-off-by: Biju Das 
Reviewed-by: Lad Prabhakar 
---
v2: New patch
---
 drivers/soc/Kconfig   |   7 ++
 drivers/soc/Makefile  |   1 +
 drivers/soc/soc_renesas.c | 239 ++
 3 files changed, 247 insertions(+)
 create mode 100644 drivers/soc/soc_renesas.c

diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 864d00a885..475e94cd77 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -16,6 +16,13 @@ config SOC_DEVICE_TI_K3
  This allows Texas Instruments Keystone 3 SoCs to identify
  specifics about the SoC in use.
 
+config SOC_DEVICE_RENESAS
+   depends on SOC_DEVICE
+   bool "Enable SoC driver for Renesas SoCs"
+   help
+ This allows Renesas SoCs to identify specifics about the
+ SoC in use.
+
 source "drivers/soc/ti/Kconfig"
 
 endmenu
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 9ef20ca506..b143eac5fd 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -4,5 +4,6 @@
 
 obj-$(CONFIG_SOC_TI) += ti/
 obj-$(CONFIG_SOC_DEVICE) += soc-uclass.o
+obj-$(CONFIG_$(SPL_)SOC_DEVICE_RENESAS) += soc_renesas.o
 obj-$(CONFIG_SOC_DEVICE_TI_K3) += soc_ti_k3.o
 obj-$(CONFIG_SANDBOX) += soc_sandbox.o
diff --git a/drivers/soc/soc_renesas.c b/drivers/soc/soc_renesas.c
new file mode 100644
index 00..4543e0dbfd
--- /dev/null
+++ b/drivers/soc/soc_renesas.c
@@ -0,0 +1,239 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+struct soc_renesas_priv {
+   const char *family;
+   const char *soc_id;
+   char revision[6];
+};
+
+struct renesas_family {
+   const char name[16];
+   u32 reg;/* CCCR or PRR, if not in DT */
+};
+
+static const struct renesas_family fam_rcar_gen3 __maybe_unused = {
+   .name   = "R-Car Gen3",
+   .reg= 0xfff00044,   /* PRR (Product Register) */
+};
+
+static const struct renesas_family fam_rzg2 __maybe_unused = {
+   .name   = "RZ/G2",
+   .reg= 0xfff00044,   /* PRR (Product Register) */
+};
+
+struct renesas_soc {
+   const struct renesas_family *family;
+   u8 id;
+};
+
+#ifdef CONFIG_R8A774A1
+static const struct renesas_soc soc_rz_g2m = {
+   .family = &fam_rzg2,
+   .id = 0x52,
+};
+#endif
+
+#ifdef CONFIG_R8A774B1
+static const struct renesas_soc soc_rz_g2n = {
+   .family = &fam_rzg2,
+   .id = 0x55,
+};
+#endif
+
+#ifdef CONFIG_R8A774C0
+static const struct renesas_soc soc_rz_g2e = {
+   .family = &fam_rzg2,
+   .id = 0x57,
+};
+#endif
+
+#ifdef CONFIG_R8A774E1
+static const struct renesas_soc soc_rz_g2h = {
+   .family = &fam_rzg2,
+   .id = 0x4f,
+};
+#endif
+
+#ifdef CONFIG_R8A7795
+static const struct renesas_soc soc_rcar_h3 = {
+   .family = &fam_rcar_gen3,
+   .id = 0x4f,
+};
+#endif
+
+#ifdef CONFIG_R8A7796
+static const struct renesas_soc soc_rcar_m3_w = {
+   .family = &fam_rcar_gen3,
+   .id = 0x52,
+};
+#endif
+
+#ifdef CONFIG_R8A77965
+static const struct renesas_soc soc_rcar_m3_n = {
+   .family = &fam_rcar_gen3,
+   .id = 0x55,
+};
+#endif
+
+#ifdef CONFIG_R8A77970
+static const struct renesas_soc soc_rcar_v3m = {
+   .family = &fam_rcar_gen3,
+   .id = 0x54,
+};
+#endif
+
+#ifdef CONFIG_R8A77980
+static const struct renesas_soc soc_rcar_v3h = {
+   .family = &fam_rcar_gen3,
+   .id = 0x56,
+};
+#endif
+
+#ifdef CONFIG_R8A77990
+static const struct renesas_soc soc_rcar_e3 = {
+   .family = &fam_rcar_gen3,
+   .id = 0x57,
+};
+#endif
+
+#ifdef CONFIG_R8A77995
+static const struct renesas_soc soc_rcar_d3 = {
+   .family = &fam_rcar_gen3,
+   .id = 0x58,
+};
+#endif
+
+static int soc_renesas_get_family(struct udevice *dev, char *buf, int size)
+{
+   struct soc_renesas_priv *priv = dev_get_priv(dev);
+
+   snprintf(buf, size, "%s", priv->family);
+
+   return 0;
+}
+
+static int soc_renesas_get_revision(struct udevice *dev, char *buf, int size)
+{
+   struct soc_renesas_priv *priv = dev_get_priv(dev);
+
+   snprintf(buf, size, "%s", priv->revision);
+
+   return 0;
+}
+
+static int soc_renesas_get_soc_id(struct udevice *dev, char *buf, int size)
+{
+   struct soc_renesas_priv *priv = dev_get_priv(dev);
+
+   snprintf(buf, size, "%s", priv->soc_id);
+
+   return 0;
+}
+
+static const struct udevice_id renesas_socs[] = {
+#ifdef CONFIG_R8A774A1
+   { .compatible = "renesas,r8a774a1", .data = (ulong)&soc_rz_g2m, },
+#endif
+#ifdef CONFIG_R8A774B1
+   { .compatible = "renesas,r8a774b1", .data = (ulong)&soc_rz_g2n, },
+#endif
+#ifdef CONFIG_R8A774C0
+   { .compatible = "renesas,r8a77

[PATCH v2 0/3] Add Renesas SoC identification driver support

[Biju Das]

This patch series aims to support Renesas SoC identification driver.

Added a helper function of_match_node to find the matching of_match
structure. This helper function can be used to replace the following
code in u-boot [1] and [2]
[1] 
https://elixir.bootlin.com/u-boot/latest/source/drivers/serial/serial_uniphier.c#L129
[2] 
https://elixir.bootlin.com/u-boot/latest/source/drivers/usb/phy/rockchip_usb2_phy.c#L77

Also added soc_id attribute support in UCLASS_SOC which is required for Renesas 
SoC
identification driver similar to mainline linux.

Biju Das (3):
  dm: core: Add of_match_node helper function
  dm: soc: Add SoC id for attribute matching
  dm: soc: SoC identification driver for Renesas SoC's

 drivers/core/device.c |  21 
 drivers/soc/Kconfig   |   7 ++
 drivers/soc/Makefile  |   1 +
 drivers/soc/soc-uclass.c  |  19 ++-
 drivers/soc/soc_renesas.c | 239 ++
 drivers/soc/soc_sandbox.c |   8 ++
 include/dm/device.h   |  13 +++
 include/soc.h |  39 ++-
 test/dm/soc.c |   8 ++
 9 files changed, 348 insertions(+), 7 deletions(-)
 create mode 100644 drivers/soc/soc_renesas.c

-- 
2.17.1

[PATCH v2 1/3] dm: core: Add of_match_node helper function

[Biju Das]

Add of_match_node() helper function to iterate over the device tree
and tell if a device_node has a matching of_match structure.

Signed-off-by: Biju Das 
Reviewed-by: Lad Prabhakar 
---
v1->v2:
  * No Change. 
  Ref: 
https://patchwork.ozlabs.org/project/uboot/patch/20201030140303.11773-1-biju.das...@bp.renesas.com/
---
 drivers/core/device.c | 21 +
 include/dm/device.h   | 13 +
 2 files changed, 34 insertions(+)

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 4b3dcb3b37..348d63dc59 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -1010,6 +1010,27 @@ bool of_machine_is_compatible(const char *compat)
return !fdt_node_check_compatible(fdt, 0, compat);
 }
 
+static
+const struct udevice_id *__of_match_node(const struct udevice_id *matches,
+const ofnode node)
+{
+   if (!matches)
+   return NULL;
+
+   for (; matches && matches->compatible; matches++) {
+   if (ofnode_device_is_compatible(node, matches->compatible))
+   return matches;
+   }
+
+   return NULL;
+}
+
+const struct udevice_id *of_match_node(const struct udevice_id *matches,
+  const ofnode node)
+{
+   return __of_match_node(matches, node);
+}
+
 int dev_disable_by_path(const char *path)
 {
struct uclass *uc;
diff --git a/include/dm/device.h b/include/dm/device.h
index 5bef484247..4c357d46ec 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -754,6 +754,19 @@ bool device_is_compatible(const struct udevice *dev, const 
char *compat);
  */
 bool of_machine_is_compatible(const char *compat);
 
+/**
+ * of_match_node() - Tell if a device_node has a matching of_match structure
+ *
+ *
+ * Low level utility function used by device matching.
+ *
+ * @matches:   array of of device match structures to search in
+ * @node:  the of device structure to match against
+ * @return matching structure on success, NULL if the match is not found
+ */
+const struct udevice_id *of_match_node(const struct udevice_id *matches,
+  const ofnode node);
+
 /**
  * dev_disable_by_path() - Disable a device given its device tree path
  *
-- 
2.17.1

[PULL] u-boot-atmel-fixes-2021.01-a

[Eugen.Hristev]

Hello Tom,

Please pull tag u-boot-atmel-fixes-2021.01-a , the first set of atmel 
fixes for 2021.01 cycle.

This specific feature set includes the patches for DT required to fix 
the warnings for newer DTC version (1.6.0+), i2c and spi bus unit address.

Thanks !

Eugen


The following changes since commit 81a659e10a10020cfb03abd4794103194add1f3a:

   Prepare v2021.01-rc1 (2020-10-28 16:30:06 -0400)

are available in the Git repository at:

   https://gitlab.denx.de/u-boot/custodians/u-boot-atmel.git 
tags/u-boot-atmel-fixes-2021.01-a

for you to fetch changes up to ef8f34aea56465e1584ab60b6ae3f3340aab55de:

   ARM: dts: at91: sama5d3xmb_cmp: fix SPI bus unit address (2020-11-02 
08:58:38 +0200)


First set of u-boot-atmel fixes for 2021.01 cycle


Eugen Hristev (9):
   ARM: dts: at91: vinco: fix I2C warning bus unit address
   ARM: dts: at91: at91sam9261ek: fix SPI unit address warning
   ARM: dts: at91: at91sam9g20-taurus: fix SPI bus unit address
   ARM: dts: at91: at91sam9g20ek_common: fix SPI bus unit address
   ARM: dts: at91: at91sam9g25ek: fix I2C bus unit address
   ARM: dts: at91: gurnard: fix SPI bus unit address
   ARM: dts: at91: sama5d3xmb: fix I2C bus unit address
   ARM: dts: at91: sam9260ek: fix SPI bus unit address
   ARM: dts: at91: sama5d3xmb_cmp: fix SPI bus unit address

  arch/arm/dts/at91-vinco.dts| 2 +-
  arch/arm/dts/at91sam9260ek.dts | 2 +-
  arch/arm/dts/at91sam9261ek.dts | 2 +-
  arch/arm/dts/at91sam9g20-taurus.dts| 2 +-
  arch/arm/dts/at91sam9g20ek_common.dtsi | 2 +-
  arch/arm/dts/at91sam9g25ek.dts | 2 +-
  arch/arm/dts/at91sam9g45-gurnard.dts   | 2 +-
  arch/arm/dts/sama5d3xmb.dtsi   | 2 +-
  arch/arm/dts/sama5d3xmb_cmp.dtsi   | 2 +-
  9 files changed, 9 insertions(+), 9 deletions(-)

Re: [PATCH] Makefile: Fix u-boot-nodtb.bin target

[Pali Rohár]

On Monday 02 November 2020 13:25:56 Patrick DELAUNAY wrote:
> Hi Tom and Pali,
> 
> > From: U-Boot  On Behalf Of Tom Rini
> > Sent: samedi 24 octobre 2020 16:52
> > 
> > On Wed, Oct 07, 2020 at 03:39:40PM +0200, Pali Rohár wrote:
> > 
> > > This change fixes two issues when building u-boot-nodtb.bin target:
> > >
> > > * Remove intermediate binary u-boot-nodtb.bin from disk when static_rela
> > >   call (which modifies u-boot-nodtb.bin binary) failed. It is required
> > >   because previous objcopy call creates binary and static_rela finish it.
> > >
> > > * Do not call static_rela cmd when u-boot-nodtb.bin binary was not
> > >   created/updated by previous objcopy call.
> > >
> > > Second fix would ensure that u-boot-nodtb.bin binary is not updated
> > > when all prerequisites were up-to-date. And therefore final binary
> > > u-boot.bin is not updated in case all prerequisites were not modified
> > > and were up-to-date.
> > >
> > > Now running 'make SOURCE_DATE_EPOCH=0 u-boot.bin' second time now
> > does
> > > not touch u-boot.bin binary in case nothing was modified, so GNU make
> > > can correctly detect that everything is up-to-date.
> > >
> > > Signed-off-by: Pali Rohár 
> > > Reviewed-by: Simon Glass 
> > 
> > Applied to u-boot/master, thanks!
> 
> Since this patch is applyied on master branch, I have error when I compile 
> with the verbose option V=1.
> 
> I don't found a correction for this issue until now... except revert this 
> commit.
> 
> For information: I use stm32mp1 platform = ARMv7 32bits
> I have the error:
> 
> scripts/Kbuild.include:220: *** Recursive variable 'echo-cmd' references 
> itself (eventually).  Stop.
> make[1]: *** Waiting for unfinished jobs
> make -f /local/home/frq07632/views/u-boot/scripts/Makefile.build 
> obj=arch/arm/dts dtbs

Hello Patrick!

Now I was able to trigger this issue, but it seems to be present only
sometimes. Calling make more times hides that issue, so it looks like
something broken in Kconfig dependency generator for Makefiles... Or
maybe something dependent on GNU make...

I played a bit with it and after changing following line in that patch

shell_cmd = { $(echo-cmd) $(cmd_$(1)); }

by

shell_cmd = { $(call echo-cmd,$(1)) $(cmd_$(1)); }

that issue disappeared. But because it triggered on my machine only
sometimes, I do not know if it finally fixes it.

Could you please try this change? And do you have reproducer how to
_always_ trigger it and not only sometimes?

> 
>  
> > --
> > Tom
> 
> Regards
> Patrick

Linking Error on env_get("loadaddr")

[Oliver Graute]

Hello list,

I try to use env_get("loadaddr") for a board specific CMD and included
env.h. But I get the following linking error in nvedit.c. Some clue what
I miss here? I still use v2020.07.

start=$(aarch64-linux-gnu-nm u-boot | grep __rel_dyn_start | cut -f 1 -d ' '); 
end=$(aarch64-linux-gnu-nm u-boot | grep __rel_dyn_end | cut -f 1 -d ' '); 
tools/relocate-rela u-boot-nodtb.bin 0x8002 $start $end
  CC  spl/arch/arm/cpu/armv8/fwcall.o
  LD  spl/arch/arm/cpu/armv8/built-in.o
  CC  spl/common/spl/spl.o
  LD  spl/common/spl/built-in.o
  CC  spl/lib/display_options.o
  LD  spl/lib/built-in.o
  LD  spl/u-boot-spl
cmd/built-in.o: In function `env_match':
/home/graute/u-boot-test/cmd/nvedit.c:804: undefined reference to `env_get_char'
/home/graute/u-boot-test/cmd/nvedit.c:808: undefined reference to `env_get_char'
cmd/built-in.o: In function `env_get_f':
/home/graute/u-boot-test/cmd/nvedit.c:713: undefined reference to `env_get_char'
/home/graute/u-boot-test/cmd/nvedit.c:716: undefined reference to `env_get_char'
/home/graute/u-boot-test/cmd/nvedit.c:729: undefined reference to `env_get_char'
cmd/built-in.o: In function `env_get':
/home/graute/u-boot-test/cmd/nvedit.c:677: undefined reference to `env_htab'
/home/graute/u-boot-test/cmd/nvedit.c:677: undefined reference to `env_htab'
lib/built-in.o: In function `hsearch_r':
/home/graute/u-boot-test/lib/hashtable.c:402: undefined reference to 
`env_flags_init'
scripts/Makefile.spl:422: recipe for target 'spl/u-boot-spl' failed
make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1926: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2


Best Regards,

Oliver

RE: [PATCH] Makefile: Fix u-boot-nodtb.bin target

[Patrick DELAUNAY]

Hi Tom and Pali,

> From: U-Boot  On Behalf Of Tom Rini
> Sent: samedi 24 octobre 2020 16:52
> 
> On Wed, Oct 07, 2020 at 03:39:40PM +0200, Pali Rohár wrote:
> 
> > This change fixes two issues when building u-boot-nodtb.bin target:
> >
> > * Remove intermediate binary u-boot-nodtb.bin from disk when static_rela
> >   call (which modifies u-boot-nodtb.bin binary) failed. It is required
> >   because previous objcopy call creates binary and static_rela finish it.
> >
> > * Do not call static_rela cmd when u-boot-nodtb.bin binary was not
> >   created/updated by previous objcopy call.
> >
> > Second fix would ensure that u-boot-nodtb.bin binary is not updated
> > when all prerequisites were up-to-date. And therefore final binary
> > u-boot.bin is not updated in case all prerequisites were not modified
> > and were up-to-date.
> >
> > Now running 'make SOURCE_DATE_EPOCH=0 u-boot.bin' second time now
> does
> > not touch u-boot.bin binary in case nothing was modified, so GNU make
> > can correctly detect that everything is up-to-date.
> >
> > Signed-off-by: Pali Rohár 
> > Reviewed-by: Simon Glass 
> 
> Applied to u-boot/master, thanks!

Since this patch is applyied on master branch, I have error when I compile with 
the verbose option V=1.

I don't found a correction for this issue until now... except revert this 
commit.

For information: I use stm32mp1 platform = ARMv7 32bits
I have the error:

scripts/Kbuild.include:220: *** Recursive variable 'echo-cmd' references itself 
(eventually).  Stop.
make[1]: *** Waiting for unfinished jobs
make -f /local/home/frq07632/views/u-boot/scripts/Makefile.build 
obj=arch/arm/dts dtbs

 
> --
> Tom

Regards
Patrick

Re: [PATCH] env: env_sf: don't set .init op if not needed

[Wolfgang Denk]

Dear Heiko,

In message  you wrote:
>
> I enabled now ENV_APPEND on this board and
>
> CONFIG_ENV_IS_NOWHERE
> CONFIG_ENV_IS_IN_SPI_FLASH

This gives me the creeps.  I know this is not cause by anything in
your patch, but anyway...

Apparently the meaning of CONFIG_ENV_IS_NOWHERE is nowhere
documented :-(

But common sense says that "IS NOWHERE" means that there is no
storage defined for the environment.  I would expect, that Kconfig
does not even allow to enable any CONFIG_ENV_IS_IN_* when
CONFIG_ENV_IS_NOWHERE is selected - these are logically exclusive.

May I suggest that:

1) our Kconfig files are changed such that CONFIG_ENV_IS_NOWHERE and
   CONFIG_ENV_IS_IN_* are indeed exclusive, so that we adhere to the
   POLA [1] ?

2) for cases like this one, where there actually _is_ some storage
   defined, but it shall be used in a non-standard way, a new
   CONFIG_ option gets created that expresses in it's name what it
   does?

[1] https://en.wikipedia.org/wiki/Principle_of_least_astonishment

Thanks!

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
You can fool some of the people all of the time, and You can fool all
of the people some of the time, but You can't fool mom.

Re: [scan-ad...@coverity.com: New Defects reported by Coverity Scan for Das U-Boot]

[Pratyush Yadav]

[Copy-pasting my reply to the off-list thread].

Hi,

On 30/10/20 10:45AM, Tom Rini wrote:
> Hey all,
> 
> Here's the latest report from Coverity on new issues.  Please take a
> look and let me know if any of these are false positives or things
> that we should try and adopt a Coverity model to cover.  Thanks!
> 
> -- Forwarded message -
> From: 
> Date: Wed, Oct 28, 2020 at 4:41 PM
> Subject: New Defects reported by Coverity Scan for Das U-Boot
> To: 
> 
> 
> Hi,
> 
> Please find the latest report on new defect(s) introduced to Das
> U-Boot found with Coverity Scan.
> 
> 37 new defect(s) introduced to Das U-Boot found with Coverity Scan.
> 5 defect(s), reported by Coverity Scan earlier, were marked fixed in
> the recent build analyzed by Coverity Scan.
> 
> New defect(s) Reported-by: Coverity Scan
> Showing 20 of 37 defect(s)
> 
> 
> ** CID 312960:  Integer handling issues  (BAD_SHIFT)
> /drivers/mux/mmio.c: 107 in mmio_mux_probe()
> 
> 
> 
> *** CID 312960:  Integer handling issues  (BAD_SHIFT)
> /drivers/mux/mmio.c: 107 in mmio_mux_probe()
> 101 mask = mux_reg_masks[2 * i + 1];
> 102
> 103 field.reg = reg;
> 104 field.msb = fls(mask) - 1;
> 105 field.lsb = ffs(mask) - 1;
> 106
> >>> CID 312960:  Integer handling issues  (BAD_SHIFT)
> >>> In expression "0xUL << field.lsb", left shifting by 
> >>> more than 63 bits has undefined behavior.  The shift amount, "field.lsb", 
> >>> is 4294967295.
> 107 if (mask != GENMASK(field.msb, field.lsb))
> 108 return log_msg_ret("invalid mask", -EINVAL);

Sounds like a legitimate complaint. If the mask is 0 then fls and ffs 
will return 0, and so msb and lsb will be 0x each. This will 
result in GENMASK() doing ~0UL << 0x. Of course, a mask of 0 is 
invalid but then this condition is supposed to check for invalid masks 
so that just defeats the purpose.

This code seems to check if a mask is all 1s or not. So it will catch a 
mask like 0b11101. But it will trip up on a mask like 0. My suggestion 
is to make the check something like:

if (ffs(mask) == 0 || mask != GENMASK(field.msb, field.lsb))

> 109
> 110 fields[i] = devm_regmap_field_alloc(dev, regmap, 
> field);
> 111 if (IS_ERR(fields[i])) {
> 112 ret = PTR_ERR(fields[i]);
> 
> ** CID 312959:(RESOURCE_LEAK)
> /drivers/mux/mmio.c: 113 in mmio_mux_probe()
> /drivers/mux/mmio.c: 108 in mmio_mux_probe()
> 
> 
> 
> *** CID 312959:(RESOURCE_LEAK)
> /drivers/mux/mmio.c: 113 in mmio_mux_probe()
> 107 if (mask != GENMASK(field.msb, field.lsb))
> 108 return log_msg_ret("invalid mask", -EINVAL);
> 109
> 110 fields[i] = devm_regmap_field_alloc(dev, regmap, 
> field);
> 111 if (IS_ERR(fields[i])) {
> 112 ret = PTR_ERR(fields[i]);
> >>> CID 312959:(RESOURCE_LEAK)
> >>> Variable "idle_states" going out of scope leaks the storage it points 
> >>> to.

Hmm... Not sure if this is actually a leak. idle_states is allocated 
using devm_kmalloc(), so if the probe fails the device should be 
destroyed, and idle_states with it. I'm not very well versed with 
managed APIs so maybe this is wrong. Dunno.

Anyway, idle_states is local to this function so I don't know if 
devm_kmalloc() is even needed. We might as well use regular kmalloc() 
because we free it at the end of probe anyway.

Any advice on this?

> 113 return log_msg_ret("regmap_field_alloc", ret);
> 114 }
> 115
> 116 bits = 1 + field.msb - field.lsb;
> 117 mux->states = 1 << bits;
> 118
> /drivers/mux/mmio.c: 108 in mmio_mux_probe()
> 102
> 103 field.reg = reg;
> 104 field.msb = fls(mask) - 1;
> 105 field.lsb = ffs(mask) - 1;
> 106
> 107 if (mask != GENMASK(field.msb, field.lsb))
> >>> CID 312959:(RESOURCE_LEAK)
> >>> Variable "idle_states" going out of scope leaks the storage it points 
> >>> to.

Same as above.

> 108 return log_msg_ret("invalid mask", -EINVAL);
> 109
> 110 fields[i] = devm_regmap_field_alloc(dev, regmap, 
> field);
> 111 if (IS_ERR(fields[i])) {
> 112 ret = PTR_ERR(fields[i]);
> 113 return log_msg_ret("regmap_field_alloc", ret);
> 
> 
> *** CID 312954:(DC.WEAK_CRYPTO)

FIT required certificate check issue SOLUTION

[Muthmann, Thomas]

Hi again,

for reference this is my solution for the Problem below:

1. Do NOT use CONFIG_MULTI_DTB_FIT if using cipher or signature
In this case all DTBs are added in FIT Image.
All DTBs are added before u-boot.dtb, so you have at least two entries.
U-Boot does not search this list for cipher and signature, it uses the first 
entry ONLY.
In the U-Boot Hexdump you find the cipher and signature entries, but they are 
in the SECOND DTB and not found.

2. Do NOT add '-1' or '#1' in cipher or signature
U-Boot only looks for 'cipher' and 'signature'
I did not realize this problem, because the Host Tools fit_check_sign accepts 
'cipher-1' and 'signature-1', but U-Boot NOT.

If you have any of the above problems, U-Boot silently ignores the cipher and 
signature entries.

--

Hi everyone, new User here.

First let me explain how we are using U-Boot:
NXP MX6 Hardware, load FIT Image with Kernel, DTB, RamFS as one FIT-Image from 
MMC, bootm To secure the FIT we are hashing all 3 Parts using sha256 und 
signing the Config with our Certificate.
In short we are following this process:

1.   Generate Cert, name it "required-company-cert" here

2.   Attach this Cert to dts/dt.dtb of U-Boot using mkimage -k 
 -K dts/dt.dtb -r

3.   make U-Boot to attach the Cert with it, store it at a secure place and 
put it on several devices
In 2. you can see that I used -r to store this cert as required.
Using "fdtget u-boot.dtb /signature/required-company-cert required" I get 
"conf".
So the Cert is attached to U-Boot and is marked as required for configurations.
(To be sure, I used a hex editor to find the cert and the required in the final 
U-Boot image)

It is planned to never change U-Boot and FIT Updates are done using a dual 
image system (bootcount, altbootcmd) We create FIT images "test.itb" with 
Kernel, DTB, RamFS. 3 images using sha256, one configuration using above 
certificate.

For the following test I used the u-boot git master from today, using "make 
sandbox_defconfig".
The FIT Images are checked using "tools/fit_check_sign -f  -k u-boot.dtb"

1.   Using the correct Cert I get:

Verifying Hash Integrity for node 'conf-1'... 
sha256,rsa4096:required-company-cert+

Verified OK, loading images

Signature check OK

2.   Using no Cert I get:

Verifying Hash Integrity for node 'conf-1'...  error!

for '(null)' hash node in 'conf-1' config node

Failed to verify required signature 'key-rtu-fit-sign'

3.   Using the wrong Cert "tamper" I get:
Verifying Hash Integrity for node 'conf-1'... sha256,rsa4096:tamper- error!
Verification failed for '(null)' hash node in 'conf-1' config node Failed to 
verify required signature 'required-company-cert'

So fit_check_sign acts correctly by finding the cert 'required-company-cert' as 
required in u-boot.dtb

If I load any of these FIT Images in U-Boot only the sha256 hashes are checked, 
and nobody cares about the Certificate.
(using iminfo here and bootm on our ARM Hardware) I can load any FIT Image with 
wrong Certs, or any Cert at all!

On analyzing the Problem in the Source Code I saw that U-Boot does not check 
Certs if it finds no "required" entry.
In common/image-fit-sig.c, method "fit_config_verify_required_sigs" the 
"required" node is searched.
As far as I can tell any FDT operation is done on the loaded FIT, I saw no 
access of the u-boot.dtb included in u-boot.

This makes no sense to me, as the u-boot.dtb included in u-boot must have the 
final word which Cert is to be used and required.
Any information in the FIT must be regarded as possible tampered from a 3rd 
party.

Regards,
Thomas

[PATCH 1/1] riscv: enable SATA disk on qemu-riscv64_defconfig

[Heinrich Schuchardt]

Allow attaching a virtual SATA disk to qemu-riscv64_defconfig.

Signed-off-by: Heinrich Schuchardt 
---
 configs/qemu-riscv64_defconfig | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig
index daf5d655d0..a1426a9506 100644
--- a/configs/qemu-riscv64_defconfig
+++ b/configs/qemu-riscv64_defconfig
@@ -1,15 +1,21 @@
 CONFIG_RISCV=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_SIZE=0x2
+CONFIG_AHCI=y
 CONFIG_TARGET_QEMU_VIRT=y
 CONFIG_ARCH_RV64I=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_PCI_INIT_R=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_NVEDIT_EFI=y
 # CONFIG_CMD_MII is not set
 CONFIG_OF_PRIOR_STAGE=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SCSI_AHCI=y
+CONFIG_AHCI_PCI=y
 CONFIG_DM_MTD=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
--
2.28.0

[PATCH] mmc: fsl_esdhc_imx: add wait_dat0() support

[haibo . chen]

From: Haibo Chen 

Add wait_dat0() support, upper layer will use this callback.

Signed-off-by: Haibo Chen 
---
 drivers/mmc/fsl_esdhc_imx.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 22040c67a8..dc6a6006fa 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1646,6 +1646,28 @@ static int fsl_esdhc_set_enhanced_strobe(struct udevice 
*dev)
 }
 #endif
 
+static int fsl_esdhc_wait_dat0(struct udevice *dev, int state,
+   int timeout_us)
+{
+   int ret = -ETIMEDOUT;
+   bool dat0_high;
+   bool target_dat0_high = !!state;
+   struct fsl_esdhc_priv *priv = dev_get_priv(dev);
+   struct fsl_esdhc *regs = priv->esdhc_regs;
+
+   timeout_us = DIV_ROUND_UP(timeout_us, 10); /* check every 10 us. */
+   while (timeout_us--) {
+   dat0_high = !!(esdhc_read32(®s->prsstat) & PRSSTAT_DAT0);
+   if (dat0_high == target_dat0_high) {
+   ret = 0;
+   break;
+   }
+   udelay(10);
+   }
+
+   return ret;
+}
+
 static const struct dm_mmc_ops fsl_esdhc_ops = {
.get_cd = fsl_esdhc_get_cd,
.send_cmd   = fsl_esdhc_send_cmd,
@@ -1656,6 +1678,7 @@ static const struct dm_mmc_ops fsl_esdhc_ops = {
 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
.set_enhanced_strobe = fsl_esdhc_set_enhanced_strobe,
 #endif
+   .wait_dat0 = fsl_esdhc_wait_dat0,
 };
 #endif
 
-- 
2.17.1

Re: [PATCH v2 0/9] ARM: dts: at91: DTC 1.6.0+ warning fixes

[Eugen.Hristev]

On 26.10.2020 10:39, Eugen Hristev wrote:
> This series fixes warnings when moving to DTC 1.6.0+.
> 
> Anyone who still has these boards and is willing to test them, it's 
> appreciated.
> 
> I do not have any of the boards listed here at the moment.
> 
> Thanks !
> 
> Eugen
> 
> In v2, added 2 more patches, 8/9 and 9/9
> 
> Thanks
> 
> Eugen Hristev (9):
>ARM: dts: at91: vinco: fix I2C warning bus unit address
>ARM: dts: at91: at91sam9261ek: fix SPI unit address warning
>ARM: dts: at91: at91sam9g20-taurus: fix SPI bus unit address
>ARM: dts: at91: at91sam9g20ek_common: fix SPI bus unit address
>ARM: dts: at91: at91sam9g25ek: fix I2C bus unit address
>ARM: dts: at91: gurnard: fix SPI bus unit address
>ARM: dts: at91: sama5d3xmb: fix I2C bus unit address
>ARM: dts: at91: sam9260ek: fix SPI bus unit address
>ARM: dts: at91: sama5d3xmb_cmp: fix SPI bus unit address
> 
>   arch/arm/dts/at91-vinco.dts| 2 +-
>   arch/arm/dts/at91sam9260ek.dts | 2 +-
>   arch/arm/dts/at91sam9261ek.dts | 2 +-
>   arch/arm/dts/at91sam9g20-taurus.dts| 2 +-
>   arch/arm/dts/at91sam9g20ek_common.dtsi | 2 +-
>   arch/arm/dts/at91sam9g25ek.dts | 2 +-
>   arch/arm/dts/at91sam9g45-gurnard.dts   | 2 +-
>   arch/arm/dts/sama5d3xmb.dtsi   | 2 +-
>   arch/arm/dts/sama5d3xmb_cmp.dtsi   | 2 +-
>   9 files changed, 9 insertions(+), 9 deletions(-)
> 


Applied to u-boot-atmel/master

Re: [RFC PATCH] dfu: add DFU_SKIP layout concept

[Lukasz Majewski]

Hi Jaehoon,

> Add DFU_SKIP layout cencept.
> If layout is "skip", it will be skipped after nothing to do.
> It's useful to support multiple board with one tar file.
> 
> Signed-off-by: Jaehoon Chung 
> ---
>  drivers/dfu/dfu.c | 2 +-
>  drivers/dfu/dfu_mmc.c | 9 +
>  include/dfu.h | 1 +
>  3 files changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
> index a298c2c43999..f679f1fa5fe5 100644
> --- a/drivers/dfu/dfu.c
> +++ b/drivers/dfu/dfu.c
> @@ -614,7 +614,7 @@ const char *dfu_get_dev_type(enum dfu_device_type
> t) const char *dfu_get_layout(enum dfu_layout l)
>  {
>   const char *const dfu_layout[] = {NULL, "RAW_ADDR", "FAT",
> "EXT2",
> -   "EXT3", "EXT4", "RAM_ADDR"
> };
> +   "EXT3", "EXT4",
> "RAM_ADDR", "SKIP" }; return dfu_layout[l];
>  }
>  
> diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
> index 691d01c7ebdf..c7c324b0a986 100644
> --- a/drivers/dfu/dfu_mmc.c
> +++ b/drivers/dfu/dfu_mmc.c
> @@ -108,6 +108,8 @@ static int mmc_file_op(enum dfu_op op, struct
> dfu_entity *dfu, case DFU_FS_EXT4:
>   fstype = FS_TYPE_EXT;
>   break;
> + case DFU_SKIP:
> + return 0;
>   default:
>   printf("%s: Layout (%s) not (yet) supported!\n",
> __func__, dfu_get_layout(dfu->layout));
> @@ -204,6 +206,9 @@ int dfu_write_medium_mmc(struct dfu_entity *dfu,
>   case DFU_FS_EXT4:
>   ret = mmc_file_buf_write(dfu, offset, buf, len);
>   break;
> + case DFU_SKIP:
> + ret = 0;
> + break;
>   default:
>   printf("%s: Layout (%s) not (yet) supported!\n",
> __func__, dfu_get_layout(dfu->layout));
> @@ -238,6 +243,8 @@ int dfu_get_medium_size_mmc(struct dfu_entity
> *dfu, u64 *size) if (ret < 0)
>   return ret;
>   return 0;
> + case DFU_SKIP:
> + return 0;
>   default:
>   printf("%s: Layout (%s) not (yet) supported!\n",
> __func__, dfu_get_layout(dfu->layout));
> @@ -399,6 +406,8 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu,
> char *devstr, char *s) dfu->layout = DFU_FS_FAT;
>   } else if (!strcmp(entity_type, "ext4")) {
>   dfu->layout = DFU_FS_EXT4;
> + } else if (!strcmp(entity_type, "skip")) {
> + dfu->layout = DFU_SKIP;
>   } else {
>   pr_err("Memory layout (%s) not supported!\n",
> entity_type); return -ENODEV;
> diff --git a/include/dfu.h b/include/dfu.h
> index 84abdc79acd1..2e8276c69c9f 100644
> --- a/include/dfu.h
> +++ b/include/dfu.h
> @@ -33,6 +33,7 @@ enum dfu_layout {
>   DFU_FS_EXT3,
>   DFU_FS_EXT4,
>   DFU_RAM_ADDR,
> + DFU_SKIP,
>  };
>  
>  enum dfu_op {

Fine for me. Please add a verbose description to doc/DFU.readme with
some examples (i.e. which target board and how you plan to use this
feature).


Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de


pgppB3vS9fi6L.pgp
Description: OpenPGP digital signature

Re: [PATCH] binman: Fix typo in kernel-doc format for binman_symname()

[Michal Simek]

Hi Simon,

út 1. 9. 2020 v 17:34 odesílatel Simon Glass  napsal:
>
> On Wed, 26 Aug 2020 at 07:34, Michal Simek  wrote:
> >
> > Fix typo.
> >
> > Fixes: 19790632648b ("binman: Support accessing binman tables at run time")
> > Signed-off-by: Michal Simek 
> > ---
> >
> >  include/binman_sym.h | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
>
> Reviewed-by: Simon Glass 
>
> Applied to u-boot-dm, thanks!

Where did you apply this patch?

I can't see it in your master or testing branch.

Also I miss my
"binman: Call helper function binman_set_rom_offset() to fill offset"

Can you please check them?

Thanks,
Michal





--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

Re: [PATCH v2 2/2] coreboot: make use of smbios parser

[Christian Gmeiner]

ping

Am Mi., 7. Okt. 2020 um 14:33 Uhr schrieb Christian Gmeiner
:
>
> If u-boot gets used as coreboot payload it might be nice to get
> vendor, model and bios version from smbios. I am not sure about
> the output of all the read information.
>
> With qemu target for coreboot this could look this:
>
> CBFS: Found @ offset 14f40 size 3b188
> Checking segment from ROM address 0xffc15178
> Checking segment from ROM address 0xffc15194
> Loading segment from ROM address 0xffc15178
>   code (compression=1)
>   New segment dstaddr 0x0111 memsize 0x889ef srcaddr 0xffc151b0 filesize 
> 0x3b150
> Loading Segment: addr: 0x0111 memsz: 0x000889ef filesz: 
> 0x0003b150
> using LZMA
> Loading segment from ROM address 0xffc15194
>   Entry Point 0x0111
> BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms
> Jumping to boot code at 0x0111(0x07fa7000)
>
> U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200)
>
> CPU: x86_64, vendor AMD, device 663h
> DRAM:  127.1 MiB
> MMC:
> Video: No video mode configured in coreboot!
> Video: No video mode configured in coreboot!
> Vendor: QEMU
> Model: Standard PC (i440FX + PIIX, 1996)
> Bios Version: 4.12-3152-g326a499f6f-dirty
> Net:   e1000: 52:54:00:12:34:56
>eth0: e1000#0
> No working controllers found
> Finalizing coreboot
> Hit any key to stop autoboot:  0
>
> Signed-off-by: Christian Gmeiner 
> ---
>  board/coreboot/coreboot/coreboot.c | 45 ++
>  configs/coreboot_defconfig |  1 +
>  2 files changed, 46 insertions(+)
>
> diff --git a/board/coreboot/coreboot/coreboot.c 
> b/board/coreboot/coreboot/coreboot.c
> index b791b82ef4..afb457212a 100644
> --- a/board/coreboot/coreboot/coreboot.c
> +++ b/board/coreboot/coreboot/coreboot.c
> @@ -4,7 +4,9 @@
>   */
>
>  #include 
> +#include 
>  #include 
> +#include 
>
>  int board_early_init_r(void)
>  {
> @@ -16,3 +18,46 @@ int board_early_init_r(void)
>
> return 0;
>  }
> +
> +#ifdef CONFIG_SMBIOS_PARSER
> +int show_board_info(void)
> +{
> +   const struct smbios_entry *smbios = 
> smbios_entry(lib_sysinfo.smbios_start, lib_sysinfo.smbios_size);
> +
> +   if (!smbios)
> +   goto fallback;
> +
> +   const struct smbios_header *bios = smbios_header(smbios, 
> SMBIOS_BIOS_INFORMATION);
> +   const struct smbios_header *system = smbios_header(smbios, 
> SMBIOS_SYSTEM_INFORMATION);
> +   const struct smbios_type0 *t0 = (struct smbios_type0 *)bios;
> +   const struct smbios_type1 *t1 = (struct smbios_type1 *)system;
> +
> +   if (!t0 || !t1)
> +   goto fallback;
> +
> +   const char *bios_ver = smbios_string(bios, t0->bios_ver);
> +   const char *model = smbios_string(system, t1->product_name);
> +   const char *manufacturer = smbios_string(system, t1->manufacturer);
> +
> +   if (!model || !manufacturer || !bios_ver)
> +   goto fallback;
> +
> +   printf("Vendor: %s\n", manufacturer);
> +   printf("Model: %s\n", model);
> +   printf("Bios Version: %s\n", bios_ver);
> +
> +   return 0;
> +
> +fallback:
> +#ifdef CONFIG_OF_CONTROL
> +   DECLARE_GLOBAL_DATA_PTR;
> +
> +   model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
> +
> +   if (model)
> +   printf("Model: %s\n", model);
> +#endif
> +
> +   return checkboard();
> +}
> +#endif
> diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig
> index 3249b2fb2f..501a20e790 100644
> --- a/configs/coreboot_defconfig
> +++ b/configs/coreboot_defconfig
> @@ -43,3 +43,4 @@ CONFIG_SOUND=y
>  CONFIG_SOUND_I8254=y
>  CONFIG_CONSOLE_SCROLL_LINES=5
>  # CONFIG_GZIP is not set
> +CONFIG_SMBIOS_PARSER=y
> --
> 2.28.0
>


-- 
greets
--
Christian Gmeiner, MSc

https://christian-gmeiner.info/privacypolicy

Re: [PATCH v2 1/2] smbios: add parsing API

[Christian Gmeiner]

ping and a short question: would it make more sense to put the parsing
code into smbios.c and unconditionally compile it?

Am Mi., 7. Okt. 2020 um 14:33 Uhr schrieb Christian Gmeiner
:
>
> Add an very simple API to be able to access SMBIOS strings
> like vendor, model and bios version.
>
> Signed-off-by: Christian Gmeiner 
> ---
>  include/smbios.h| 27 +
>  lib/Kconfig |  6 +++
>  lib/Makefile|  1 +
>  lib/smbios-parser.c | 96 +
>  4 files changed, 130 insertions(+)
>  create mode 100644 lib/smbios-parser.c
>
> diff --git a/include/smbios.h b/include/smbios.h
> index 97b9ddce23..ed60c00fae 100644
> --- a/include/smbios.h
> +++ b/include/smbios.h
> @@ -237,4 +237,31 @@ typedef int (*smbios_write_type)(ulong *addr, int 
> handle);
>   */
>  ulong write_smbios_table(ulong addr);
>
> +/**
> + * smbios_entry() - Get a vaild struct smbios_entry pointer
> + *
> + * @address:   address where smbios tables is located
> + * @size:  size of smbios table
> + * @return:NULL or a valid pointer to a struct smbios_entry
> + */
> +const struct smbios_entry *smbios_entry(u64 address, u32 size);
> +
> +/**
> + * smbios_header() - Search for SMBIOS header type
> + *
> + * @entry: pointer to a struct smbios_entry
> + * @type:  SMBIOS type
> + * @return:NULL or a valid pointer to a struct smbios_header
> + */
> +const struct smbios_header *smbios_header(const struct smbios_entry *entry, 
> int type);
> +
> +/**
> + * smbios_string() - Return string from SMBIOS
> + *
> + * @header:pointer to struct smbios_header
> + * @index: string index
> + * @return:NULL or a valid const char pointer
> + */
> +const char *smbios_string(const struct smbios_header *header, int index);
> +
>  #endif /* _SMBIOS_H_ */
> diff --git a/lib/Kconfig b/lib/Kconfig
> index 8efb154f73..c92131b7bc 100644
> --- a/lib/Kconfig
> +++ b/lib/Kconfig
> @@ -667,6 +667,12 @@ config OID_REGISTRY
> help
>   Enable fast lookup object identifier registry.
>
> +config SMBIOS_PARSER
> +   bool "SMBIOS parser"
> +   default n
> +   help
> + A simple parser for SMBIOS data.
> +
>  source lib/efi/Kconfig
>  source lib/efi_loader/Kconfig
>  source lib/optee/Kconfig
> diff --git a/lib/Makefile b/lib/Makefile
> index 0cd7bea282..0383fddf2c 100644
> --- a/lib/Makefile
> +++ b/lib/Makefile
> @@ -37,6 +37,7 @@ obj-$(CONFIG_FIT) += fdtdec_common.o
>  obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
>  obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
>  obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o
> +obj-$(CONFIG_SMBIOS_PARSER) += smbios-parser.o
>  obj-$(CONFIG_IMAGE_SPARSE) += image-sparse.o
>  obj-y += ldiv.o
>  obj-$(CONFIG_XXHASH) += xxhash.o
> diff --git a/lib/smbios-parser.c b/lib/smbios-parser.c
> new file mode 100644
> index 00..b89f988ef9
> --- /dev/null
> +++ b/lib/smbios-parser.c
> @@ -0,0 +1,96 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2020, Bachmann electronic GmbH
> + */
> +
> +#include 
> +#include 
> +
> +static inline int verify_checksum(const struct smbios_entry *e)
> +{
> +   /*
> +* Checksums for SMBIOS tables are calculated to have a value, so that
> +* the sum over all bytes yields zero (using unsigned 8 bit 
> arithmetic).
> +*/
> +   u8 *byte = (u8 *)e;
> +   u8 sum = 0;
> +
> +   for (int i = 0; i < e->length; i++)
> +   sum += byte[i];
> +
> +   return sum;
> +}
> +
> +const struct smbios_entry *smbios_entry(u64 address, u32 size)
> +{
> +   const struct smbios_entry *entry = (struct smbios_entry 
> *)(uintptr_t)address;
> +
> +   if (!address | !size)
> +   return NULL;
> +
> +   if (memcmp(entry->anchor, "_SM_", 4))
> +   return NULL;
> +
> +   if (verify_checksum(entry))
> +   return NULL;
> +
> +   return entry;
> +}
> +
> +static const struct smbios_header *next_header(const struct smbios_header 
> *curr)
> +{
> +   u8 *pos = ((u8 *)curr) + curr->length;
> +
> +   /* search for _double_ NULL bytes */
> +   while (!((*pos == 0) && (*(pos + 1) == 0)))
> +   pos++;
> +
> +   /* step behind the double NULL bytes */
> +   pos += 2;
> +
> +   return (struct smbios_header *)pos;
> +}
> +
> +const struct smbios_header *smbios_header(const struct smbios_entry *entry, 
> int type)
> +{
> +   const unsigned int num_header = entry->struct_count;
> +   const struct smbios_header *header = (struct smbios_header 
> *)entry->struct_table_address;
> +
> +   for (unsigned int i = 0; i < num_header; i++) {
> +   if (header->type == type)
> +   return header;
> +
> +   header = next_header(header);
> +   }
> +
> +   return NULL;
> +}
> +
> +static const char *string_from_smbios_table(const struct smbios_header 
> *header,
> +   int idx)
> +{
> +   unsigne

Re: [PATCH] configs: meson64: relocate config_distro_bootcmmd header

[Neil Armstrong]

On 02/11/2020 04:07, Jaehoon Chung wrote:
> Relocate a config_distro_bootcmd header before defined
> CONFIG_EXTRA_ENV_SETTINGS. Otherwise it can't change to specific
> environment.
> 
> Signed-off-by: Jaehoon Chung 
> ---
>  include/configs/meson64.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/include/configs/meson64.h b/include/configs/meson64.h
> index cee690068022..52cc01f73da3 100644
> --- a/include/configs/meson64.h
> +++ b/include/configs/meson64.h
> @@ -69,6 +69,8 @@
>   func(DHCP, dhcp, na)
>  #endif
>  
> +#include 
> +
>  #ifndef CONFIG_EXTRA_ENV_SETTINGS
>  #define CONFIG_EXTRA_ENV_SETTINGS \
>   "stdin=" STDIN_CFG "\0" \
> @@ -83,6 +85,5 @@
>   BOOTENV
>  #endif
>  
> -#include 
>  
>  #endif /* __MESON64_CONFIG_H */
> 

Thanks,
Acked-by: Neil Armstrong 

Re: [PATCH] configs: meson64: relocate config_distro_bootcmmd header

[Neil Armstrong]

On 02/11/2020 04:07, Jaehoon Chung wrote:
> Relocate a config_distro_bootcmd header before defined
> CONFIG_EXTRA_ENV_SETTINGS. Otherwise it can't change to specific
> environment.
> 
> Signed-off-by: Jaehoon Chung 
> ---
>  include/configs/meson64.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/include/configs/meson64.h b/include/configs/meson64.h
> index cee690068022..52cc01f73da3 100644
> --- a/include/configs/meson64.h
> +++ b/include/configs/meson64.h
> @@ -69,6 +69,8 @@
>   func(DHCP, dhcp, na)
>  #endif
>  
> +#include 
> +
>  #ifndef CONFIG_EXTRA_ENV_SETTINGS
>  #define CONFIG_EXTRA_ENV_SETTINGS \
>   "stdin=" STDIN_CFG "\0" \
> @@ -83,6 +85,5 @@
>   BOOTENV
>  #endif
>  
> -#include 
>  
>  #endif /* __MESON64_CONFIG_H */
> 

Thanks,
Acked-by: Neil Armstrong 

Re: [PATCH] configs: meson64: relocate config_distro_bootcmmd header

[Neil Armstrong]

On 02/11/2020 04:07, Jaehoon Chung wrote:
> Relocate a config_distro_bootcmd header before defined
> CONFIG_EXTRA_ENV_SETTINGS. Otherwise it can't change to specific
> environment.
> 
> Signed-off-by: Jaehoon Chung 
> ---
>  include/configs/meson64.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/include/configs/meson64.h b/include/configs/meson64.h
> index cee690068022..52cc01f73da3 100644
> --- a/include/configs/meson64.h
> +++ b/include/configs/meson64.h
> @@ -69,6 +69,8 @@
>   func(DHCP, dhcp, na)
>  #endif
>  
> +#include 
> +
>  #ifndef CONFIG_EXTRA_ENV_SETTINGS
>  #define CONFIG_EXTRA_ENV_SETTINGS \
>   "stdin=" STDIN_CFG "\0" \
> @@ -83,6 +85,5 @@
>   BOOTENV
>  #endif
>  
> -#include 
>  
>  #endif /* __MESON64_CONFIG_H */
> 

Thanks,
Acked-by: Neil Armstrong 

Re: [PATCHv4 0/9] Introduce B1x5v2 support

[Stefano Babic]

Hi Sebastian,

On 02.11.20 09:07, Stefano Babic wrote:

Hi Sebastian,

I integrated the patches but the MAINTAINERS file for B1x5v2 is missing. 
Can you send a follow-up patch to fix this ? (Or just a V5 for 9/9, your 
choice).


Just send a follow-up patch, thanks.

Regards,
Stefano



Regards,
Stefano

On 02.09.20 19:31, Sebastian Reichel wrote:

This series introduces support for a new i.MX6DL based GE patient
monitor series.

Patch 1: Add support for storing bootcount in SPI-flash
Patch 2+3: Improve M41T62 RTC driver's reset routine.
PATCH 4: Support disable_ldb_di_clock_sources for i.MX6DL
Patch 5: Add poweroff-gpio support
Patch 6-8: restructure common GE code
Patch 9: Add the actual board, using SPL and DM

Changes since PATCHv3 [0]:
  * Dropped patch for reading DR for i.MX GPIOs and set
    SION pinmux bits in B1x5v2 output GPIOs instead
  * Rebased to v2020.10-rc3

Changes since PATCHv2:

* PATCH 10: Fixed network phy mode ("rgmii" -> "rgmii-id")
* PATCH 6: Fixed nits reported by Simon Glass and added is
   Reviewed-by Tag.

Changes since PATCHv1:

* Rebased to v2020.10-rc2
* Original patch 1 (support for DM_SPI_FLASH with non-DM SPL)
   has been dropped, since a similar patch has been merged
   in the meantime
* poweroff-gpio support is now added using sysreset uclass
   instead of introducing a new poweroff uclass
* B1x5v2 patch has been updated to follow recent U-Boot
   changes and to add USB mass storage support

[0] http://patchwork.ozlabs.org/project/uboot/list/?series=196979

-- Sebastian

Sebastian Reichel (9):
   bootcount: add a DM SPI flash backing store for bootcount
   rtc: m41t62: reset SQW in m41t62_rtc_reset
   rtc: m41t62: add oscillator fail bit reset support
   imx6: allow usage of disable_ldb_di_clock_sources for CONFIG_MX6QDL
   sysreset: Add poweroff-gpio driver
   board: ge: common: rename ge_common.c to ge_rtc.c
   board: ge: common: add config option for RTC and VPD feature
   board: ge: common: vpd: separate I2C specific code
   board: ge: b1x5v2: Add GE B1x5v2 and B1x5Pv2

  arch/arm/dts/Makefile |   1 +
  arch/arm/dts/imx6dl-b1x5v2.dts    | 654 
  arch/arm/mach-imx/mx6/Kconfig |   9 +
  arch/arm/mach-imx/mx6/clock.c |   2 +-
  board/ge/b1x5v2/Kconfig   |  14 +
  board/ge/b1x5v2/Makefile  |   6 +
  board/ge/b1x5v2/b1x5v2.c  | 698 ++
  board/ge/b1x5v2/spl.c | 587 ++
  board/ge/bx50v3/Kconfig   |   2 +
  board/ge/bx50v3/bx50v3.c  |   4 +-
  board/ge/common/Kconfig   |   7 +
  board/ge/common/Makefile  |   3 +-
  board/ge/common/{ge_common.c => ge_rtc.c} |   0
  board/ge/common/{ge_common.h => ge_rtc.h} |   0
  board/ge/common/vpd_reader.c  |  12 +-
  board/ge/common/vpd_reader.h  |  23 +-
  board/ge/mx53ppd/Kconfig  |   2 +
  board/ge/mx53ppd/mx53ppd.c    |   4 +-
  configs/ge_b1x5v2_defconfig   | 137 +
  drivers/bootcount/Kconfig |  10 +
  drivers/bootcount/Makefile    |   1 +
  drivers/bootcount/spi-flash.c | 125 
  drivers/rtc/m41t62.c  | 139 -
  drivers/sysreset/Kconfig  |   7 +
  drivers/sysreset/Makefile |   1 +
  drivers/sysreset/poweroff_gpio.c  |  92 +++
  include/configs/ge_b1x5v2.h   | 127 
  27 files changed, 2645 insertions(+), 22 deletions(-)
  create mode 100644 arch/arm/dts/imx6dl-b1x5v2.dts
  create mode 100644 board/ge/b1x5v2/Kconfig
  create mode 100644 board/ge/b1x5v2/Makefile
  create mode 100644 board/ge/b1x5v2/b1x5v2.c
  create mode 100644 board/ge/b1x5v2/spl.c
  create mode 100644 board/ge/common/Kconfig
  rename board/ge/common/{ge_common.c => ge_rtc.c} (100%)
  rename board/ge/common/{ge_common.h => ge_rtc.h} (100%)
  create mode 100644 configs/ge_b1x5v2_defconfig
  create mode 100644 drivers/bootcount/spi-flash.c
  create mode 100644 drivers/sysreset/poweroff_gpio.c
  create mode 100644 include/configs/ge_b1x5v2.h





--
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCH] thermal: imx_tmu: fix missing include

[sbabic]

> commit c05ed00afb dropped linux/delay.h from common header
> add linux/delay.h to avoid compile warning here
> Signed-off-by: Tim Harvey 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCH] imx: cpu: terminate line with CR if invalid temp sensor

[sbabic]

> Ensure we terminate the line with a CR if we get an invalid sensor device
> or reading.
> Signed-off-by: Tim Harvey 
> Reviewed-by: Fabio Estevam 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCHv4 4/9] imx6: allow usage of disable_ldb_di_clock_sources for CONFIG_MX6QDL

[sbabic]

> Allow using disable_ldb_di_clock_sources with just the combined
> CONFIG_MX6QDL being enabled.
> Signed-off-by: Sebastian Reichel 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCH 2/3] dts: Provide LED DTS description for HSC and DDC imx53 devices

[sbabic]

> Those two LEDs are used to indicate U-Boot's boot stage.
> Signed-off-by: Lukasz Majewski 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCHv4 3/9] rtc: m41t62: add oscillator fail bit reset support

[sbabic]

> In case of empty battery or glitches the oscillator fail
> bit might be set. This will reset the bit in the reset
> routine.
> Signed-off-by: Sebastian Reichel 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCH RESEND] watchdog: Hide WATCHDOG_RESET_DISABLE

[sbabic]

> This option is only supported by the IMX watchdog and seems to be
> similar to CONFIG_WATCHDOG.
> Move it below the IMX watchdog and make it dependent on IMX_WATCHDOG.
> Signed-off-by: Michael Walle 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCH 1/2] mx7ulp: clock: Remove unuseful information

[sbabic]

> The command 'clocks' shows the following output:
> => clocks
> PLL_A7_SPLL 528 MHz
> PLL_A7_APLL 529 MHz
> PLL_USB   0 MHz
> 
> [do_mx7_showclocks] addr = 0x9FFB61F1
> The last line is not useful at all, so just remove it.
> Signed-off-by: Fabio Estevam 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCHv4 8/9] board: ge: common: vpd: separate I2C specific code

[sbabic]

> This separates the I2C specific code from the generic
> GE vital product data code, so that the generic parts
> can be used on hardware with VPD stored in SPI flash
> memory.
> Signed-off-by: Sebastian Reichel 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCHv2] mx6: peripheral clock from oscillator

[sbabic]

> In order to be able to run the I2C bus at 400Khz, the chip errata[1]
> recommends that the peripheral clock runs out of the 24MHz oscillator.
> Systems running I2C from OP-TEE before Linux executes - for example to
> access a Secure Element [2] providing the cryptographic support - expect
> this clock to be configured by the bootloader [3].
> [1] IMX6SLCE Rev. 5, 02/2019, ERR007805.
> [2] OP-TEE: support for NXP SE05X Plug and Trust (patch on the list).
> [3] OP-TEE: check the imx_i2c.c driver (imx6 patch on the list).
> Signed-off-by: Jorge Ramirez-Ortiz 
> Reviewed-by: Fabio Estevam 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
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DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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[RESEND PATCH v1] verdin-imx8mm: enable fdt overlays and env importing

[sbabic]

> From: Igor Opaniuk 
> Enable CONFIG_CMD_IMPORTENV and CONFIG_OF_LIBFDT_OVERLAY needed
> for booting regular Toradex BSP images.
> Signed-off-by: Igor Opaniuk 
> Reviewed-by: Oleksandr Suvorov 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCHv4 7/9] board: ge: common: add config option for RTC and VPD feature

[sbabic]

> While this code is being used by all GE platforms its useful
> to have it behind a config option for hardware bringup of
> new platforms.
> Signed-off-by: Sebastian Reichel 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCHv4 2/9] rtc: m41t62: reset SQW in m41t62_rtc_reset

[sbabic]

> This takes care of resetting the 32kHz square wave, which is
> used by some boards as clock source for the SoC.
> Signed-off-by: Sebastian Reichel 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

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DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCH 3/3] defconfig: Enable CONFIG_SHOW_BOOT_PROGRESS for imx53's HSC and DDC devices

[sbabic]

> This option allows using show_boot_progress to visualize the state of
> boot process.
> Signed-off-by: Lukasz Majewski 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

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Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCHv4 5/9] sysreset: Add poweroff-gpio driver

[sbabic]

> Add GPIO poweroff driver, which is based on the Linux
> driver and uses the same DT binding.
> Reviewed-by: Simon Glass 
> Signed-off-by: Sebastian Reichel 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

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DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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[PATCHv4 6/9] board: ge: common: rename ge_common.c to ge_rtc.c

[sbabic]

> The file only contains RTC related code, so let's name
> it accordingly.
> Signed-off-by: Sebastian Reichel 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
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DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCH 2/2] mx7ulp: clock: Align the PLL_USB frequency

[sbabic]

> The command 'clocks' shows the following output:
> => clocks
> PLL_A7_SPLL 528 MHz
> PLL_A7_APLL 529 MHz
> PLL_USB   0 MHz
> Add some extra spaces so that the PLL_USB information gets aligned with
> the previous reported frequencies.
> Signed-off-by: Fabio Estevam 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=

[PATCH 1/3] arm: Implement show_boot_progress() for imx53's HSC and DDC devices

[sbabic]

> This patch provides information regarding the boot stage with using LEDs.
> On the very beginning of U-Boot execution the GREEN LED is turned on.
> When the execution is passed to Linux kernel the GREEN LED is off and
> RED one is ON.
> Afterwards, when Linux takes over the execution, the "heartbeat" driver
> provides indication if the board is still alive.
> Please also note that this patch uses {set|clr}bits_le32 macros as turning
> ON GREEN LED is performed in a _very_ early stage of U-Boot execution
> before DM_GPIOs are initialized.
> Signed-off-by: Lukasz Majewski 
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=