HI Adam
On Thu, Apr 14, 2022 at 8:44 PM Adam Ford wrote:
>
> On Thu, Apr 14, 2022 at 1:34 PM Tim Harvey wrote:
> >
> > On Thu, Apr 14, 2022 at 11:02 AM Michael Nazzareno Trimarchi
> > wrote:
> > >
> > > HI Tim
> > >
> > > On Thu, Apr 14, 2022 at 7:53 PM Tim Harvey wrote:
> > > >
> > > >
Hi Tim
Il gio 14 apr 2022, 20:33 Tim Harvey ha scritto:
> On Thu, Apr 14, 2022 at 11:02 AM Michael Nazzareno Trimarchi
> wrote:
> >
> > HI Tim
> >
> > On Thu, Apr 14, 2022 at 7:53 PM Tim Harvey
> wrote:
> > >
> > > Enable DM_SERIAL for both U_Boot and the SPL. The uart2 and its pinmux
> > >
Enable DM_SERIAL for both U_Boot and the SPL. The uart2 and its pinmux
are already marked with u-boot,dm-spl but we need to move the call to
preloader_console_init() after spl_init() to avoid a board hang
as dm can't be used until after spl_init().
Remove the manual config of the UART pinmux now
From: Peng Fan
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mq-evk-u-boot.dtsi | 32 +
configs/imx8mq_evk_defconfig| 1 +
2 files changed, 33 insertions(+)
diff --git
From: Peng Fan
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
move the preloader_console_init() call after spl_init() to
avoid board hang
Signed-off-by: Peng Fan
---
board/freescale/imx8mn_evk/spl.c | 12 ++--
configs/imx8mn_ddr4_evk_defconfig |
From: Peng Fan
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
move the preloader_console_init() call after spl_early_init() to
avoid board hang
Signed-off-by: Peng Fan
---
board/freescale/imx8mm_evk/spl.c | 12 ++--
configs/imx8mm_evk_defconfig
From: Peng Fan
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Signed-off-by: Peng Fan
---
board/freescale/imx8mp_evk/imx8mp_evk.c | 8
configs/imx8mp_evk_defconfig| 1 +
2 files changed, 1 insertion(+), 8 deletions(-)
diff --git
From: Peng Fan
V4:
Rebased, update commit log Per Tim's comments
V3:
Add missed Signed-off-by
Rebased to only add CONFIG_DM_SERIAL, not touch other config change in
defconfig
V2:
Include imx8mq-evk in this patchset.
For i.MX8MN/M/P, drop board level uart pinmux settings,
move
On Thu, Apr 14, 2022 at 08:31:12AM -0400, Tom Rini wrote:
> On Thu, Apr 14, 2022 at 05:21:52PM +0900, AKASHI Takahiro wrote:
> > Hi Simon,
> >
> > On Mon, Feb 28, 2022 at 07:16:51AM -0700, Simon Glass wrote:
> > > These filesystems may have different settings for SPL and TPL. Use the
> > >
From: Peng Fan
IMX_FEC_BASE is not used in these boards, so drop it.
Reviewed-by: Fabio Estevam
Signed-off-by: Peng Fan
---
include/configs/apalis-imx8x.h | 1 -
include/configs/aristainetos2.h | 1 -
include/configs/cm_fx6.h | 1 -
From: Peng Fan
Drop CONFIG_MMCROOT, no users now.
Reviewed-by: Fabio Estevam
Signed-off-by: Peng Fan
---
scripts/config_whitelist.txt | 1 -
1 file changed, 1 deletion(-)
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index ef7dbbfe982..12dd6e0302d 100644
---
From: Peng Fan
CONFIG_MMCROOT is only used to set mmcroot, no need a dedicated macro.
Script as below
"
for i in `ls include/configs/*.h`
do
mmcroot=`sed -n '/define.*MMCROOT/ p' $i | awk -F\" '{ print $2;}'`
if [ ! -n "$mmcroot" ]; then
continue
fi
sed -i '/define.*MMCROOT/ d'
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam
Acked-By: Teresa Remmet
Signed-off-by: Peng Fan
---
include/configs/phycore_imx8mm.h | 4
include/configs/phycore_imx8mp.h | 4
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam
Acked-By: Tim Harvey
Signed-off-by: Peng Fan
---
include/configs/imx8mm_venice.h | 4
include/configs/imx8mn_venice.h | 3 ---
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam
Signed-off-by: Peng Fan
---
include/configs/verdin-imx8mm.h | 3 ---
include/configs/verdin-imx8mp.h | 4
2 files changed, 7
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam
Signed-off-by: Peng Fan
---
include/configs/imx8qm_mek.h | 5 -
include/configs/imx8qxp_mek.h | 5 -
2 files changed, 10
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
CONFIG_SYS_FSL_USDHC_NUM
CONFIG_SYS_FSL_ESDHC_ADDR
Reviewed-by: Fabio Estevam
Signed-off-by: Peng Fan
---
include/configs/mx7dsabresd.h | 9 -
1 file changed, 9 deletions(-)
diff --git
From: Peng Fan
With DM_MMC, CONFIG_SYS_FSL_USDHC_NUM is not needed.
Reviewed-by: Fabio Estevam
Signed-off-by: Peng Fan
---
include/configs/mx6sxsabresd.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Reviewed-by: Fabio Estevam
Signed-off-by: Peng Fan
---
include/configs/imx8mn_evk.h | 5 -
1 file changed, 5 deletions(-)
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Reviewed-by: Fabio Estevam
Signed-off-by: Peng Fan
---
include/configs/imx8mp_evk.h | 3 ---
1 file changed, 3 deletions(-)
diff
From: Peng Fan
With SPL_DM_MMC and DM_MMC, the two macros not needed, drop it.
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
Reviewed-by: Fabio Estevam
Signed-off-by: Peng Fan
---
include/configs/imx8mm_evk.h | 5 -
1 file changed, 5 deletions(-)
From: Peng Fan
V2:
Rebase to resolve conflicts
Add R-b/A-b
For platforms with DM_MMC and SPL_DM_MMC, the SDHC macros are not needed.
CONFIG_MMCROOT could be actually dropped.
Drop IMX_FEC_BASE for boards that not use it
Tom, Stefano
this patches changes lots of files, not only imx, to
On Thu, Apr 14, 2022 at 04:24:48PM +0530, Sughosh Ganu wrote:
> Update the capsule update functionality related documentation to
> refect the additional definitions that need to be made per platform
> for supporting the capsule update feature.
Your code seems to expect that a global variable,
Hi Johan,
I got build fail for phycore-rk3288 after this patch:
+Error: SPL image is too large (size 0x8800 than 0x8000)
+Error: Bad parameters for image type
Thanks,
- Kever
On 2022/3/4 07:52, Johan Jonker wrote:
Sync rk3288.dtsi from Linux version 5.17.
Signed-off-by: Johan Jonker
On 2022/4/11 09:29, Johan Jonker wrote:
Add rk3066 Rikomagic MK808 to the list of
mainline supported Rockchip boards.
Include instructions for creating and programming
images to NAND and SD card.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changed V10:
add
On 2022/4/11 09:29, Johan Jonker wrote:
There are several PX30/RK3326 boards in use without
mentioning in rockchip.rst. Add boards and examples.
Signed-off-by: Johan Jonker
---
doc/board/rockchip/rockchip.rst | 16
Reviewed-by: Kever Yang
Thanks,
- Kever
1 file
On 2022/4/11 09:29, Johan Jonker wrote:
With more text coming to the rockchip.rst document,
give it a restyle first.
Changed:
sort build examples alphabetically
add git clone example
fix bash examples
fix phrases (grammer)
fix typos
Signed-off-by: Johan Jonker
Reviewed-by:
On 2022/4/11 09:29, Johan Jonker wrote:
Add the core architecture code for the rk3066.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/include/asm/arch-rk3066/boot0.h | 8 +++
arch/arm/include/asm/arch-rk3066/gpio.h | 8 +++
On Tue, Apr 12, 2022 at 7:13 AM Vladimir Oltean wrote:
>
> On Tue, Mar 29, 2022 at 03:52:39PM -0700, Tim Harvey wrote:
> > Add a DSA driver for the MV88E61xx compatible GbE Ethernet switches.
> >
> > Signed-off-by: Tim Harvey
> > ---
> > drivers/net/Kconfig | 7 +
> > drivers/net/Makefile
+ Sinan
On Wednesday 13 April 2022 11:26:33 Pali Rohár wrote:
> On Tuesday 05 April 2022 10:57:37 Pali Rohár wrote:
> > Hello!
> >
> > I suspect that there is a bug in board/freescale/p1_p2_rdb_pc/tlb.c code
> > which configures TLB entry for initial L2 SRAM.
> >
> > When L2 is 512 kB long
Upstream Linux kernel uses for mpc8548-based PCIe controllers compatible
string "fsl,mpc8548-pcie". So change U-Boot fsl PCIe driver and all DTS
files to use "fsl,mpc8548-pcie" instead of "fsl,pcie-mpc8548" to be
compatible with Linux kernel.
Signed-off-by: Pali Rohár
---
Hi Sergey,
On Thu, 14 Apr 2022 at 20:31, Sergey Nazaryev wrote:
>
> Hi!
>
> As I can see, recently [1] the implementation of USB ACM gadget has
> been merged into U-boot master. I tried to use it but the problem is
> that running `setenv stdout usbacm` on my board based on STM32MP157
> leads to
The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC
Gateworks produces many products from a single PCB with subloaded
components. Add an additional two levels of dtb name matching so that
for example a GW7400-A matches the dtb name of gw74xx.dtb
Signed-off-by: Tim Harvey
---
v3: no changes - rebase
---
board/gateworks/venice/eeprom.c | 8
Use the common GSC driver.
This allows us to do some additional cleanup:
- rename gsc{.c,.h} to eeprom{.c.h} for clarity
- collapse eeprom_get_dev
- remove unnecessary header files and alphabatize includes
- remove unnecessary check for clock-controller dt node
Signed-off-by: Tim Harvey
---
Hi Abdellatif,
Can you please keep me cc'ed in future revisions?
On Tue, Mar 29, 2022 at 04:16:59PM +0100, abdellatif.elkhl...@arm.com wrote:
> From: Abdellatif El Khlifi
>
> Add MM communication support using FF-A transport
>
> FF-A MM communication allows exchanging data with StandAlonneMM
Hi Tom,
On Thu, 14 Apr 2022 at 09:36, Tom Rini wrote:
>
> Increase the malloc pool on sandbox in order to avoid spurious errors
> such as:
> ___ test_ut[ut_dm_dm_test_video_comp_bmp32]
>
> test/py/tests/test_ut.py:43: in test_ut
> assert
Hi!
As I can see, recently [1] the implementation of USB ACM gadget has
been merged into U-boot master. I tried to use it but the problem is
that running `setenv stdout usbacm` on my board based on STM32MP157
leads to errors below:
STM32MP> setenv stdout usbacm
couldn't find an available UDC
On Thu, Apr 14, 2022 at 1:34 PM Tim Harvey wrote:
>
> On Thu, Apr 14, 2022 at 11:02 AM Michael Nazzareno Trimarchi
> wrote:
> >
> > HI Tim
> >
> > On Thu, Apr 14, 2022 at 7:53 PM Tim Harvey wrote:
> > >
> > > Enable DM_SERIAL for both U_Boot and the SPL. The uart2 and its pinmux
> > > are
On Thu, Apr 14, 2022 at 11:02 AM Michael Nazzareno Trimarchi
wrote:
>
> HI Tim
>
> On Thu, Apr 14, 2022 at 7:53 PM Tim Harvey wrote:
> >
> > Enable DM_SERIAL for both U_Boot and the SPL. The uart2 and its pinmux
> > are already marked with u-boot,dm-spl but we need to move the call to
> >
HI Tim
On Thu, Apr 14, 2022 at 7:53 PM Tim Harvey wrote:
>
> Enable DM_SERIAL for both U_Boot and the SPL. The uart2 and its pinmux
> are already marked with u-boot,dm-spl but we need to move the call to
> preloader_console_init() after spl_early_init() to avoid a board hang
> as dm can't be
Hello Peng,
can you please check the parameter of event 0x82 internally? The AN12853
doesn't mention a parameter for ID 0x82, but we see something else coming
out of the bootrom of iMX8MN.
Best regards,
Fedor
Am Do., 14. Apr. 2022 um 18:37 Uhr schrieb :
>
> From: Fedor Ross
>
> It seems like
Hi Tim,
On Thu, Apr 14, 2022 at 2:53 PM Tim Harvey wrote:
>
> Enable DM_SERIAL for both U_Boot and the SPL. The uart2 and its pinmux
> are already marked with u-boot,dm-spl but we need to move the call to
> preloader_console_init() after spl_early_init() to avoid a board hang
> as dm can't be
Enable DM_SERIAL for both U_Boot and the SPL. The uart2 and its pinmux
are already marked with u-boot,dm-spl but we need to move the call to
preloader_console_init() after spl_early_init() to avoid a board hang
as dm can't be used until after spl_early_init().
Remove the manual config of the UART
On Thu, Apr 14, 2022 at 9:10 AM Tim Harvey wrote:
>
> On Wed, Apr 13, 2022 at 10:21 AM Michael Nazzareno Trimarchi
> wrote:
> >
> > Hi
> >
> > On Wed, Apr 13, 2022 at 6:09 PM Tim Harvey wrote:
> > >
> > > On Wed, Apr 13, 2022 at 8:56 AM Michael Nazzareno Trimarchi
> > > wrote:
> > > >
> > > >
On Thu, Apr 14, 2022 at 10:20 AM Tim Harvey wrote:
>
> On Tue, Apr 12, 2022 at 6:31 PM Peng Fan (OSS) wrote:
> >
> > From: Peng Fan
> >
> > Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
> > marked with u-boot,dm-spl.
> >
> > Signed-off-by: Peng Fan
> > ---
> >
From: Fedor Ross
It seems like the ROM log events for the iMX8M are not fully covered by
AN12853 i.MX ROMs Log Events, Rev. 0, May 2020. On iMX8M the ROM event
ID 0x82 seems to use parameter0 which stops the parsing because the end
of list is detected too early.
This patch adds ROM event ID
On 4/14/22 18:48, Marek Vasut wrote:
On 4/14/22 18:37, Patrick DELAUNAY wrote:
Hi Marek,
Hi,
on ST platform the ASR/SSR/HSR request are already provided by the DDR
settings with pwrctl register value
it is managed in TF-A by
arm-trusted-firmware/drivers/st/ddr/stm32mp1_ddr_helpers.c
On Tue, Apr 12, 2022 at 6:31 PM Peng Fan (OSS) wrote:
>
> From: Peng Fan
>
> Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
> marked with u-boot,dm-spl.
>
> Signed-off-by: Peng Fan
> ---
> board/freescale/imx8mn_evk/spl.c | 12 ++--
> configs/imx8mn_ddr4_evk_defconfig | 1
Describe the env command.
Signed-off-by: Patrick Delaunay
---
doc/usage/cmd/askenv.rst | 2 +
doc/usage/cmd/env.rst | 365 ++
doc/usage/cmdline.rst | 2 +-
doc/usage/environment.rst | 2 +
doc/usage/index.rst | 1 +
5 files changed,
Add the ability to save ADC conversion result in an environment
variable. This is useful for further arbitrary processing by the
U-Boot scripts.
Signed-off-by: Marek Vasut
Cc: Fabrice Gasnier
Cc: Patrice Chotard
Cc: Patrick Delaunay
Cc: Simon Glass
---
V2: - Fix up commit message
- Call
On 4/14/22 18:37, Patrick DELAUNAY wrote:
Hi Marek,
Hi,
on ST platform the ASR/SSR/HSR request are already provided by the DDR
settings with pwrctl register value
it is managed in TF-A by
arm-trusted-firmware/drivers/st/ddr/stm32mp1_ddr_helpers.c
Sure, I don't use ATF and I have no
Hi Marek,
On 4/13/22 04:17, Marek Vasut wrote:
Add the ability to start ADC conversion result in an environment
s/to start/to save/ ?
variable. This is useful for further arbitrary processing by the
U-Boot scripts.
Signed-off-by: Marek Vasut
Cc: Fabrice Gasnier
Cc: Simon Glass
---
Hi Marek,
on ST platform the ASR/SSR/HSR request are already provided by the DDR
settings with pwrctl register value
it is managed in TF-A by
arm-trusted-firmware/drivers/st/ddr/stm32mp1_ddr_helpers.c
enumstm32mp1_ddr_sr_mode ddr_read_sr_mode(void)
{
uint32_tpwrctl =
HI Tommaso,
Thank you to have time on this
Michael
On Tue, Feb 25, 2020 at 6:10 AM Michael Trimarchi
wrote:
>
> The intent is to reserve memory _and_ prevent it from being included
> in the kernel's linear map. For thos reason it is also necessary to include
> the
> 'no-map' property for this
On Wed, Apr 13, 2022 at 10:21 AM Michael Nazzareno Trimarchi
wrote:
>
> Hi
>
> On Wed, Apr 13, 2022 at 6:09 PM Tim Harvey wrote:
> >
> > On Wed, Apr 13, 2022 at 8:56 AM Michael Nazzareno Trimarchi
> > wrote:
> > >
> > > Hi Tim
> > >
> > > On Wed, Apr 13, 2022 at 5:47 PM Tim Harvey wrote:
> > >
On Mon, Apr 11, 2022 at 8:35 PM Simon Glass wrote:
>
> On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
> >
> > Add devicetree for Google Chameleon V3 board
> >
> > Signed-off-by: Paweł Anikiel
> > ---
> > arch/arm/dts/Makefile | 2 ++
> >
On Thu, Apr 14, 2022 at 2:14 AM Ian Ray wrote:
>
> On Wed, Apr 13, 2022 at 03:54:37PM -0700, Tim Harvey wrote:
> >
> > If vpcie-supply is defined by device-tree use that if
> > CONFIG_PCIE_IMX_POWER_GPIO is not defined.
> >
> > Note that after this the following boards which define
> >
On Mon, Apr 11, 2022 at 8:35 PM Simon Glass wrote:
>
> Hi Paweł,
>
> On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
> >
> > Device tree header for Mercury+ AA1 module
> >
> > Signed-off-by: Paweł Anikiel
> > ---
> > arch/arm/dts/socfpga_mercury_aa1.dtsi | 95 +++
> >
On Mon, Apr 11, 2022 at 8:35 PM Simon Glass wrote:
>
> On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
> >
> > Add handoff headers for the Google Chameleonv3 variants: 480-2 and
> > 270-3. Both files were generated using qts-filter-a10.sh.
> >
> > Signed-off-by: Paweł Anikiel
> > ---
> >
On Mon, Apr 11, 2022 at 8:36 PM Simon Glass wrote:
>
> On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
> >
> > This driver is a child of the rstmgr driver, both of which share the
> > same devicetree node. As a result, passing the child's udevice pointer
> > to dev_read_addr_ptr results in a
On Wed, Apr 13, 2022 at 05:46:11PM -0400, Tom Rini wrote:
> On Thu, Apr 07, 2022 at 12:32:57AM +0200, Marek Behún wrote:
>
> > From: Marek Behún
> >
> > Add helpers ofnode_get_phy_node() and dev_get_phy_node() and use it in
> > net/mdio-uclass.c function dm_eth_connect_phy_handle(). Also add
>
Increase the malloc pool on sandbox in order to avoid spurious errors
such as:
___ test_ut[ut_dm_dm_test_video_comp_bmp32]
test/py/tests/test_ut.py:43: in test_ut
assert output.endswith('Failures: 0')
E AssertionError: assert False
E+ where False =
On Thu, Apr 14, 2022 at 3:58 AM Peng Fan (OSS) wrote:
>
>
>
> On 2022/4/14 16:37, Frieder Schrempf wrote:
> > Hi Andrejs,
> >
> > +Cc: Jacky Bai
> >
> > Am 13.04.22 um 14:24 schrieb Andrejs Cainikovs:
> >> [Sie erhalten nicht oft E-Mail von "andrejs.cainik...@toradex.com".
> >> Weitere
Am 14.04.22 um 15:51 schrieb Marek Vasut:
> The 4 GiB boundary is at 0x+1 , not at 0x8000, fix this.
>
> The PHYS_SDRAM of i.MX8M is at 0x4000 , so to restrict ram_top
> below 4 GiB, the ram_top has to be set to 0x as it is not
> an offset from the start of PHYS_SDRAM, but
Hi Marek,
On 14/04/2022 10:51, Marek Vasut wrote:
The 4 GiB boundary is at 0x+1 , not at 0x8000, fix this.
The PHYS_SDRAM of i.MX8M is at 0x4000 , so to restrict ram_top
below 4 GiB, the ram_top has to be set to 0x as it is not
an offset from the start of PHYS_SDRAM,
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Tom Rini
---
drivers/led/led_pwm.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/led/led_pwm.c b/drivers/led/led_pwm.c
index
The OF "label" property parsing is now handled in LED core,
drop the duplicate implementation from this driver.
Signed-off-by: Tom Rini
---
drivers/led/led_bcm6753.c | 12
1 file changed, 12 deletions(-)
diff --git a/drivers/led/led_bcm6753.c b/drivers/led/led_bcm6753.c
index
Demote logs about problems with the vrings to debug level rather than
always logging. This reduces noise from the logs, especially in the fuzz
test where these cases get reached frequently.
Signed-off-by: Andrew Scull
---
drivers/virtio/virtio_ring.c | 4 ++--
1 file changed, 2 insertions(+), 2
Add the basic infrastructure for declaring fuzz tests and a command to
invoke them.
Signed-off-by: Andrew Scull
Reviewed-by: Simon Glass
---
Kconfig | 9 +
include/test/fuzz.h | 51 +++
test/Makefile| 1 +
test/fuzz/Makefile | 7
This new class of device will provide fuzzing inputs from a fuzzing
engine.
Signed-off-by: Andrew Scull
Reviewed-by: Simon Glass
---
drivers/Kconfig | 2 ++
drivers/Makefile | 1 +
drivers/fuzz/Kconfig | 9 +
drivers/fuzz/Makefile
Add CONFIG_ASAN to build with the Address Sanitizer. This only works
with the sandbox so the config is likewise dependent. The resulting
executable will have ASAN instrumentation, including the leak detector
that can be disabled with the ASAN_OPTIONS environment variable:
Rename the sections used to implement linker lists so they begin with
'__u_boot_list' rather than '.u_boot_list'. The double underscore at the
start is still distinct from the single underscore used by the symbol
names.
Having a '.' in the section names conflicts with clang's ASAN
instrumentation
Use the common infrastructure to create a linker list of the sandbox
command line flags rather than using a custom method.
The list is changed from containing pointers to containing structs and
the uses are updated accordingly.
Signed-off-by: Andrew Scull
Reviewed-by: Simon Glass
---
Rename the sections used for placing the EFI runtime so they don't start
with a '.'. ELF says that sections starting with a '.' are reserved for
system use whereas they are actually user sections in sandbox.
When they weren't user sections, clang's ASAN added redzones to the
sections and the
The EFI symbols are collected in subsections of the .text, .rodata,
.data and .rel sections. Use those when creating EFI runtime sections.
Fixes: 7bf07cf872 (Partially revert "efi_loader: Rename sections to allow for
implicit data")
Signed-off-by: Andrew Scull
Cc: Heinrich Schuchardt
Cc: Simon
This series sets up a basic fuzzing infrastructure that works with
sandbox. The example fuzz test towards the end of the series will find
something pretty quickly. That something is fixed by the series
"virtio: Harden and test vring" that needs to be applied for the final
patch in this series.
The 4 GiB boundary is at 0x+1 , not at 0x8000, fix this.
The PHYS_SDRAM of i.MX8M is at 0x4000 , so to restrict ram_top
below 4 GiB, the ram_top has to be set to 0x as it is not
an offset from the start of PHYS_SDRAM, but rather a physical address
marking the topmost
Xilinx has been acquired by AMD that's why emails should be also updated.
The patch is updating .mailmap file and also MAINTAINERS files as was done
by commit 5cd1ecb99490 ("ppc: qemu: Update MAINTAINERS for correct email
address").
The rest of my emails are not going to change.
Signed-off-by:
On Fri, Apr 01, 2022 at 04:55:10PM +0800, Sam Shih wrote:
> There are many pins in an SoC, and register usage may vary by pins.
> This patch introduces a concept of "io type" and "io type group"
> to mediatek pinctrl drivers. This can provide different pinconf
> handlers implementation (eg:
Hi Sughosh,
2022年4月14日(木) 19:55 Sughosh Ganu :
>
> Update the capsule update functionality related documentation to
> refect the additional definitions that need to be made per platform
> for supporting the capsule update feature.
Thanks for adding the example. This is good to me.
Reviewed-by:
The Bosch ACC (Air Center Control) Board is based on the i.MX6D.
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Adapt defconfig and device tree to new bootcount driver
- Clean up CONFIG_ENV_FLAGS_LIST_STATIC
- Fix style issues in device trees
- Migrate CONFIG options to Kconfig
This
On Thu, Apr 14, 2022 at 05:21:52PM +0900, AKASHI Takahiro wrote:
> Hi Simon,
>
> On Mon, Feb 28, 2022 at 07:16:51AM -0700, Simon Glass wrote:
> > These filesystems may have different settings for SPL and TPL. Use the
> > correct Makefile variable to handle this.
> >
> > Signed-off-by: Simon
> Subject: Re: RFC: Updating i.MX8M CPU thermal trip-point at runtime
>
> Hi Andrejs,
>
> +Cc: Jacky Bai
>
> Am 13.04.22 um 14:24 schrieb Andrejs Cainikovs:
> > [Sie erhalten nicht oft E-Mail von "andrejs.cainik...@toradex.com".
> > Weitere Informationen, warum dies wichtig ist, finden Sie
For both AST2500 and AST2600, there are three
SPI controllers, FMC(Firmware Memory Controller),
SPI1 and SPI2. The clock source is HCLK. Following
is the basic information for ASPEED SPI controller.
AST2500:
- FMC:
CS number: 3
controller reg: 0x1e62 - 0x1e62
decoded
This adds the dirmap API originally introduced in Linux commit aa167f3
("spi: spi-mem: Add a new API to support direct mapping"). This also
includes several follow-up patches and fixes.
Changes from Linux include:
* Added Kconfig option
* Changed struct device to struct udevice
* Changed struct
This adds support for the dirmap API to the spi-nor subsystem, as
introduced in Linux commit df5c210 ("mtd: spi-nor: use spi-mem
dirmap API").
This patch is synchronize from the following patch
https://patchwork.ozlabs.org/project/uboot/patch/20210205043924.149504-4-sean...@gmail.com/
>From the HW point of view, the performance of
command read mode is greater than user mode slightly.
Thus, dirmap read framework is introduced to achieve
this goal.
In dirmap_create, a specific decoded address area with
flash size is assigned to each CS. CPU can thus access
the SPI flash as
Add ASPEED BMC FMC/SPI memory controller driver with
spi-mem interface for AST2500 and AST2600 platform.
There are three SPI memory controllers embedded in an ASPEED SoC.
- FMC: Named as Firmware Memory Controller. After AC on, MCU ROM
fetches initial device boot image from FMC chip
User can get correct HCLK frequency during driver probe stage
by adding the following configuration in the device tree.
"clocks = < ASPEED_CLK_AHB>".
Signed-off-by: Chin-Ting Kuo
---
drivers/clk/aspeed/clk_ast2500.c | 24
1 file changed, 24 insertions(+)
diff --git
Add spi-aspeed.c file for ARM ASPEED.
Signed-off-by: Chin-Ting Kuo
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0fc034f01f..c86ea34883 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -687,6 +687,13 @@ S: Maintained
F:
This patch series aims to porting ASPEED FMC/SPI memory controller
driver with spi-mem interface. spi-mem dirmap framework is also
synchronized from Linux. These patches have been verified on both
AST2600 and AST2500 EVBs.
Chin-Ting Kuo (8):
clk: aspeed: Get HCLK frequency support
pinctrl:
Add FWSPICS1 and SPI1CS1 in AST2500 pinctrl group.
On AST2500 EVB, FWSPICS1 can be supported by default.
An extra jumper, J45, should be configured before
enabling SPI1CS1.
Signed-off-by: Chin-Ting Kuo
---
drivers/pinctrl/aspeed/pinctrl_ast2500.c | 2 ++
1 file changed, 2 insertions(+)
diff
2022年4月14日(木) 19:55 Sughosh Ganu :
>
> Currently, there are a bunch of boards which enable the UEFI capsule
> update feature. The actual update of the firmware images is done
> through the dfu framework which uses the dfu_alt_info environment
> variable for getting information on the update, like
Hi Sughosh,
2022年4月14日(木) 19:55 Sughosh Ganu :
>
> Currently, the image descriptor array that has been passed to the
> GetImageInfo function of the Firmware Management Protocol(FMP) gets
> populated through the data stored with the dfu framework. The
> dfu data is not restricted to contain
Add the support for the 8MNANOD3L-EVK board. The board has an i.MX8MNano
UltraLite Quad SoC and uses 1GB DDR3L memory.
U-Boot 2022.04-00011-gf0e15e3761 (Apr 06 2022 - 13:54:41 +0200)
CPU: Freescale i.MX8MNano UltraLite Quad rev1.0 at 1200 MHz
Reset cause: WDOG
Model: NXP i.MX8MNano DDR3L EVK
Hi Marcel,
Am Mi., 6. Apr. 2022 um 15:14 Uhr schrieb Marcel Ziswiler
:
>
> Hi Heiko
>
> On Wed, 2022-04-06 at 14:08 +0200, Heiko Thiery wrote:
> > Add the support for the 8MNANOD3L-EVK board. The board has an i.MX8MNano
> > UltraLite Quad SoC and uses 1GB DDR3L memory.
> >
> > U-Boot
This GPIO is actually an input "Q7_3V3_PCIE_WAKE#_IN" not an output, so
remove the misleaading and incorrect definition.
Cc: Tim Harvey (re: pci: imx: use vpcie-supply if
defined by device-tree)
Signed-off-by: Ian Ray
---
include/configs/ge_bx50v3.h | 1 -
1 file changed, 1 deletion(-)
diff
On 2022/4/14 16:37, Frieder Schrempf wrote:
Hi Andrejs,
+Cc: Jacky Bai
Am 13.04.22 um 14:24 schrieb Andrejs Cainikovs:
[Sie erhalten nicht oft E-Mail von "andrejs.cainik...@toradex.com".
Weitere Informationen, warum dies wichtig ist, finden Sie unter
Update the capsule update functionality related documentation to
refect the additional definitions that need to be made per platform
for supporting the capsule update feature.
Signed-off-by: Sughosh Ganu
---
Changes since V6:
* Add example for the struct efi_fw_image array and struct
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