Re: [PULL] Pull request for u-boot master / v2022.07 = u-boot-stm32-20220520
On Fri, May 20, 2022 at 09:25:16AM +0200, Patrick DELAUNAY wrote: > Hi Tom, > > Please pull the STM32 related fixes for u-boot/master, v2022.07: > u-boot-stm32-20220520 > > - spi: fix busy bit check in stm32_qspi driver > - stm32mp15: configure Buck3 voltage per PMIC NVM on Avenger96 board > > CI status: > https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/12043 > > Thanks, > Patrick > > git request-pull origin/master > https://source.denx.de/u-boot/custodians/u-boot-stm.git/ > u-boot-stm32-20220520 > > > > The following changes since commit f83bd23e2a0e9861969c9d43395299a14f25ddda: > > Merge https://source.denx.de/u-boot/custodians/u-boot-marvell (2022-05-18 > 08:41:13 -0400) > > are available in the Git repository at: > > https://source.denx.de/u-boot/custodians/u-boot-stm.git/ > tags/u-boot-stm32-20220520 > > for you to fetch changes up to b6a469360a0dec01dbbf087c5184a59dda494569: > > spi: stm32_qspi: Remove SR_BUSY bit check before sending command > (2022-05-19 18:54:18 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [RFC PATCH 2/2] ARM: stm32: activate OF_LIVE for DHSOM
On 5/19/22 18:46, Patrick Delaunay wrote: Activate the live DT with CONFIG_OF_LIVE to reduce the DT parsing time. Signed-off-by: Patrick Delaunay Tested-by: Marek Vasut
Re: [RFC PATCH 1/2] board: dhelectronics: stm32mp1: convert to livetree
On 5/19/22 18:46, Patrick Delaunay wrote: Replace call to fdt_*() functions and access to gd->fdt_blob with call to ofnode_*() functions to support a live tree. Signed-off-by: Patrick Delaunay I see your point regarding the speed up, wow. Tested-by: Marek Vasut
[PULL] u-boot-usb/master
The following changes since commit f83bd23e2a0e9861969c9d43395299a14f25ddda: Merge https://source.denx.de/u-boot/custodians/u-boot-marvell (2022-05-18 08:41:13 -0400) are available in the Git repository at: git://source.denx.de/u-boot-usb.git master for you to fetch changes up to 868d58f69c7ceda5c886293cf15f4e39493517a2: usb: dwc3: Fix non-usb3 configurations (2022-05-20 23:30:36 +0200) Jan Kiszka (1): usb: dwc3: Fix non-usb3 configurations Mark Kettenis (1): usb: xhci-dwc3: Support role switch default role drivers/usb/common/common.c | 16 drivers/usb/dwc3/dwc3-generic.c | 4 +++- drivers/usb/host/xhci-dwc3.c| 6 ++ include/linux/usb/otg.h | 10 ++ 4 files changed, 35 insertions(+), 1 deletion(-)
Re: [RESEND PATCH] gpio: rgpio2p: Enhance reading of GPIO pin value
*ping*
On Sat, 2022-04-23 at 22:37 +0200, Christoph Fritz wrote:
> Hello Stefano,
>
> could you please pick up this patch?
>
> bye
> -- Christoph
>
> On Tue, 2022-04-05 at 12:29 +0200, Christoph Fritz wrote:
> > Add support for reading GPIO pin value when function is output.
> > With this patch applied, gpio toggle command is working.
> >
> > Signed-off-by: Christoph Fritz
> > Reviewed-by: Peng Fan
> > Reviewed-by: Fabio Estevam
> > ---
> > drivers/gpio/imx_rgpio2p.c | 14 +-
> > 1 file changed, 13 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpio/imx_rgpio2p.c b/drivers/gpio/imx_rgpio2p.c
> > index 0e2874ca95c..175e460aff5 100644
> > --- a/drivers/gpio/imx_rgpio2p.c
> > +++ b/drivers/gpio/imx_rgpio2p.c
> > @@ -39,6 +39,14 @@ static int imx_rgpio2p_is_output(struct gpio_regs
> > *regs, int offset)
> > return val & (1 << offset) ? 1 : 0;
> > }
> >
> > +static int imx_rgpio2p_bank_get_direction(struct gpio_regs *regs,
> > int offset)
> > +{
> > + if ((readl(>gpio_pddr) >> offset) & 0x01)
> > + return IMX_RGPIO2P_DIRECTION_OUT;
> > +
> > + return IMX_RGPIO2P_DIRECTION_IN;
> > +}
> > +
> > static void imx_rgpio2p_bank_direction(struct gpio_regs *regs, int
> > offset,
> > enum imx_rgpio2p_direction
> > direction)
> > {
> > @@ -67,7 +75,11 @@ static void imx_rgpio2p_bank_set_value(struct
> > gpio_regs *regs, int offset,
> >
> > static int imx_rgpio2p_bank_get_value(struct gpio_regs *regs, int
> > offset)
> > {
> > - return (readl(>gpio_pdir) >> offset) & 0x01;
> > + if (imx_rgpio2p_bank_get_direction(regs, offset) ==
> > + IMX_RGPIO2P_DIRECTION_IN)
> > + return (readl(>gpio_pdir) >> offset) & 0x01;
> > +
> > + return (readl(>gpio_pdor) >> offset) & 0x01;
> > }
> >
> > static int imx_rgpio2p_direction_input(struct udevice *dev,
> > unsigned offset)
>
Re: i.MX8MP usb status
On Fri, May 20, 2022 at 2:31 PM Marek Vasut wrote: > > On 5/20/22 20:21, Tim Harvey wrote: > > On Fri, May 20, 2022 at 10:08 AM Tim Harvey wrote: > >> > >> On Wed, May 4, 2022 at 5:53 AM Marek Vasut wrote: > >>> > >>> On 5/4/22 14:26, Peng Fan wrote: > Hi Marek, > >>> > >>> Hi, > >>> > Since you did some work on i.MX8MP USB, may I know the status? > Does host/device mode both supported in upstream? > >>> > >>> I only have HOST option available, so for me this is only HOST. > >>> > >>> I did not test GADGET or OTG . > >>> > >> > >> Marek, > >> > >> Do you still have IMX8MP USB host working on top of v2022.07-rc2, > >> master, or imx-master? It worked for me previously at some point > >> applying your dwc3 glue series [1] from a repo you pointed me to that > >> I can no longer find but now I see an issue where device_probe fails: > >> > >> u-boot=> usb start > >> starting USB... > >> Bus usb@3810: probe failed, error -61 > >> Bus usb@3820: probe failed, error -61 > >> No working controllers found > >> > >> The failure is that dwc3_glue_probe fails to find 'usb3-phy' due to > >> that being in the phy-names node of usb@3810 and not its parent > >> usb@32f10100 > >> > >> Am I missing a patch perhaps to dwc3_glue_probe in dwc3-generic.c? > >> > >> Tim > >> [1] https://patchwork.ozlabs.org/project/uboot/list/?series=293112 > > > > Marek, > > > > I didn't explain that right. The failure is that dwc3_glue_probe gets > > passed usb3_0:usb@32f10100 USB (controller dev) and tries to find > > usb3-phy in the phy-names prop of that dev where-as the phy-name node > > is in the usb_dwc3_0:usb@3810 phy child of the controller instead > > > > However, I still wonder if I'm missing a patch that deals with this or > > if something just changed between testing your patch series and now. > > There's already fix in u-boot-usb/master , see the topmost patch there. Yep, that was it. Thanks, Tim
Re: i.MX8MP usb status
On 5/20/22 20:21, Tim Harvey wrote: On Fri, May 20, 2022 at 10:08 AM Tim Harvey wrote: On Wed, May 4, 2022 at 5:53 AM Marek Vasut wrote: On 5/4/22 14:26, Peng Fan wrote: Hi Marek, Hi, Since you did some work on i.MX8MP USB, may I know the status? Does host/device mode both supported in upstream? I only have HOST option available, so for me this is only HOST. I did not test GADGET or OTG . Marek, Do you still have IMX8MP USB host working on top of v2022.07-rc2, master, or imx-master? It worked for me previously at some point applying your dwc3 glue series [1] from a repo you pointed me to that I can no longer find but now I see an issue where device_probe fails: u-boot=> usb start starting USB... Bus usb@3810: probe failed, error -61 Bus usb@3820: probe failed, error -61 No working controllers found The failure is that dwc3_glue_probe fails to find 'usb3-phy' due to that being in the phy-names node of usb@3810 and not its parent usb@32f10100 Am I missing a patch perhaps to dwc3_glue_probe in dwc3-generic.c? Tim [1] https://patchwork.ozlabs.org/project/uboot/list/?series=293112 Marek, I didn't explain that right. The failure is that dwc3_glue_probe gets passed usb3_0:usb@32f10100 USB (controller dev) and tries to find usb3-phy in the phy-names prop of that dev where-as the phy-name node is in the usb_dwc3_0:usb@3810 phy child of the controller instead However, I still wonder if I'm missing a patch that deals with this or if something just changed between testing your patch series and now. There's already fix in u-boot-usb/master , see the topmost patch there.
[PATCH] configs: get rid of build warnings due to SPL_USB_DWC3_GENERIC
Adding the SPL_USB_DWC3_GENERIC symbol broke some ti builds. This should fix the builds but untested on HW. Signed-off-by: Angus Ainslie --- configs/am43xx_evm_defconfig | 2 ++ configs/am43xx_evm_usbhost_boot_defconfig | 2 ++ configs/am43xx_hs_evm_defconfig | 2 ++ configs/am57xx_hs_evm_usb_defconfig | 2 ++ configs/am65x_evm_r5_usbdfu_defconfig | 2 ++ configs/dra7xx_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_usb_defconfig | 2 ++ 8 files changed, 16 insertions(+) diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 7a736b6fe1..13a305a53c 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -59,6 +59,7 @@ CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y CONFIG_MISC=y +CONFIG_SPL_MISC=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y @@ -93,6 +94,7 @@ CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index e844106243..b1f17c6a9e 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -8,6 +8,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_AM43XX=y CONFIG_SPL=y +CONFIG_SPL_MISC=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set @@ -94,6 +95,7 @@ CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index d436b41a0c..206e5cf7bc 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -15,6 +15,7 @@ CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x0200 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c0 CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_SPL_MISC=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y @@ -97,6 +98,7 @@ CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 6514a4f20c..dee35839c4 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -14,6 +14,7 @@ CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x0200 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c0 CONFIG_TARGET_AM57XX_EVM=y CONFIG_SPL=y +CONFIG_SPL_MISC=y CONFIG_ENV_OFFSET_REDUND=0x28 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -115,6 +116,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" CONFIG_USB_GADGET_VENDOR_NUM=0x0451 diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index 57cd0f35a5..0430a94a7c 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_K3=y CONFIG_SYS_MALLOC_LEN=0x200 CONFIG_SYS_MALLOC_F_LEN=0x55000 CONFIG_SPL_GPIO=y +CONFIG_SPL_MISC=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 @@ -111,6 +112,7 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 1aee9d742c..db7eb8efe9 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x4030 CONFIG_OMAP54XX=y CONFIG_TARGET_DRA7XX_EVM=y CONFIG_SPL=y +CONFIG_SPL_MISC=y CONFIG_ENV_OFFSET_REDUND=0x28 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -137,6 +138,7 @@ CONFIG_USB_XHCI_OMAP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_OMAP=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_SPL_USB_DWC3_GENERIC=y CONFIG_USB_DWC3_PHY_OMAP=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 728515d433..7796419f6b 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -13,6 +13,7 @@ CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x0200 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c0 CONFIG_TARGET_DRA7XX_EVM=y CONFIG_SPL=y +CONFIG_SPL_MISC=y
Re: i.MX8MP usb status
On Fri, May 20, 2022 at 10:08 AM Tim Harvey wrote: > > On Wed, May 4, 2022 at 5:53 AM Marek Vasut wrote: > > > > On 5/4/22 14:26, Peng Fan wrote: > > > Hi Marek, > > > > Hi, > > > > > Since you did some work on i.MX8MP USB, may I know the status? > > > Does host/device mode both supported in upstream? > > > > I only have HOST option available, so for me this is only HOST. > > > > I did not test GADGET or OTG . > > > > Marek, > > Do you still have IMX8MP USB host working on top of v2022.07-rc2, > master, or imx-master? It worked for me previously at some point > applying your dwc3 glue series [1] from a repo you pointed me to that > I can no longer find but now I see an issue where device_probe fails: > > u-boot=> usb start > starting USB... > Bus usb@3810: probe failed, error -61 > Bus usb@3820: probe failed, error -61 > No working controllers found > > The failure is that dwc3_glue_probe fails to find 'usb3-phy' due to > that being in the phy-names node of usb@3810 and not its parent > usb@32f10100 > > Am I missing a patch perhaps to dwc3_glue_probe in dwc3-generic.c? > > Tim > [1] https://patchwork.ozlabs.org/project/uboot/list/?series=293112 Marek, I didn't explain that right. The failure is that dwc3_glue_probe gets passed usb3_0:usb@32f10100 USB (controller dev) and tries to find usb3-phy in the phy-names prop of that dev where-as the phy-name node is in the usb_dwc3_0:usb@3810 phy child of the controller instead However, I still wonder if I'm missing a patch that deals with this or if something just changed between testing your patch series and now. Best Regards, Tim
Re: [PATCH] board: gateowrks: venice: add GW7903 PMIC
Hi Tim, On Fri, May 20, 2022 at 12:55 PM Tim Harvey wrote: > > The GW7903 has a BD71847 PMIC on I2C1. Adjust the model compare strings > to add it. > > Signed-off-by: Tim Harvey There is a typo in the Subject: s/gateowrks/gateworks Reviewed-by: Fabio Estevam
Re: i.MX8MP usb status
On Wed, May 4, 2022 at 5:53 AM Marek Vasut wrote: > > On 5/4/22 14:26, Peng Fan wrote: > > Hi Marek, > > Hi, > > > Since you did some work on i.MX8MP USB, may I know the status? > > Does host/device mode both supported in upstream? > > I only have HOST option available, so for me this is only HOST. > > I did not test GADGET or OTG . > Marek, Do you still have IMX8MP USB host working on top of v2022.07-rc2, master, or imx-master? It worked for me previously at some point applying your dwc3 glue series [1] from a repo you pointed me to that I can no longer find but now I see an issue where device_probe fails: u-boot=> usb start starting USB... Bus usb@3810: probe failed, error -61 Bus usb@3820: probe failed, error -61 No working controllers found The failure is that dwc3_glue_probe fails to find 'usb3-phy' due to that being in the phy-names node of usb@3810 and not its parent usb@32f10100 Am I missing a patch perhaps to dwc3_glue_probe in dwc3-generic.c? Tim [1] https://patchwork.ozlabs.org/project/uboot/list/?series=293112
[PATCH] stm32mp1: fix reference for STMicroelectronics
Replace reference to the correct name STMicroelectronics
Signed-off-by: Patrick Delaunay
---
arch/arm/Kconfig | 2 +-
arch/arm/cpu/armv7/stv0991/lowlevel.S | 2 +-
arch/arm/mach-sti/Kconfig | 2 +-
drivers/i2c/designware_i2c.c | 2 +-
drivers/i2c/designware_i2c.h | 2 +-
drivers/i2c/designware_i2c_pci.c | 2 +-
drivers/mtd/nand/raw/fsmc_nand.c | 4 ++--
drivers/mtd/spi/spi-nor-ids.c | 2 +-
drivers/net/designware.c | 2 +-
drivers/net/designware.h | 2 +-
drivers/pinctrl/Kconfig | 2 +-
drivers/spi/pl022_spi.c | 2 +-
drivers/usb/gadget/designware_udc.c | 2 +-
include/configs/stm32mp15_st_common.h | 2 +-
include/elf.h | 4 ++--
include/linux/mtd/fsmc_nand.h | 2 +-
include/usb/designware_udc.h | 2 +-
17 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5f24ffc0f3..53679b084c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1923,7 +1923,7 @@ config ARCH_STM32
imply CMD_DM
config ARCH_STI
- bool "Support STMicrolectronics SoCs"
+ bool "Support STMicroelectronics SoCs"
select BLK
select CPU_V7A
select DM
diff --git a/arch/arm/cpu/armv7/stv0991/lowlevel.S
b/arch/arm/cpu/armv7/stv0991/lowlevel.S
index 218ac70f32..5733eaa15c 100644
--- a/arch/arm/cpu/armv7/stv0991/lowlevel.S
+++ b/arch/arm/cpu/armv7/stv0991/lowlevel.S
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * (C) Copyright 2014 stmicroelectronics
+ * (C) Copyright 2014 STMicroelectronics
*/
#include
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index f9a583af8d..d9e264024c 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -9,7 +9,7 @@ choice
config TARGET_STIH410_B2260
bool "96Boards STiH410-B2260"
help
- Support for 96Board STiH410-B2260 based on STMicrolectronics
+ Support for 96Board STiH410-B2260 based on STMicroelectronics
STiH410 soc. This board complies with 96Board Open Platform
Specifications. Features:
- 1GB DDR
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index 1aae6b64ba..e54de42abc 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2009
- * Vipin Kumar, ST Micoelectronics, vipin.ku...@st.com.
+ * Vipin Kumar, STMicroelectronics, vipin.ku...@st.com.
*/
#include
diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h
index a9c50c90ac..049976e8a2 100644
--- a/drivers/i2c/designware_i2c.h
+++ b/drivers/i2c/designware_i2c.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2009
- * Vipin Kumar, ST Micoelectronics, vipin.ku...@st.com.
+ * Vipin Kumar, STMicroelectronics, vipin.ku...@st.com.
*/
#ifndef __DW_I2C_H_
diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c
index 1572c2c6bc..46c2545f21 100644
--- a/drivers/i2c/designware_i2c_pci.c
+++ b/drivers/i2c/designware_i2c_pci.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2009
- * Vipin Kumar, ST Micoelectronics, vipin.ku...@st.com.
+ * Vipin Kumar, STMicroelectronics, vipin.ku...@st.com.
* Copyright 2019 Google Inc
*/
diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c
index 5d197ce0c5..a92c6252a5 100644
--- a/drivers/mtd/nand/raw/fsmc_nand.c
+++ b/drivers/mtd/nand/raw/fsmc_nand.c
@@ -1,10 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2010
- * Vipin Kumar, ST Microelectronics, vipin.ku...@st.com.
+ * Vipin Kumar, STMicroelectronics, vipin.ku...@st.com.
*
* (C) Copyright 2012
- * Amit Virdi, ST Microelectronics, amit.vi...@st.com.
+ * Amit Virdi, STMicroelectronics, amit.vi...@st.com.
*/
#include
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 7050ddc397..20cd4d7fc9 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -280,7 +280,7 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("sst26wf064", 0xbf2643, 0, 64 * 1024, 128, SECT_4K |
SPI_NOR_HAS_SST26LOCK) },
#endif
#ifdef CONFIG_SPI_FLASH_STMICRO/* STMICRO */
- /* ST Microelectronics -- newer production may have feature updates */
+ /* STMicroelectronics -- newer production may have feature updates */
{ INFO("m25p10", 0x202011, 0, 32 * 1024, 4, 0) },
{ INFO("m25p20", 0x202012, 0, 64 * 1024, 4, 0) },
{ INFO("m25p40", 0x202013, 0, 64 * 1024, 8, 0) },
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 1584b9eac1..0e63f70934 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2010
- *
[PATCH v2 15/16] configs: add stm32mp13 defconfig
Add a initial config for STM32M13x SOC family, using the stm32mp135f-dk device tree. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- (no changes since v1) board/st/stm32mp1/MAINTAINERS | 1 + configs/stm32mp13_defconfig | 54 +++ 2 files changed, 55 insertions(+) create mode 100644 configs/stm32mp13_defconfig diff --git a/board/st/stm32mp1/MAINTAINERS b/board/st/stm32mp1/MAINTAINERS index c9252e90f4..d5a09cdc39 100644 --- a/board/st/stm32mp1/MAINTAINERS +++ b/board/st/stm32mp1/MAINTAINERS @@ -6,6 +6,7 @@ S: Maintained F: arch/arm/dts/stm32mp13* F: arch/arm/dts/stm32mp15* F: board/st/stm32mp1/ +F: configs/stm32mp13_defconfig F: configs/stm32mp15_defconfig F: configs/stm32mp15_basic_defconfig F: configs/stm32mp15_trusted_defconfig diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig new file mode 100644 index 00..877c020b4a --- /dev/null +++ b/configs/stm32mp13_defconfig @@ -0,0 +1,54 @@ +CONFIG_ARM=y +CONFIG_ARCH_STM32MP=y +CONFIG_TFABOOT=y +CONFIG_SYS_MALLOC_F_LEN=0x18 +CONFIG_ENV_OFFSET=0x90 +CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk" +CONFIG_STM32MP13x=y +CONFIG_DDR_CACHEABLE_SIZE=0x1000 +CONFIG_TARGET_ST_STM32MP13x=y +CONFIG_ENV_OFFSET_REDUND=0x94 +# CONFIG_ARMV7_NONSEC is not set +CONFIG_SYS_LOAD_ADDR=0xc200 +CONFIG_SYS_MEMTEST_START=0xc000 +CONFIG_SYS_MEMTEST_END=0xc400 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_BOOTDELAY=1 +CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" +CONFIG_SYS_PROMPT="STM32MP> " +CONFIG_CMD_ADTIMG=y +CONFIG_CMD_ERASEENV=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_LOG=y +CONFIG_OF_LIVE=y +CONFIG_ENV_IS_NOWHERE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=-1 +CONFIG_CLK_SCMI=y +CONFIG_STM32_SDMMC2=y +CONFIG_DM_ETH=y +CONFIG_PINCONF=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_REGULATOR_SCMI=y +CONFIG_RESET_SCMI=y +CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_PSCI=y +CONFIG_TEE=y +CONFIG_OPTEE=y +# CONFIG_OPTEE_TA_AVB is not set +CONFIG_ERRNO_STR=y +# CONFIG_LMB_USE_MAX_REGIONS is not set +CONFIG_LMB_MEMORY_REGIONS=2 +CONFIG_LMB_RESERVED_REGIONS=16 -- 2.25.1
[PATCH v2 16/16] doc: st: stm32mp1: add STM32MP13x support
Add in U-Boot documentation the quick instruction to setup the STMicroelectronics STM32MP13x boards. Signed-off-by: Patrick Delaunay --- Changes in v2: - fix typo error in commit message and in rst file doc/board/st/stm32mp1.rst | 183 ++ 1 file changed, 126 insertions(+), 57 deletions(-) diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst index 0c5d3a90f0..00f9b45442 100644 --- a/doc/board/st/stm32mp1.rst +++ b/doc/board/st/stm32mp1.rst @@ -1,41 +1,31 @@ .. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause .. sectionauthor:: Patrick Delaunay -STM32MP15x boards +STM32MP1xx boards = -This is a quick instruction for setup STM32MP15x boards. +This is a quick instruction for setup STMicroelectronics STM32MP1xx boards. -Futher information can be found in STMicrolectronics STM32 WIKI_. +Further information can be found in STMicroelectronics STM32 WIKI_. Supported devices - -U-Boot supports STMP32MP15x SoCs: +U-Boot supports all the STMicroelectronics MPU with the associated boards - - STM32MP157 - - STM32MP153 - - STM32MP151 + - STMP32MP15x SoCs: -The STM32MP15x is a Cortex-A MPU aimed at various applications. + - STM32MP157 + - STM32MP153 + - STM32MP151 -It features: - - - Dual core Cortex-A7 application core (Single on STM32MP151) - - 2D/3D image composition with GPU (only on STM32MP157) - - Standard memories interface support - - Standard connectivity, widely inherited from the STM32 MCU family - - Comprehensive security support + - STMP32MP13x SoCs: -Each line comes with a security option (cryptography & secure boot) and -a Cortex-A frequency option: - - - A : Cortex-A7 @ 650 MHz - - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz - - D : Cortex-A7 @ 800 MHz - - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz + - STM32MP135 + - STM32MP133 + - STM32MP131 -Everything is supported in Linux but U-Boot is limited to: +Everything is supported in Linux but U-Boot is limited to the boot device: 1. UART 2. SD card/MMC controller (SDMMC) @@ -49,7 +39,35 @@ And the necessary drivers 1. I2C 2. STPMIC1 (PMIC and regulator) 3. Clock, Reset, Sysreset - 4. Fuse + 4. Fuse (BSEC) + 5. OP-TEE + 6. ETH + 7. USB host + 8. WATCHDOG + 9. RNG + 10. RTC + +STM32MP15x +`` + +The STM32MP15x is a Cortex-A7 MPU aimed at various applications. + +It features: + + - Dual core Cortex-A7 application core (Single on STM32MP151) + - 2D/3D image composition with GPU (only on STM32MP157) + - Standard memories interface support + - Standard connectivity, widely inherited from the STM32 MCU family + - Comprehensive security support + - Cortex M4 coprocessor + +Each line comes with a security option (cryptography & secure boot) and +a Cortex-A frequency option: + + - A : Cortex-A7 @ 650 MHz + - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz + - D : Cortex-A7 @ 800 MHz + - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz Currently the following boards are supported: @@ -59,6 +77,16 @@ Currently the following boards are supported: + stm32mp157c-ev1.dts + stm32mp15xx-dhcor-avenger96.dts +STM32MP13x +`` + +The STM32MP13x is a single Cortex-A7 MPU aimed at various applications. + +Currently the following boards are supported: + + + stm32mp135f-dk.dts + + Boot Sequences -- @@ -71,12 +99,22 @@ Boot Sequences + ++-+--+ | | embedded RAM | DDR| +--++-+--+ +| TrustZone| secure monitor | ++--++-+--+ + +The trusted boot chain is recommended with: + +- FSBL = **TF-A BL2** +- Secure monitor = **OP-TEE** +- SSBL = **U-Boot** + +It is the only supported boot chain for STM32MP13x family. The **Trusted** boot chain with TF-A_ ` defconfig_file : - + **stm32mp15_defconfig** (for TF-A_ with FIP support) + + **stm32mp15_defconfig** and **stm32mp13_defconfig** (for TF-A_ with FIP support) + **stm32mp15_trusted_defconfig** (for TF-A_ without FIP support) +-+--++---+ @@ -98,8 +136,8 @@ TF-A_ (BL2) initialize the DDR and loads the next stage binaries from a FIP file the secure monitor to access to secure resources. + HW_CONFIG: The hardware configuration file = the U-Boot device tree -The **Basic** boot chain with SPL -` +The **Basic** boot chain with SPL (for STM32MP15x) +`` defconfig_file : + **stm32mp15_basic_defconfig** @@ -117,16 +155,19 @@ SPL has limited security initialization. U-Boot is running in secure mode and provide a secure monitor to the kernel with only PSCI
[PATCH v2 14/16] arm: dts: stm32mp: add stm32mp13 device tree for U-Boot
Compile the device tree of STM32MP13x boards and add the needed
U-Boot add-on.
Signed-off-by: Patrick Delaunay
Reviewed-by: Patrice Chotard
---
(no changes since v1)
arch/arm/dts/Makefile | 3 +
arch/arm/dts/stm32mp13-u-boot.dtsi | 91 +
arch/arm/dts/stm32mp135f-dk-u-boot.dtsi | 30
3 files changed, 124 insertions(+)
create mode 100644 arch/arm/dts/stm32mp13-u-boot.dtsi
create mode 100644 arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 83630af4f6..6dd87ee663 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1137,6 +1137,9 @@ dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
+dtb-$(CONFIG_STM32MP13x) += \
+ stm32mp135f-dk.dtb
+
dtb-$(CONFIG_STM32MP15x) += \
stm32mp157a-dk1.dtb \
stm32mp157a-icore-stm32mp1-ctouch2.dtb \
diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi
b/arch/arm/dts/stm32mp13-u-boot.dtsi
new file mode 100644
index 00..1b5b358690
--- /dev/null
+++ b/arch/arm/dts/stm32mp13-u-boot.dtsi
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
+ */
+
+/ {
+ aliases {
+ gpio0 =
+ gpio1 =
+ gpio2 =
+ gpio3 =
+ gpio4 =
+ gpio5 =
+ gpio6 =
+ gpio7 =
+ gpio8 =
+ pinctrl0 =
+ };
+
+ /* need PSCI for sysreset during board_f */
+ psci {
+ u-boot,dm-pre-proper;
+ };
+
+ soc {
+ u-boot,dm-pre-reloc;
+
+ ddr: ddr@5a003000 {
+ u-boot,dm-pre-reloc;
+
+ compatible = "st,stm32mp13-ddr";
+
+ reg = <0x5A003000 0x550
+ 0x5A004000 0x234>;
+
+ status = "okay";
+ };
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
new file mode 100644
index 00..dfe5bbb2e3
--- /dev/null
+++ b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
+ */
+
+#include "stm32mp13-u-boot.dtsi"
+
+/ {
+ aliases {
+ mmc0 =
+ };
+
+ config {
+ u-boot,mmc-env-partition = "u-boot-env";
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+_pins_a {
+ u-boot,dm-pre-reloc;
+ pins1 {
+ u-boot,dm-pre-reloc;
+ };
+ pins2 {
+ u-boot,dm-pre-reloc;
+ };
+};
--
2.25.1
[PATCH v2 12/16] ram: stm32mp1: add support of STM32MP13x
Add support for new compatible "st,stm32mp13-ddr" to manage the
DDR sub system (Controller and PHY) in STM32MP13x SOC:
- only one AXI port
- support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2)
The STM32MP15x SOC have 2 AXI ports and 32 bits support.
Signed-off-by: Patrick Delaunay
Reviewed-by: Patrice Chotard
---
(no changes since v1)
.../memory-controllers/st,stm32mp1-ddr.txt| 49 +++
drivers/ram/stm32mp1/stm32mp1_ram.c | 28 +++
2 files changed, 57 insertions(+), 20 deletions(-)
diff --git a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
index 926e3e83b3..e6ea8d0ef5 100644
--- a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
+++ b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
@@ -3,7 +3,8 @@ ST,stm32mp1 DDR3/LPDDR2/LPDDR3 Controller (DDRCTRL and DDRPHYC)
Required properties:
-- compatible : Should be "st,stm32mp1-ddr"
+- compatible : Should be "st,stm32mp1-ddr" for STM32MP15x
+ Should be "st,stm32mp13-ddr" for STM32MP13x
- reg : controleur (DDRCTRL) and phy (DDRPHYC) base address
- clocks : controller clocks handle
- clock-names : associated controller clock names
@@ -13,6 +14,8 @@ Required properties:
the next attributes are DDR parameters, they are generated by DDR tools
included in STM32 Cube tool
+They are required only in SPL, when TFABOOT is not activated.
+
info attributes:
- st,mem-name : name for DDR configuration, simple string for information
@@ -24,7 +27,7 @@ controlleur attributes:
---
- st,ctl-reg : controleur values depending of the DDR type
(DDR3/LPDDR2/LPDDR3)
- for STM32MP15x: 25 values are requested in this order
+ for STM32MP15x and STM32MP13x: 25 values are requested in this order
MSTR
MRCTRL0
MRCTRL1
@@ -53,7 +56,7 @@ controlleur attributes:
- st,ctl-timing: controleur values depending of frequency and timing
parameter
of DDR
- for STM32MP15x: 12 values are requested in this order
+ for STM32MP15x and STM32MP13x: 12 values are requested in this order
RFSHTMG
DRAMTMG0
DRAMTMG1
@@ -68,7 +71,7 @@ controlleur attributes:
ODTCFG
- st,ctl-map : controleur values depending of address mapping
- for STM32MP15x: 9 values are requested in this order
+ for STM32MP15x and STM32MP13x: 9 values are requested in this order
ADDRMAP1
ADDRMAP2
ADDRMAP3
@@ -99,6 +102,19 @@ controlleur attributes:
PCFGWQOS0_1
PCFGWQOS1_1
+ for STM32MP13x: 11 values are requested in this order
+ SCHED
+ SCHED1
+ PERFHPR1
+ PERFLPR1
+ PERFWR1
+ PCFGR_0
+ PCFGW_0
+ PCFGQOS0_0
+ PCFGQOS1_0
+ PCFGWQOS0_0
+ PCFGWQOS1_0
+
phyc attributes:
- st,phy-reg : phy values depending of the DDR type (DDR3/LPDDR2/LPDDR3)
@@ -115,8 +131,19 @@ phyc attributes:
DX2GCR
DX3GCR
+ for STM32MP13x: 9 values are requested in this order
+ PGCR
+ ACIOCR
+ DXCCR
+ DSGCR
+ DCR
+ ODTCR
+ ZQ0CR1
+ DX0GCR
+ DX1GCR
+
- st,phy-timing: phy values depending of frequency and timing
parameter of DDR
- for STM32MP15x: 10 values are requested in this order
+ for STM32MP15x and STM32MP13x: 10 values are requested in this order
PTR0
PTR1
PTR2
@@ -128,16 +155,18 @@ phyc attributes:
MR2
MR3
+ for STM32MP13x: 6 values are requested in this order
+ DX0DLLCR
+ DX0DQTR
+ DX0DQSTR
+ DX1DLLCR
+ DX1DQTR
+ DX1DQSTR
Example:
/ {
soc {
- u-boot,dm-spl;
-
ddr: ddr@0x5A003000{
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-
compatible = "st,stm32mp1-ddr";
reg = <0x5A003000 0x550
diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c
b/drivers/ram/stm32mp1/stm32mp1_ram.c
index 49b1262461..a6c19af972 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ram.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ram.c
@@ -230,29 +230,29 @@ static u8 get_nb_col(struct stm32mp1_ddrctl *ctl, u8
data_bus_width)
reg = readl(>addrmap3);
/* addrmap3.addrmap_col_b6 */
- val = (reg & GENMASK(3, 0)) >> 0;
+ val = (reg & GENMASK(4, 0)) >> 0;
if (val <= 7)
[PATCH v2 08/16] arm: stm32mp: add support of STM32MP13x
Introduce the code in mach-stm32mp and the configuration file stm32mp13_defconfig for the new STM32MP family. Signed-off-by: Patrick Delaunay --- Changes in v2: - fix several typo issue in comments reported by Patrice and Marek arch/arm/mach-stm32mp/Kconfig | 21 +++- arch/arm/mach-stm32mp/Kconfig.13x | 57 + arch/arm/mach-stm32mp/Makefile| 1 + arch/arm/mach-stm32mp/cpu.c | 3 + arch/arm/mach-stm32mp/fdt.c | 3 + arch/arm/mach-stm32mp/include/mach/stm32.h| 26 .../arm/mach-stm32mp/include/mach/sys_proto.h | 16 ++- arch/arm/mach-stm32mp/stm32mp13x.c| 115 ++ board/st/stm32mp1/Kconfig | 15 +++ board/st/stm32mp1/MAINTAINERS | 2 + configs/stm32mp15_basic_defconfig | 2 +- configs/stm32mp15_defconfig | 2 +- configs/stm32mp15_trusted_defconfig | 2 +- include/configs/stm32mp13_common.h| 106 include/configs/stm32mp13_st_common.h | 17 +++ include/configs/stm32mp15_common.h| 4 +- 16 files changed, 385 insertions(+), 7 deletions(-) create mode 100644 arch/arm/mach-stm32mp/Kconfig.13x create mode 100644 arch/arm/mach-stm32mp/stm32mp13x.c create mode 100644 include/configs/stm32mp13_common.h create mode 100644 include/configs/stm32mp13_st_common.h diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 3b4936c326..db47baba6d 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -37,6 +37,24 @@ choice prompt "Select STMicroelectronics STM32MPxxx Soc" default STM32MP15x +config STM32MP13x + bool "Support STMicroelectronics STM32MP13x Soc" + select ARM_SMCCC + select CPU_V7A + select CPU_V7_HAS_NONSEC + select CPU_V7_HAS_VIRT + select OF_BOARD + select OF_BOARD_SETUP + select PINCTRL_STM32 + select STM32_RCC + select STM32_RESET + select STM32_SERIAL + select SYS_ARCH_TIMER + imply CMD_NVEDIT_INFO + help + support of STMicroelectronics SOC STM32MP13x family + STMicroelectronics MPU with core ARMv7 + config STM32MP15x bool "Support STMicroelectronics STM32MP15x Soc" select ARCH_SUPPORT_PSCI @@ -85,7 +103,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 config STM32_ETZPC bool "STM32 Extended TrustZone Protection" - depends on STM32MP15x + depends on STM32MP15x || STM32MP13x default y imply BOOTP_SERVERIP help @@ -108,6 +126,7 @@ config CMD_STM32KEY This command is used to evaluate the secure boot on stm32mp SOC, it is deactivated by default in real products. +source "arch/arm/mach-stm32mp/Kconfig.13x" source "arch/arm/mach-stm32mp/Kconfig.15x" source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig" diff --git a/arch/arm/mach-stm32mp/Kconfig.13x b/arch/arm/mach-stm32mp/Kconfig.13x new file mode 100644 index 00..5fc000986e --- /dev/null +++ b/arch/arm/mach-stm32mp/Kconfig.13x @@ -0,0 +1,57 @@ +if STM32MP13x + +choice + prompt "STM32MP13x board select" + optional + +config TARGET_ST_STM32MP13x + bool "STMicroelectronics STM32MP13x boards" + imply BOOTSTAGE + imply CMD_BOOTSTAGE + imply CMD_CLS if CMD_BMP + imply DISABLE_CONSOLE + imply PRE_CONSOLE_BUFFER + imply SILENT_CONSOLE + help + target the STMicroelectronics board with SOC STM32MP13x + managed by board/st/stm32mp1. + The difference between board are managed with devicetree + +endchoice + +config SYS_TEXT_BASE + default 0xC000 + +config PRE_CON_BUF_ADDR + default 0xC080 + +config PRE_CON_BUF_SZ + default 4096 + +config BOOTSTAGE_STASH_ADDR + default 0xC300 + +if BOOTCOUNT_GENERIC +config SYS_BOOTCOUNT_SINGLEWORD + default y + +# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(31) +config SYS_BOOTCOUNT_ADDR + default 0x5C00A17C +endif + +if DEBUG_UART + +# debug on UART4 by default +config DEBUG_UART_BASE + default 0x4001 + +# clock source is HSI on reset +config DEBUG_UART_CLOCK + default 4800 if STM32_FPGA + default 6400 +endif + +source "board/st/stm32mp1/Kconfig" + +endif diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index 0ffec6e02f..1db9057e04 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -8,6 +8,7 @@ obj-y += dram_init.o obj-y += syscon.o obj-y += bsec.o +obj-$(CONFIG_STM32MP13x) += stm32mp13x.o obj-$(CONFIG_STM32MP15x) += stm32mp15x.o ifdef CONFIG_SPL_BUILD diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index b808964d3e..240960ada4 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -52,8 +52,11
[PATCH v2 11/16] board: stm32pm1: add stm32mp13 board support
Add stm32mp15x prefix to all STM32MP15x board specific functions,
this patch is a preliminary step for STM32MP13x support.
This patch also adds the RCC probe to avoid circular access with
usbphyc probe as clk provider.
Signed-off-by: Patrick Delaunay
---
Changes in v2:
- fix typo in commit message
board/st/stm32mp1/stm32mp1.c | 27 ++-
1 file changed, 18 insertions(+), 9 deletions(-)
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 07b1a63db7..6f5ff423fe 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -554,8 +554,7 @@ static void sysconf_init(void)
clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
}
-/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
-static int dk2_i2c1_fix(void)
+static int board_stm32mp15x_dk2_init(void)
{
ofnode node;
struct gpio_desc hdmi, audio;
@@ -564,6 +563,7 @@ static int dk2_i2c1_fix(void)
if (!IS_ENABLED(CONFIG_DM_REGULATOR))
return -ENODEV;
+ /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
if (!ofnode_valid(node)) {
log_debug("no hdmi-transmitter@39 ?\n");
@@ -611,7 +611,7 @@ error:
return ret;
}
-static bool board_is_dk2(void)
+static bool board_is_stm32mp15x_dk2(void)
{
if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
of_machine_is_compatible("st,stm32mp157c-dk2"))
@@ -620,7 +620,7 @@ static bool board_is_dk2(void)
return false;
}
-static bool board_is_ev1(void)
+static bool board_is_stm32mp15x_ev1(void)
{
if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
(of_machine_is_compatible("st,stm32mp157a-ev1") ||
@@ -644,7 +644,7 @@ U_BOOT_DRIVER(goodix) = {
.of_match = goodix_ids,
};
-static void board_ev1_init(void)
+static void board_stm32mp15x_ev1_init(void)
{
struct udevice *dev;
@@ -655,13 +655,22 @@ static void board_ev1_init(void)
/* board dependent setup after realloc */
int board_init(void)
{
+ struct udevice *dev;
+ int ret;
+
+ /* probe RCC to avoid circular access with usbphyc probe as clk
provider */
+ if (IS_ENABLED(CONFIG_CLK_STM32MP13)) {
+ ret = uclass_get_device_by_driver(UCLASS_CLK,
DM_DRIVER_GET(stm32mp1_clock), );
+ log_debug("Clock init failed: %d\n", ret);
+ }
+
board_key_check();
- if (board_is_ev1())
- board_ev1_init();
+ if (board_is_stm32mp15x_ev1())
+ board_stm32mp15x_ev1_init();
- if (board_is_dk2())
- dk2_i2c1_fix();
+ if (board_is_stm32mp15x_dk2())
+ board_stm32mp15x_dk2_init();
if (IS_ENABLED(CONFIG_DM_REGULATOR))
regulators_enable_boot_on(_DEBUG);
--
2.25.1
[PATCH v2 13/16] mmc: stm32_sdmmc2: make reset property optional
Although not recommended, the reset property could be made optional.
This way the driver will probe even if no reset property is provided
in an sdmmc node in DT. This reset is already optional in Linux.
Signed-off-by: Yann Gautier
Reviewed-by: Jaehoon Chung
Reviewed-by: Patrice Chotard
Signed-off-by: Patrick Delaunay
---
(no changes since v1)
drivers/mmc/stm32_sdmmc2.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
index 44bfc911af..81b07609a9 100644
--- a/drivers/mmc/stm32_sdmmc2.c
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -514,10 +514,12 @@ retry_cmd:
*/
static void stm32_sdmmc2_reset(struct stm32_sdmmc2_priv *priv)
{
- /* Reset */
- reset_assert(>reset_ctl);
- udelay(2);
- reset_deassert(>reset_ctl);
+ if (reset_valid(>reset_ctl)) {
+ /* Reset */
+ reset_assert(>reset_ctl);
+ udelay(2);
+ reset_deassert(>reset_ctl);
+ }
/* init the needed SDMMC register after reset */
writel(priv->pwr_reg_msk, priv->base + SDMMC_POWER);
@@ -735,7 +737,7 @@ static int stm32_sdmmc2_probe(struct udevice *dev)
ret = reset_get_by_index(dev, 0, >reset_ctl);
if (ret)
- goto clk_disable;
+ dev_dbg(dev, "No reset provided\n");
gpio_request_by_name(dev, "cd-gpios", 0, >cd_gpio,
GPIOD_IS_IN);
@@ -755,8 +757,6 @@ static int stm32_sdmmc2_probe(struct udevice *dev)
stm32_sdmmc2_reset(priv);
return 0;
-clk_disable:
- clk_disable(>clk);
clk_free:
clk_free(>clk);
--
2.25.1
[PATCH v2 05/16] arm: stm32mp: add choice for STM32MP SOC family
Add mandatory choice for SOC support in ARCH_STM32MP. This patch is a preliminary step for new SOC introduction in STM32MP family. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- (no changes since v1) arch/arm/mach-stm32mp/Kconfig | 23 +-- configs/stm32mp15_basic_defconfig | 4 ++-- configs/stm32mp15_defconfig | 4 ++-- configs/stm32mp15_trusted_defconfig | 4 ++-- 4 files changed, 19 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index be0d74b4ac..446d3258c9 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -33,6 +33,10 @@ config SYS_MALLOC_LEN config ENV_SIZE default 0x2000 +choice + prompt "Select STMicroelectronics STM32MPxxx Soc" + default STM32MP15x + config STM32MP15x bool "Support STMicroelectronics STM32MP15x Soc" select ARCH_SUPPORT_PSCI @@ -54,11 +58,13 @@ config STM32MP15x STM32MP157, STM32MP153 or STM32MP151 STMicroelectronics MPU with core ARMv7 dual core A7 for STM32MP157/3, monocore for STM32MP151 - target all the STMicroelectronics board with SOC STM32MP1 family +endchoice + +if STM32MP15x config STM32MP15x_STM32IMAGE bool "Support STM32 image for generated U-Boot image" - depends on STM32MP15x && TFABOOT + depends on TFABOOT help Support of STM32 image generation for SOC STM32MP15x for TF-A boot when FIP container is not used @@ -69,7 +75,6 @@ choice config TARGET_ST_STM32MP15x bool "STMicroelectronics STM32MP15x boards" - select STM32MP15x imply BOOTSTAGE imply CMD_BOOTSTAGE imply CMD_CLS if CMD_BMP @@ -84,7 +89,6 @@ config TARGET_ST_STM32MP15x config TARGET_MICROGEA_STM32MP1 bool "Engicam MicroGEA STM32MP1 SOM" - select STM32MP15x imply BOOTSTAGE imply CMD_BOOTSTAGE imply CMD_CLS if CMD_BMP @@ -109,7 +113,6 @@ config TARGET_MICROGEA_STM32MP1 config TARGET_ICORE_STM32MP1 bool "Engicam i.Core STM32MP1 SOM" - select STM32MP15x imply BOOTSTAGE imply CMD_BOOTSTAGE imply CMD_CLS if CMD_BMP @@ -131,12 +134,16 @@ config TARGET_ICORE_STM32MP1 config TARGET_DH_STM32MP1_PDK2 bool "DH STM32MP1 PDK2" - select STM32MP15x help Target the DH PDK2 development kit with STM32MP15x SoM. endchoice +source "board/st/stm32mp1/Kconfig" +source "board/dhelectronics/dh_stm32mp1/Kconfig" +source "board/engicam/stm32mp1/Kconfig" +endif + config SYS_TEXT_BASE default 0xC010 @@ -221,8 +228,4 @@ config DEBUG_UART_CLOCK endif source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig" -source "board/dhelectronics/dh_stm32mp1/Kconfig" -source "board/engicam/stm32mp1/Kconfig" -source "board/st/stm32mp1/Kconfig" - endif diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 1b1c255b98..2e2d127ab7 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -9,10 +9,10 @@ CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC=y CONFIG_SPL=y CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_TYPEC_STUSB160X=y +CONFIG_ENV_OFFSET_REDUND=0x2C CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y -CONFIG_ENV_OFFSET_REDUND=0x2C -CONFIG_TYPEC_STUSB160X=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_ARMV7_VIRT is not set diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 02b37e14ea..8853c72c37 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -6,11 +6,11 @@ CONFIG_ENV_OFFSET=0x48 CONFIG_ENV_SECT_SIZE=0x4 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_TYPEC_STUSB160X=y +CONFIG_ENV_OFFSET_REDUND=0x4C CONFIG_DDR_CACHEABLE_SIZE=0x1000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y -CONFIG_ENV_OFFSET_REDUND=0x4C -CONFIG_TYPEC_STUSB160X=y # CONFIG_ARMV7_NONSEC is not set CONFIG_SYS_LOAD_ADDR=0xc200 CONFIG_SYS_MEMTEST_START=0xc000 diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index df31c0fbb1..e880dd3fcb 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -7,11 +7,11 @@ CONFIG_ENV_SECT_SIZE=0x4 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_STM32MP15x_STM32IMAGE=y CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_TYPEC_STUSB160X=y +CONFIG_ENV_OFFSET_REDUND=0x2C CONFIG_DDR_CACHEABLE_SIZE=0x1000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y -CONFIG_ENV_OFFSET_REDUND=0x2C -CONFIG_TYPEC_STUSB160X=y # CONFIG_ARMV7_NONSEC is not set CONFIG_SYS_LOAD_ADDR=0xc200 CONFIG_SYS_MEMTEST_START=0xc000 -- 2.25.1
[PATCH v2 07/16] arm: stm32mp: add CONFIG_STM32MP15_PWR
Add config CONFIG_STM32MP15_PWR to handle the access to regulators managed by the PWR driver defined in pwr_regulator.c This driver is only used in U-Boot by STM32MP15x family. Signed-off-by: Patrick Delaunay --- Changes in v2: - fix commit message arch/arm/mach-stm32mp/Kconfig.15x | 16 arch/arm/mach-stm32mp/Makefile| 2 +- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/Kconfig.15x b/arch/arm/mach-stm32mp/Kconfig.15x index 19f161cf5c..d516270292 100644 --- a/arch/arm/mach-stm32mp/Kconfig.15x +++ b/arch/arm/mach-stm32mp/Kconfig.15x @@ -77,6 +77,22 @@ config TARGET_ICORE_STM32MP1 endchoice +config STM32MP15_PWR + bool "Enable driver for STM32MP15x PWR" + depends on DM_REGULATOR && DM_PMIC + default y + help + This config enables implementation of driver-model pmic and + regulator uclass features for access to STM32MP15x PWR. + +config SPL_STM32MP15_PWR + bool "Enable driver for STM32MP15x PWR in SPL" + depends on SPL && SPL_DM_REGULATOR && SPL_DM_PMIC + default y + help + This config enables implementation of driver-model pmic and + regulator uclass features for access to STM32MP15x PWR in SPL. + config SYS_TEXT_BASE default 0xC010 diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index d362104fee..0ffec6e02f 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -21,5 +21,5 @@ obj-$(CONFIG_ARMV7_PSCI) += psci.o obj-$(CONFIG_TFABOOT) += boot_params.o endif -obj-$(CONFIG_$(SPL_)DM_REGULATOR) += pwr_regulator.o +obj-$(CONFIG_$(SPL_)STM32MP15_PWR) += pwr_regulator.o obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o -- 2.25.1
[PATCH v2 09/16] arm: stm32mp: support 2 MAC address for STM32MP13
Add support of several MAC address in OTP (3 32bits OTP word for
2 MAC address) for SOCs in STM32MP13x family: STM32MP133 and STM32MP135.
Signed-off-by: Patrick Delaunay
Reviewed-by: Patrice Chotard
---
(no changes since v1)
arch/arm/mach-stm32mp/cpu.c | 41 ---
.../arm/mach-stm32mp/include/mach/sys_proto.h | 1 +
arch/arm/mach-stm32mp/stm32mp13x.c| 20 +
arch/arm/mach-stm32mp/stm32mp15x.c| 5 +++
4 files changed, 52 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 240960ada4..855fc755fe 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -290,16 +290,18 @@ __weak int setup_mac_address(void)
{
int ret;
int i;
- u32 otp[2];
+ u32 otp[3];
uchar enetaddr[6];
struct udevice *dev;
+ int nb_eth, nb_otp, index;
if (!IS_ENABLED(CONFIG_NET))
return 0;
- /* MAC already in environment */
- if (eth_env_get_enetaddr("ethaddr", enetaddr))
- return 0;
+ nb_eth = get_eth_nb();
+
+ /* 6 bytes for each MAC addr and 4 bytes for each OTP */
+ nb_otp = DIV_ROUND_UP(6 * nb_eth, 4);
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(stm32mp_bsec),
@@ -307,22 +309,31 @@ __weak int setup_mac_address(void)
if (ret)
return ret;
- ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_MAC),
- otp, sizeof(otp));
+ ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_MAC), otp, 4 * nb_otp);
if (ret < 0)
return ret;
- for (i = 0; i < 6; i++)
- enetaddr[i] = ((uint8_t *))[i];
+ for (index = 0; index < nb_eth; index++) {
+ /* MAC already in environment */
+ if (eth_env_get_enetaddr_by_index("eth", index, enetaddr))
+ continue;
+
+ for (i = 0; i < 6; i++)
+ enetaddr[i] = ((uint8_t *))[i + 6 * index];
- if (!is_valid_ethaddr(enetaddr)) {
- log_err("invalid MAC address in OTP %pM\n", enetaddr);
- return -EINVAL;
+ if (!is_valid_ethaddr(enetaddr)) {
+ log_err("invalid MAC address %d in OTP %pM\n",
+ index, enetaddr);
+ return -EINVAL;
+ }
+ log_debug("OTP MAC address %d = %pM\n", index, enetaddr);
+ ret = eth_env_set_enetaddr_by_index("eth", index, enetaddr);
+ if (ret) {
+ log_err("Failed to set mac address %pM from OTP: %d\n",
+ enetaddr, ret);
+ return ret;
+ }
}
- log_debug("OTP MAC address = %pM\n", enetaddr);
- ret = eth_env_set_enetaddr("ethaddr", enetaddr);
- if (ret)
- log_err("Failed to set mac address %pM from OTP: %d\n",
enetaddr, ret);
return 0;
}
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index 829b3feebf..4b564e86dc 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -64,6 +64,7 @@ void get_soc_name(char name[SOC_NAME_SIZE]);
/* return boot mode */
u32 get_bootmode(void);
+int get_eth_nb(void);
int setup_mac_address(void);
/* board power management : configure vddcore according OPP */
diff --git a/arch/arm/mach-stm32mp/stm32mp13x.c
b/arch/arm/mach-stm32mp/stm32mp13x.c
index d5e3a787c2..bd3f24c349 100644
--- a/arch/arm/mach-stm32mp/stm32mp13x.c
+++ b/arch/arm/mach-stm32mp/stm32mp13x.c
@@ -51,6 +51,26 @@ u32 get_cpu_type(void)
return (get_cpu_dev() << 16) | get_cpu_rpn();
}
+int get_eth_nb(void)
+{
+ int nb_eth = 2;
+
+ switch (get_cpu_type()) {
+ case CPU_STM32MP131Dxx:
+ fallthrough;
+ case CPU_STM32MP131Cxx:
+ fallthrough;
+ case CPU_STM32MP131Axx:
+ nb_eth = 1;
+ break;
+ default:
+ nb_eth = 2;
+ break;
+ }
+
+ return nb_eth;
+}
+
void get_soc_name(char name[SOC_NAME_SIZE])
{
char *cpu_s, *cpu_r;
diff --git a/arch/arm/mach-stm32mp/stm32mp15x.c
b/arch/arm/mach-stm32mp/stm32mp15x.c
index 800fad2f43..a093e6163e 100644
--- a/arch/arm/mach-stm32mp/stm32mp15x.c
+++ b/arch/arm/mach-stm32mp/stm32mp15x.c
@@ -247,6 +247,11 @@ u32 get_cpu_type(void)
return (get_cpu_dev() << 16) | get_cpu_rpn();
}
+int get_eth_nb(void)
+{
+ return 1;
+}
+
/* Get Package options from OTP */
u32 get_cpu_package(void)
{
--
2.25.1
[PATCH v2 06/16] arm: stm32mp: add sub config Kconfig.15x
Add sub Kconfig for each SOC in the STM32 CPU family. It is a preliminary step to introduce a new SOC in the STM32MP family. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- (no changes since v1) arch/arm/mach-stm32mp/Kconfig | 119 +--- arch/arm/mach-stm32mp/Kconfig.15x | 119 configs/stm32mp15_basic_defconfig | 2 +- configs/stm32mp15_defconfig | 4 +- configs/stm32mp15_trusted_defconfig | 4 +- 5 files changed, 125 insertions(+), 123 deletions(-) create mode 100644 arch/arm/mach-stm32mp/Kconfig.15x diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 446d3258c9..3b4936c326 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -60,93 +60,6 @@ config STM32MP15x dual core A7 for STM32MP157/3, monocore for STM32MP151 endchoice -if STM32MP15x - -config STM32MP15x_STM32IMAGE - bool "Support STM32 image for generated U-Boot image" - depends on TFABOOT - help - Support of STM32 image generation for SOC STM32MP15x - for TF-A boot when FIP container is not used - -choice - prompt "STM32MP15x board select" - optional - -config TARGET_ST_STM32MP15x - bool "STMicroelectronics STM32MP15x boards" - imply BOOTSTAGE - imply CMD_BOOTSTAGE - imply CMD_CLS if CMD_BMP - imply DISABLE_CONSOLE - imply PRE_CONSOLE_BUFFER - imply SILENT_CONSOLE - help - target the STMicroelectronics board with SOC STM32MP15x - managed by board/st/stm32mp1: - Evalulation board (EV1) or Discovery board (DK1 and DK2). - The difference between board are managed with devicetree - -config TARGET_MICROGEA_STM32MP1 - bool "Engicam MicroGEA STM32MP1 SOM" - imply BOOTSTAGE - imply CMD_BOOTSTAGE - imply CMD_CLS if CMD_BMP - imply DISABLE_CONSOLE - imply PRE_CONSOLE_BUFFER - imply SILENT_CONSOLE - help - MicroGEA STM32MP1 is a STM32MP157A based Micro SOM. - - MicroGEA STM32MP1 MicroDev 2.0: - * MicroDev 2.0 is a general purpose miniature carrier board with CAN, - LTE and LVDS panel interfaces. - * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board - for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board. - - MicroGEA STM32MP1 MicroDev 2.0 7" OF: - * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS - panel and toucscreen. - * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with - pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7" - Open Frame Solution board. - -config TARGET_ICORE_STM32MP1 - bool "Engicam i.Core STM32MP1 SOM" - imply BOOTSTAGE - imply CMD_BOOTSTAGE - imply CMD_CLS if CMD_BMP - imply DISABLE_CONSOLE - imply PRE_CONSOLE_BUFFER - imply SILENT_CONSOLE - help - i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A. - - i.Core STM32MP1 EDIMM2.2: - * EDIMM2.2 is a Form Factor Capacitive Evaluation Board. - * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for - creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit. - - i.Core STM32MP1 C.TOUCH 2.0 - * C.TOUCH 2.0 is a general purpose Carrier board. - * i.Core STM32MP1 needs to mount on top of this Carrier board - for creating complete i.Core STM32MP1 C.TOUCH 2.0 board. - -config TARGET_DH_STM32MP1_PDK2 - bool "DH STM32MP1 PDK2" - help - Target the DH PDK2 development kit with STM32MP15x SoM. - -endchoice - -source "board/st/stm32mp1/Kconfig" -source "board/dhelectronics/dh_stm32mp1/Kconfig" -source "board/engicam/stm32mp1/Kconfig" -endif - -config SYS_TEXT_BASE - default 0xC010 - config NR_DRAM_BANKS default 1 @@ -195,37 +108,7 @@ config CMD_STM32KEY This command is used to evaluate the secure boot on stm32mp SOC, it is deactivated by default in real products. -config PRE_CON_BUF_ADDR - default 0xC02FF000 - -config PRE_CON_BUF_SZ - default 4096 - -config BOOTSTAGE_STASH_ADDR - default 0xC300 - -if BOOTCOUNT_GENERIC -config SYS_BOOTCOUNT_SINGLEWORD - default y - -# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21) -config SYS_BOOTCOUNT_ADDR - default 0x5C00A154 -endif - -if DEBUG_UART - -config DEBUG_UART_BOARD_INIT - default y - -# debug on UART4 by default -config DEBUG_UART_BASE - default 0x4001 - -# clock source is HSI on reset -config DEBUG_UART_CLOCK - default 6400 -endif +source "arch/arm/mach-stm32mp/Kconfig.15x" source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig" endif diff --git a/arch/arm/mach-stm32mp/Kconfig.15x b/arch/arm/mach-stm32mp/Kconfig.15x new file mode
[PATCH v2 10/16] pinctrl: stm32: add support of STM32MP135
Add support for "st,stm32mp135-pinctrl" for STM32MP13x
Signed-off-by: Patrick Delaunay
Reviewed-by: Patrice Chotard
---
(no changes since v1)
drivers/pinctrl/pinctrl_stm32.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 56a20e8bd2..990cd19286 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -488,6 +488,7 @@ static const struct udevice_id stm32_pinctrl_ids[] = {
{ .compatible = "st,stm32h743-pinctrl" },
{ .compatible = "st,stm32mp157-pinctrl" },
{ .compatible = "st,stm32mp157-z-pinctrl" },
+ { .compatible = "st,stm32mp135-pinctrl" },
{ }
};
--
2.25.1
[PATCH v2 04/16] arm: stm32mp: move code for STM32MP15x
Move code and defines only needed for CONFIG_STM32MP15x in stm32mp15x.c
when low level init without TFABOOT is supported.
Signed-off-by: Patrick Delaunay
Reviewed-by: Patrice Chotard
---
(no changes since v1)
arch/arm/mach-stm32mp/Makefile| 2 +
arch/arm/mach-stm32mp/cpu.c | 331 +
arch/arm/mach-stm32mp/fdt.c | 8 +-
.../arm/mach-stm32mp/include/mach/sys_proto.h | 14 +-
arch/arm/mach-stm32mp/spl.c | 1 +
arch/arm/mach-stm32mp/stm32mp15x.c| 345 ++
6 files changed, 377 insertions(+), 324 deletions(-)
create mode 100644 arch/arm/mach-stm32mp/stm32mp15x.c
diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile
index 391b47cf13..d362104fee 100644
--- a/arch/arm/mach-stm32mp/Makefile
+++ b/arch/arm/mach-stm32mp/Makefile
@@ -8,6 +8,8 @@ obj-y += dram_init.o
obj-y += syscon.o
obj-y += bsec.o
+obj-$(CONFIG_STM32MP15x) += stm32mp15x.o
+
ifdef CONFIG_SPL_BUILD
obj-y += spl.o
obj-y += tzc400.o
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 6f44c75515..b808964d3e 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -16,7 +16,6 @@
#include
#include
#include
-#include
#include
#include
#include
@@ -24,67 +23,6 @@
#include
#include
-/* RCC register */
-#define RCC_TZCR (STM32_RCC_BASE + 0x00)
-#define RCC_DBGCFGR(STM32_RCC_BASE + 0x080C)
-#define RCC_BDCR (STM32_RCC_BASE + 0x0140)
-#define RCC_MP_APB5ENSETR (STM32_RCC_BASE + 0x0208)
-#define RCC_MP_AHB5ENSETR (STM32_RCC_BASE + 0x0210)
-#define RCC_BDCR_VSWRSTBIT(31)
-#define RCC_BDCR_RTCSRCGENMASK(17, 16)
-#define RCC_DBGCFGR_DBGCKENBIT(8)
-
-/* Security register */
-#define ETZPC_TZMA1_SIZE (STM32_ETZPC_BASE + 0x04)
-#define ETZPC_DECPROT0 (STM32_ETZPC_BASE + 0x10)
-
-#define TZC_GATE_KEEPER(STM32_TZC_BASE + 0x008)
-#define TZC_REGION_ATTRIBUTE0 (STM32_TZC_BASE + 0x110)
-#define TZC_REGION_ID_ACCESS0 (STM32_TZC_BASE + 0x114)
-
-#define TAMP_CR1 (STM32_TAMP_BASE + 0x00)
-
-#define PWR_CR1(STM32_PWR_BASE + 0x00)
-#define PWR_MCUCR (STM32_PWR_BASE + 0x14)
-#define PWR_CR1_DBPBIT(8)
-#define PWR_MCUCR_SBF BIT(6)
-
-/* DBGMCU register */
-#define DBGMCU_IDC (STM32_DBGMCU_BASE + 0x00)
-#define DBGMCU_APB4FZ1 (STM32_DBGMCU_BASE + 0x2C)
-#define DBGMCU_APB4FZ1_IWDG2 BIT(2)
-#define DBGMCU_IDC_DEV_ID_MASK GENMASK(11, 0)
-#define DBGMCU_IDC_DEV_ID_SHIFT0
-#define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16)
-#define DBGMCU_IDC_REV_ID_SHIFT16
-
-/* GPIOZ registers */
-#define GPIOZ_SECCFGR 0x54004030
-
-/* boot interface from Bootrom
- * - boot instance = bit 31:16
- * - boot device = bit 15:0
- */
-#define BOOTROM_PARAM_ADDR 0x2FFC0078
-#define BOOTROM_MODE_MASK GENMASK(15, 0)
-#define BOOTROM_MODE_SHIFT 0
-#define BOOTROM_INSTANCE_MASK GENMASK(31, 16)
-#define BOOTROM_INSTANCE_SHIFT 16
-
-/* Device Part Number (RPN) = OTP_DATA1 lower 8 bits */
-#define RPN_SHIFT 0
-#define RPN_MASK GENMASK(7, 0)
-
-/* Package = bit 27:29 of OTP16
- * - 100: LBGA448 (FFI) => AA = LFBGA 18x18mm 448 balls p. 0.8mm
- * - 011: LBGA354 (LCI) => AB = LFBGA 16x16mm 359 balls p. 0.8mm
- * - 010: TFBGA361 (FFC) => AC = TFBGA 12x12mm 361 balls p. 0.5mm
- * - 001: TFBGA257 (LCC) => AD = TFBGA 10x10mm 257 balls p. 0.5mm
- * - others: Reserved
- */
-#define PKG_SHIFT 27
-#define PKG_MASK GENMASK(2, 0)
-
/*
* early TLB into the .data section so that it not get cleared
* with 16kB allignment (see TTBR0_BASE_ADDR_MASK)
@@ -93,121 +31,6 @@ u8 early_tlb[PGTABLE_SIZE] __section(".data")
__aligned(0x4000);
struct lmb lmb;
-static void security_init(void)
-{
- /* Disable the backup domain write protection */
- /* the protection is enable at each reset by hardware */
- /* And must be disable by software */
- setbits_le32(PWR_CR1, PWR_CR1_DBP);
-
- while (!(readl(PWR_CR1) & PWR_CR1_DBP))
- ;
-
- /* If RTC clock isn't enable so this is a cold boot then we need
-* to reset the backup domain
-*/
- if (!(readl(RCC_BDCR) & RCC_BDCR_RTCSRC)) {
- setbits_le32(RCC_BDCR, RCC_BDCR_VSWRST);
- while (!(readl(RCC_BDCR) & RCC_BDCR_VSWRST))
- ;
- clrbits_le32(RCC_BDCR, RCC_BDCR_VSWRST);
- }
-
- /* allow non secure access in Write/Read for all peripheral */
- writel(GENMASK(25, 0), ETZPC_DECPROT0);
-
- /* Open SYSRAM for no secure access */
- writel(0x0, ETZPC_TZMA1_SIZE);
-
- /* enable TZC1 TZC2 clock */
- writel(BIT(11) | BIT(12), RCC_MP_APB5ENSETR);
-
- /* Region 0 set to no access by default */
- /* bit 0 / 16 => nsaid0 read/write Enable
-
[PATCH v2 03/16] arm: stm32mp: move the get_otp helper function in bsec
As the get_otp() helper function in bsec are common for all STM32MP family,
move this function in bsec driver
Signed-off-by: Patrick Delaunay
Reviewed-by: Patrice Chotard
---
(no changes since v1)
arch/arm/mach-stm32mp/bsec.c | 17 +
arch/arm/mach-stm32mp/cpu.c| 17 -
arch/arm/mach-stm32mp/include/mach/sys_proto.h | 3 +++
3 files changed, 20 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index 506caa0a31..c00130b08b 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -632,3 +632,20 @@ bool bsec_dbgswenable(void)
return false;
}
+
+u32 get_otp(int index, int shift, int mask)
+{
+ int ret;
+ struct udevice *dev;
+ u32 otp = 0;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(stm32mp_bsec),
+ );
+
+ if (!ret)
+ ret = misc_read(dev, STM32_BSEC_SHADOW(index),
+ , sizeof(otp));
+
+ return (otp >> shift) & mask;
+}
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 0ad5f307db..6f44c75515 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -349,23 +349,6 @@ u32 get_cpu_rev(void)
return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT;
}
-static u32 get_otp(int index, int shift, int mask)
-{
- int ret;
- struct udevice *dev;
- u32 otp = 0;
-
- ret = uclass_get_device_by_driver(UCLASS_MISC,
- DM_DRIVER_GET(stm32mp_bsec),
- );
-
- if (!ret)
- ret = misc_read(dev, STM32_BSEC_SHADOW(index),
- , sizeof(otp));
-
- return (otp >> shift) & mask;
-}
-
/* Get Device Part Number (RPN) from OTP */
static u32 get_cpu_rpn(void)
{
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index b91f98eb45..dc98f0c5a4 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -52,3 +52,6 @@ int setup_mac_address(void);
/* board power management : configure vddcore according OPP */
void board_vddcore_init(u32 voltage_mv);
+
+/* helper function: read data from OTP */
+u32 get_otp(int index, int shift, int mask);
--
2.25.1
[PATCH v2 02/16] configs: stm32mp1: move SUPPORT_SPL in STM32MP15x
The SPL is only supported by STM32MP15x not by all the SOC with STM32MP arch. Only TFABOOT is supported in next products. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- (no changes since v1) arch/arm/Kconfig | 1 - arch/arm/mach-stm32mp/Kconfig | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9898c7d68e..5f24ffc0f3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1951,7 +1951,6 @@ config ARCH_STM32MP select OF_SYSTEM_SETUP select PINCTRL select REGMAP - select SUPPORT_SPL select SYSCON select SYSRESET select SYS_THUMB_BUILD diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index e48f98ba29..be0d74b4ac 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -46,6 +46,7 @@ config STM32MP15x select STM32_RCC select STM32_RESET select STM32_SERIAL + select SUPPORT_SPL select SYS_ARCH_TIMER imply CMD_NVEDIT_INFO help -- 2.25.1
[PATCH v2 01/16] ARM: dts: stm32: add STM32MP13 SoCs support
Add initial support of STM32MP13 family based on v5.18-rc2
Signed-off-by: Patrick Delaunay
Reviewed-by: Patrice Chotard
---
(no changes since v1)
arch/arm/dts/stm32mp13-pinctrl.dtsi | 123 ++
arch/arm/dts/stm32mp131.dtsi| 358
arch/arm/dts/stm32mp133.dtsi| 37 +++
arch/arm/dts/stm32mp135.dtsi| 12 +
arch/arm/dts/stm32mp135f-dk.dts | 57 +
arch/arm/dts/stm32mp13xc.dtsi | 17 ++
arch/arm/dts/stm32mp13xf.dtsi | 17 ++
board/st/stm32mp1/MAINTAINERS | 1 +
8 files changed, 622 insertions(+)
create mode 100644 arch/arm/dts/stm32mp13-pinctrl.dtsi
create mode 100644 arch/arm/dts/stm32mp131.dtsi
create mode 100644 arch/arm/dts/stm32mp133.dtsi
create mode 100644 arch/arm/dts/stm32mp135.dtsi
create mode 100644 arch/arm/dts/stm32mp135f-dk.dts
create mode 100644 arch/arm/dts/stm32mp13xc.dtsi
create mode 100644 arch/arm/dts/stm32mp13xf.dtsi
diff --git a/arch/arm/dts/stm32mp13-pinctrl.dtsi
b/arch/arm/dts/stm32mp13-pinctrl.dtsi
new file mode 100644
index 00..d2472cd8f1
--- /dev/null
+++ b/arch/arm/dts/stm32mp13-pinctrl.dtsi
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
+ * Author: Alexandre Torgue
+ */
+#include
+
+ {
+ sdmmc1_b4_pins_a: sdmmc1-b4-0 {
+ pins {
+ pinmux = , /* SDMMC1_D0 */
+, /* SDMMC1_D1 */
+, /* SDMMC1_D2 */
+, /* SDMMC1_D3 */
+; /* SDMMC1_CMD */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-disable;
+ };
+ };
+
+ sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
+ pins1 {
+ pinmux = , /* SDMMC1_D0 */
+, /* SDMMC1_D1 */
+, /* SDMMC1_D2 */
+; /* SDMMC1_D3 */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-disable;
+ };
+ pins2 {
+ pinmux = ; /* SDMMC1_CMD */
+ slew-rate = <1>;
+ drive-open-drain;
+ bias-disable;
+ };
+ };
+
+ sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
+ pins {
+ pinmux = , /* SDMMC1_D0 */
+, /* SDMMC1_D1 */
+, /* SDMMC1_D2
*/
+, /* SDMMC1_D3
*/
+, /* SDMMC1_CK
*/
+; /* SDMMC1_CMD
*/
+ };
+ };
+
+ sdmmc1_clk_pins_a: sdmmc1-clk-0 {
+ pins {
+ pinmux = ; /* SDMMC1_CK */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-disable;
+ };
+ };
+
+ sdmmc2_b4_pins_a: sdmmc2-b4-0 {
+ pins {
+ pinmux = , /* SDMMC2_D0 */
+, /* SDMMC2_D1 */
+, /* SDMMC2_D2 */
+, /* SDMMC2_D3 */
+; /* SDMMC2_CMD */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-pull-up;
+ };
+ };
+
+ sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
+ pins1 {
+ pinmux = , /* SDMMC2_D0 */
+, /* SDMMC2_D1 */
+, /* SDMMC2_D2 */
+; /* SDMMC2_D3 */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-pull-up;
+ };
+ pins2 {
+ pinmux = ; /* SDMMC2_CMD */
+ slew-rate = <1>;
+ drive-open-drain;
+ bias-pull-up;
+ };
+ };
+
+ sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
+ pins {
+ pinmux = , /* SDMMC2_D0
*/
+, /* SDMMC2_D1
*/
+, /* SDMMC2_D2 */
+, /* SDMMC2_D3 */
+, /* SDMMC2_CK */
+; /* SDMMC2_CMD
*/
+ };
+ };
+
+ sdmmc2_clk_pins_a: sdmmc2-clk-0 {
+ pins {
+ pinmux = ; /* SDMMC2_CK */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-pull-up;
+ };
+ };
+
+ uart4_pins_a: uart4-0 {
+ pins1 {
+
[PATCH v2 00/16] stm32mp: add STM32MP13x support
Add the minimal support of the new STM32MP13x in mach-stm32mp to allow boot from SD Card. STM32MP13x is a single Cortex-A7 MPU aimed at various applications. The discovery board is supported with stm32mp13_defconfig and the device tree stm32mp135f-dk.dts. The supported boot sequence is: - TF-A BL2 - OP-TEE - U-Boot - Linux Kernel The console over UART and boot from SD Card is functional with this serie. The RCC driver, with support of reset and clock, is not yet provided today and the SCMI is not yet activated in device tree as in Linux kernel. Changes in v2: - fix commit message - fix several typo issue in comments reported by Patrice and Marek - fix typo in commit message - fix typo error in commit message and in rst file Patrick Delaunay (16): ARM: dts: stm32: add STM32MP13 SoCs support configs: stm32mp1: move SUPPORT_SPL in STM32MP15x arm: stm32mp: move the get_otp helper function in bsec arm: stm32mp: move code for STM32MP15x arm: stm32mp: add choice for STM32MP SOC family arm: stm32mp: add sub config Kconfig.15x arm: stm32mp: add CONFIG_STM32MP15_PWR arm: stm32mp: add support of STM32MP13x arm: stm32mp: support 2 MAC address for STM32MP13 pinctrl: stm32: add support of STM32MP135 board: stm32pm1: add stm32mp13 board support ram: stm32mp1: add support of STM32MP13x mmc: stm32_sdmmc2: make reset property optional arm: dts: stm32mp: add stm32mp13 device tree for U-Boot configs: add stm32mp13 defconfig doc: st: stm32mp1: add STM32MP13x support arch/arm/Kconfig | 1 - arch/arm/dts/Makefile | 3 + arch/arm/dts/stm32mp13-pinctrl.dtsi | 123 ++ arch/arm/dts/stm32mp13-u-boot.dtsi| 91 arch/arm/dts/stm32mp131.dtsi | 358 arch/arm/dts/stm32mp133.dtsi | 37 ++ arch/arm/dts/stm32mp135.dtsi | 12 + arch/arm/dts/stm32mp135f-dk-u-boot.dtsi | 30 ++ arch/arm/dts/stm32mp135f-dk.dts | 57 +++ arch/arm/dts/stm32mp13xc.dtsi | 17 + arch/arm/dts/stm32mp13xf.dtsi | 17 + arch/arm/mach-stm32mp/Kconfig | 146 ++- arch/arm/mach-stm32mp/Kconfig.13x | 57 +++ arch/arm/mach-stm32mp/Kconfig.15x | 135 ++ arch/arm/mach-stm32mp/Makefile| 5 +- arch/arm/mach-stm32mp/bsec.c | 17 + arch/arm/mach-stm32mp/cpu.c | 392 ++ arch/arm/mach-stm32mp/fdt.c | 11 +- arch/arm/mach-stm32mp/include/mach/stm32.h| 26 ++ .../arm/mach-stm32mp/include/mach/sys_proto.h | 34 +- arch/arm/mach-stm32mp/spl.c | 1 + arch/arm/mach-stm32mp/stm32mp13x.c| 135 ++ arch/arm/mach-stm32mp/stm32mp15x.c| 350 board/st/stm32mp1/Kconfig | 15 + board/st/stm32mp1/MAINTAINERS | 4 + board/st/stm32mp1/stm32mp1.c | 27 +- configs/stm32mp13_defconfig | 54 +++ configs/stm32mp15_basic_defconfig | 6 +- configs/stm32mp15_defconfig | 6 +- configs/stm32mp15_trusted_defconfig | 8 +- doc/board/st/stm32mp1.rst | 183 +--- .../memory-controllers/st,stm32mp1-ddr.txt| 49 ++- drivers/mmc/stm32_sdmmc2.c| 14 +- drivers/pinctrl/pinctrl_stm32.c | 1 + drivers/ram/stm32mp1/stm32mp1_ram.c | 28 +- include/configs/stm32mp13_common.h| 106 + include/configs/stm32mp13_st_common.h | 17 + include/configs/stm32mp15_common.h| 4 +- 38 files changed, 1993 insertions(+), 584 deletions(-) create mode 100644 arch/arm/dts/stm32mp13-pinctrl.dtsi create mode 100644 arch/arm/dts/stm32mp13-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp131.dtsi create mode 100644 arch/arm/dts/stm32mp133.dtsi create mode 100644 arch/arm/dts/stm32mp135.dtsi create mode 100644 arch/arm/dts/stm32mp135f-dk-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp135f-dk.dts create mode 100644 arch/arm/dts/stm32mp13xc.dtsi create mode 100644 arch/arm/dts/stm32mp13xf.dtsi create mode 100644 arch/arm/mach-stm32mp/Kconfig.13x create mode 100644 arch/arm/mach-stm32mp/Kconfig.15x create mode 100644 arch/arm/mach-stm32mp/stm32mp13x.c create mode 100644 arch/arm/mach-stm32mp/stm32mp15x.c create mode 100644 configs/stm32mp13_defconfig create mode 100644 include/configs/stm32mp13_common.h create mode 100644 include/configs/stm32mp13_st_common.h -- 2.25.1
Re: [PATCH 16/16] doc: st: stm32mp1: add STM32MP13x support
Hi, On 5/20/22 09:21, Patrice CHOTARD wrote: Hi PAtrick typos below On 5/6/22 16:06, Patrick Delaunay wrote: Add in U-Boot documentation the quick instruction for s/for/to ok setup the STMicroelectronics STM32MP13x boards. Signed-off-by: Patrick Delaunay --- doc/board/st/stm32mp1.rst | 181 ++ 1 file changed, 125 insertions(+), 56 deletions(-) diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst index 0c5d3a90f0..25d38d337a 100644 --- a/doc/board/st/stm32mp1.rst +++ b/doc/board/st/stm32mp1.rst @@ -1,41 +1,31 @@ .. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause .. sectionauthor:: Patrick Delaunay -STM32MP15x boards +STM32MP1xx boards = -This is a quick instruction for setup STM32MP15x boards. +This is a quick instruction for setup STMicroelectronics STM32MP1xx boards. Futher information can be found in STMicrolectronics STM32 WIKI_. s/Futher/Further ok Supported devices - -U-Boot supports STMP32MP15x SoCs: +U-Boot supports all the STMicroelectronics MPU with the associated boards - - STM32MP157 - - STM32MP153 - - STM32MP151 [...] + +STM32MP15x +`` + +The STM32MP15x is a Cortex-A7 MPU aimed at various applications. + +It features: + + - Dual core Cortex-A7 application core (Single on STM32MP151) + - 2D/3D image composition with GPU (only on STM32MP157) + - Standard memories interface support + - Standard connectivity, widely inherited from the STM32 MCU family + - Comprehensive security support + - Cortex M4 coprocessor s/coprocessor/co-processor coprocessor is good for me: https://en.wikipedia.org/wiki/Coprocessor it is also used in ST Wiki https://wiki.st.com/stm32mpu/wiki/Category:Coprocessor_management_Linux + +Each line comes with a security option (cryptography & secure boot) and +a Cortex-A frequency option: + + - A : Cortex-A7 @ 650 MHz + - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz + - D : Cortex-A7 @ 800 MHz + - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz Currently the following boards are supported: @@ -59,6 +77,16 @@ Currently the following boards are supported: + stm32mp157c-ev1.dts + stm32mp15xx-dhcor-avenger96.dts [...] # export KBUILD_OUTPUT=stm32mp15_basic # make stm32mp15_basic_defconfig @@ -235,6 +292,7 @@ Build Procedure So in the output directory (selected by KBUILD_OUTPUT), you can found the needed U-Boot files: + - stm32mp13_defconfig = **u-boot-nodtb.bin** and **u-boot.dtb** - stm32mp15_defconfig = **u-boot-nodtb.bin** and **u-boot.dtb** - stm32mp15_trusted_defconfig = u-boot.stm32 @@ -325,9 +383,9 @@ the boot pin values = BOOT0, BOOT1, BOOT2 | SPI-NAND| 1 | 1 | 1 | +-+-+-+-+ -- on the **daugther board ed1 = MB1263** with the switch SW1 -- on **Avenger96** with switch S3 (NOR and SPI-NAND are not applicable) -- on board **DK1/DK2** with the switch SW1 = BOOT0, BOOT2 +- on the STM32MP15x **daugther board ed1 = MB1263** with the switch SW1 s/daugther/daughter ok +- on STM32MP15x **Avenger96** with switch S3 (NOR and SPI-NAND are not applicable) +- on board STM32MP15x **DK1/DK2** with the switch SW1 = BOOT0, BOOT2 with only 2 pins available (BOOT1 is forced to 0 and NOR not supported), the possible value becomes: @@ -355,7 +413,7 @@ The communication between HOST and board is based on Prepare an SD card -- -The minimal requirements for STMP32MP15x boot up to U-Boot are: +The minimal requirements for STMP32MP15x and STM32MP13x boot up to U-Boot are: - GPT partitioning (with gdisk or with sgdisk) - 2 fsbl partitions, named "fsbl1" and "fsbl2", size at least 256KiB @@ -511,14 +569,25 @@ MAC Address Please read doc/README.enetaddr for the implementation guidelines for mac id usage. Basically, environment has precedence over board specific storage. -For STMicroelectonics board, it is retrieved in STM32MP15x OTP : +For STMicroelectonics board, it is retrieved in: s/STMicroelectonics/STMicroelectronics OK + + - STM32MP15x OTP: - - OTP_57[31:0] = MAC_ADDR[31:0] - - OTP_58[15:0] = MAC_ADDR[47:32] + - OTP_57[31:0] = MAC_ADDR[31:0] + - OTP_58[15:0] = MAC_ADDR[47:32] -To program a MAC address on virgin OTP words above, you can use the fuse command + - STM32MP13x OTP: + + - OTP_57[31:0] = MAC_ADDR0[31:0] + - OTP_58[15:0] = MAC_ADDR0[47:32] + - OTP_58[31:16] = MAC_ADDR1[15:0] + - OTP_59[31:0] = MAC_ADDR1[47:16] + +To program a MAC address on virgin STM32MP15x OTP words above, you can use the fuse command on bank 0 to access to internal OTP and lock them: +In the next example we are using the 2 OTPs used on STM32MP15x. + Prerequisite: check if a MAC address isn't yet programmed in OTP 1) check OTP: their value must be equal to 0:: @@ -571,8 +640,8 @@ Example to set mac address
Re: [PATCH] crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish
On 5/11/2022 4:55 PM, Rasmus Villemoes wrote: > On 11/05/2022 10.53, Gaurav Jain wrote: >> HW accelerated hash operations are giving incorrect hash output. >> so add flush and invalidate for input/output hash buffers. >> >> Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using >> hardware acceleration.) > > AFAICT, it takes somewhat more to fix that commit; the progressive > hashing is entirely broken. > > It doesn't actually do anything progressive, it just stashes the > address/length pairs it is given, but doesn't feed the contents of those > buffers to the hardware, folding it into the hash state. So the caller Correct. > must not touch the buffers it passes until the finalization. I.e. I > think this won't work: > > char buf[SOMETHING]; > > update_buffer(buf); > hash_update(buf, len); > update_buffer_again(buf); > hash_update(buf, len); > Indeed, this won't work. > And this pattern can be found in e.g. drivers/dfu/dfu.c which seems to > repeatedly pass the same address (dfu->i_buf_start) to ->hash_update. > At first glance, dfu asks for crc32 algorithm, so it won't use this backend. But the concept is correct: user is not forced to keep a buffer unmodified (or even allocated) after .hash_update returns. Thanks, Horia
[PATCH] arm: dts: imx8mm-venice-gw700x: add support for GPY111 phy
The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy
due to part availability. Add support for it:
- increase post-reset time to 300ms per datasheet
- leave tx-delay/rx-delay undefined in dt defaulting to 2.0ns
Signed-off-by: Tim Harvey
---
arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi
b/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi
index 767024385156..c15e623f3cb8 100644
--- a/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi
@@ -8,7 +8,7 @@
{
phy-reset-gpios = < 0 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
- phy-reset-post-delay = <1>;
+ phy-reset-post-delay = <300>;
};
_fec1 {
--
2.17.1
[PATCH] board: gateowrks: venice: add GW7903 PMIC
The GW7903 has a BD71847 PMIC on I2C1. Adjust the model compare strings
to add it.
Signed-off-by: Tim Harvey
---
board/gateworks/venice/spl.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c
index 4c0feb4381c9..914a56a96f52 100644
--- a/board/gateworks/venice/spl.c
+++ b/board/gateworks/venice/spl.c
@@ -173,11 +173,12 @@ static int power_init_board(void)
}
else if ((!strncmp(model, "GW7901", 6)) ||
-(!strncmp(model, "GW7902", 6))) {
- if (!strncmp(model, "GW7901", 6))
- ret = uclass_get_device_by_seq(UCLASS_I2C, 1, );
- else
+(!strncmp(model, "GW7902", 6)) ||
+(!strncmp(model, "GW7903", 6))) {
+ if (!strncmp(model, "GW7902", 6))
ret = uclass_get_device_by_seq(UCLASS_I2C, 0, );
+ else
+ ret = uclass_get_device_by_seq(UCLASS_I2C, 1, );
if (ret) {
printf("PMIC: failed I2C2 probe: %d\n", ret);
return ret;
--
2.17.1
Re: [PATCH 11/12] ARM: dts: sun50i: A64: Sync from Linux v5.18-rc1
On Wed, 27 Apr 2022 15:31:30 -0500
Samuel Holland wrote:
> Copy the devicetree source for the A64 SoC and all existing boards
> from the Linux v5.18-rc1 tag.
>
> To maintain ABI compatibility with existing LTS kernels, one change
> moving some IP blocks to the r_intc interrupt controller is excluded.
> This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.
>
> This update should not impact any existing U-Boot functionality.
>
> Signed-off-by: Samuel Holland
Compared against the files in the kernel tree, apart from the r_intc
change they are identical.
Change-wise I cannot find any compatibility breaking change.
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
>
> arch/arm/dts/axp803.dtsi | 10 +--
> arch/arm/dts/sun50i-a64-cpu-opp.dtsi | 2 +-
> arch/arm/dts/sun50i-a64-orangepi-win.dts | 2 +-
> arch/arm/dts/sun50i-a64-pinebook.dts | 1 +
> arch/arm/dts/sun50i-a64-pinephone.dtsi | 27 +++
> arch/arm/dts/sun50i-a64-pinetab.dts | 29 +++-
> arch/arm/dts/sun50i-a64-teres-i.dts | 4 +-
> arch/arm/dts/sun50i-a64.dtsi | 93 ++--
> 8 files changed, 137 insertions(+), 31 deletions(-)
>
> diff --git a/arch/arm/dts/axp803.dtsi b/arch/arm/dts/axp803.dtsi
> index 10e9186a76..578ef368e2 100644
> --- a/arch/arm/dts/axp803.dtsi
> +++ b/arch/arm/dts/axp803.dtsi
> @@ -10,7 +10,7 @@
> interrupt-controller;
> #interrupt-cells = <1>;
>
> - ac_power_supply: ac-power-supply {
> + ac_power_supply: ac-power {
> compatible = "x-powers,axp803-ac-power-supply",
>"x-powers,axp813-ac-power-supply";
> status = "disabled";
> @@ -26,18 +26,18 @@
> gpio-controller;
> #gpio-cells = <2>;
>
> - gpio0_ldo: gpio0-ldo {
> + gpio0_ldo: gpio0-ldo-pin {
> pins = "GPIO0";
> function = "ldo";
> };
>
> - gpio1_ldo: gpio1-ldo {
> + gpio1_ldo: gpio1-ldo-pin {
> pins = "GPIO1";
> function = "ldo";
> };
> };
>
> - battery_power_supply: battery-power-supply {
> + battery_power_supply: battery-power {
> compatible = "x-powers,axp803-battery-power-supply",
>"x-powers,axp813-battery-power-supply";
> status = "disabled";
> @@ -147,7 +147,7 @@
> };
> };
>
> - usb_power_supply: usb-power-supply {
> + usb_power_supply: usb-power {
> compatible = "x-powers,axp803-usb-power-supply",
>"x-powers,axp813-usb-power-supply";
> status = "disabled";
> diff --git a/arch/arm/dts/sun50i-a64-cpu-opp.dtsi
> b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi
> index 578c37490d..e39db51eb4 100644
> --- a/arch/arm/dts/sun50i-a64-cpu-opp.dtsi
> +++ b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi
> @@ -4,7 +4,7 @@
> */
>
> / {
> - cpu0_opp_table: opp_table0 {
> + cpu0_opp_table: opp-table-cpu {
> compatible = "operating-points-v2";
> opp-shared;
>
> diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts
> b/arch/arm/dts/sun50i-a64-orangepi-win.dts
> index 70e31743f0..8eee8051ac 100644
> --- a/arch/arm/dts/sun50i-a64-orangepi-win.dts
> +++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts
> @@ -343,7 +343,7 @@
> {
> status = "okay";
>
> - spi-flash@0 {
> + flash@0 {
> compatible = "mxicy,mx25l1606e", "jedec,spi-nor";
> reg = <0>;
> spi-max-frequency = <8000>;
> diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts
> b/arch/arm/dts/sun50i-a64-pinebook.dts
> index 7ae16541d1..68b6ab4707 100644
> --- a/arch/arm/dts/sun50i-a64-pinebook.dts
> +++ b/arch/arm/dts/sun50i-a64-pinebook.dts
> @@ -15,6 +15,7 @@
> / {
> model = "Pinebook";
> compatible = "pine64,pinebook", "allwinner,sun50i-a64";
> + chassis-type = "laptop";
>
> aliases {
> serial0 =
> diff --git a/arch/arm/dts/sun50i-a64-pinephone.dtsi
> b/arch/arm/dts/sun50i-a64-pinephone.dtsi
> index 9f69d489a8..b25e7913f5 100644
> --- a/arch/arm/dts/sun50i-a64-pinephone.dtsi
> +++ b/arch/arm/dts/sun50i-a64-pinephone.dtsi
> @@ -12,6 +12,8 @@
> #include
>
> / {
> + chassis-type = "handset";
> +
> aliases {
> ethernet0 =
> serial0 =
> @@ -25,6 +27,11 @@
> /* Backlight configuration differs per PinePhone revision. */
> };
>
> + bt_sco_codec: bt-sco-codec {
> + #sound-dai-cells = <1>;
> + compatible = "linux,bt-sco";
> + };
> +
> chosen {
> stdout-path = "serial0:115200n8";
> };
> @@ -91,6 +98,8 @@
> };
>
> {
> + pinctrl-names = "default";
> + pinctrl-0 = <_pins>;
> status = "okay";
> };
>
> @@ -426,6 +435,7 @@
>
> {
> status = "okay";
> + simple-audio-card,name =
Re: [PATCH 06/12] ARM: dts: sun9i: Sync from Linux v5.18-rc1
On Wed, 27 Apr 2022 15:31:25 -0500
Samuel Holland wrote:
Hi,
> Copy the devicetree source for the A80 SoC and all existing boards
> verbatim from the Linux v5.18-rc1 tag.
>
> This update should not impact any existing U-Boot functionality.
>
> Signed-off-by: Samuel Holland
Compared against the respective kernel tree's files, they are identical.
Change-wise the "dumb-vga-dac" compatible is dropped from the Cubieboard,
but the others are supported since v4.12, so that should not matter.
Also the new IR compatible string requires a v5.4 kernel, but since that's
not really a critical component, this is probably fine as well.
So with that:
Reviewed-by: Andre Przywara
Thanks!
Andre
> ---
>
> arch/arm/dts/sun9i-a80-cubieboard4.dts | 67 ++---
> arch/arm/dts/sun9i-a80-optimus.dts | 50 ++-
> arch/arm/dts/sun9i-a80.dtsi| 195 +++--
> 3 files changed, 212 insertions(+), 100 deletions(-)
>
> diff --git a/arch/arm/dts/sun9i-a80-cubieboard4.dts
> b/arch/arm/dts/sun9i-a80-cubieboard4.dts
> index 85da85faf8..c8ca8cb7f5 100644
> --- a/arch/arm/dts/sun9i-a80-cubieboard4.dts
> +++ b/arch/arm/dts/sun9i-a80-cubieboard4.dts
> @@ -63,12 +63,12 @@
> leds {
> compatible = "gpio-leds";
>
> - green {
> + led-0 {
> label = "cubieboard4:green:usr";
> gpios = < 7 17 GPIO_ACTIVE_HIGH>; /* PH17 */
> };
>
> - red {
> + led-1 {
> label = "cubieboard4:red:usr";
> gpios = < 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
> };
> @@ -87,33 +87,25 @@
> };
>
> vga-dac {
> - compatible = "corpro,gm7123", "adi,adv7123", "dumb-vga-dac";
> + compatible = "corpro,gm7123", "adi,adv7123";
> vdd-supply = <_dcdc1>;
> - #address-cells = <1>;
> - #size-cells = <0>;
>
> ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> port@0 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> reg = <0>;
>
> - vga_dac_in: endpoint@0 {
> - reg = <0>;
> + vga_dac_in: endpoint {
> remote-endpoint = <_out_vga>;
> };
> };
>
> port@1 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> reg = <1>;
>
> - vga_dac_out: endpoint@0 {
> - reg = <0>;
> + vga_dac_out: endpoint {
> remote-endpoint = <_con_in>;
> };
> };
> @@ -133,12 +125,27 @@
> status = "okay";
> };
>
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_rgmii_pins>;
> + phy-handle = <>;
> + phy-mode = "rgmii-id";
> + phy-supply = <_cldo1>;
> + status = "okay";
> +};
> +
> {
> pinctrl-names = "default";
> pinctrl-0 = <_pins>;
> status = "okay";
> };
>
> + {
> + phy1: ethernet-phy@1 {
> + reg = <1>;
> + };
> +};
> +
> {
> pinctrl-names = "default";
> pinctrl-0 = <_pins>;
> @@ -183,10 +190,26 @@
> clocks = <_rtc 0>;
> };
>
> + {
> + vcc-pa-supply = <_ldo_io1>;
> + vcc-pb-supply = <_aldo2>;
> + vcc-pc-supply = <_dcdc1>;
> + vcc-pd-supply = <_dc1sw>;
> + vcc-pe-supply = <_eldo2>;
> + vcc-pf-supply = <_dcdc1>;
> + vcc-pg-supply = <_ldo_io0>;
> + vcc-ph-supply = <_dcdc1>;
> +};
> +
> _ir {
> status = "okay";
> };
>
> +_pio {
> + vcc-pl-supply = <_dldo2>;
> + vcc-pm-supply = <_eldo3>;
> +};
> +
> _rsb {
> status = "okay";
>
> @@ -217,6 +240,10 @@
> /* unused */
> };
>
> + reg_dc1sw: dc1sw {
> + regulator-name = "vcc-pd";
> + };
> +
> reg_dc5ldo: dc5ldo {
> regulator-always-on;
> regulator-min-microvolt = <80>;
> @@ -271,7 +298,6 @@
> };
>
> reg_dldo2: dldo2 {
> - regulator-always-on;
> regulator-min-microvolt = <300>;
> regulator-max-microvolt = <300>;
> regulator-name = "vcc-pl";
> @@ -290,14 +316,12 @@
> };
>
> reg_eldo3: eldo3 {
> - regulator-always-on;
>
Re: [PATCH 07/12] ARM: dts: sun8i: A83T: Sync from Linux v5.18-rc1
On Wed, 27 Apr 2022 15:31:26 -0500
Samuel Holland wrote:
Hi,
> Copy the devicetree source for the A83T SoC and all existing boards
> from the Linux v5.18-rc1 tag.
>
> To maintain ABI compatibility with existing LTS kernels, one change
> moving some IP blocks to the r_intc interrupt controller is excluded.
> This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.
>
> As with the other SoCs, updates of note include adding detection GPIO
> properties in the USB PHY nodes.
>
> Signed-off-by: Samuel Holland
Compared the files against the kernel tree, apart from the r_intc change
they are identical.
Change-wise there is a different timer compatible string, requiring Linux
v5.4 at least. This should not be fatal, since we have the arch timer, though.
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
>
> arch/arm/dts/axp81x.dtsi | 15 +-
> .../dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 12 +
> arch/arm/dts/sun8i-a83t-bananapi-m3.dts | 55 +++-
> arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 77 -
> arch/arm/dts/sun8i-a83t-tbs-a711.dts | 101 +-
> arch/arm/dts/sun8i-a83t.dtsi | 311 --
> 6 files changed, 515 insertions(+), 56 deletions(-)
>
> diff --git a/arch/arm/dts/axp81x.dtsi b/arch/arm/dts/axp81x.dtsi
> index 043c717dce..b93387b0c1 100644
> --- a/arch/arm/dts/axp81x.dtsi
> +++ b/arch/arm/dts/axp81x.dtsi
> @@ -48,6 +48,11 @@
> interrupt-controller;
> #interrupt-cells = <1>;
>
> + ac_power_supply: ac-power {
> + compatible = "x-powers,axp813-ac-power-supply";
> + status = "disabled";
> + };
> +
> axp_adc: adc {
> compatible = "x-powers,axp813-adc";
> #io-channel-cells = <1>;
> @@ -58,18 +63,18 @@
> gpio-controller;
> #gpio-cells = <2>;
>
> - gpio0_ldo: gpio0-ldo {
> + gpio0_ldo: gpio0-ldo-pin {
> pins = "GPIO0";
> function = "ldo";
> };
>
> - gpio1_ldo: gpio1-ldo {
> + gpio1_ldo: gpio1-ldo-pin {
> pins = "GPIO1";
> function = "ldo";
> };
> };
>
> - battery_power_supply: battery-power-supply {
> + battery_power_supply: battery-power {
> compatible = "x-powers,axp813-battery-power-supply";
> status = "disabled";
> };
> @@ -166,4 +171,8 @@
> status = "disabled";
> };
> };
> +
> + usb_power_supply: usb-power {
> + compatible = "x-powers,axp813-usb-power-supply";
> + };
> };
> diff --git a/arch/arm/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
> b/arch/arm/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
> index 36ecebaff3..9c006fc188 100644
> --- a/arch/arm/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
> +++ b/arch/arm/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
> @@ -79,6 +79,14 @@
> };
> };
>
> + {
> + cpu-supply = <_dcdc2>;
> +};
> +
> + {
> + cpu-supply = <_dcdc3>;
> +};
> +
> {
> status = "okay";
> };
> @@ -146,6 +154,10 @@
>
> #include "axp81x.dtsi"
>
> +_power_supply {
> + status = "okay";
> +};
> +
> _aldo1 {
> regulator-always-on;
> regulator-min-microvolt = <180>;
> diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
> b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
> index 2beafe3a31..b60016a442 100644
> --- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
> +++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
> @@ -74,12 +74,12 @@
> leds {
> compatible = "gpio-leds";
>
> - blue {
> + led-0 {
> label = "bananapi-m3:blue:usr";
> gpios = <_gpio 1 GPIO_ACTIVE_HIGH>;
> };
>
> - green {
> + led-1 {
> label = "bananapi-m3:green:usr";
> gpios = <_gpio 0 GPIO_ACTIVE_HIGH>;
> };
> @@ -107,6 +107,14 @@
> };
> };
>
> + {
> + cpu-supply = <_dcdc2>;
> +};
> +
> + {
> + cpu-supply = <_dcdc3>;
> +};
> +
> {
> status = "okay";
> };
> @@ -183,6 +191,11 @@
> status = "okay";
> };
>
> +_cir {
> + clock-frequency = <300>;
> + status = "okay";
> +};
> +
> _rsb {
> status = "okay";
>
> @@ -224,6 +237,14 @@
>
> #include "axp81x.dtsi"
>
> +_power_supply {
> + status = "okay";
> +};
> +
> +_power_supply {
> + status = "okay";
> +};
> +
> _aldo1 {
> regulator-always-on;
> regulator-min-microvolt = <180>;
> @@ -301,8 +322,8 @@
>
> _dldo3 {
> regulator-always-on;
> - regulator-min-microvolt = <250>;
> - regulator-max-microvolt = <250>;
> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> regulator-name = "vcc-pd";
> };
>
> @@ -350,11 +371,37 @@
> status = "okay";
> };
>
> + {
>
Re: [PATCH 12/12] ARM: dts: sun50i: H6: Sync from Linux v5.18-rc1
On Wed, 27 Apr 2022 15:31:31 -0500
Samuel Holland wrote:
> Copy the devicetree source for the H6 SoC and all existing boards
> from the Linux v5.18-rc1 tag.
>
> To maintain ABI compatibility with existing LTS kernels, one change
> moving some IP blocks to the r_intc interrupt controller is excluded.
> This effectively reverts Linux commits 189bef235dd3 and 73088dfee635.
>
> This commit also adds the following new board devicetrees:
> - sun50i-h6-pine-h64-model-b.dts
> - sun50i-h6-tanix-tx6-mini.dts
>
> This update should not impact any existing U-Boot functionality.
>
> Signed-off-by: Samuel Holland
Compared against the Linux kernel, apart from the r_intc changes they are
the same.
The changes look innocent, and shouldn't affect U-Boot or Linux kernel
compatibility.
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
>
> arch/arm/dts/Makefile | 4 +-
> arch/arm/dts/sun50i-h6-beelink-gs1.dts | 38 ++--
> arch/arm/dts/sun50i-h6-cpu-opp.dtsi | 2 +-
> arch/arm/dts/sun50i-h6-orangepi-3.dts | 14 +-
> arch/arm/dts/sun50i-h6-orangepi.dtsi| 22 +--
> arch/arm/dts/sun50i-h6-pine-h64-model-b.dts | 51 ++
> arch/arm/dts/sun50i-h6-tanix-tx6-mini.dts | 15 ++
> arch/arm/dts/sun50i-h6-tanix-tx6.dts| 115 ++--
> arch/arm/dts/sun50i-h6-tanix.dtsi | 189
> arch/arm/dts/sun50i-h6.dtsi | 26 ++-
> 10 files changed, 328 insertions(+), 148 deletions(-)
> create mode 100644 arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
> create mode 100644 arch/arm/dts/sun50i-h6-tanix-tx6-mini.dts
> create mode 100644 arch/arm/dts/sun50i-h6-tanix.dtsi
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 95909ef037..85e731aec9 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -695,7 +695,9 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \
> sun50i-h6-orangepi-lite2.dtb \
> sun50i-h6-orangepi-one-plus.dtb \
> sun50i-h6-pine-h64.dtb \
> - sun50i-h6-tanix-tx6.dtb
> + sun50i-h6-pine-h64-model-b.dtb \
> + sun50i-h6-tanix-tx6.dtb \
> + sun50i-h6-tanix-tx6-mini.dtb
> dtb-$(CONFIG_MACH_SUN50I_H616) += \
> sun50i-h616-orangepi-zero2.dtb
> dtb-$(CONFIG_MACH_SUN50I) += \
> diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts
> b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
> index b5808047d6..649b146dff 100644
> --- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts
> +++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
> @@ -150,12 +150,28 @@
> vcc-pg-supply = <_aldo1>;
> };
>
> -_i2c {
> +_ir {
> + linux,rc-map-name = "rc-beelink-gs1";
> + status = "okay";
> +};
> +
> +_pio {
> + /*
> + * FIXME: We can't add that supply for now since it would
> + * create a circular dependency between pinctrl, the regulator
> + * and the RSB Bus.
> + *
> + * vcc-pl-supply = <_aldo1>;
> + */
> + vcc-pm-supply = <_aldo1>;
> +};
> +
> +_rsb {
> status = "okay";
>
> - axp805: pmic@36 {
> + axp805: pmic@745 {
> compatible = "x-powers,axp805", "x-powers,axp806";
> - reg = <0x36>;
> + reg = <0x745>;
> interrupt-parent = <_intc>;
> interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> interrupt-controller;
> @@ -273,22 +289,6 @@
> };
> };
>
> -_ir {
> - linux,rc-map-name = "rc-beelink-gs1";
> - status = "okay";
> -};
> -
> -_pio {
> - /*
> - * PL0 and PL1 are used for PMIC I2C
> - * don't enable the pl-supply else
> - * it will fail at boot
> - *
> - * vcc-pl-supply = <_aldo1>;
> - */
> - vcc-pm-supply = <_aldo1>;
> -};
> -
> {
> status = "okay";
> };
> diff --git a/arch/arm/dts/sun50i-h6-cpu-opp.dtsi
> b/arch/arm/dts/sun50i-h6-cpu-opp.dtsi
> index 8c6e8536b6..0baf0f8e4d 100644
> --- a/arch/arm/dts/sun50i-h6-cpu-opp.dtsi
> +++ b/arch/arm/dts/sun50i-h6-cpu-opp.dtsi
> @@ -3,7 +3,7 @@
> // Copyright (C) 2020 Clément Péron
>
> / {
> - cpu_opp_table: cpu-opp-table {
> + cpu_opp_table: opp-table-cpu {
> compatible = "allwinner,sun50i-h6-operating-points";
> nvmem-cells = <_speed_grade>;
> opp-shared;
> diff --git a/arch/arm/dts/sun50i-h6-orangepi-3.dts
> b/arch/arm/dts/sun50i-h6-orangepi-3.dts
> index 7e83f6146f..9f12c05e21 100644
> --- a/arch/arm/dts/sun50i-h6-orangepi-3.dts
> +++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts
> @@ -175,12 +175,16 @@
> vcc-pg-supply = <_vcc_wifi_io>;
> };
>
> -_i2c {
> +_ir {
> + status = "okay";
> +};
> +
> +_rsb {
> status = "okay";
>
> - axp805: pmic@36 {
> + axp805: pmic@745 {
> compatible = "x-powers,axp805", "x-powers,axp806";
> - reg = <0x36>;
> + reg = <0x745>;
> interrupt-parent = <_intc>;
> interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> interrupt-controller;
> @@ -291,10 +295,6 @@
> };
> };
>
> -_ir {
Re: [PATCH 11/16] board: stm32pm1: add stm32mp13 board support
Hi Patrice
On 5/20/22 09:02, Patrice CHOTARD wrote:
Hi Patrick
One typo and one remark below
On 5/6/22 16:06, Patrick Delaunay wrote:
Add stm32mp15x prefix to all STM32MP15x board specific function,
this patch is a preliminary step for STM32MP13x support.
This patch also add the RCC probe to avoid circular access with
s/add/adds
OK
usbphyc probe as clk provider.
Signed-off-by: Patrick Delaunay
---
board/st/stm32mp1/stm32mp1.c | 27 ++-
1 file changed, 18 insertions(+), 9 deletions(-)
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index fff1880e5b..4ba7201ffb 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -547,8 +547,7 @@ static void sysconf_init(void)
clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
}
[...]
-static void board_ev1_init(void)
+static void board_stm32mp15x_ev1_init(void)
{
struct udevice *dev;
@@ -648,13 +648,22 @@ static void board_ev1_init(void)
/* board dependent setup after realloc */
int board_init(void)
{
+ struct udevice *dev;
+ int ret;
+
+ /* probe RCC to avoid circular access with usbphyc probe as clk
provider */
+ if (IS_ENABLED(CONFIG_CLK_STM32MP13)) {
+ ret = uclass_get_device_by_driver(UCLASS_CLK,
DM_DRIVER_GET(stm32mp1_clock), );
+ log_debug("Clock init failed: %d\n", ret);
I am wondering if usage of DM_FLAG_PROBE_AFTER_BIND in flag would avoid this
above piece of code ?
Yes, I think you are right
=> need to be tested when RCC clock driver and USBPHY clock will be
upstreamed
and then we will remove these lines
+ }
+
board_key_check();
- if (board_is_ev1())
- board_ev1_init();
+ if (board_is_stm32mp15x_ev1())
+ board_stm32mp15x_ev1_init();
- if (board_is_dk2())
- dk2_i2c1_fix();
+ if (board_is_stm32mp15x_dk2())
+ board_stm32mp15x_dk2_init();
if (IS_ENABLED(CONFIG_DM_REGULATOR))
regulators_enable_boot_on(_DEBUG);
Regards
Patrick
Re: [PATCH 05/12] ARM: dts: sunxi: A13/A31/A23/A33: Sync from Linux v5.18-rc1
On Wed, 27 Apr 2022 15:31:24 -0500 Samuel Holland wrote: Hi, > Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16 > SoCs and all existing boards from the Linux v5.18-rc1 tag. > > These changes are combined into one commit due to interdependencies: > - The unit addresses were removed from bitbanged I2C buses, which >drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts >and sun6i-a31-colombus.dts. > - The pinctrl nodes were renamed, including some used by the shared >header sunxi-reference-design-tablet.dtsi. > > To maintain ABI compatibility with existing LTS kernels, one change > moving some IP blocks to the r_intc interrupt controller is excluded. > This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2. > > This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts > to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree. > > This commit also adds the following new board devicetrees: > - sun5i-a13-licheepi-one.dts > - sun5i-a13-pocketbook-touch-lux-3.dts > - sun5i-gr8-evb.dts > - sun8i-a23-ippo-q8h-v1.2.dts > - sun8i-a23-ippo-q8h-v5.dts > - sun8i-a33-et-q8-v1.6.dts > - sun8i-a33-ippo-q8h-v1.2.dts > - sun8i-r16-nintendo-super-nes-classic.dts > > As with the other SoCs, updates of note are conversion of GPIO pull-up > from pinconf to GPIO flags and renaming the detection GPIO properties in > the USB PHY nodes. > > Signed-off-by: Samuel Holland So that's a big one. The sync part looks good, I compared the files against the kernel, and the r_intc change is the only difference. Most of the changes are about node names and GPIO / pinctrl usage, which *should* be fine, especially for U-Boot. However there are a number of incompatible changes, I marked them below in the patch, for reference, but enumerate them here for easier discussion: - "allwinner,sun4i-a10-sram-controller" got replaced with "allwinner,sun5i-a13-system-control", in sun5i-a13.dtsi. U-Boot doesn't care, and the Linux driver interestingly doesn't make a difference. So not sure why the new name wasn't just *added*. This would affect pre v4.19 kernels, only, so I wouldn't consider this a real problem. - "urt,umsh-8596md-t", "simple-panel" was changed to "bananapi,s070wv20-ct16", in sun5i-a13-q8-tablet.dts. I think U-Boot shouldn't be affected, as panel usage is controlled via Kconfig. For the kernel it seems to be v4.20 adding support. - A23/A33 suffer from a change in the timer compatible string (in sun8i-a23-a33.dtsi), requiring Linux v5.4 at least. I am not sure how fatal this is, since we have the arch timer in those SoCs. - More problematic seems to be the rtc compatible string change in sun8i-a23-a33.dtsi, which restricts kernel compatibility to v5.0 and later. I am not sure if that prevents the CCU and pinctrl to probe (because they use the first rtc provided clock as one of their input clocks). I wonder if having the old compatible string as a fallback is feasible: I don't the second RTC clock used anywhere, and the RTC/clock driver doesn't seem to make a difference between the two compatibles otherwise. So overall this might look bad, but the breakages are: a) only for those older generation of devices, which probably don't use UEFI boot or otherwise rely on $fdtcontroladdr for the kernel, and b) will probably work fine with kernel v5.4 onwards, which seems to be reasonably old and well spread by now. So for the sake of getting our DTs much closer to the kernel copy, I am happy with this change. Reviewed-by: Andre Przywara Cheers, Andre > --- > > arch/arm/dts/Makefile | 10 +- > arch/arm/dts/axp22x.dtsi | 11 +- > arch/arm/dts/sun5i-a10s-auxtek-t003.dts | 16 +- > arch/arm/dts/sun5i-a10s-auxtek-t004.dts | 35 +- > arch/arm/dts/sun5i-a10s-mk802.dts | 31 +- > arch/arm/dts/sun5i-a10s-olinuxino-micro.dts | 68 +--- > arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts | 22 +- > arch/arm/dts/sun5i-a10s-wobo-i5.dts | 34 +- > arch/arm/dts/sun5i-a10s.dtsi | 30 +- > arch/arm/dts/sun5i-a13-ampe-a76.dts | 2 +- > .../dts/sun5i-a13-empire-electronix-d709.dts | 41 +-- > arch/arm/dts/sun5i-a13-hsg-h702.dts | 37 +- > arch/arm/dts/sun5i-a13-inet-86vs.dts | 2 +- > arch/arm/dts/sun5i-a13-licheepi-one.dts | 214 +++ > arch/arm/dts/sun5i-a13-olinuxino-micro.dts| 50 +-- > arch/arm/dts/sun5i-a13-olinuxino.dts | 56 +-- > .../dts/sun5i-a13-pocketbook-touch-lux-3.dts | 258 ++ > arch/arm/dts/sun5i-a13-q8-tablet.dts | 18 +- > arch/arm/dts/sun5i-a13-utoo-p66.dts | 26 +- > arch/arm/dts/sun5i-a13.dtsi | 23 +- > arch/arm/dts/sun5i-gr8-chip-pro.dts | 38 +- > arch/arm/dts/sun5i-gr8-evb.dts| 333 ++ > arch/arm/dts/sun5i-gr8.dtsi | 12 +- >
Re: [PATCH] arm: dts: k3-am642-*: Mark the memory node with u-boot,dm-spl
On Fri, May 20, 2022 at 03:30:26PM +0300, Georgi Vlaev wrote:
> Since commit dffdb1f8eb ("board: ti: am64x: Use fdt functions
> for ram and bank init") ddr_init() and dram_bank_init() have
> switched to fdtdec for getting the memory configuration from
> the am64xx dts files instead of using hardcoded values. This
> requires an accessible memory node in SPL as we already have
> in k3-am642-r5-evm.dts.
>
> Make the memory node accessible in A53 SPL for both am642-sk
> and am642-evm and in am642-sk R5 SPL.
>
> Signed-off-by: Georgi Vlaev
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH V4 4/8] armv8: u-boot-spl.lds: mark __image_copy_start as symbol
On Fri, May 20, 2022 at 10:10:43PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan
>
> In arch/arm/lib/sections.c there is below code:
> char __image_copy_start[0] __section(".__image_copy_start");
> But actually 'objdump -t spl/u-boot-spl' not able to find out
> symbol '__image_copy_start' for binman update image-pos/size.
>
> So update link file
>
> Tested-by: Tim Harvey #imx8m[m,n,p]-venice
> Signed-off-by: Peng Fan
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH V4 1/8] spl: guard u_boot_any with X86
On Fri, May 20, 2022 at 10:10:40PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > set the symbol as weak not work if LTO is enabled. Since u_boot_any is > only used on X86 for now, so guard it with X86, otherwise build break > if we use BINMAN_SYMBOLS on i.MX. > > Tested-by: Tim Harvey #imx8m[m,n,p]-venice > Signed-off-by: Peng Fan > --- > common/spl/spl.c | 8 ++-- > common/spl/spl_ram.c | 4 > 2 files changed, 10 insertions(+), 2 deletions(-) I think we long term need to figure this out and address it so LTO works. But for now can you please guard this with a test on LTO instead, so it's clear where the problem is? -- Tom signature.asc Description: PGP signature
Re: [PATCH] common/board_r.c: drop legacy and unused bi_enetaddr
On Fri, May 20, 2022 at 01:19:08PM +0200, Rasmus Villemoes wrote: > The bi_enetaddr field in struct bd_info is write-only; nothing ever > reads back the value. > > Moreover, the value we write is more or less random, and certainly not > something one can rely on: If the board has a writable environment and > the mac address has been stored there, we fetch that value. But if the > board doesn't, this code runs before initr_net() -> eth_initialize(), > and thus before the code in eth-uclass which fetches MAC addresses > from eeprom, fuses or whatnot and populates the (run-time) environment > with those values. > > Signed-off-by: Rasmus Villemoes I believe in this case legacy means non-device tree PowerPC Linux (and perhaps VxWorks?) since for ARM we would pass in ATAGS stuff instead but PowerPC we did do gd? Been so long... Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature
[PATCH] configs: imx8mp_venice: remove unnecessary FEC_QUIRK_ENET_MAC
FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus does not need to be defined in the various board config includes. Signed-off-by: Tim Harvey --- include/configs/imx8mp_venice.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index d6bdab70e0df..3a8994dfe244 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -90,7 +90,4 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -/* FEC */ -#define FEC_QUIRK_ENET_MAC - #endif -- 2.17.1
Re: [PATCH v5 2/3] arm: mvebu: add support for Methode eDPU
On 20.05.22 13:46, Robert Marko wrote:
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not
work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
Changes in v4:
* Remove CMD_PCI as PCI is disabled anyway
Changes in v3:
* Use DTS-es pending merge upstream
* Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device
as one of the bootable ones.
We dont have space constraints, so just re-enable SCSI rather than making
one more config header
Changes in v2:
* Correct the PHY mode to 2500Base-X
* Add the DTB to Makefile
* Remove SCSI/SATA, PCI and E1000 from defconfig as they are not present
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++
arch/arm/dts/armada-3720-eDPU.dts | 14 ++
arch/arm/dts/armada-3720-uDPU.dts | 150 +---
arch/arm/dts/armada-3720-uDPU.dtsi| 160 ++
configs/eDPU_defconfig| 95 +
6 files changed, 316 insertions(+), 149 deletions(-)
create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
create mode 100644 arch/arm/dts/armada-3720-eDPU.dts
create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi
create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 83630af4f6..c484875585 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -236,6 +236,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-db.dtb \
armada-3720-espressobin.dtb \
armada-3720-turris-mox.dtb \
+ armada-3720-eDPU.dtb\
armada-3720-uDPU.dtb\
armada-375-db.dtb \
armada-385-atl-x530.dtb \
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
new file mode 100644
index 00..1b2648f64d
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ product = "eDPU";
+ };
+
+ baseboard {
+ product = "eDPU";
+ };
+
+ chassis {
+ product = "eDPU";
+ };
+ };
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+
+ spi-flash@0 {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ /* G.hn does not work without additional configuration */
+ status = "disabled";
+};
+
+ {
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
diff --git a/arch/arm/dts/armada-3720-eDPU.dts
b/arch/arm/dts/armada-3720-eDPU.dts
new file mode 100644
index 00..57fc698e55
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "armada-3720-uDPU.dtsi"
+
+/ {
+ model = "Methode eDPU Board";
+ compatible = "methode,edpu", "marvell,armada3720", "marvell,armada3710";
+};
+
+ {
+ phy-mode = "2500base-x";
+};
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index f21a855fc6..a75734d88a 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -1,66 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Device tree for the uDPU board.
- * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- * Copyright (C) 2016 Marvell
- * Copyright (C) 2019 Methode Electronics
- * Copyright (C) 2019 Telus
- *
- * Vladimir Vid
- */
/dts-v1/;
-#include
-#include "armada-372x.dtsi"
+#include "armada-3720-uDPU.dtsi"
/ {
model = "Methode uDPU Board";
compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x 0x 0x 0x2000>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-power1 {
- label = "udpu:green:power";
- gpios = < 11 GPIO_ACTIVE_LOW>;
- };
-
- led-power2 {
- label = "udpu:red:power";
- gpios = < 12 GPIO_ACTIVE_LOW>;
-
Re: [PATCH v5 1/3] arm: mvebu: dts: sync DTS
On 20.05.22 13:46, Robert Marko wrote:
Update the uDPU DTS to the version that is pending upstream [1][2][3][4].
[1]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-4-robert.ma...@sartura.hr/
[2]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-5-robert.ma...@sartura.hr/
[3]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-6-robert.ma...@sartura.hr/
[4]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-7-robert.ma...@sartura.hr/
Signed-off-by: Robert Marko
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/dts/armada-3720-uDPU.dts | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index 1f534c0c65..f21a855fc6 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -16,7 +16,7 @@
/ {
model = "Methode uDPU Board";
- compatible = "methode,udpu", "marvell,armada3720";
+ compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
chosen {
stdout-path = "serial0:115200n8";
@@ -28,35 +28,34 @@
};
leds {
- pinctrl-names = "default";
compatible = "gpio-leds";
- power1 {
+ led-power1 {
label = "udpu:green:power";
gpios = < 11 GPIO_ACTIVE_LOW>;
};
- power2 {
+ led-power2 {
label = "udpu:red:power";
gpios = < 12 GPIO_ACTIVE_LOW>;
};
- network1 {
+ led-network1 {
label = "udpu:green:network";
gpios = < 13 GPIO_ACTIVE_LOW>;
};
- network2 {
+ led-network2 {
label = "udpu:red:network";
gpios = < 14 GPIO_ACTIVE_LOW>;
};
- alarm1 {
+ led-alarm1 {
label = "udpu:green:alarm";
gpios = < 15 GPIO_ACTIVE_LOW>;
};
- alarm2 {
+ led-alarm2 {
label = "udpu:red:alarm";
gpios = < 16 GPIO_ACTIVE_LOW>;
};
@@ -99,7 +98,7 @@
pinctrl-names = "default";
pinctrl-0 = <_quad_pins>;
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <5400>;
@@ -153,14 +152,12 @@
scl-gpios = < 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = < 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- nct375@48 {
- status = "okay";
+ temp-sensor@48 {
compatible = "ti,tmp75c";
reg = <0x48>;
};
- nct375@49 {
- status = "okay";
+ temp-sensor@49 {
compatible = "ti,tmp75c";
reg = <0x49>;
};
Viele Grüße,
Stefan Roese
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
[PATCH v3 2/2] imx8mn/8mp: Allow booting via USB
> From: Fabio Estevam > When trying to boot via USB on i.MX8MN it is necessary to specify > the U-Boot environment location, otherwise the boot process simply > hangs. > Specify the environment location when booting from USB. > Tested on a imx8mn-evk. > Suggested-by: Michael Nazzareno Trimarchi > Signed-off-by: Fabio Estevam > Tested-By: Tim Harvey Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 1/3] imx8mm-cl-iot-gate: Enable cache in SPL
> From: Fabio Estevam > There is no reason for disabling I-cache and D-cache > in SPL. > > Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and > CONFIG_SPL_SYS_DCACHE_OFF options. > Signed-off-by: Fabio Estevam > Reviewed-by: Michael Trimarchi Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2] mtd: rawnand: mxs_nand: Fix use_minimum_ecc for spl driver
> Because mxs_nand_spl driver does not support DM, to use the minimum ECC > layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC. > Signed-off-by: Ye Li > Reviewed-by: Han Xu Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH v5 3/3] MAINTAINERS: add myself as Methode maintainer
On 20.05.22 13:46, Robert Marko wrote: I am currently maintaing the Methode uDPU and eDPU boards so add myself as the maintainer for them. Remove the old entry from board/Marvell/mvebu_armada-37xx/MAINTAINERS. Signed-off-by: Robert Marko Reviewed-by: Stefan Roese Thanks, Stefan --- Changes in v5: * Remove entry from the board/Marvell/mvebu_armada-37xx/MAINTAINERS --- MAINTAINERS | 8 board/Marvell/mvebu_armada-37xx/MAINTAINERS | 5 - 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 56be0bfad0..3d72b0c11f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -344,6 +344,14 @@ F: tools/mtk_image.c F:tools/mtk_image.h N:mediatek +ARM METHODE SUPPORT +M: Robert Marko +S: Maintained +F: arch/arm/dts/armada-3720-eDPU* +F: arch/arm/dts/armada-3720-uDPU* +F: configs/eDPU_defconfig +F: configs/uDPU_defconfig + ARM MICROCHIP/ATMEL AT91 M:Eugen Hristev S:Maintained diff --git a/board/Marvell/mvebu_armada-37xx/MAINTAINERS b/board/Marvell/mvebu_armada-37xx/MAINTAINERS index f2c0a582d7..9b0afeef10 100644 --- a/board/Marvell/mvebu_armada-37xx/MAINTAINERS +++ b/board/Marvell/mvebu_armada-37xx/MAINTAINERS @@ -9,8 +9,3 @@ ESPRESSOBin BOARD M:Konstantin Porotchkin S:Maintained F:configs/mvebu_espressobin-88f3720_defconfig - -uDPU BOARD -M: Vladimir Vid -S: Maintained -F: configs/uDPU_defconfig Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
[PATCH V2 07/16] imx: imx8mm-mx8menlo: drop unneeded watchdog settings
> From: Peng Fan > pinctrl_wdog as u-boot,dm-spl already marked in imx8mm-verdin-u-boot.dtsi, > The set_wdog_reset() function is not necessary as this is handled by > the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property > being set. > Signed-off-by: Peng Fan > Reviewed-by: Marek Vasut Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v3 2/2] pmic: pca9450: Add regulator driver
> Add PCA9450 regulator driver. This is complementary driver for the BUCKn > and LDOn regulators provided by the PCA9450 PMIC driver. Currently the > driver permits reading the settngs and configuring the BUCKn and LDOn > regulators. > Reviewed-by: Fabio Estevam > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 12/14] imx: imx8mq-cm: enable CONFIG_DM_SERIAL
> From: Peng Fan > Marked related nodes as u-boot,dm-spl for serial driver model > Enable CONFIG_DM_SERIAL > Signed-off-by: Peng Fan > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 2/8] ARM: dts: imx: Migrate iMX6QDL DRC02 DTs from Linux
> Migrate DH DRC02 device trees from Linux commit 42226c989789 > (tag v5.18-rc7). No changes have been made, the DTs are exact copies. > Furthermore add the DTB to dh_imx6_defconfig. > Reviewed-by: Marek Vasut > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 14/14] imx: imx8mq-phanbell: enable CONFIG_DM_SERIAL
> From: Peng Fan > Marked related nodes as u-boot,dm-spl for serial driver model > Enable CONFIG_DM_SERIAL > Signed-off-by: Peng Fan > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v3 1/2] pmic: pca9450: Add upstream regulators subnode match
> The upstream DT regulators node subnodes are named BUCKn and LDOn, > the downstream DT regulators node subnodes are named buckn and ldon, > add the upstream match. > Reviewed-by: Fabio Estevam > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] imx: imx8mn_smm_s2/s2pro: Enable TrustZone
> When the board was added, enabling tzc380 was left off by
> mistake. The optee was tested with the following configuration
> in s2pro
> + firmware {
> + optee {
> + compatible = "linaro,optee-tz";
> + method = "smc";
> + };
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + /* 6MiB */
> + optee_core@5f80 {
> + reg = <0x00 0x5f80 0x00 0x60>;
> + };
> +
> + /* 2MiB */
> + optee_shm@5fe0 {
> + reg = <0x00 0x5fe0 0x00 0x20>;
> + };
> + };
> +
> Signed-off-by: Michael Trimarchi
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH v2 3/8] ARM: dts: imx: Migrate iMX6QDL picoITX DTs from Linux
> Migrate DH picoITX device trees from Linux commit 42226c989789 > (tag v5.18-rc7). No changes have been made, the DTs are exact copies. > Furthermore add the DTB to dh_imx6_defconfig. > Reviewed-by: Marek Vasut > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 3/3] imx8mp_rsb3720a1: Enable cache in SPL
> From: Fabio Estevam > There is no reason for disabling I-cache and D-cache > in SPL. > > Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and > CONFIG_SPL_SYS_DCACHE_OFF options. > Signed-off-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] configs: remove FEC_QUIRK_ENET_MAC from imx8m configs
> FEC_QUIRK_ENET_MAC is defined in the imx-regs.h include file and thus > does not need to be defined in the various board config includes. > Signed-off-by: Tim Harvey Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 11/14] imx: dts: move common changes to imx8mq-u-boot.dtsi
> From: Peng Fan > Move some common changes to imx8mq-u-boot.dtsi, so others could reuse it > Signed-off-by: Peng Fan > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] i.MX6SX: crypto/fsl: fix entropy delay value
> RNG Hardware error is reported due to incorrect entropy delay > rng self test are run to determine the correct ent_dly. > test is executed with different voltage and temperature to identify the > worst case value for ent_dly. after adding a margin value(1000), > ent_dly should be at least 12000. > Signed-off-by: Gaurav Jain > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V4 4/5] spl: spl_nand: Fix bad block handling in fitImage
> If the fitImage has some bad block in fit image area, the > offset must be recalulcated. This should be done always. > After implementing it in mxs now is possible to call the function > even for that platform. > Cc: Fabio Estevam > Tested-By: Tim Harvey > Reviewed-by: Tom Rini > Signed-off-by: Michael Trimarchi Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] imx: imx8m: drop uneeded check
> From: Peng Fan > All i.MX8M needs TZASC ID SWAP set and locked, no need the check to > waste cpu cycles. > Signed-off-by: Peng Fan > Reviewed-by: Andrey Zhizhikin Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] kontron-sl-mx8mm: Select the CONFIG_CMD_UNZIP option
> From: Fabio Estevam > Select the CMD_UNZIP option so that the 'gzwrite' command > can be used to flash wic.gz image into the eMMC. > Signed-off-by: Fabio Estevam > Reviewed-by: Frieder Schrempf Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 2/4] imx: bootaux: add missing newline
> From: Peng Fan > Add missing newline > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V4 2/5] mtd: nand: mxs_nand_spl: Fix bad block skipping
> The specific implementation was having bug. Those bugs are since
> the beginning of the implementation. Some manufactures can already
> experience this bug in their SPL code. This bug can be more visible on
> architecture that has complicated boot process like imx8mn. Older
> version of uboot can be affected if the bad block
> appear in correspoding of the beginning of u-boot image. In order to
> adjust the function we scan from the first erase block.
> The problematic part of old code was in this part:
> while (is_badblock(mtd, offs, 1)) {
>page = page + nand_page_per_block;
> /* Check i we've reached the end of flash. */
> if (page >= mtd->size >> chip->page_shift) {
> free(page_buf);
> return -ENOMEM;
> }
> }
> Even we fix it adding increment of the offset of one erase block size
> , we don't fix the problem, because the first erase block where the
> image start is not checked. The code was tested on an imx8mn where
> the boot rom api was not able to skip it. This code is used by other
> architecures like imx6 and imx8mm
> Cc: Han Xu
> Cc: Fabio Estevam
> Acked-by: Han Xu
> Tested-By: Tim Harvey
> Signed-off-by: Michael Trimarchi
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH] caam: Fix crash in case caam_jr_probe failed
> From: Ye Li > If probing caam_jr returns failure, the variable "dev" will not be > initialized, so we can't use dev->name for the error print. > Otherwise it will cause crash. > Signed-off-by: Ye Li > Reviewed-by: Gaurav Jain Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 1/4] imx: bootaux: cleanup code
> From: Peng Fan > Use if (CONFIG_IS_ENABLED()) to make code cleaner > Enable elf support for i.MX8M > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] crypto/fsl: fsl_hash: Fix dcache issue in caam_hash_finish
> HW accelerated hash operations are giving incorrect hash output. > so add flush and invalidate for input/output hash buffers. > Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using > hardware acceleration.) > Signed-off-by: Gaurav Jain Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2] i.MX8 crypto/fsl: Enable fsl CAAM rng driver
> rng driver enabled to read random number using caam. > Signed-off-by: Gaurav Jain Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 8/8] ARM: imx6: Adapt device tree selection in DH board file
> Before this commit device tree selection could rely solely on > differentiating the iMX6 processor variant Q and DL. After adding two new > carrier boards, the DRC02 and the picoITX, the interchangeability of SoMs > makes this approach infeasible. > It is now required to specify the carrier board (dhcom-drc02, > dhcom-picoitx or dhcom-pdk2) at compile time using > CONFIG_DEFAULT_DEVICETREE. The SoM is determined at runtime as before. > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 5/8] ARM: dts: imx: Simplify fec node for iMX6QDL DHCOM boards
> Firstly the FEC can now use the regulator reg_eth_vio from > imx6qdl-dhcom-som.dtsi instead of defining its own. > Secondly the node is moved to the more generic SoM device tree > file, because it can be used by multiple boards. > Reviewed-by: Marek Vasut > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 15/16] imx: verdin-imx8mm/p: cleanup board watchdog code
> From: Peng Fan > pinctrl_wdog already marked u-boot,dm-spl, so clean up board code. > The set_wdog_reset() function is not necessary as this is handled by > the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property > being set. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 01/14] imx: imx8mp_rsb3720a1: convert to DM_SERIAL
> From: Peng Fan > Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already > marked with u-boot,dm-spl. > Signed-off-by: Peng Fan > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V4 1/5] nand: raw: mxs_nand: Fix specific hook registration
> Move the hook after nand_scan_tail is called. The hook must be replaced > to the mxs specific one but those must to be assignment later in the > probe function. > With this fix markbad is working again. Before this change: > nand markbad 0xDEC00 > NXS NAND: Writing OOB isn't supported > NXS NAND: Writing OOB isn't supported > block 0x000dec00 NOT marked as bad! ERROR 0 > Cc: Han Xu > Cc: Fabio Estevam > Acked-by: Han Xu > Tested-By: Tim Harvey > Signed-off-by: Michael Trimarchi Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 03/14] imx: imx8mm_mx8menlo: Enable DM_SERIAL
> From: Peng Fan > Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already > marked with u-boot,dm-spl. > Signed-off-by: Peng Fan > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 1/2] mx6slevk: Remove duplicated "mmc dev" command
> From: Fabio Estevam
> The "mmc dev ${mmcdev}" command is done twice.
> Remove one ocurrence to avoid the duplication.
> Signed-off-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH 1/4] ARM: imx: imx8m: Introduce and use UART_BASE_ADDR(n)
> Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base > address. Convert all board configurations to this new macro. This is the > first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a > clean up, no functional change. > The new macro contains compile-time test to verify N is in suitable > range. The test works such that it multiplies constant N by constant > double-negation of size of a non-empty structure, i.e. it multiplies > constant N by constant 1 in each successful compilation case. > The non-empty structure may contain C11 _Static_assert(), make use of > this and place the kernel variant of static assert in there, so that > it performs the compile-time check for N in the correct range. Note > that it is not possible to directly use static_assert in compound > statements, hence this convoluted construct. > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V4 3/5] arm: mach-imx: cmd_nandbcb fix bad block handling
> The badblock should be skipped properly in reading and writing. > Fix the logic. The bcb struct is written, skipping the bad block, > so we need to read using the same logic. This was tested create > bad block in the area and then flash it and read it back. > Acked-by: Han Xu > Tested-By: Tim Harvey > Signed-off-by: Michael Trimarchi Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 03/16] imx: imx8mp_evk: enable pinctrl_wdog in SPL
> From: Peng Fan > Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, > The set_wdog_reset() function is not necessary as this is handled by > the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property > being set. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v1] ARM: imx8mm: verdin-imx8mm: fix board hang in spl
> From: Marcel Ziswiler
> Move the preloader_console_init() call after spl_early_init() to avoid
> board hang in SPL.
> While at it remove explicit in-code console/debug UART pinmuxing (uart1
> and its pinmuxing are already marked as u-boot,dm-spl via device tree).
> Fixes: 4551e1898769 ("configs: verdin-imx8mm: verdin-imx8mp: enable dm
> serial")
> Signed-off-by: Marcel Ziswiler
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH] board: gateworks: venice: enable SPL_DM_SERIAL
> The uart2 and its pinmux are already marked with u-boot,dm-spl but we > need to move the call to preloader_console_init() after spl_early_init() > to avoid a board hang as dm can't be used until after spl_early_init() > due to the uart driver not enabling the uart clock. > Remove the manual config of the UART pinmux now that it is no longer > needed. > Signed-off-by: Tim Harvey Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 4/4] imx: imx8m: add rproc_att
> From: Peng Fan > With rpoc_att, bootaux able to kick elf file for M core > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 7/8] ARM: dts: imx: Configure FEC for iMX6QDL DRC02
> Add a u-boot dtsi for configuring the FEC node of the DH DRC02. > Reviewed-by: Marek Vasut > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 3/4] imx: bootaux: get stack from elf file
> From: Peng Fan > To i.MX8, M core stack is pre-coded in source code, so need to get it > before kicking M core. The stack pointer is stored in the first word of > the first PT_LOAD section __isr_vector. So use a num to index the > section loading. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 09/14] imx: imx8mm_edm_sbc: Enable SPL_DM_SERIAL
> From: Peng Fan > Enable CONFIG_SPL_DM_SERIAL. uart and its pinmux was already > marked with u-boot,dm-spl. > Move preloader_console_init after spl_early_init to make sure driver > model work. > Signed-off-by: Peng Fan > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] configs: imx8mp_venice: add FEC_QUIRK_ENET_MAC
> The IMX8MP SoC FEC needs to have the FEC_QUIRK_ENET_MAC defined.
> Fixes: commit 2395625209cc ("board: gateworks: venice: add
> imx8mp-venice-gw740x support")
> Signed-off-by: Tim Harvey
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH V2 10/16] imx: imx8mn_smm_s2: clean up board watchdog code
> From: Peng Fan > pinctrl_wdog already marked u-boot,dm-spl, so clean up board code. > The set_wdog_reset() function is not necessary as this is handled by > the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property > being set. > Signed-off-by: Peng Fan > Tested-by: Ariel D'Alessandro Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] ARM: dts: imx: Use 100 kHz I2C2 on Data Modul i.MX8M Mini eDM SBC
> The I2C2 has SMBus device SMSC USB2514Bi connected to it, the device is > capable of up to 100 kHz operation. Reduce the bus frequency to 100 kHz > to guarantee this I2C device can work correctly. > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 2/4] ARM: imx: imx27: Introduce and use UART_BASE_ADDR(n)
> Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base > address. Convert all board configurations to this new macro. This is the > first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a > clean up, no functional change. > The new macro contains compile-time test to verify N is in suitable > range. The test works such that it multiplies constant N by constant > double-negation of size of a non-empty structure, i.e. it multiplies > constant N by constant 1 in each successful compilation case. > The non-empty structure may contain C11 _Static_assert(), make use of > this and place the kernel variant of static assert in there, so that > it performs the compile-time check for N in the correct range. Note > that it is not possible to directly use static_assert in compound > statements, hence this convoluted construct. > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 2/2] mx6sllevk: Remove duplicated "mmc dev" command
> From: Fabio Estevam
> The "mmc dev ${mmcdev}" command is done twice.
> Remove one ocurrence to avoid the duplication.
> Signed-off-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH] board: gateworks: gw_ventana: remove obsolete file
> commit 61cf22505339 ("board: gateworks: gw_ventana: use comomn GSC driver")
> moved to the common GSC driver and moved remaining board-specific
> functions to eeprom.c. The functions in gsc.c are no longer used and it
> was removed from the Makefile but the file itself was not removed.
> Remove it now.
> Signed-off-by: Tim Harvey
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH V2 13/14] imx: imx8mq-pico: enable CONFIG_DM_SERIAL
> From: Peng Fan > Marked related nodes as u-boot,dm-spl for serial driver model > Enable CONFIG_DM_SERIAL > Signed-off-by: Peng Fan > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 1/8] ARM: imx6: Fix broken DT path in DH board file
> In the DH electronics iMX6 board file fix the outdated eeprom path by > using a DT label instead. > The label has been newly created for all iMX6QDL DHCOM boards. > Reviewed-by: Marek Vasut > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v3 1/2] imx8mn_ddr4_evk: Add USB Mass Storage support
> From: Fabio Estevam > Add USB Mass Storage support, which is a convenient way to flash > the eMMC card, for example. > Signed-off-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] imx8m: fix reading of DDR4 MR registers
> I was trying to employ lpddr4_mr_read() to something similar to what > the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM > type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c > differs from the private one used by that board in how it extracts the > byte value, and I was only getting zeroes. Adding a bit of debug > printf'ing gives me > tmp = 0x0000 > tmp = 0x00070700 > tmp = 0x > tmp = 0x00101000 > and indeed I was expecting a (combined) value of 0xff070010 (0xff > being Manufacturer ID for Micron). I can't find any documentation that > says how the values are supposed to be read, but clearly the iot-gate > definition is the right one, both for its use case as well as my > imx8mp-based board. > So lift the private definition of lpddr4_mr_read() from the > imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration > in the ddr.h header where e.g. get_trained_CDD() is already declared. > This has only been compile-tested for the imx8mm-cl-iot-gate > board (since I don't have the hardware), but since I've merely moved > its definition of lpddr4_mr_read(), I'd be surprised if it changed > anything for that board. > Signed-off-by: Rasmus Villemoes > Tested-by: Ying-Chun Liu (PaulLiu) > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 16/16] imx: toradex/verdin-imx8mm/p: cleanup board watchdog code
> From: Peng Fan > pinctrl_wdog already marked u-boot,dm-spl, so clean up board code. > The set_wdog_reset() function is not necessary as this is handled by > the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property > being set. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] i.MX8ULP: add display_ele_fw_version api
> implement get f/w version api. > print ele f/w version in spl. > Signed-off-by: Gaurav Jain > Reviewed-by: Peng Fan > Reviewed-by: Pankaj Gupta Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 6/8] ARM: dts: imx: Configure FEC for iMX6QDL picoITX
> Add a u-boot dtsi for configuring the FEC node of the DH picoITX. > Reviewed-by: Marek Vasut > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
