RE: [v4 03/12] spi: aspeed: Add ASPEED SPI controller driver

[Chin-Ting Kuo]

Hi Joel,

> -Original Message-
> From: Joel Stanley 
> Sent: Thursday, July 7, 2022 1:37 PM
> Subject: Re: [v4 03/12] spi: aspeed: Add ASPEED SPI controller driver
> 
> Hi Chin-Ting,
> 
> On Tue, 24 May 2022 at 05:58, Chin-Ting Kuo
>  wrote:
> >
> > Add ASPEED BMC FMC/SPI memory controller driver with spi-mem interface
> > for AST2500 and AST2600 platform.
> 
> Have you considered including 2400 support in your patch set?
> 

No. But in order to achieve sustainability and completeness, we will add 
AST2400 part in the next patch version.


Best Wishes,
Chin-Ting

> I have prepared a series that adds upstream support for the 2400. We already
> have support in other drivers (gpio, i2c, sdhci, timer, wdt) so there's no 
> blocker
> in including support in your patch.
> 
> Cheers,
> 
> Joel
> 
> >
> > There are three SPI memory controllers embedded in an ASPEED SoC.
> > - FMC: Named as Firmware Memory Controller. After AC on, MCU ROM
> >fetches initial device boot image from FMC chip select(CS) 0.
> >
> > - SPI1: Play the role of a SPI Master controller. Or, there is a
> > dedicated path for HOST(X86) to access its BIOS flash mounted
> > under BMC. spi-aspeed.c implements the control sequence when
> > SPI1 is a SPI master.
> >
> > - SPI2: It is a pure SPI flash controller. For most scenarios, flashes
> > mounted under it are for pure storage purpose.
> >
> > ASPEED SPI controller supports 1-1-1, 1-1-2 and 1-1-4 SPI flash mode.
> > Three types of command mode are supported, normal mode, command
> > read/write mode and user mode.
> > - Normal mode: Default mode. After power on, normal read command 03h
> or
> >13h is used to fetch boot image from SPI flash.
> >- AST2500: Only 03h command can be used after power
> on
> >   or reset.
> >- AST2600: If FMC04[6:4] is set, 13h command is used,
> >   otherwise, 03h command.
> >The address length is decided by FMC04[2:0].
> >
> > - Command mode: SPI controller can send command and address
> > automatically when CPU read/write the related
> remapped
> > or decoded address area. The command used by this
> mode
> > can be configured by FMC10/14/18[23:16]. Also, the
> > address length is decided by FMC04[2:0]. This mode will
> > be implemented in the following patch series.
> >
> > - User mode: It is a traditional and pure SPI operation, where
> >  SPI transmission is controlled by CPU. It is the main
> >  mode in this patch.
> >
> > Each SPI controller in ASPEED SoC has its own decoded address mapping.
> > Within each SPI controller decoded address, driver can assign a
> > specific address region for each CS of a SPI controller. The decoded
> > address cannot overlap to each other. With normal mode and command
> > mode, the decoded address accessed by the CPU determines which CS is
> active.
> > When user mode is adopted, the CS decoded address is a FIFO, CPU can
> > send/receive any SPI transmission by accessing the related decoded
> > address for the target CS.
> >
> > Signed-off-by: Chin-Ting Kuo 
> > ---
> > v2: Remove defconfig files from this patch.
> >
> >  drivers/spi/Kconfig  |   8 +
> >  drivers/spi/Makefile |   1 +
> >  drivers/spi/spi-aspeed.c | 822
> > +++
> >  3 files changed, 831 insertions(+)
> >  create mode 100644 drivers/spi/spi-aspeed.c
> >
> > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index
> > a1e515cb2b..a616294910 100644
> > --- a/drivers/spi/Kconfig
> > +++ b/drivers/spi/Kconfig
> > @@ -387,6 +387,14 @@ config SANDBOX_SPI
> > };
> >   };
> >
> > +config SPI_ASPEED
> > +   bool "ASPEED SPI controller driver"
> > +   depends on DM_SPI && SPI_MEM
> > +   default n
> > +   help
> > + Enable ASPEED SPI controller driver for AST2500
> > + and AST2600 SoCs.
> > +
> >  config SPI_SIFIVE
> > bool "SiFive SPI driver"
> > help
> > diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index
> > 06e81b465b..36a4bd5dce 100644
> > --- a/drivers/spi/Makefile
> > +++ b/drivers/spi/Makefile
> > @@ -9,6 +9,7 @@ obj-y += spi-uclass.o
> >  obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
> >  obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o
> >  obj-$(CONFIG_SOFT_SPI) += soft_spi.o
> > +obj-$(CONFIG_SPI_ASPEED) += spi-aspeed.o
> >  obj-$(CONFIG_SPI_MEM) += spi-mem.o
> >  obj-$(CONFIG_TI_QSPI) += ti_qspi.o
> >  obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o
> > diff --git a/drivers/spi/spi-aspeed.c b/drivers/spi/spi-aspeed.c new
> > file mode 100644 index 00..9574aff793
> > --- /dev/null
> > +++ b/drivers/spi/spi-aspeed.c
> > @@ -0,0 +1,822 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * ASPEED FMC/SPI Controller driver
> > + *
> > + * Copyright (c) 2022 ASPEED 

Re: [PATCH] spl: mmc: Use correct MMC device when loading image

[Marek Vasut]

On 7/6/22 12:58, Harald Seiler wrote:

When attempting to load images from multiple MMC devices in sequence,
spl_mmc_load() chooses the wrong device from the second attempt onwards.

The reason is that MMC initialization is only done on its first call and
spl_mmc_load() will then continue using this same device for all future
calls.

Fix this by checking the devnum of the "cached" device struct against
the one which is requested.  If they match, use the cached one but if
they do not match, initialize the new device.

This fixes specifying multiple MMC devices in the SPL's boot order to
fall back when U-Boot Proper is corrupted or missing on the first
attempted MMC device.

Fixes: e1eb6ada4e38 ("spl: Make image loader infrastructure more universal")
Signed-off-by: Harald Seiler 


Reviewed-by: Marek Vasut 

Re: [PATCH 01/20] Convert CONFIG_USB_OHCI_NEW et al to Kconfig

[Tom Rini]

On Sat, Jun 25, 2022 at 11:02:31AM -0400, Tom Rini wrote:

> This converts the following to Kconfig:
> CONFIG_SYS_OHCI_SWAP_REG_ACCESS
> CONFIG_SYS_USB_OHCI_CPU_INIT
> CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
> CONFIG_SYS_USB_OHCI_SLOT_NAME
> CONFIG_USB_ATMEL
> CONFIG_USB_ATMEL_CLK_SEL_PLLB
> CONFIG_USB_ATMEL_CLK_SEL_UPLL
> CONFIG_USB_OHCI_LPC32XX
> CONFIG_USB_OHCI_NEW
> 
> Signed-off-by: Tom Rini 

For the series (and v2 on 20/20), applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCHv2 16/18] spl: Ensure all SPL symbols in Kconfig have some SPL dependency

[Tom Rini]

On Fri, Jun 10, 2022 at 11:03:09PM -0400, Tom Rini wrote:

> Tighten up symbol dependencies in a number of places.  Ensure that a SPL
> specific option has at least a direct dependency on SPL.  In places
> where it's clear that we depend on something more specific, use that
> dependency instead.  This means in a very small number of places we can
> drop redundant dependencies.
> 
> Reported-by: Pali Rohár 
> Signed-off-by: Tom Rini 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCHv2 07/18] Convert CONFIG_USB_XHCI_EXYNOS et al to Kconfig

[Tom Rini]

On Fri, Jun 10, 2022 at 11:03:00PM -0400, Tom Rini wrote:

> This converts the following to Kconfig:
>CONFIG_USB_XHCI_EXYNOS
>CONFIG_USB_EHCI_EXYNOS
> 
> Signed-off-by: Tom Rini 

Applied to u-boot/next, thanks!

-- 
Tom


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[gitdm PATCH 2/2] logparser.py: Try and be more robust with unicode handling

[Tom Rini]

Given the sometimes oddly formatted data that can come through when
removing code, we need to be as flexible as possible when handling it.
Set our encoding to unicode_escape and if we still run in to a problem,
it's likely going to be OK to ignore it.

Signed-off-by: Tom Rini 
---
I've emailed this to Jonathan Corbet as well as he's the upstream for
the project, and this does work for me.  But I'm not a python guru by
any means.  But trying to run the stats for v2022.04..v2022.07-rc6 blows
up in places otherwise.

 logparser.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/logparser.py b/logparser.py
index efbc72f868eb..d5906e97689d 100644
--- a/logparser.py
+++ b/logparser.py
@@ -37,6 +37,7 @@ class LogPatchSplitter:
 self.fd = fd
 self.buffer = None
 self.patch = []
+sys.stdin.reconfigure(encoding='unicode_escape', errors='ignore')
 
 def __iter__(self):
 return self
-- 
2.25.1

[gitdm PATCH 1/2] Merge branch 'master' into u-boot

[Tom Rini]

Bring us up to commit 0b8875225750 ("Allow multiple spaces within an
email address") of the upstream gitdm project.

Signed-off-by: Tom Rini 

--- 
So this isn't a real patch exactly.  This shows what the single merge
error would need to be corrected as, in order to bring our tree up to
the above commit from upstream.  That in turn is just doing a python3
print() rather than python2 print in the error case where we try and
further correct the Funky email addresses we have, in code that was
already clearly marked as local only code.  The rest of those changes
moved in cleanly.

diff --cc database.py
index f356f298c7ed,b50b70cac378..6c43dd23f55e
--- a/database.py
+++ b/database.py
@@@ -296,56 -315,20 +315,56 @@@ def AddEmailEmployerMapping(email, empl
  except KeyError:
  EmailToEmployer[email] = [(end, empl)]
  
 +##!!wd!!
 +FunkyToEmail = {
 +#
 +# Known corrupted addresses.
 +#
 +'bnemec  jcrosoft.com': 'plagn...@jcrosoft.com',
 +'plagnioj at': 'plagn...@jcrosoft.com',
 +'richardretanubun at ruggedcom.com': 'richardretanu...@ruggedcom.com',
 +'scn1874 at yandex.ru': 'scn1...@yandex.ru',
 +'stelian  cisco  com': 'kot...@cisco.com',
 +##!!wd!!
 +
- def MapToEmployer (email, unknown = 0):
+ def MapToEmployer(email, unknown = 0):
  # Somebody sometimes does s/@/ at /; let's fix it.
- email = email.lower ().replace (' at ', '@')
+ email = email.lower().replace(' at ', '@')
  try:
  return EmailToEmployer[email]
  except KeyError:
  pass
- namedom = email.split ('@')
- if len (namedom) < 2:
- print 'Oops...funky email %s' % email
+ namedom = email.split('@')
+ if len(namedom) < 2:
+ print('Oops...funky email %s' % email)
 +##!!wd!!
 +try:
 +email = FunkyToEmail[email]
- print ' ... fixed up to %s' % email
++print(' ... fixed up to %s' % email)
 +namedom = email.split ('@')
 +except KeyError:
 +return [(nextyear, GetEmployer ('Funky'))]
 +##!!wd!!
- return [(nextyear, GetEmployer ('Funky'))]
- s = namedom[1].split ('.')
- for dots in range (len (s) - 2, -1, -1):
- addr = '.'.join (s[dots:])
+ return [(nextyear, GetEmployer('Funky'))]
+ s = namedom[1].split('.')
+ for dots in range(len(s) - 2, -1, -1):
+ addr = '.'.join(s[dots:])
  try:
  return EmailToEmployer[addr]
  except KeyError:

Re: [PATCH v4 1/7] tools: mkimage: Add support to generate FlexSPI Header for i.MX8m

[Adam Ford]

On Thu, Jul 7, 2022 at 7:45 AM Mamta Shukla
 wrote:
>
> Add struct with Flex SPI Configuration Block and enable generating
> fspi header using mkimage.
>
> Refer i.MX 8M Mini Application Processor Reference Manual for
> detailed information about parameters for FlexSPI Configuration block.
>

I tested this on a Nano board (imx8mn_beacon) as well.  This also
appears to work for Nano, and based on what I understand, it should
probably also work on the 8MP, but I haven't gotten around to testing
that yet.

Thanks for doing this.

adam
> Signed-off-by: Mamta Shukla 
> Signed-off-by: Thomas Haemmerle 
> Tested-by: Adam Ford 
> Reviewed-by: Fabio Estevam 
> ---
> v2:
> -Add check for error in case open() for fspi_fd in imx8mkimage.c fails
>
> v3:
> -No changes
>
> v4:
> -No changes
>
>  include/imximage.h | 38 ++
>  tools/Kconfig  | 59 +
>  tools/imx8mimage.c | 81 +++---
>  3 files changed, 174 insertions(+), 4 deletions(-)
>
> diff --git a/include/imximage.h b/include/imximage.h
> index 5a812f5a10..c1ecc0b7cb 100644
> --- a/include/imximage.h
> +++ b/include/imximage.h
> @@ -201,6 +201,44 @@ struct imx_header {
> } header;
>  };
>
> +typedef struct {
> +   uint8_t tag[4];
> +   uint8_t version[4];
> +   uint8_t reserved_1[4];
> +   uint8_t read_sample;
> +   uint8_t datahold;
> +   uint8_t datasetup;
> +   uint8_t coladdrwidth;
> +   uint8_t devcfgenable;
> +   uint8_t reserved_2[3];
> +   uint8_t devmodeseq[4];
> +   uint8_t devmodearg[4];
> +   uint8_t cmd_enable;
> +   uint8_t reserved_3[3];
> +   uint8_t cmd_seq[16] ;
> +   uint8_t cmd_arg[16];
> +   uint8_t controllermisc[4];
> +   uint8_t dev_type;
> +   uint8_t sflash_pad;
> +   uint8_t serial_clk;
> +   uint8_t lut_custom ;
> +   uint8_t reserved_4[8];
> +   uint8_t sflashA1[4];
> +   uint8_t sflashA2[4];
> +   uint8_t sflashB1[4];
> +   uint8_t sflashB2[4];
> +   uint8_t cspadover[4];
> +   uint8_t sclkpadover[4];
> +   uint8_t datapadover[4];
> +   uint8_t dqspadover[4];
> +   uint8_t timeout[4];
> +   uint8_t commandInt[4];
> +   uint8_t datavalid[4];
> +   uint8_t busyoffset[2];
> +   uint8_t busybitpolarity[2];
> +   uint8_t lut[256];
> +} __attribute__((packed)) fspi_conf;
> +
>  typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
> char *name, int lineno,
> int fld, uint32_t value,
> diff --git a/tools/Kconfig b/tools/Kconfig
> index 117c921da3..539708f277 100644
> --- a/tools/Kconfig
> +++ b/tools/Kconfig
> @@ -98,4 +98,63 @@ config TOOLS_MKEFICAPSULE
>   optionally sign that file. If you want to enable UEFI capsule
>   update feature on your target, you certainly need this.
>
> +menuconfig FSPI_CONF_HEADER
> +   bool "FlexSPI Header Configuration"
> +   help
> + FSPI Header Configuration
> +
> +config FSPI_CONF_FILE
> +   string "FlexSPI Header File"
> +   depends on FSPI_CONF_HEADER
> +   help
> + FlexSPI Header File name
> +
> +config READ_CLK_SOURCE
> +   hex "Sampling Clock Source"
> +   default 0x00
> +   depends on FSPI_CONF_HEADER
> +   help
> + Sample Clock source for Flash, default is internal loopback clock
> +
> +config DEVICE_TYPE
> +   hex "Flash Type"
> +   default 0x01
> +   depends on FSPI_CONF_HEADER
> +   help
> + Flash type: Serial NOR (0X01) and Serial NAND (0x02)
> +
> +config FLASH_PAD_TYPE
> +   hex "Flash Pad Type"
> +   default 0x01
> +   depends on FSPI_CONF_HEADER
> +   help
> + Flash Pad type :
> + Single Pad 0x01
> + Dual Pads  0x02
> + Quad Pad   0x04
> + Octal Pad  0x08
> +
> +config SERIAL_CLK_FREQUENCY
> +   hex "Serial Clock Frequency"
> +   default 0x02
> +   depends on FSPI_CONF_HEADER
> +   help
> + Chip specific frequency: other value 30MHz
> + 1-30MHz  2-50MHz 3-60MHz 4-75MHz 5-80MHz 6-100MHz 7-133MHz 8-166MHz
> +
> +config LUT_CUSTOM_SEQUENCE
> +   hex "Enable Custom Look Up Table(LUT) Sequence"
> +   default 0x00
> +   depends on FSPI_CONF_HEADER
> +   help
> + 0 - Use predefined LUT Sequence
> + 1 - Use LUT Sequence provided
> +
> +config LUT_SEQUENCE
> +   string "Look Up Table Sequence"
> +   default "0x0b, 0x04, 0x18, 0x08, 0x08, 0x30, 0x04, 0x24"
> +   depends on FSPI_CONF_HEADER
> +   help
> + Look Up Table Sequence
> +
>  endmenu
> diff --git a/tools/imx8mimage.c b/tools/imx8mimage.c
> index 4eed683396..facf8887a1 100644
> --- a/tools/imx8mimage.c
> +++ b/tools/imx8mimage.c
> @@ -12,7 +12,7 @@
>  #include "compiler.h"
>
>  static uint32_t ap_start_addr, sld_start_addr, sld_src_off;
> -static char *ap_img, *sld_img, *signed_hdmi;
> 

fit_check_sig not hashing everything.

[Martin Bonner]

I am running fit_check_sig on windows to understand in more details how it
works.

What I really want, is a _precise_ description of exactly which bytes of a
FIT image are fed into the hash function (and in which order) in order to
calculate the hash value.  I then want to reproduce that hash function in
python (using the "fdt" module) in order to sign the FIT image offline.  I
am expecting to have to reverse engineer this description (signature.txt
isn't nearly detailed enough for me), and that's fine (although if anyone
wants to prove me wrong, that would be wonderful).

I have a 30MB FIT image as input, and I have added some debug to
hash_calculate in rsa-checksum.c to print the amount of data being hashed.
The answer is a rather scary "1106 bytes"!  The good news is that I have
also added debug to print out the offset within the FIT image of the
regions being hashed (actually in fit_config_check_sig in image-sig.c), and
used this to zero a single byte of the FIT image well away from the offsets
(allegedly) being hashed - and the verification fails (yay!).  So clearly I
don't understand what is going on (!).

Can anyone clarify what is happening?

One slightly strange thing I notice is that fit_config_check_sig appears to
be called four! times.

I am working with 2020.1, and cannot easily upgrade to the latest because
the signature nodes contain @.

Debug:
Verifying Hash Integrity ... In fit_config_verify
MJB fit_config_verify_required_sigs
In fit_config_verify_sig
MJB Verifying signature for node hash@1
MJB Verifying signature for node signature@1
sha256,rsa4096:ultra-insecure
Verifying 8 regions:
00 00 00 01 00 00 00 00 00 00 00 03 00 00 00 04 (offset=38 len=180)
00 00 00 03 00 00 00 07 00 00 00 30 6B 65 72 6E (offset=4cee04 len=244)
hash@1 region (offset=4d5b30 len=176)
00 00 00 03 00 00 00 08 00 00 00 30 72 61 6D 64 (offset=1d4d7b4 len=184)
00 00 00 01 63 6F 6E 66 40 31 00 00 00 00 00 03 (offset=1d4d880 len=124)
00 00 00 02 00 00 00 01 73 69 67 6E 61 74 75 72 (offset=1d4d910 len=20)
00 00 00 02 00 00 00 02 00 00 00 02 00 00 00 02 (offset=1d4dc70 len=20)
64 65 73 63 72 69 70 74 69 6F 6E 00 6E 73 68 69 (offset=1d4dc84 len=158)
Total bytes hashed = 1106+
## Loading kernel from FIT Image at 6e2b ...
   Using 'conf@1' configuration
   Verifying Hash Integrity ...
In fit_config_verify
MJB fit_config_verify_required_sigs
In fit_config_verify_sig
MJB Verifying signature for node hash@1
MJB Verifying signature for node signature@1
sha256,rsa4096:ultra-insecure
Verifying 8 regions:
00 00 00 01 00 00 00 00 00 00 00 03 00 00 00 04 (offset=38 len=180)
00 00 00 03 00 00 00 07 00 00 00 30 6B 65 72 6E (offset=4cee04 len=244)
hash@1 region (offset=4d5b30 len=176)
00 00 00 03 00 00 00 08 00 00 00 30 72 61 6D 64 (offset=1d4d7b4 len=184)
00 00 00 01 63 6F 6E 66 40 31 00 00 00 00 00 03 (offset=1d4d880 len=124)
00 00 00 02 00 00 00 01 73 69 67 6E 61 74 75 72 (offset=1d4d910 len=20)
00 00 00 02 00 00 00 02 00 00 00 02 00 00 00 02 (offset=1d4dc70 len=20)
64 65 73 63 72 69 70 74 69 6F 6E 00 6E 73 68 69 (offset=1d4dc84 len=158)
Total bytes hashed = 1106+
OK

   Trying 'kernel@0' kernel subimage
 Description:  Linux Kernel
 Created:  Mon Apr  4 09:12:26 2022
 Type: Kernel Image
 Compression:  gzip compressed
 Data Size:5041417 Bytes = 4923.26 KiB = 4.81 MiB
 Architecture: PowerPC
 OS:   Linux
 Load Address: 0x
 Entry Point:  0x
 Hash algo:sha256
 Hash value:
d36fb92a4af6184ddb42619691323f8b45f84fdb77f5cc65d0d0cebd115eb6f3
   Verifying Hash Integrity ...
sha256+
OK

   Uncompressing Kernel Image
Unimplemented compression type 1
## Loading fdt from FIT Image at 6e2b ...
   Using 'conf@1' configuration
   Verifying Hash Integrity ...
In fit_config_verify
MJB fit_config_verify_required_sigs
In fit_config_verify_sig
MJB Verifying signature for node hash@1
MJB Verifying signature for node signature@1
sha256,rsa4096:ultra-insecure
Verifying 8 regions:
00 00 00 01 00 00 00 00 00 00 00 03 00 00 00 04 (offset=38 len=180)
00 00 00 03 00 00 00 07 00 00 00 30 6B 65 72 6E (offset=4cee04 len=244)
hash@1 region (offset=4d5b30 len=176)
00 00 00 03 00 00 00 08 00 00 00 30 72 61 6D 64 (offset=1d4d7b4 len=184)
00 00 00 01 63 6F 6E 66 40 31 00 00 00 00 00 03 (offset=1d4d880 len=124)
00 00 00 02 00 00 00 01 73 69 67 6E 61 74 75 72 (offset=1d4d910 len=20)
00 00 00 02 00 00 00 02 00 00 00 02 00 00 00 02 (offset=1d4dc70 len=20)
64 65 73 63 72 69 70 74 69 6F 6E 00 6E 73 68 69 (offset=1d4dc84 len=158)
Total bytes hashed = 1106+
OK

   Trying 'fdt@0' fdt subimage
 Description:  Flattened Device Tree blob
 Created:  Mon Apr  4 09:12:26 2022
 

[PATCH v3 5/5] patman: Take project defaults into account for --help

[Douglas Anderson]

I'd like it so that when you do "patman send --help" and you're using
Linux that it show it the proper defaults for Linux.

Signed-off-by: Douglas Anderson 
Tested-by: Brian Norris 
Reviewed-by: Simon Glass 
---

(no changes since v2)

Changes in v2:
- Make comment about parsing three times less nonsensical.

 tools/patman/main.py | 15 ++-
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/tools/patman/main.py b/tools/patman/main.py
index 468ebf814fbc..ec70d9fa1439 100755
--- a/tools/patman/main.py
+++ b/tools/patman/main.py
@@ -107,14 +107,19 @@ status.add_argument('-d', '--dest-branch', type=str,
 status.add_argument('-f', '--force', action=BooleanOptionalAction,
 help='Force overwriting an existing branch')
 
-# Parse options twice: first to get the project and second to handle
-# defaults properly (which depends on project)
-# Use parse_known_args() in case 'cmd' is omitted
+# Parse options several times:
+# - First to get the project.
+# - Second to handle defaults properly (which depends on project). This
+#   makes help display the right defaults.
+# - Finally after we have added an implicit command if necessary.
+#
+# Use parse_known_args() for the first two in case 'cmd' is omitted
+argv = [arg for arg in sys.argv[1:] if arg not in ('-h', '--help')]
+args, _ = parser.parse_known_args(argv)
 argv = sys.argv[1:]
-args, rest = parser.parse_known_args(argv)
 if hasattr(args, 'project'):
 settings.Setup(gitutil, parser, args.project, '')
-args, rest = parser.parse_known_args(argv)
+args, rest = parser.parse_known_args(argv)
 
 # If we have a command, it is safe to parse all arguments
 if args.cmd:
-- 
2.37.0.rc0.161.g10f37bed90-goog

[PATCH v3 4/5] patman: By default don't pass "--no-tree" to checkpatch for linux

[Douglas Anderson]

When you pass "--no-tree" to checkpatch it disables some extra checks
that are important for Linux. Specifically I want checks like:

  warning: DT compatible string "boogie,woogie" appears un-documented
  check ./Documentation/devicetree/bindings/

Let's make the default for Linux to _not_ pass --no-tree. We'll have a
config option and command line flag to override.

Signed-off-by: Douglas Anderson 
Tested-by: Brian Norris 
Reviewed-by: Brian Norris 
Reviewed-by: Simon Glass 
---

(no changes since v1)

 tools/patman/checkpatch.py | 11 +++
 tools/patman/control.py|  7 ---
 tools/patman/main.py   |  3 +++
 tools/patman/settings.py   |  3 ++-
 4 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/tools/patman/checkpatch.py b/tools/patman/checkpatch.py
index 70ba561c2686..d1b902dd9627 100644
--- a/tools/patman/checkpatch.py
+++ b/tools/patman/checkpatch.py
@@ -186,7 +186,7 @@ def check_patch_parse(checkpatch_output, verbose=False):
 return result
 
 
-def check_patch(fname, verbose=False, show_types=False):
+def check_patch(fname, verbose=False, show_types=False, use_tree=False):
 """Run checkpatch.pl on a file and parse the results.
 
 Args:
@@ -194,6 +194,7 @@ def check_patch(fname, verbose=False, show_types=False):
 verbose: True to print out every line of the checkpatch output as it is
 parsed
 show_types: Tell checkpatch to show the type (number) of each message
+use_tree (bool): If False we'll pass '--no-tree' to checkpatch.
 
 Returns:
 namedtuple containing:
@@ -210,7 +211,9 @@ def check_patch(fname, verbose=False, show_types=False):
 stdout: Full output of checkpatch
 """
 chk = find_check_patch()
-args = [chk, '--no-tree']
+args = [chk]
+if not use_tree:
+args.append('--no-tree')
 if show_types:
 args.append('--show-types')
 output = command.output(*args, fname, raise_on_error=False)
@@ -236,13 +239,13 @@ def get_warning_msg(col, msg_type, fname, line, msg):
 line_str = '' if line is None else '%d' % line
 return '%s:%s: %s: %s\n' % (fname, line_str, msg_type, msg)
 
-def check_patches(verbose, args):
+def check_patches(verbose, args, use_tree):
 '''Run the checkpatch.pl script on each patch'''
 error_count, warning_count, check_count = 0, 0, 0
 col = terminal.Color()
 
 for fname in args:
-result = check_patch(fname, verbose)
+result = check_patch(fname, verbose, use_tree=use_tree)
 if not result.ok:
 error_count += result.errors
 warning_count += result.warnings
diff --git a/tools/patman/control.py b/tools/patman/control.py
index b40382388e07..bf426cf7bcf4 100644
--- a/tools/patman/control.py
+++ b/tools/patman/control.py
@@ -64,7 +64,7 @@ def prepare_patches(col, branch, count, start, end, 
ignore_binary, signoff):
 patchstream.insert_cover_letter(cover_fname, series, to_do)
 return series, cover_fname, patch_files
 
-def check_patches(series, patch_files, run_checkpatch, verbose):
+def check_patches(series, patch_files, run_checkpatch, verbose, use_tree):
 """Run some checks on a set of patches
 
 This santiy-checks the patman tags like Series-version and runs the patches
@@ -77,6 +77,7 @@ def check_patches(series, patch_files, run_checkpatch, 
verbose):
 run_checkpatch (bool): True to run checkpatch.pl
 verbose (bool): True to print out every line of the checkpatch output 
as
 it is parsed
+use_tree (bool): If False we'll pass '--no-tree' to checkpatch.
 
 Returns:
 bool: True if the patches had no errors, False if they did
@@ -86,7 +87,7 @@ def check_patches(series, patch_files, run_checkpatch, 
verbose):
 
 # Check the patches, and run them through 'git am' just to be sure
 if run_checkpatch:
-ok = checkpatch.check_patches(verbose, patch_files)
+ok = checkpatch.check_patches(verbose, patch_files, use_tree)
 else:
 ok = True
 return ok
@@ -165,7 +166,7 @@ def send(args):
 col, args.branch, args.count, args.start, args.end,
 args.ignore_binary, args.add_signoff)
 ok = check_patches(series, patch_files, args.check_patch,
-   args.verbose)
+   args.verbose, args.check_patch_use_tree)
 
 ok = ok and gitutil.check_suppress_cc_config()
 
diff --git a/tools/patman/main.py b/tools/patman/main.py
index 56dcde1f9ef3..468ebf814fbc 100755
--- a/tools/patman/main.py
+++ b/tools/patman/main.py
@@ -82,6 +82,9 @@ send.add_argument('--binary', action=BooleanOptionalAction,
 send.add_argument('--check', action=BooleanOptionalAction, dest='check_patch',
   default=True,
   help="Check for patch compliance")
+send.add_argument('--tree', action=BooleanOptionalAction,
+  dest='check_patch_use_tree', default=False,
+  help="If False, pass '--no-tree' to checkpatch")
 

[PATCH v3 3/5] patman: Make most bool arguments BooleanOptionalAction

[Douglas Anderson]

For boolean arguments it's convenient to be able to specify both the
argument and its opposite on the command line. This is especially
convenient because you can change the default via the settings file
and being able express the opposite can be the only way to override
things.

Luckily python handles this well--we just need to specify things with
BooleanOptionalAction. We'll do that for all options except
"full-help" (where it feels silly). This uglifies the help text a
little bit but does give maximum flexibility.

Signed-off-by: Douglas Anderson 
Tested-by: Brian Norris 
Reviewed-by: Brian Norris 
Reviewed-by: Simon Glass 
---

(no changes since v2)

Changes in v2:
- Fix doc string for --ignore-bad-tags

 tools/patman/main.py | 55 ++--
 1 file changed, 28 insertions(+), 27 deletions(-)

diff --git a/tools/patman/main.py b/tools/patman/main.py
index e868878ad5a7..56dcde1f9ef3 100755
--- a/tools/patman/main.py
+++ b/tools/patman/main.py
@@ -6,7 +6,7 @@
 
 """See README for more information"""
 
-from argparse import ArgumentParser
+from argparse import ArgumentParser, BooleanOptionalAction
 import os
 import re
 import shutil
@@ -39,7 +39,7 @@ parser.add_argument('-c', '--count', dest='count', type=int,
 default=-1, help='Automatically create patches from top n commits')
 parser.add_argument('-e', '--end', type=int, default=0,
 help='Commits to skip at end of patch list')
-parser.add_argument('-D', '--debug', action='store_true',
+parser.add_argument('-D', '--debug', action=BooleanOptionalAction,
 help='Enabling debugging (provides a full traceback on error)')
 parser.add_argument('-p', '--project', default=project.detect_project(),
 help="Project name; affects default option values and "
@@ -49,42 +49,43 @@ parser.add_argument('-P', '--patchwork-url',
 help='URL of patchwork server [default: %(default)s]')
 parser.add_argument('-s', '--start', dest='start', type=int,
 default=0, help='Commit to start creating patches from (0 = HEAD)')
-parser.add_argument('-v', '--verbose', action='store_true', dest='verbose',
-default=False, help='Verbose output of errors and 
warnings')
+parser.add_argument('-v', '--verbose', action=BooleanOptionalAction,
+dest='verbose', default=False,
+help='Verbose output of errors and warnings')
 parser.add_argument('-H', '--full-help', action='store_true', dest='full_help',
 default=False, help='Display the README file')
 
 subparsers = parser.add_subparsers(dest='cmd')
 send = subparsers.add_parser('send')
-send.add_argument('-i', '--ignore-errors', action='store_true',
-   dest='ignore_errors', default=False,
-   help='Send patches email even if patch errors are found')
+send.add_argument('-i', '--ignore-errors', action=BooleanOptionalAction,
+  dest='ignore_errors', default=False,
+  help='Send patches email even if patch errors are found')
 send.add_argument('-l', '--limit-cc', dest='limit', type=int, default=None,
help='Limit the cc list to LIMIT entries [default: %(default)s]')
-send.add_argument('-m', '--no-maintainers', action='store_false',
-   dest='add_maintainers', default=True,
-   help="Don't cc the file maintainers automatically")
-send.add_argument('-n', '--dry-run', action='store_true', dest='dry_run',
-   default=False, help="Do a dry run (create but don't email patches)")
+send.add_argument('-m', '--maintainers', action=BooleanOptionalAction,
+  dest='add_maintainers', default=True,
+  help="cc the file maintainers automatically")
+send.add_argument('-n', '--dry-run', action=BooleanOptionalAction,
+  dest='dry_run', default=False,
+  help="Do a dry run (create but don't email patches)")
 send.add_argument('-r', '--in-reply-to', type=str, action='store',
   help="Message ID that this series is in reply to")
-send.add_argument('-t', '--ignore-bad-tags', action='store_true',
-  default=False,
-  help='Ignore bad tags / aliases (default=warn)')
-send.add_argument('-T', '--thread', action='store_true', dest='thread',
+send.add_argument('-t', '--ignore-bad-tags', action=BooleanOptionalAction,
+  default=False, help='Ignore bad tags / aliases')
+send.add_argument('-T', '--thread', action=BooleanOptionalAction, 
dest='thread',
   default=False, help='Create patches as a single thread')
 send.add_argument('--cc-cmd', dest='cc_cmd', type=str, action='store',
default=None, help='Output cc list for patch file (used by git)')
-send.add_argument('--no-binary', action='store_true', dest='ignore_binary',
-  default=False,
-  help="Do not output contents of changes in binary files")
-send.add_argument('--no-check', action='store_false', dest='check_patch',

[PATCH v3 2/5] patman: Don't look at sys.argv when parsing settings

[Douglas Anderson]

If you call the parser and tell it to parse but don't pass arguments
in then it will default to looking at sys.argv. This isn't really what
was intended and seems to have some side effects. Let's not do it.

NOTE: to see some of the side effects, note that this patch breaks
"patman -c1" if you don't have the patch ("patman: Fix implicit
command inserting") before it.

Signed-off-by: Douglas Anderson 
Tested-by: Brian Norris 
Reviewed-by: Brian Norris 
Reviewed-by: Simon Glass 
---

Changes in v3:
- Rebased atop ("patman: Fix defaults not propagating to subparsers")

 tools/patman/settings.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/patman/settings.py b/tools/patman/settings.py
index 4c847fe88fd4..6c5f6c8ed992 100644
--- a/tools/patman/settings.py
+++ b/tools/patman/settings.py
@@ -248,7 +248,7 @@ def _UpdateDefaults(main_parser, config):
 defaults = {}
 parser_defaults = []
 for parser in parsers:
-pdefs = parser.parse_known_args()[0]
+pdefs = parser.parse_known_args([])[0]
 parser_defaults.append(pdefs)
 defaults.update(vars(pdefs))
 
-- 
2.37.0.rc0.161.g10f37bed90-goog

[PATCH v3 1/5] patman: Fix implicit command inserting

[Douglas Anderson]

The logic to insert an implicit command has always been a bit broken
but it was masked by another bug fixed in the patch ("patman: Don't
look at sys.argv when parsing settings"). Specifically, imagine that
you're just calling patman like this:

  patman -c1

After the parse_known_args() command then the "-c1" will have been
parsed and we'll have no command. The "rest" variable will be an empty
list. Going into the logic you can see that nargs = 0. The implicit
insertion of send ideally would create an argument list of:
  ['-c1', 'send']
...but it doesn't because argv[:-0] is the same as argv[:0] and that's
an empty list.

Let's fix this little glitch.

Signed-off-by: Douglas Anderson 
Tested-by: Brian Norris 
Reviewed-by: Brian Norris 
Reviewed-by: Simon Glass 
---

(no changes since v1)

 tools/patman/main.py | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tools/patman/main.py b/tools/patman/main.py
index 66d4806c8d8f..e868878ad5a7 100755
--- a/tools/patman/main.py
+++ b/tools/patman/main.py
@@ -119,7 +119,9 @@ else:
 # No command, so insert it after the known arguments and before the ones
 # that presumably relate to the 'send' subcommand
 nargs = len(rest)
-argv = argv[:-nargs] + ['send'] + rest
+if nargs:
+argv = argv[:-nargs]
+argv = argv + ['send'] + rest
 args = parser.parse_args(argv)
 
 if __name__ != "__main__":
-- 
2.37.0.rc0.161.g10f37bed90-goog

[PATCH v3 0/5] patman: Small fixes plus remove --no-tree from checkpatch for linux

[Douglas Anderson]

The whole point of this series is really to make it so that when we're
using patman for sending Linux patches that we don't pass "--no-tree"
to checkpatch. While doing that, though, I found a number of bugs
including an explanation about why recent version of patman have been
yelling about "tags" when used with Linux even though Linux is
supposed to have "process_tags" defaulted to False.

Changes in v3:
- Rebased atop ("patman: Fix defaults not propagating to subparsers")

Changes in v2:
- Fix doc string for --ignore-bad-tags
- Make comment about parsing three times less nonsensical.

Douglas Anderson (5):
  patman: Fix implicit command inserting
  patman: Don't look at sys.argv when parsing settings
  patman: Make most bool arguments BooleanOptionalAction
  patman: By default don't pass "--no-tree" to checkpatch for linux
  patman: Take project defaults into account for --help

 tools/patman/checkpatch.py | 11 --
 tools/patman/control.py|  7 ++--
 tools/patman/main.py   | 77 ++
 tools/patman/settings.py   |  5 ++-
 4 files changed, 58 insertions(+), 42 deletions(-)

-- 
2.37.0.rc0.161.g10f37bed90-goog

Re: [PATCH v2 1/6] patman: Fix updating argument defaults from settings

[Doug Anderson]

Hi,

On Thu, Jul 7, 2022 at 8:11 AM Sean Anderson  wrote:
>
> On 7/6/22 8:07 PM, Doug Anderson wrote:
> > Hi,
> >
> > On Tue, Jul 5, 2022 at 11:16 AM Sean Anderson  
> > wrote:
> >>
> >> Hi Doug,
> >>
> >> On 7/1/22 4:23 PM, Douglas Anderson wrote:
> >> > Ever since commit 4600767d294d ("patman: Refactor how the default
> >> > subcommand works"), when I use patman on the Linux tree I get grumbles
> >> > about unknown tags. This is because the Linux default making
> >> > process_tags be False wasn't working anymore.
> >> >
> >> > It appears that the comment claiming that the defaults propagates
> >> > through all subparsers no longer works for some reason.
> >> >
> >> > We're already looking at all the subparsers anyway. Let's just update
> >> > each one.
> >> >
> >> > Fixes: 4600767d294d ("patman: Refactor how the default subcommand works")
> >> > Signed-off-by: Douglas Anderson 
> >> > Tested-by: Brian Norris 
> >> > Reviewed-by: Brian Norris 
> >> > ---
> >> >
> >> > (no changes since v1)
> >> >
> >> >  tools/patman/settings.py | 41 +---
> >> >  1 file changed, 22 insertions(+), 19 deletions(-)
> >> >
> >> > diff --git a/tools/patman/settings.py b/tools/patman/settings.py
> >> > index 7c2b5c196c06..5eefe3d1f55e 100644
> >> > --- a/tools/patman/settings.py
> >> > +++ b/tools/patman/settings.py
> >> > @@ -244,28 +244,31 @@ def _UpdateDefaults(main_parser, config):
> >> >if isinstance(action, argparse._SubParsersAction)
> >> >for _, subparser in action.choices.items()]
> >> >
> >> > +unknown_settings = set(name for name, val in 
> >> > config.items('settings'))
> >> > +
> >> >  # Collect the defaults from each parser
> >> > -defaults = {}
> >> >  for parser in parsers:
> >> >  pdefs = parser.parse_known_args()[0]
> >> > -defaults.update(vars(pdefs))
> >> > -
> >> > -# Go through the settings and collect defaults
> >> > -for name, val in config.items('settings'):
> >> > -if name in defaults:
> >> > -default_val = defaults[name]
> >> > -if isinstance(default_val, bool):
> >> > -val = config.getboolean('settings', name)
> >> > -elif isinstance(default_val, int):
> >> > -val = config.getint('settings', name)
> >> > -elif isinstance(default_val, str):
> >> > -val = config.get('settings', name)
> >> > -defaults[name] = val
> >> > -else:
> >> > -print("WARNING: Unknown setting %s" % name)
> >> > -
> >> > -# Set all the defaults (this propagates through all subparsers)
> >> > -main_parser.set_defaults(**defaults)
> >> > +defaults = dict(vars(pdefs))
> >> > +
> >> > +# Go through the settings and collect defaults
> >> > +for name, val in config.items('settings'):
> >> > +if name in defaults:
> >> > +default_val = defaults[name]
> >> > +if isinstance(default_val, bool):
> >> > +val = config.getboolean('settings', name)
> >> > +elif isinstance(default_val, int):
> >> > +val = config.getint('settings', name)
> >> > +elif isinstance(default_val, str):
> >> > +val = config.get('settings', name)
> >> > +defaults[name] = val
> >> > +unknown_settings.discard(name)
> >> > +
> >> > +# Set all the defaults
> >> > +parser.set_defaults(**defaults)
> >> > +
> >> > +for name in sorted(unknown_settings):
> >> > +print("WARNING: Unknown setting %s" % name)
> >>
> >> Can you see if 4780f7d8a6b ("patman: Fix defaults not propagating to
> >> subparsers") [1] addresses this problem? The implementation is different,
> >> but I believe these should have the same effect.
> >
> > To my mind the logic of your patch is a bit harder to follow, but I
> > believe you're correct that it accomplishes the same thing. ...and my
> > quick test also seems to confirm that yours works fine. Too bad it
> > wasn't already in "-next" or it would have saved me a bit of time...
> >
> > I'm curious whether you agree that the logic in my patch is a little
> > simpler. Should I re-post it as a squashed revert of yours and then
> > apply mine and call it a "simplify" instead of a bugfix? ...or just
> > leave yours alone? If we leave yours alone, I guess my patch #2 needs
> > a trivial rebase to fix a merge conflict.
>
> IMO my version is simpler, but that is mainly because I thought of it.
>
> I have no objection to your rearranging, as long as it works afterwards.

No worries then. I'll drop my patch #1 and post a rebase of the rest
of the series.

-Doug

Re: [PATCH v2 1/6] patman: Fix updating argument defaults from settings

[Sean Anderson]

On 7/6/22 8:07 PM, Doug Anderson wrote:
> Hi,
> 
> On Tue, Jul 5, 2022 at 11:16 AM Sean Anderson  wrote:
>>
>> Hi Doug,
>>
>> On 7/1/22 4:23 PM, Douglas Anderson wrote:
>> > Ever since commit 4600767d294d ("patman: Refactor how the default
>> > subcommand works"), when I use patman on the Linux tree I get grumbles
>> > about unknown tags. This is because the Linux default making
>> > process_tags be False wasn't working anymore.
>> >
>> > It appears that the comment claiming that the defaults propagates
>> > through all subparsers no longer works for some reason.
>> >
>> > We're already looking at all the subparsers anyway. Let's just update
>> > each one.
>> >
>> > Fixes: 4600767d294d ("patman: Refactor how the default subcommand works")
>> > Signed-off-by: Douglas Anderson 
>> > Tested-by: Brian Norris 
>> > Reviewed-by: Brian Norris 
>> > ---
>> >
>> > (no changes since v1)
>> >
>> >  tools/patman/settings.py | 41 +---
>> >  1 file changed, 22 insertions(+), 19 deletions(-)
>> >
>> > diff --git a/tools/patman/settings.py b/tools/patman/settings.py
>> > index 7c2b5c196c06..5eefe3d1f55e 100644
>> > --- a/tools/patman/settings.py
>> > +++ b/tools/patman/settings.py
>> > @@ -244,28 +244,31 @@ def _UpdateDefaults(main_parser, config):
>> >if isinstance(action, argparse._SubParsersAction)
>> >for _, subparser in action.choices.items()]
>> >
>> > +unknown_settings = set(name for name, val in config.items('settings'))
>> > +
>> >  # Collect the defaults from each parser
>> > -defaults = {}
>> >  for parser in parsers:
>> >  pdefs = parser.parse_known_args()[0]
>> > -defaults.update(vars(pdefs))
>> > -
>> > -# Go through the settings and collect defaults
>> > -for name, val in config.items('settings'):
>> > -if name in defaults:
>> > -default_val = defaults[name]
>> > -if isinstance(default_val, bool):
>> > -val = config.getboolean('settings', name)
>> > -elif isinstance(default_val, int):
>> > -val = config.getint('settings', name)
>> > -elif isinstance(default_val, str):
>> > -val = config.get('settings', name)
>> > -defaults[name] = val
>> > -else:
>> > -print("WARNING: Unknown setting %s" % name)
>> > -
>> > -# Set all the defaults (this propagates through all subparsers)
>> > -main_parser.set_defaults(**defaults)
>> > +defaults = dict(vars(pdefs))
>> > +
>> > +# Go through the settings and collect defaults
>> > +for name, val in config.items('settings'):
>> > +if name in defaults:
>> > +default_val = defaults[name]
>> > +if isinstance(default_val, bool):
>> > +val = config.getboolean('settings', name)
>> > +elif isinstance(default_val, int):
>> > +val = config.getint('settings', name)
>> > +elif isinstance(default_val, str):
>> > +val = config.get('settings', name)
>> > +defaults[name] = val
>> > +unknown_settings.discard(name)
>> > +
>> > +# Set all the defaults
>> > +parser.set_defaults(**defaults)
>> > +
>> > +for name in sorted(unknown_settings):
>> > +print("WARNING: Unknown setting %s" % name)
>>
>> Can you see if 4780f7d8a6b ("patman: Fix defaults not propagating to
>> subparsers") [1] addresses this problem? The implementation is different,
>> but I believe these should have the same effect.
> 
> To my mind the logic of your patch is a bit harder to follow, but I
> believe you're correct that it accomplishes the same thing. ...and my
> quick test also seems to confirm that yours works fine. Too bad it
> wasn't already in "-next" or it would have saved me a bit of time...
> 
> I'm curious whether you agree that the logic in my patch is a little
> simpler. Should I re-post it as a squashed revert of yours and then
> apply mine and call it a "simplify" instead of a bugfix? ...or just
> leave yours alone? If we leave yours alone, I guess my patch #2 needs
> a trivial rebase to fix a merge conflict.

IMO my version is simpler, but that is mainly because I thought of it.

I have no objection to your rearranging, as long as it works afterwards.

--Sean

Re: [PATCH] ARM: layerscape: Use ARCH_LS104?A insead of TARGET_LS104?ARDB

[Sean Anderson]

On 4/26/22 2:31 PM, Sean Anderson wrote:
> These frequency calculations depend on the RCW format, which is not
> dependent on any particular board. Switch to using ARCH symbols instead
> of TARGET.
> 
> This whole function could probably use less ifdefs, but for now just do
> a minimal conversion.
> 
> Fixes: 24cb6f2295 ("fsl-layerscape: Add fsl_esdhc peripheral clock support")
> Signed-off-by: Sean Anderson 
> ---
> 
>  arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c 
> b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
> index 570105a75e..840e6d412b 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
> @@ -29,8 +29,8 @@ void get_sys_info(struct sys_info *sys_info)
>   * mux 2 clock for LS1043A/LS1046A.
>   */
>  #if defined(CONFIG_SYS_DPAA_FMAN) || \
> - defined(CONFIG_TARGET_LS1046ARDB) || \
> - defined(CONFIG_TARGET_LS1043ARDB)
> + defined(CONFIG_ARCH_LS1046A) || \
> + defined(CONFIG_ARCH_LS1043A)
>   u32 rcw_tmp;
>  #endif
>   struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_CLK_ADDR);
> @@ -129,13 +129,13 @@ void get_sys_info(struct sys_info *sys_info)
>  
>  #define HWA_CGA_M2_CLK_SEL   0x0007
>  #define HWA_CGA_M2_CLK_SHIFT 0
> -#if defined(CONFIG_TARGET_LS1046ARDB) || defined(CONFIG_TARGET_LS1043ARDB)
> +#if defined(CONFIG_ARCH_LS1046A) || defined(CONFIG_ARCH_LS1043A)
>   rcw_tmp = in_be32(>rcwsr[15]);
>   switch ((rcw_tmp & HWA_CGA_M2_CLK_SEL) >> HWA_CGA_M2_CLK_SHIFT) {
>   case 1:
>   sys_info->freq_cga_m2 = freq_c_pll[1];
>   break;
> -#if defined(CONFIG_TARGET_LS1046ARDB)
> +#if defined(CONFIG_ARCH_LS1046A)
>   case 2:
>   sys_info->freq_cga_m2 = freq_c_pll[1] / 2;
>   break;
> @@ -143,7 +143,7 @@ void get_sys_info(struct sys_info *sys_info)
>   case 3:
>   sys_info->freq_cga_m2 = freq_c_pll[1] / 3;
>   break;
> -#if defined(CONFIG_TARGET_LS1046ARDB)
> +#if defined(CONFIG_ARCH_LS1046A)
>   case 6:
>   sys_info->freq_cga_m2 = freq_c_pll[0] / 2;
>   break;
> 

ping?

[PATCH] i2c: avoid dynamic stack use in dm_i2c_write

[Rasmus Villemoes]

The size of the dynamic stack allocation here is bounded by the if()
statement. However, just allocating the maximum size up-front and
doing malloc() if necessary avoids code duplication (the
i2c_setup_offset() until the invocation of ->xfer), and generates much
better (smaller) code:

bloat-o-meter drivers/i2c/i2c-uclass.o.{0,1}
add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-144 (-144)
Function old new   delta
dm_i2c_write 552 408-144
Total: Before=3828, After=3684, chg -3.76%

It also makes static analysis of maximum stack usage (using the .su
files that are automatically generated during build) easier if there
are no lines saying "dynamic".

[This is not entirely equivalent to the existing code; this now uses
the stack for len <= 64 rather than len <= 63, but that seems like a
more natural limit.]

Signed-off-by: Rasmus Villemoes 
---
 drivers/i2c/i2c-uclass.c | 30 --
 1 file changed, 12 insertions(+), 18 deletions(-)

diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 71bc2b5b8a..a06553324e 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -168,6 +168,9 @@ int dm_i2c_write(struct udevice *dev, uint offset, const 
uint8_t *buffer,
struct udevice *bus = dev_get_parent(dev);
struct dm_i2c_ops *ops = i2c_get_ops(bus);
struct i2c_msg msg[1];
+   uint8_t _buf[I2C_MAX_OFFSET_LEN + 64];
+   uint8_t *buf = _buf;
+   int ret;
 
if (!ops->xfer)
return -ENOSYS;
@@ -192,29 +195,20 @@ int dm_i2c_write(struct udevice *dev, uint offset, const 
uint8_t *buffer,
 * need to allow space for the offset (up to 4 bytes) and the message
 * itself.
 */
-   if (len < 64) {
-   uint8_t buf[I2C_MAX_OFFSET_LEN + len];
-
-   i2c_setup_offset(chip, offset, buf, msg);
-   msg->len += len;
-   memcpy(buf + chip->offset_len, buffer, len);
-
-   return ops->xfer(bus, msg, 1);
-   } else {
-   uint8_t *buf;
-   int ret;
-
+   if (len > sizeof(_buf) - I2C_MAX_OFFSET_LEN) {
buf = malloc(I2C_MAX_OFFSET_LEN + len);
if (!buf)
return -ENOMEM;
-   i2c_setup_offset(chip, offset, buf, msg);
-   msg->len += len;
-   memcpy(buf + chip->offset_len, buffer, len);
+   }
 
-   ret = ops->xfer(bus, msg, 1);
+   i2c_setup_offset(chip, offset, buf, msg);
+   msg->len += len;
+   memcpy(buf + chip->offset_len, buffer, len);
+
+   ret = ops->xfer(bus, msg, 1);
+   if (buf != _buf)
free(buf);
-   return ret;
-   }
+   return ret;
 }
 
 int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
-- 
2.31.1

[PATCH v4 7/7] doc: board: nxp: Add instructions to boot from QSPI

[Mamta Shukla]

Add instructions to build and boot from  QSPI Flash

Signed-off-by: Mamta Shukla 
Signed-off-by: Thomas Haemmerle 
Tested-by: Adam Ford 
Reviewed-by: Fabio Estevam  
---
v2:
-No changes

v3:
-Fix Checkpatch Error for trailing whitespace

v4:
-No changes

 doc/board/nxp/imx8mm_evk.rst | 37 ++--
 1 file changed, 35 insertions(+), 2 deletions(-)

diff --git a/doc/board/nxp/imx8mm_evk.rst b/doc/board/nxp/imx8mm_evk.rst
index b9e67b954f..64f7febdfb 100644
--- a/doc/board/nxp/imx8mm_evk.rst
+++ b/doc/board/nxp/imx8mm_evk.rst
@@ -35,8 +35,8 @@ Get the ddr firmware
$ ./firmware-imx-8.9
$ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir)
 
-Build U-Boot
-
+Build U-Boot for sd card
+--
 
 .. code-block:: bash
 
@@ -53,3 +53,36 @@ Burn the flash.bin to MicroSD card offset 33KB:
 Boot
 
 Set Boot switch to SD boot
+
+Build U-Boot for qspi flash  card
+
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=aarch64-poky-linux-
+   $ make imx8mm_evk_fspi_defconfig
+   $ make
+
+Currently, there is no direct support to write to QSPI Flash.
+Copy flash.bin to ${loadaddr} either from sd card or over network and then 
copy to
+qspi flash
+
+From sd card to memory
+
+.. code-block:: bash
+$mmc dev 1
+$mmc read ${loadaddr} 0x00 
+
+.. code-block:: bash
+
+   $ sf probe
+   $ sf erase 0 
+   $ sf write $loadaddr 0x00 
+
+Boot from QSPI Flash
+---
+Set Boot Switch to QSPI Flash
+
+Pin configuration for imx8mm_revC evk to boot from qspi flash
+SW1101: 0110xx
+SW1102: 00100x0010
-- 
2.25.1

[PATCH v4 5/7] configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8m

[Mamta Shukla]

The macro `CONFIG_SYS_UBOOT_BASE` is used by SPL loaders `"NOR"` and
`"XIP"` to determine the base address of u-boot.

For `"NOR"` on i.MX8MM it is the base address of QSPI0 plus the offset
of the flattened image tree blob.
Although `QSPI0_AMBA_BASE` is used to define CONFIG_SYS_UBOOT_BASE in
multiple board header files for i.MX8MM, it is not specified.

Specify offset of flattened image tree blob (needs to be set to same
value as specified in 'binman' node), base address of QSPI0 and size of
FlexSPI configuration block.

Signed-off-by: Mamta Shukla 
Signed-off-by: Thomas Haemmerle 
Tested-by: Adam Ford  
Reviewed-by: Fabio Estevam  
---
v2:
-No changes

v3:
-No changes

v4:
-Add condition for CONFIG_SYS_UBOOT_BASE for mmc/sd card build
-Define QPSI0_AMBA_BASE in imx-regs.h since it is imx8mm specific

 arch/arm/include/asm/arch-imx8m/imx-regs.h |  1 +
 include/configs/imx8mm_evk.h   | 12 +++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h 
b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 1da75528d4..39ba36505c 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -45,6 +45,7 @@
 #define UART4_BASE_ADDR0x30A6
 #define USDHC1_BASE_ADDR   0x30B4
 #define USDHC2_BASE_ADDR   0x30B5
+#define QSPI0_AMBA_BASE0x0800
 #ifdef CONFIG_IMX8MM
 #define USDHC3_BASE_ADDR   0x30B6
 #endif
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 5e8f19c43f..54dee5b586 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -13,8 +13,18 @@
 #define CONFIG_SYS_BOOTM_LEN   (64 * SZ_1M)
 #define CONFIG_SPL_MAX_SIZE(148 * 1024)
 #define CONFIG_SYS_MONITOR_LEN SZ_512K
+#define UBOOT_ITB_OFFSET 0x57C00
+#define FSPI_CONF_BLOCK_SIZE   0x1000
+#define UBOOT_ITB_OFFSET_FSPI  \
+   (UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE)
+
+#ifdef CONFIG_FSPI_CONF_HEADER
+#define CONFIG_SYS_UBOOT_BASE  \
+   (QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI)
+#else
 #define CONFIG_SYS_UBOOT_BASE  \
-   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 
512)
+#endif
 
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_STACK   0x92
-- 
2.25.1

[PATCH v4 6/7] board: freescale: Add entry for imx8mm_evk_fspi_defconfig

[Mamta Shukla]

Add entry for imx8mm_evk_fspi_defconfig in
board/freescale/imx8mm_evk/MAINTAINERS

Signed-off-by: Mamta Shukla 
Signed-off-by: Thomas Haemmerle 
Tested-by: Adam Ford  
Reviewed-by: Fabio Estevam  
---
v2:
-No changes

v3:
-No changes

v4:
-No changes

 board/freescale/imx8mm_evk/MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/board/freescale/imx8mm_evk/MAINTAINERS 
b/board/freescale/imx8mm_evk/MAINTAINERS
index b031bb0674..875adf58ee 100644
--- a/board/freescale/imx8mm_evk/MAINTAINERS
+++ b/board/freescale/imx8mm_evk/MAINTAINERS
@@ -4,3 +4,4 @@ S:  Maintained
 F: board/freescale/imx8mm_evk/
 F: include/configs/imx8mm_evk.h
 F: configs/imx8mm_evk_defconfig
+F:  configs/imx8mm_evk_fspi_defconfig
-- 
2.25.1

[PATCH v4 4/7] board: freescale: Add QSPI Boot support in spl for i.MX8m

[Mamta Shukla]

Add QSPI Boot option in u-boot-spl for i.MX8m EVK.

Signed-off-by: Mamta Shukla 
Signed-off-by: Thomas Haemmerle 
Tested-by: Adam Ford  
Reviewed-by: Fabio Estevam  
---
v2:
-No changes

v3:
-No changes

v4:
-No changes

 board/freescale/imx8mm_evk/spl.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c
index 4d96324685..e2eb1426c8 100644
--- a/board/freescale/imx8mm_evk/spl.c
+++ b/board/freescale/imx8mm_evk/spl.c
@@ -39,6 +39,8 @@ int spl_board_boot_device(enum boot_device boot_dev_spl)
case SD3_BOOT:
case MMC3_BOOT:
return BOOT_DEVICE_MMC2;
+   case QSPI_BOOT:
+   return BOOT_DEVICE_NOR;
default:
return BOOT_DEVICE_NONE;
}
-- 
2.25.1

[PATCH v4 3/7] configs: Add config for enabling FSPI boot option for i.MX8m

[Mamta Shukla]

Add imx8mm_evk_fspi_defconfig to build QSPI boot image.
This config is based on imx8mm_evk_defconfig with addtional config options for
FSPI Header,SPL offset and imx-image config to boot from FSPI.

Signed-off-by: Mamta Shukla 
Signed-off-by: Thomas Haemmerle 
Tested-by: Adam Ford  
Reviewed-by: Fabio Estevam  
---
v2:
-Remove extra line in commit message
-Remove extra line in imx8mm_evk_fspi_defconfig
-New patch in series to add an entry for imx8mm_evk_fspi_defconfig in
board/freescale/imx8mm_evk/MAINTAINERS

v3:
-No changes

v4:
-No changes

 .../imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg   |   9 ++
 configs/imx8mm_evk_fspi_defconfig | 115 ++
 2 files changed, 124 insertions(+)
 create mode 100644 board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg
 create mode 100644 configs/imx8mm_evk_fspi_defconfig

diff --git a/board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg 
b/board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg
new file mode 100644
index 00..ddcbd11eea
--- /dev/null
+++ b/board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2021 NXP
+ */
+
+#define __ASSEMBLY__
+
+BOOT_FROM  fspi
+LOADER u-boot-spl-ddr.bin  0x7E2000
diff --git a/configs/imx8mm_evk_fspi_defconfig 
b/configs/imx8mm_evk_fspi_defconfig
new file mode 100644
index 00..50f6e4779b
--- /dev/null
+++ b/configs/imx8mm_evk_fspi_defconfig
@@ -0,0 +1,115 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_SYS_TEXT_BASE=0x4020
+CONFIG_SYS_MALLOC_LEN=0x200
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x40
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk"
+CONFIG_SPL_TEXT_BASE=0x7E2000
+CONFIG_TARGET_IMX8MM_EVK=y
+CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg"
+CONFIG_SPL_NOR_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL=y
+CONFIG_SYS_LOAD_ADDR=0x4048
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_USE_SPL_FIT_GENERATOR is not set
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_BOARD_EARLY_INIT=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
+CONFIG_SYS_PROMPT="u-boot=> "
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=1
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_USE_ETHPRIME=y
+CONFIG_ETHPRIME="FEC"
+CONFIG_SPL_DM=y
+CONFIG_SPL_CLK_COMPOSITE_CCF=y
+CONFIG_CLK_COMPOSITE_CCF=y
+CONFIG_SPL_CLK_IMX8MM=y
+CONFIG_CLK_IMX8MM=y
+CONFIG_MXC_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_FSL_USDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_DM_PMIC=y
+CONFIG_SPL_DM_PMIC_PCA9450=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_PWM=y
+CONFIG_DM_SERIAL=y
+CONFIG_PWM_IMX=y
+CONFIG_MXC_UART=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_DM_THERMAL=y
+CONFIG_IMX_WATCHDOG=y
+CONFIG_NXP_FSPI=y
+CONFIG_SPI=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SF_DEFAULT_BUS=0
+CONFIG_SF_DEFAULT_CS=0
+CONFIG_SF_DEFAULT_SPEED=4000
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_FSPI_CONF_HEADER=y
+CONFIG_FSPI_CONF_FILE="fspi_header.bin"
+CONFIG_READ_CLK_SOURCE=0x00
+CONFIG_DEVICE_TYPE=0x01
+CONFIG_FLASH_PAD_TYPE=0x01
+CONFIG_SERIAL_CLK_FREQUENCY=0x02
+CONFIG_LUT_CUSTOM_SEQUENCE=0x00
+CONFIG_LUT_SEQUENCE="0x0b, 0x04, 0x18, 0x08, 0x08, 0x30, 0x04, 0x24"
-- 
2.25.1

[PATCH v4 2/7] dts: imx8mm-uboot: Add support to pack FlexSPI Header using binman

[Mamta Shukla]

Add definition for FSPI configuration block and subsequently new offsets for
u-boot-spl and u-boot-itb for CONFIG_FSPI_HEADER option.

Signed-off-by: Mamta Shukla 
Signed-off-by: Thomas Haemmerle 
Tested-by: Adam Ford  
Reviewed-by: Fabio Estevam  
---
v2:
-No changes

v3:
-Fix Checkpatch ERROR: code indent should use tabs where possible

v4:
-No changes

 arch/arm/dts/imx8mm-u-boot.dtsi | 20 
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 9f66cdb65a..69363435b4 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -150,6 +150,25 @@
filename = "flash.bin";
pad-byte = <0x00>;
 
+#ifdef CONFIG_FSPI_CONF_HEADER
+   fspi_conf_block {
+   filename = CONFIG_FSPI_CONF_FILE;
+   type = "blob-ext";
+   size = <0x1000>;
+   };
+
+   spl {
+   filename = "spl.bin";
+   offset = <0x1000>;
+   type = "blob-ext";
+   };
+
+   binman_uboot: uboot {
+   filename = "u-boot.itb";
+   offset = <0x58C00>;
+   type = "blob-ext";
+   };
+#else
spl {
filename = "spl.bin";
offset = <0x0>;
@@ -161,6 +180,7 @@
offset = <0x57c00>;
type = "blob-ext";
};
+#endif
};
 };
 
-- 
2.25.1

[PATCH v4 1/7] tools: mkimage: Add support to generate FlexSPI Header for i.MX8m

[Mamta Shukla]

Add struct with Flex SPI Configuration Block and enable generating
fspi header using mkimage.

Refer i.MX 8M Mini Application Processor Reference Manual for
detailed information about parameters for FlexSPI Configuration block.

Signed-off-by: Mamta Shukla 
Signed-off-by: Thomas Haemmerle 
Tested-by: Adam Ford 
Reviewed-by: Fabio Estevam 
---
v2:
-Add check for error in case open() for fspi_fd in imx8mkimage.c fails

v3:
-No changes

v4:
-No changes

 include/imximage.h | 38 ++
 tools/Kconfig  | 59 +
 tools/imx8mimage.c | 81 +++---
 3 files changed, 174 insertions(+), 4 deletions(-)

diff --git a/include/imximage.h b/include/imximage.h
index 5a812f5a10..c1ecc0b7cb 100644
--- a/include/imximage.h
+++ b/include/imximage.h
@@ -201,6 +201,44 @@ struct imx_header {
} header;
 };
 
+typedef struct {
+   uint8_t tag[4];
+   uint8_t version[4];
+   uint8_t reserved_1[4];
+   uint8_t read_sample;
+   uint8_t datahold;
+   uint8_t datasetup;
+   uint8_t coladdrwidth;
+   uint8_t devcfgenable;
+   uint8_t reserved_2[3];
+   uint8_t devmodeseq[4];
+   uint8_t devmodearg[4];
+   uint8_t cmd_enable;
+   uint8_t reserved_3[3];
+   uint8_t cmd_seq[16] ;
+   uint8_t cmd_arg[16];
+   uint8_t controllermisc[4];
+   uint8_t dev_type;
+   uint8_t sflash_pad;
+   uint8_t serial_clk;
+   uint8_t lut_custom ;
+   uint8_t reserved_4[8];
+   uint8_t sflashA1[4];
+   uint8_t sflashA2[4];
+   uint8_t sflashB1[4];
+   uint8_t sflashB2[4];
+   uint8_t cspadover[4];
+   uint8_t sclkpadover[4];
+   uint8_t datapadover[4];
+   uint8_t dqspadover[4];
+   uint8_t timeout[4];
+   uint8_t commandInt[4];
+   uint8_t datavalid[4];
+   uint8_t busyoffset[2];
+   uint8_t busybitpolarity[2];
+   uint8_t lut[256];
+} __attribute__((packed)) fspi_conf;
+
 typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
char *name, int lineno,
int fld, uint32_t value,
diff --git a/tools/Kconfig b/tools/Kconfig
index 117c921da3..539708f277 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -98,4 +98,63 @@ config TOOLS_MKEFICAPSULE
  optionally sign that file. If you want to enable UEFI capsule
  update feature on your target, you certainly need this.
 
+menuconfig FSPI_CONF_HEADER
+   bool "FlexSPI Header Configuration"
+   help
+ FSPI Header Configuration
+
+config FSPI_CONF_FILE
+   string "FlexSPI Header File"
+   depends on FSPI_CONF_HEADER
+   help
+ FlexSPI Header File name
+
+config READ_CLK_SOURCE
+   hex "Sampling Clock Source"
+   default 0x00
+   depends on FSPI_CONF_HEADER
+   help
+ Sample Clock source for Flash, default is internal loopback clock
+
+config DEVICE_TYPE
+   hex "Flash Type"
+   default 0x01
+   depends on FSPI_CONF_HEADER
+   help
+ Flash type: Serial NOR (0X01) and Serial NAND (0x02)
+
+config FLASH_PAD_TYPE
+   hex "Flash Pad Type"
+   default 0x01
+   depends on FSPI_CONF_HEADER
+   help
+ Flash Pad type :
+ Single Pad 0x01
+ Dual Pads  0x02
+ Quad Pad   0x04
+ Octal Pad  0x08
+
+config SERIAL_CLK_FREQUENCY
+   hex "Serial Clock Frequency"
+   default 0x02
+   depends on FSPI_CONF_HEADER
+   help
+ Chip specific frequency: other value 30MHz
+ 1-30MHz  2-50MHz 3-60MHz 4-75MHz 5-80MHz 6-100MHz 7-133MHz 8-166MHz
+
+config LUT_CUSTOM_SEQUENCE
+   hex "Enable Custom Look Up Table(LUT) Sequence"
+   default 0x00
+   depends on FSPI_CONF_HEADER
+   help
+ 0 - Use predefined LUT Sequence
+ 1 - Use LUT Sequence provided
+
+config LUT_SEQUENCE
+   string "Look Up Table Sequence"
+   default "0x0b, 0x04, 0x18, 0x08, 0x08, 0x30, 0x04, 0x24"
+   depends on FSPI_CONF_HEADER
+   help
+ Look Up Table Sequence
+
 endmenu
diff --git a/tools/imx8mimage.c b/tools/imx8mimage.c
index 4eed683396..facf8887a1 100644
--- a/tools/imx8mimage.c
+++ b/tools/imx8mimage.c
@@ -12,7 +12,7 @@
 #include "compiler.h"
 
 static uint32_t ap_start_addr, sld_start_addr, sld_src_off;
-static char *ap_img, *sld_img, *signed_hdmi;
+static char *ap_img, *sld_img, *signed_hdmi, *fspi;
 static imx_header_v3_t imx_header[2]; /* At most there are 3 IVT headers */
 static uint32_t rom_image_offset;
 static uint32_t sector_size = 0x200;
@@ -120,7 +120,6 @@ static void parse_cfg_cmd(int32_t cmd, char *token, char 
*name, int lineno)
rom_version = ROM_V1;
}
break;
-
}
 }
 
@@ -412,10 +411,70 @@ static void dump_header_v2(imx_header_v3_t *imx_header, 
int index)
imx_header[index].boot_data.plugin);
 }
 
+#ifdef CONFIG_FSPI_CONF_HEADER
+static 

[PATCH v4 0/7] Add support for FlexSPI Boot for i.MX8m

[Mamta Shukla]

This series of patch adds support for generating FlexSPI Header file
and booting from QSPI on i.MX8m.

Changes in v2:
-Add check for error in case open() for fspi_fd in imx8mkimage.c fails
-Remove extra line in commit message
-Remove extra line in imx8mm_evk_fspi_defconfig
-New patch in series to add an entry for imx8mm_evk_fspi_defconfig in
board/freescale/imx8mm_evk/MAINTAINERS
-New patch in series to add instructions to build and boot from QSPI Flash

Changes in v3:
-Fix Checkpatch ERROR: code indent should use tabs where possible
-Fix Checkpatch ERROR for trailing spaces   

Changes in v4:
-Add condition for CONFIG_SYS_UBOOT_BASE for mmc/sd card build
-Define QPSI0_AMBA_BASE in imx-regs.h since it is imx8mm specific

Mamta Shukla (7):
  tools: mkimage: Add support to generate FlexSPI Header for i.MX8m
  dts: imx8mm-uboot: Add support to pack FlexSPI Header using binman
  configs: Add config for enabling FSPI boot option for i.MX8m
  board: freescale: Add QSPI Boot support in spl for i.MX8m
  configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8m
  board: freescale: Add entry for imx8mm_evk_fspi_defconfig
  doc: board: nxp: Add instructions to boot from QSPI

 arch/arm/dts/imx8mm-u-boot.dtsi   |  20 +++
 arch/arm/include/asm/arch-imx8m/imx-regs.h|   1 +
 board/freescale/imx8mm_evk/MAINTAINERS|   1 +
 .../imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg   |   9 ++
 board/freescale/imx8mm_evk/spl.c  |   2 +
 configs/imx8mm_evk_fspi_defconfig | 115 ++
 doc/board/nxp/imx8mm_evk.rst  |  37 +-
 include/configs/imx8mm_evk.h  |  12 +-
 include/imximage.h|  38 ++
 tools/Kconfig |  59 +
 tools/imx8mimage.c|  81 +++-
 11 files changed, 368 insertions(+), 7 deletions(-)
 create mode 100644 board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg
 create mode 100644 configs/imx8mm_evk_fspi_defconfig

-- 
2.25.1

Re: [PATCH] ARM: zynq: DT: Enable all FCLKs by default

[Michal Simek]

Hi Tom,

On 7/7/22 14:31, Tom Rini wrote:

On Thu, Jul 07, 2022 at 12:50:10PM +0200, Michal Simek wrote:


From: Christian Kohn 

The fclk-enable property is set to 0 which disables all FCLKs.
Enable all FCLKs so they can be used as clock sources in the
programmable logic.

Signed-off-by: Christian Kohn 
Signed-off-by: Michal Simek 
---

  arch/arm/dts/zynq-7000.dtsi | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)


Since this (and the other patch today) are touching a common dtsi file,
what is the status of these changes with upstream?  Thanks.


Versal reset DT header is in Linux kernel already
mmio-sram is enabled for zc702 board in kernel already but it is generic for 
all.
#stream-id-cells - already removed in the kernel

And this fclk not sent to upstream linux yet.

Thanks,
Michal

Re: [PATCH] arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLED

[Tom Rini]

On Thu, Jul 07, 2022 at 10:47:16AM +0200, Michal Simek wrote:

> CONFIG_OF_LIBFDT is used twice for guarding the same code. It is enough to
> do it once that's why remove additional ifdefs from arm and risc-v code.
> 
> Fixes: 0c303f9a6628 ("image: Drop IMAGE_ENABLE_OF_LIBFDT")
> Signed-off-by: Michal Simek 

Reviewed-by: Tom Rini 

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH] ARM: zynq: DT: Enable all FCLKs by default

[Tom Rini]

On Thu, Jul 07, 2022 at 12:50:10PM +0200, Michal Simek wrote:

> From: Christian Kohn 
> 
> The fclk-enable property is set to 0 which disables all FCLKs.
> Enable all FCLKs so they can be used as clock sources in the
> programmable logic.
> 
> Signed-off-by: Christian Kohn 
> Signed-off-by: Michal Simek 
> ---
> 
>  arch/arm/dts/zynq-7000.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Since this (and the other patch today) are touching a common dtsi file,
what is the status of these changes with upstream?  Thanks.

-- 
Tom


signature.asc
Description: PGP signature

[PATCH v1] common: image-android: Add signature verification feature

[qianfanguijin]

From: qianfan Zhao 

Not all Android tools use the id field for signing the image with sha1,
so make this feature as optional and disabled default.

Signed-off-by: qianfan Zhao 
---
 common/Kconfig.boot| 14 +++
 common/image-android.c | 55 +-
 2 files changed, 63 insertions(+), 6 deletions(-)

diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index a8d4be23a9..11fc8410a9 100644
--- a/common/Kconfig.boot
+++ b/common/Kconfig.boot
@@ -9,6 +9,20 @@ config ANDROID_BOOT_IMAGE
  This enables support for booting images which use the Android
  image format header.
 
+if ANDROID_BOOT_IMAGE
+
+config ANDROID_BOOT_IMAGE_VERIFY
+   bool "Enable signature verification"
+   select SHA1
+   default n
+   help
+ This option enables signature verification of Android Boot Images,
+ using a hash signed and verified using SHA1.
+ Not all Android tools use the id field for signing the image with
+ sha1, if you are unsure about this, Say N here.
+
+endif # ANDROID_BOOT_IMAGE
+
 config FIT
bool "Support Flattened Image Tree"
select HASH
diff --git a/common/image-android.c b/common/image-android.c
index 1fa1eb..011ef756a7 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -44,11 +44,54 @@ static ulong android_image_get_kernel_addr(const struct 
andr_img_hdr *hdr)
return hdr->kernel_addr;
 }
 
+#if CONFIG_IS_ENABLED(ANDROID_BOOT_IMAGE_VERIFY)
+/*
+ * Not all Android tools use the id field for signing the image with
+ * sha1 (or anything) so we make this as an optional.
+ */
+static void android_image_update_sha1(sha1_context *ctx, const void *buf,
+ u32 size)
+{
+   if (size > 0) {
+   sha1_update(ctx, buf, size);
+   size = cpu_to_le32(size);
+   sha1_update(ctx, (unsigned char *), sizeof(size));
+   }
+}
+
+static int android_image_verify_sha1(const struct andr_img_hdr *hdr)
+{
+   unsigned char output[SHA1_SUM_LEN];
+   sha1_context ctx;
+   const void *p;
+
+   sha1_starts();
+
+   p = (void *)hdr + hdr->page_size; /* kernel */
+   android_image_update_sha1(, p, hdr->kernel_size);
+
+   p += ALIGN(hdr->kernel_size, hdr->page_size); /* ramdisk */
+   android_image_update_sha1(, p, hdr->ramdisk_size);
+
+   p += ALIGN(hdr->ramdisk_size, hdr->page_size); /* second */
+   android_image_update_sha1(, p, hdr->second_size);
+
+   sha1_finish(, output);
+
+   return memcmp(output, (unsigned char *)hdr->id, sizeof(output));
+}
+#else
+static int android_image_verify_sha1(const struct andr_img_hdr *hdr)
+{
+   return 0;
+}
+#endif
+
 /**
  * android_image_get_kernel() - processes kernel part of Android boot images
  * @hdr:   Pointer to image header, which is at the start
  * of the image.
- * @verify:Checksum verification flag. Currently unimplemented.
+ * @verify:Checksum verification flag.
  * @os_data:   Pointer to a ulong variable, will hold os data start
  * address.
  * @os_len:Pointer to a ulong variable, will hold os data length.
@@ -66,11 +109,11 @@ int android_image_get_kernel(const struct andr_img_hdr 
*hdr, int verify,
const struct image_header *ihdr = (const struct image_header *)
((uintptr_t)hdr + hdr->page_size);
 
-   /*
-* Not all Android tools use the id field for signing the image with
-* sha1 (or anything) so we don't check it. It is not obvious that the
-* string is null terminated so we take care of this.
-*/
+   if (verify && android_image_verify_sha1(hdr)) {
+   puts("Bad Data Hash\n");
+   return -EACCES;
+   }
+
strncpy(andr_tmp_str, hdr->name, ANDR_BOOT_NAME_SIZE);
andr_tmp_str[ANDR_BOOT_NAME_SIZE] = '\0';
if (strlen(andr_tmp_str))
-- 
2.25.1

[PATCH] common: image-android: Add signature verification feature

[qianfanguijin]

From: qianfan Zhao 

Not all Android tools use the id field for signing the image with sha1,
so make this feature as optional and disabled default.

Signed-off-by: qianfan Zhao 
---
 common/Kconfig.boot| 14 +++
 common/image-android.c | 55 +-
 2 files changed, 63 insertions(+), 6 deletions(-)

diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index a8d4be23a9..11fc8410a9 100644
--- a/common/Kconfig.boot
+++ b/common/Kconfig.boot
@@ -9,6 +9,20 @@ config ANDROID_BOOT_IMAGE
  This enables support for booting images which use the Android
  image format header.
 
+if ANDROID_BOOT_IMAGE
+
+config ANDROID_BOOT_IMAGE_VERIFY
+   bool "Enable signature verification"
+   select SHA1
+   default n
+   help
+ This option enables signature verification of Android Boot Images,
+ using a hash signed and verified using SHA1.
+ Not all Android tools use the id field for signing the image with
+ sha1, if you are unsure about this, Say N here.
+
+endif # ANDROID_BOOT_IMAGE
+
 config FIT
bool "Support Flattened Image Tree"
select HASH
diff --git a/common/image-android.c b/common/image-android.c
index 1fa1eb..12b84d6fdc 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -44,11 +44,54 @@ static ulong android_image_get_kernel_addr(const struct 
andr_img_hdr *hdr)
return hdr->kernel_addr;
 }
 
+#if CONFIG_IS_ENABLED(ANDROID_BOOT_IMAGE_VERIFY)
+/*
+ * Not all Android tools use the id field for signing the image with
+ * sha1 (or anything) so we make this as an optional.
+ */
+static void android_image_update_sha1(sha1_context *ctx, const void *buf,
+ u32 size)
+{
+   if (size > 0) {
+   sha1_update(ctx, buf, size);
+   size = cpu_to_le32(size);
+   sha1_update(ctx, (unsigned char *), sizeof(size));
+   }
+}
+
+static int android_image_verify_sha1(const struct andr_img_hdr *hdr)
+{
+   unsigned char output[20];
+   sha1_context ctx;
+   const void *p;
+
+   sha1_starts();
+
+   p = (void *)hdr + hdr->page_size; /* kernel */
+   android_image_update_sha1(, p, hdr->kernel_size);
+
+   p += ALIGN(hdr->kernel_size, hdr->page_size); /* ramdisk */
+   android_image_update_sha1(, p, hdr->ramdisk_size);
+
+   p += ALIGN(hdr->ramdisk_size, hdr->page_size); /* second */
+   android_image_update_sha1(, p, hdr->second_size);
+
+   sha1_finish(, output);
+
+   return memcmp(output, (unsigned char *)hdr->id, sizeof(output));
+}
+#else
+static int android_image_verify_sha1(const struct andr_img_hdr *hdr)
+{
+   return 0;
+}
+#endif
+
 /**
  * android_image_get_kernel() - processes kernel part of Android boot images
  * @hdr:   Pointer to image header, which is at the start
  * of the image.
- * @verify:Checksum verification flag. Currently unimplemented.
+ * @verify:Checksum verification flag.
  * @os_data:   Pointer to a ulong variable, will hold os data start
  * address.
  * @os_len:Pointer to a ulong variable, will hold os data length.
@@ -66,11 +109,11 @@ int android_image_get_kernel(const struct andr_img_hdr 
*hdr, int verify,
const struct image_header *ihdr = (const struct image_header *)
((uintptr_t)hdr + hdr->page_size);
 
-   /*
-* Not all Android tools use the id field for signing the image with
-* sha1 (or anything) so we don't check it. It is not obvious that the
-* string is null terminated so we take care of this.
-*/
+   if (verify && android_image_verify_sha1(hdr) < 0) {
+   puts("Bad Data Hash\n");
+   return -EACCES;
+   }
+
strncpy(andr_tmp_str, hdr->name, ANDR_BOOT_NAME_SIZE);
andr_tmp_str[ANDR_BOOT_NAME_SIZE] = '\0';
if (strlen(andr_tmp_str))
-- 
2.25.1

[PATCH] dt-bindings: versal: Add versal reset IDs

[Michal Simek]

The same file is already the part of Linux kernel that's why add it also to
u-boot to be able to use it in source code and DT files.

Signed-off-by: Michal Simek 
---

 .../dt-bindings/reset/xlnx-versal-resets.h| 105 ++
 1 file changed, 105 insertions(+)
 create mode 100644 include/dt-bindings/reset/xlnx-versal-resets.h

diff --git a/include/dt-bindings/reset/xlnx-versal-resets.h 
b/include/dt-bindings/reset/xlnx-versal-resets.h
new file mode 100644
index ..895424e9b0e5
--- /dev/null
+++ b/include/dt-bindings/reset/xlnx-versal-resets.h
@@ -0,0 +1,105 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ *  Copyright (C) 2020 Xilinx, Inc.
+ */
+
+#ifndef _DT_BINDINGS_VERSAL_RESETS_H
+#define _DT_BINDINGS_VERSAL_RESETS_H
+
+#define VERSAL_RST_PMC_POR (0xc30c001U)
+#define VERSAL_RST_PMC (0xc410002U)
+#define VERSAL_RST_PS_POR  (0xc30c003U)
+#define VERSAL_RST_PL_POR  (0xc30c004U)
+#define VERSAL_RST_NOC_POR (0xc30c005U)
+#define VERSAL_RST_FPD_POR (0xc30c006U)
+#define VERSAL_RST_ACPU_0_POR  (0xc30c007U)
+#define VERSAL_RST_ACPU_1_POR  (0xc30c008U)
+#define VERSAL_RST_OCM2_POR(0xc30c009U)
+#define VERSAL_RST_PS_SRST (0xc41000aU)
+#define VERSAL_RST_PL_SRST (0xc41000bU)
+#define VERSAL_RST_NOC (0xc41000cU)
+#define VERSAL_RST_NPI (0xc41000dU)
+#define VERSAL_RST_SYS_RST_1   (0xc41000eU)
+#define VERSAL_RST_SYS_RST_2   (0xc41000fU)
+#define VERSAL_RST_SYS_RST_3   (0xc410010U)
+#define VERSAL_RST_FPD (0xc410011U)
+#define VERSAL_RST_PL0 (0xc410012U)
+#define VERSAL_RST_PL1 (0xc410013U)
+#define VERSAL_RST_PL2 (0xc410014U)
+#define VERSAL_RST_PL3 (0xc410015U)
+#define VERSAL_RST_APU (0xc410016U)
+#define VERSAL_RST_ACPU_0  (0xc410017U)
+#define VERSAL_RST_ACPU_1  (0xc410018U)
+#define VERSAL_RST_ACPU_L2 (0xc410019U)
+#define VERSAL_RST_ACPU_GIC(0xc41001aU)
+#define VERSAL_RST_RPU_ISLAND  (0xc41001bU)
+#define VERSAL_RST_RPU_AMBA(0xc41001cU)
+#define VERSAL_RST_R5_0(0xc41001dU)
+#define VERSAL_RST_R5_1(0xc41001eU)
+#define VERSAL_RST_SYSMON_PMC_SEQ_RST  (0xc41001fU)
+#define VERSAL_RST_SYSMON_PMC_CFG_RST  (0xc410020U)
+#define VERSAL_RST_SYSMON_FPD_CFG_RST  (0xc410021U)
+#define VERSAL_RST_SYSMON_FPD_SEQ_RST  (0xc410022U)
+#define VERSAL_RST_SYSMON_LPD  (0xc410023U)
+#define VERSAL_RST_PDMA_RST1   (0xc410024U)
+#define VERSAL_RST_PDMA_RST0   (0xc410025U)
+#define VERSAL_RST_ADMA(0xc410026U)
+#define VERSAL_RST_TIMESTAMP   (0xc410027U)
+#define VERSAL_RST_OCM (0xc410028U)
+#define VERSAL_RST_OCM2_RST(0xc410029U)
+#define VERSAL_RST_IPI (0xc41002aU)
+#define VERSAL_RST_SBI (0xc41002bU)
+#define VERSAL_RST_LPD (0xc41002cU)
+#define VERSAL_RST_QSPI(0xc10402dU)
+#define VERSAL_RST_OSPI(0xc10402eU)
+#define VERSAL_RST_SDIO_0  (0xc10402fU)
+#define VERSAL_RST_SDIO_1  (0xc104030U)
+#define VERSAL_RST_I2C_PMC (0xc104031U)
+#define VERSAL_RST_GPIO_PMC(0xc104032U)
+#define VERSAL_RST_GEM_0   (0xc104033U)
+#define VERSAL_RST_GEM_1   (0xc104034U)
+#define VERSAL_RST_SPARE   (0xc104035U)
+#define VERSAL_RST_USB_0   (0xc104036U)
+#define VERSAL_RST_UART_0  (0xc104037U)
+#define VERSAL_RST_UART_1  (0xc104038U)
+#define VERSAL_RST_SPI_0   (0xc104039U)
+#define VERSAL_RST_SPI_1   (0xc10403aU)
+#define VERSAL_RST_CAN_FD_0(0xc10403bU)
+#define VERSAL_RST_CAN_FD_1(0xc10403cU)
+#define VERSAL_RST_I2C_0   (0xc10403dU)
+#define VERSAL_RST_I2C_1   (0xc10403eU)
+#define VERSAL_RST_GPIO_LPD(0xc10403fU)
+#define VERSAL_RST_TTC_0   (0xc104040U)
+#define VERSAL_RST_TTC_1   (0xc104041U)
+#define VERSAL_RST_TTC_2   (0xc104042U)
+#define VERSAL_RST_TTC_3   (0xc104043U)
+#define VERSAL_RST_SWDT_FPD(0xc104044U)
+#define VERSAL_RST_SWDT_LPD

Error: cmd/libkiosk_crypto.c:5:10: fatal error: unistd.h: No such file or directory

[Thu Ra]

Dear Dev of denx.de

I'm trying to create a custom os which is based on Alpine linux 3.16 with
your u-boot-2022.04 for my raspberry pi 4. Unfortunately, I got the
following error, please see the attached file(u-boot-bootloader-error.txt).

And I attached 3 Makefiles. main-makefile, common-makefile and
bootloader-makefile. and also the Version of components as common.mk.

Can you help me to solve this problem? And please let me know if you need
further information.


Your Sincerely,
T Ra
copying SDK output...
all done!
touch .build.stamp
./mkspecs.sh /home/thura/workspace/cambridge/kiosk/kiosk.phy/sdk/out
make[2]: Leaving directory '/home/thura/workspace/cambridge/kiosk/kiosk.phy/sdk'
make -C kernel all
make[2]: Entering directory 
'/home/thura/workspace/cambridge/kiosk/kiosk.phy/kernel'
wget --no-config -P /home/thura/workspace/cambridge/kiosk/kiosk.phy/archive 
'https://kernel.org/pub/linux/kernel/v5.x/linux-5.15.52.tar.xz'
--2022-07-07 11:03:20--  
https://kernel.org/pub/linux/kernel/v5.x/linux-5.15.52.tar.xz
Resolving kernel.org (kernel.org)... 139.178.84.217, 2604:1380:4641:c500::1
Connecting to kernel.org (kernel.org)|139.178.84.217|:443... connected.
HTTP request sent, awaiting response... 301 Moved Permanently
Location: 
https://mirrors.edge.kernel.org/pub/linux/kernel/v5.x/linux-5.15.52.tar.xz 
[following]
--2022-07-07 11:03:21--  
https://mirrors.edge.kernel.org/pub/linux/kernel/v5.x/linux-5.15.52.tar.xz
Resolving mirrors.edge.kernel.org (mirrors.edge.kernel.org)... 147.75.80.249, 
2604:1380:4601:e00::3
Connecting to mirrors.edge.kernel.org 
(mirrors.edge.kernel.org)|147.75.80.249|:443... connected.
HTTP request sent, awaiting response... 200 OK
Length: 126364084 (121M) [application/x-xz]
Saving to: 
‘/home/thura/workspace/cambridge/kiosk/kiosk.phy/archive/linux-5.15.52.tar.xz’

linux-5.15.52.tar.xz
100%[===>]
 120.51M  3.33MB/sin 29s 

2022-07-07 11:03:51 (4.09 MB/s) - 
‘/home/thura/workspace/cambridge/kiosk/kiosk.phy/archive/linux-5.15.52.tar.xz’ 
saved [126364084/126364084]

wget --no-config -P /home/thura/workspace/cambridge/kiosk/kiosk.phy/archive 
'https://kernel.org/pub/linux/kernel/v5.x/patch-5.15.52.xz'
--2022-07-07 11:03:51--  
https://kernel.org/pub/linux/kernel/v5.x/patch-5.15.52.xz
Resolving kernel.org (kernel.org)... 139.178.84.217, 2604:1380:4641:c500::1
Connecting to kernel.org (kernel.org)|139.178.84.217|:443... connected.
HTTP request sent, awaiting response... 301 Moved Permanently
Location: 
https://mirrors.edge.kernel.org/pub/linux/kernel/v5.x/patch-5.15.52.xz 
[following]
--2022-07-07 11:03:51--  
https://mirrors.edge.kernel.org/pub/linux/kernel/v5.x/patch-5.15.52.xz
Resolving mirrors.edge.kernel.org (mirrors.edge.kernel.org)... 147.75.80.249, 
2604:1380:4601:e00::3
Connecting to mirrors.edge.kernel.org 
(mirrors.edge.kernel.org)|147.75.80.249|:443... connected.
HTTP request sent, awaiting response... 200 OK
Length: 2103352 (2.0M) [application/x-xz]
Saving to: 
‘/home/thura/workspace/cambridge/kiosk/kiosk.phy/archive/patch-5.15.52.xz’

patch-5.15.52.xz
100%[===>]
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2022-07-07 11:03:52 (3.62 MB/s) - 
‘/home/thura/workspace/cambridge/kiosk/kiosk.phy/archive/patch-5.15.52.xz’ 
saved [2103352/2103352]

wget --no-config -P /home/thura/workspace/cambridge/kiosk/kiosk.phy/archive 
'https://dev.alpinelinux.org/archive/rpi-patches/rpi-5.15.52-alpine.patch'
--2022-07-07 11:03:52--  
https://dev.alpinelinux.org/archive/rpi-patches/rpi-5.15.52-alpine.patch
Resolving dev.alpinelinux.org (dev.alpinelinux.org)... 185.15.220.34, 
64:ff9b::b90f:dc22
Connecting to dev.alpinelinux.org (dev.alpinelinux.org)|185.15.220.34|:443... 
connected.
HTTP request sent, awaiting response... 200 OK
Length: 6025317 (5.7M) [application/octet-stream]
Saving to: 
‘/home/thura/workspace/cambridge/kiosk/kiosk.phy/archive/rpi-5.15.52-alpine.patch’

rpi-5.15.52-alpine.patch
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 saved [6025317/6025317]

make[2]: Leaving directory 
'/home/thura/workspace/cambridge/kiosk/kiosk.phy/kernel'
make -C bootloader all
make[2]: Entering directory 
'/home/thura/workspace/cambridge/kiosk/kiosk.phy/bootloader'
wget --no-config -P /home/thura/workspace/cambridge/kiosk/kiosk.phy/archive 
'ftp://ftp.denx.de/pub/u-boot/u-boot-2022.04.tar.bz2'
--2022-07-07 11:03:55--  ftp://ftp.denx.de/pub/u-boot/u-boot-2022.04.tar.bz2
   => 
‘/home/thura/workspace/cambridge/kiosk/kiosk.phy/archive/u-boot-2022.04.tar.bz2’
Resolving ftp.denx.de (ftp.denx.de)... 85.214.49.3, 
2a01:238:43f4:4600:bc64:4f44:381f:1163

[PATCH v2] efi_loader: PE hashing for image with gap between sections

[Su, Bao Cheng]

Some PE image has gap between sections. These gaps could be kernel
symbol table that does not belong to any sections.

For such kind of image, after the last section is added into the
hashing, the bytes_hashed is less than the (PE file size - Size of
AttributeCertificateTable). According to Step 14 of `Calculating the PE
Image Hash` in the `Windows Authenticode Portable Executable Signature
Format` Version 1.0 — March 21, 2008:

"
Create a value called FILE_SIZE, which is not part of the signature.
Set
this value to the image's file size, acquired from the underlying file
system. If FILE_SIZE is greater than SUM_OF_BYTES_HASHED, the file
contains extra data that must be added to the hash. This data begins at
the SUM_OF_BYTES_HASHED file offset, and its length is: (File Size) -
((Size of AttributeCertificateTable) + SUM_OF_BYTES_HASHED)
"

Some overlapped data could be added into the hashing again. Some other
tools such as sbgisn/pesign/EDK2 behave just as the Step 14 when
dealing
with such kind of PE image. However currently u-boot just ignores this
overlapped data and refuses to hash them again.

By toggling the `nocheck` of the efi_image_region_add to 1, the
overlapping checking could be avoided.

Signed-off-by: Baocheng Su 
---

Changes in v2:
- Reword the commit message for better understanding.

 lib/efi_loader/efi_image_loader.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/efi_loader/efi_image_loader.c
b/lib/efi_loader/efi_image_loader.c
index 9611398885..d85fb6ba08 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -481,7 +481,7 @@ bool efi_image_parse(void *efi, size_t len, struct
efi_image_regions **regp,
EFI_PRINT("extra data for hash: %zu\n",
  len - (bytes_hashed + authsz));
efi_image_region_add(regs, efi + bytes_hashed,
-efi + len - authsz, 0);
+efi + len - authsz, 1);
}
 
/* Return Certificates Table */
-- 
2.30.2

[PATCH] xilinx: Remove duplicate PMIO_NODE_ID_BASE macro

[Michal Simek]

PMIO_NODE_ID_BASE is defined twice that's why remove one instance.

Fixes: 248fe9f302df ("spi: cadence_qspi: Enable apb linear mode for apb read & 
write operations")
Signed-off-by: Michal Simek 
---

 include/zynqmp_firmware.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h
index 6c4fd9a6c5f2..86c14d560e12 100644
--- a/include/zynqmp_firmware.h
+++ b/include/zynqmp_firmware.h
@@ -435,8 +435,6 @@ enum pm_gem_config_type {
 #define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
 #define PMIO_NODE_ID_BASE  0x1410801B
 
-#define PMIO_NODE_ID_BASE  0x1410801B
-
 /*
  * Return payload size
  * Not every firmware call expects the same amount of return bytes, however the
-- 
2.36.1

[PATCH] test/py: Run simple dm commands without checking

[Michal Simek]

From: Michal Simek 

Just to make sure that dm commands can operate.
This was the problem on Microblaze in past without fixing manual
relocation.

Signed-off-by: Michal Simek 
Signed-off-by: Michal Simek 
---

 test/py/tests/test_dm.py | 8 
 1 file changed, 8 insertions(+)

diff --git a/test/py/tests/test_dm.py b/test/py/tests/test_dm.py
index 97203b536e17..ea93061fdfa8 100644
--- a/test/py/tests/test_dm.py
+++ b/test/py/tests/test_dm.py
@@ -33,3 +33,11 @@ def test_dm_static(u_boot_console):
 response = u_boot_console.run_command('dm drivers')
 for driver in drivers:
 assert driver in response
+
+@pytest.mark.buildconfigspec("cmd_dm")
+def test_dm_uclass(u_boot_console):
+response = u_boot_console.run_command("dm uclass")
+
+@pytest.mark.buildconfigspec("cmd_dm")
+def test_dm_devres(u_boot_console):
+response = u_boot_console.run_command("dm devres")
-- 
2.36.1

Re: [PATCH] xilinx: Remove the legacy property "#stream-id-cells"

[Michal Simek]

On 6/22/22 10:26, Michal Simek wrote:

From: Ayan Kumar Halder 

"#stream-id-cells" was being used with "mmu-masters" for Xen specific
device trees.
With Xen commit 2278d2cbb0b7c1b48b298c6c4c6a7de2271ac928 (Link below)
Xen is able to support smmu bindings in both formats ie :
1. Using iommus (linux format)
2. Using mmu-masters (legacy format).

Thus, "#stream-id-cells" which was used for the legacy format, can be
removed as Xen can use smmu bindings in linux format.

Link: https://www.mail-archive.com/xen-devel@lists.xenproject.org/msg101649.html
Signed-off-by: Ayan Kumar Halder 
Signed-off-by: Michal Simek 
---

  arch/arm/dts/versal-mini-emmc0.dts |  1 -
  arch/arm/dts/versal-mini-emmc1.dts |  1 -
  arch/arm/dts/zynqmp.dtsi   | 28 
  3 files changed, 30 deletions(-)

diff --git a/arch/arm/dts/versal-mini-emmc0.dts 
b/arch/arm/dts/versal-mini-emmc0.dts
index 6a6e7467a233..7c81a82fb92d 100644
--- a/arch/arm/dts/versal-mini-emmc0.dts
+++ b/arch/arm/dts/versal-mini-emmc0.dts
@@ -47,7 +47,6 @@
xlnx,device_id = <0>;
no-1-8-v;
xlnx,mio-bank = <0>;
-   #stream-id-cells = <1>;
};
};
  
diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts

index c342e6bdf7ad..bf7569d4cca4 100644
--- a/arch/arm/dts/versal-mini-emmc1.dts
+++ b/arch/arm/dts/versal-mini-emmc1.dts
@@ -47,7 +47,6 @@
xlnx,device_id = <1>;
no-1-8-v;
xlnx,mio-bank = <0>;
-   #stream-id-cells = <1>;
};
};
  
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi

index dae8f0669df8..fbc6e752da93 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -281,7 +281,6 @@
interrupts = <0 124 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
-   #stream-id-cells = <1>;
iommus = < 0x14e8>;
power-domains = <_firmware PD_GDMA>;
#dma-cells = <1>;
@@ -295,7 +294,6 @@
interrupts = <0 125 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
-   #stream-id-cells = <1>;
iommus = < 0x14e9>;
power-domains = <_firmware PD_GDMA>;
#dma-cells = <1>;
@@ -309,7 +307,6 @@
interrupts = <0 126 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
-   #stream-id-cells = <1>;
iommus = < 0x14ea>;
power-domains = <_firmware PD_GDMA>;
#dma-cells = <1>;
@@ -323,7 +320,6 @@
interrupts = <0 127 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
-   #stream-id-cells = <1>;
iommus = < 0x14eb>;
power-domains = <_firmware PD_GDMA>;
#dma-cells = <1>;
@@ -337,7 +333,6 @@
interrupts = <0 128 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
-   #stream-id-cells = <1>;
iommus = < 0x14ec>;
power-domains = <_firmware PD_GDMA>;
#dma-cells = <1>;
@@ -351,7 +346,6 @@
interrupts = <0 129 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
-   #stream-id-cells = <1>;
iommus = < 0x14ed>;
power-domains = <_firmware PD_GDMA>;
#dma-cells = <1>;
@@ -365,7 +359,6 @@
interrupts = <0 130 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
-   #stream-id-cells = <1>;
iommus = < 0x14ee>;
power-domains = <_firmware PD_GDMA>;
#dma-cells = <1>;
@@ -379,7 +372,6 @@
interrupts = <0 131 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = <128>;
-   #stream-id-cells = <1>;
iommus = < 0x14ef>;
power-domains = <_firmware PD_GDMA>;
#dma-cells = <1>;
@@ -420,7 +412,6 @@
interrupts = <0 77 4>;
clock-names = "clk_main", "clk_apb";
xlnx,bus-width = 

[PATCH] py: tests: Bind should run only on sandbox

[Michal Simek]

From: Michal Simek 

Disable test to run on any other platform than sandbox.

Signed-off-by: Michal Simek 
Signed-off-by: Michal Simek 
---

 test/py/tests/test_bind.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/test/py/tests/test_bind.py b/test/py/tests/test_bind.py
index 8ad277da190b..00f99374195f 100644
--- a/test/py/tests/test_bind.py
+++ b/test/py/tests/test_bind.py
@@ -24,7 +24,7 @@ def in_tree(response, name, uclass, drv, depth, last_child):
return True
return False
 
-
+@pytest.mark.boardspec('sandbox')
 @pytest.mark.buildconfigspec('cmd_bind')
 def test_bind_unbind_with_node(u_boot_console):
 
@@ -116,6 +116,7 @@ def get_next_line(tree, name):
break
return child_line
 
+@pytest.mark.boardspec('sandbox')
 @pytest.mark.buildconfigspec('cmd_bind')
 def test_bind_unbind_with_uclass(u_boot_console):
#bind /bind-test
-- 
2.36.1

[PATCH] ARM: zynq: DT: List OCM memory

[Michal Simek]

Description OCM with mmio-sram driver. In 99% use cases OCM is mapped high
that's why it is placed on fixed location.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynq-7000.dtsi | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 9626a0714625..c21c588bc711 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -192,6 +192,11 @@
reg = <0xf8006000 0x1000>;
};
 
+   ocmc: ocmc@f800c000 {
+   compatible = "mmio-sram";
+   reg = <0xf800c000 0x1000>;
+   };
+
uart0: serial@e000 {
compatible = "xlnx,xuartps", "cdns,uart-r1p8";
status = "disabled";
-- 
2.36.1

[PATCH] ARM: zynq: DT: Enable all FCLKs by default

[Michal Simek]

From: Christian Kohn 

The fclk-enable property is set to 0 which disables all FCLKs.
Enable all FCLKs so they can be used as clock sources in the
programmable logic.

Signed-off-by: Christian Kohn 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynq-7000.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 37155df0fd42..9626a0714625 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -329,7 +329,7 @@
u-boot,dm-pre-reloc;
#clock-cells = <1>;
compatible = "xlnx,ps7-clkc";
-   fclk-enable = <0>;
+   fclk-enable = <0xf>;
clock-output-names = "armpll", "ddrpll", 
"iopll", "cpu_6or4x",
"cpu_3or2x", "cpu_2x", 
"cpu_1x", "ddr2x", "ddr3x",
"dci", "lqspi", "smc", "pcap", 
"gem0", "gem1",
-- 
2.36.1

Re: [PATCH v6 00/25] Add support for MediaTek MT7621 SoC - v6

[Martin Bonner]

FYI, Gmail marked this as Spam - no idea why!

Martin


On Thu, 7 Jul 2022 at 02:48, Weijie Gao (高惟杰) 
wrote:

> Hi Daniel,
>
> I've tested these changes and they work fine on both NOR and NAND boards.
>
> Best Regards,
> Weijie
>
> -邮件原件-
> 发件人: Daniel Schwierzeck 
> 发送时间: 2022年7月7日 6:12
> 收件人: Weijie Gao (高惟杰) ; u-boot@lists.denx.de
> 抄送: GSS_MTK_Uboot_upstream ; Marek
> Behún 
> 主题: Re: [PATCH v6 00/25] Add support for MediaTek MT7621 SoC - v6
>
> Hi Weijie,
>
> On 20.05.22 05:21, Weijie Gao wrote:
> > This series will add support for MediaTek MT7621 SoC with two
> > reference boards and related drivers.
> >
> > The MediaTek MT7621 is a network processor integrating a dual-core
> > dual-threaded MIPS 1004Kc processor running at a normal frequency of
> 880MHz.
> > This chip can be found in many wireless routers.
> >
> > This series add all basic drivers which are useful in u-boot, like
> > usb, sdxc, ethernet, spi, nand and serial.
> >
> > Building the u-boot requires external binary blob which is described
> > in doc/board/mediatek/mt7621.rst
> >
> > Thanks,
> > Weijie
>
> I applied v6 to u-boot-mips/next for the upcoming merge window. I needed
> to add some fixups to make CI happy. Could you check if the changes are
> okay, especially the Kconfig migration of CONFIG_SYS_NAND_U_BOOT_OFFS?
>
> https://source.denx.de/u-boot/custodians/u-boot-mips/-/commits/next/
> https://source.denx.de/u-boot/custodians/u-boot-mips/-/pipelines/12637
>
> Thanks,
> Daniel
>
>

[PATCH] arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLED

[Michal Simek]

CONFIG_OF_LIBFDT is used twice for guarding the same code. It is enough to
do it once that's why remove additional ifdefs from arm and risc-v code.

Fixes: 0c303f9a6628 ("image: Drop IMAGE_ENABLE_OF_LIBFDT")
Signed-off-by: Michal Simek 
---

 arch/arm/lib/bootm.c   | 2 --
 arch/riscv/lib/bootm.c | 2 --
 2 files changed, 4 deletions(-)

diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index a59a5e6c0ea0..fc22befeac1f 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -200,12 +200,10 @@ static void boot_prep_linux(bootm_headers_t *images)
char *commandline = env_get("bootargs");
 
if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
-#ifdef CONFIG_OF_LIBFDT
debug("using: FDT\n");
if (image_setup_linux(images)) {
panic("FDT creation failed!");
}
-#endif
} else if (BOOTM_ENABLE_TAGS) {
debug("using: ATAGS\n");
setup_start_tag(gd->bd);
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index 2e1e286c8ef6..c1ac339283a6 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -65,13 +65,11 @@ static void announce_and_cleanup(int fake)
 static void boot_prep_linux(bootm_headers_t *images)
 {
if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
-#ifdef CONFIG_OF_LIBFDT
debug("using: FDT\n");
if (image_setup_linux(images)) {
printf("FDT creation failed! hanging...");
hang();
}
-#endif
} else {
printf("Device tree not found or missing FDT support\n");
hang();
-- 
2.36.1

[PATCH v3 3/3] arm64: zynqmp: Disable LMB for mini configurations

[Michal Simek]

From: Michal Simek 

There is no need to have LMB enabled that's why save some space by
disabling it.

   aarch64: (for 8/8 boards) all -1168.5 rodata -105.5 text -1063.0
xilinx_zynqmp_mini: all -2013 rodata -185 text -1828
xilinx_zynqmp_mini_qspi: all -2013 rodata -185 text -1828
xilinx_zynqmp_mini_emmc0: all -2661 rodata -237 text -2424
xilinx_zynqmp_mini_emmc1: all -2661 rodata -237 text -2424

Signed-off-by: Michal Simek 
Signed-off-by: Michal Simek 
---

(no changes since v2)

Changes in v2:
- new patch in series

 configs/xilinx_zynqmp_mini_defconfig   | 1 +
 configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 +
 configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 +
 configs/xilinx_zynqmp_mini_qspi_defconfig  | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/xilinx_zynqmp_mini_defconfig 
b/configs/xilinx_zynqmp_mini_defconfig
index 5963dd90f726..1474434fb8d2 100644
--- a/configs/xilinx_zynqmp_mini_defconfig
+++ b/configs/xilinx_zynqmp_mini_defconfig
@@ -63,3 +63,4 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ARM_DCC=y
 CONFIG_PANIC_HANG=y
 # CONFIG_GZIP is not set
+# CONFIG_LMB is not set
diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig 
b/configs/xilinx_zynqmp_mini_emmc0_defconfig
index a248cbf3a37b..047ffb4a7859 100644
--- a/configs/xilinx_zynqmp_mini_emmc0_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig
@@ -80,3 +80,4 @@ CONFIG_ARM_DCC=y
 CONFIG_PANIC_HANG=y
 # CONFIG_GZIP is not set
 # CONFIG_EFI_LOADER is not set
+# CONFIG_LMB is not set
diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig 
b/configs/xilinx_zynqmp_mini_emmc1_defconfig
index df0365ba77f8..5c9d2e126545 100644
--- a/configs/xilinx_zynqmp_mini_emmc1_defconfig
+++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig
@@ -80,3 +80,4 @@ CONFIG_ARM_DCC=y
 CONFIG_PANIC_HANG=y
 # CONFIG_GZIP is not set
 # CONFIG_EFI_LOADER is not set
+# CONFIG_LMB is not set
diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig 
b/configs/xilinx_zynqmp_mini_qspi_defconfig
index 82510f190477..98e1227d206d 100644
--- a/configs/xilinx_zynqmp_mini_qspi_defconfig
+++ b/configs/xilinx_zynqmp_mini_qspi_defconfig
@@ -84,3 +84,4 @@ CONFIG_SPI=y
 CONFIG_ZYNQMP_GQSPI=y
 CONFIG_PANIC_HANG=y
 # CONFIG_GZIP is not set
+# CONFIG_LMB is not set
-- 
2.36.1

[PATCH v3 2/3] zynqmp: Run board_get_usable_ram_top() only on main U-Boot

[Michal Simek]

From: Ashok Reddy Soma 

With commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory
location"), the function board_get_usable_ram_top() is allocating
MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this
much memory in case of mini U-Boot.

Keep these functions which use lmb under CONFIG_LMB so that they are
compiled and used only when LMB is enabled.

Signed-off-by: Ashok Reddy Soma 
Signed-off-by: Michal Simek 

Signed-off-by: Michal Simek 
---

Changes in v3:
- Update arch bootm implementation called image_setup_linux()

 arch/arc/lib/bootm.c | 8 +---
 arch/arm/lib/bootm.c | 2 +-
 arch/m68k/lib/bootm.c| 8 +---
 arch/microblaze/lib/bootm.c  | 2 +-
 arch/powerpc/lib/bootm.c | 8 +---
 arch/riscv/lib/bootm.c   | 2 +-
 arch/x86/lib/bootm.c | 5 ++---
 board/xilinx/zynqmp/zynqmp.c | 3 +++
 boot/image-board.c   | 4 
 9 files changed, 27 insertions(+), 15 deletions(-)

diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
index ed6c5dfa5845..628addd87ed5 100644
--- a/arch/arc/lib/bootm.c
+++ b/arch/arc/lib/bootm.c
@@ -29,9 +29,11 @@ static int boot_prep_linux(bootm_headers_t *images)
 {
int ret;
 
-   ret = image_setup_linux(images);
-   if (ret)
-   return ret;
+   if (CONFIG_IS_ENABLED(LMB)) {
+   ret = image_setup_linux(images);
+   if (ret)
+   return ret;
+   }
 
return board_prep_linux(images);
 }
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index fc22befeac1f..9f086f3b904d 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -199,7 +199,7 @@ static void boot_prep_linux(bootm_headers_t *images)
 {
char *commandline = env_get("bootargs");
 
-   if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
+   if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && 
images->ft_len) {
debug("using: FDT\n");
if (image_setup_linux(images)) {
panic("FDT creation failed!");
diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c
index 27729db67e27..9cade929541f 100644
--- a/arch/m68k/lib/bootm.c
+++ b/arch/m68k/lib/bootm.c
@@ -60,9 +60,11 @@ int do_bootm_linux(int flag, int argc, char *const argv[],
}
set_clocks_in_mhz(kbd);
 
-   ret = image_setup_linux(images);
-   if (ret)
-   goto error;
+   if (CONFIG_IS_ENABLED(LMB)) {
+   ret = image_setup_linux(images);
+   if (ret)
+   goto error;
+   }
 
kernel = (void (*)(struct bd_info *, ulong, ulong, ulong, 
ulong))images->ep;
 
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index af946b864282..31b6659cdf75 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -73,7 +73,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
 
 static void boot_prep_linux(bootm_headers_t *images)
 {
-   if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
+   if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && 
images->ft_len) {
debug("using: FDT\n");
if (image_setup_linux(images)) {
printf("FDT creation failed! hanging...");
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index d365705856dd..e52aa75703f3 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -214,9 +214,11 @@ static int boot_body_linux(bootm_headers_t *images)
if (ret)
return ret;
 
-   ret = image_setup_linux(images);
-   if (ret)
-   return ret;
+   if (CONFIG_IS_ENABLED(LMB)) {
+   ret = image_setup_linux(images);
+   if (ret)
+   return ret;
+   }
 
return 0;
 }
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index c1ac339283a6..670d9c9ebcfb 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -64,7 +64,7 @@ static void announce_and_cleanup(int fake)
 
 static void boot_prep_linux(bootm_headers_t *images)
 {
-   if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
+   if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && 
images->ft_len) {
debug("using: FDT\n");
if (image_setup_linux(images)) {
printf("FDT creation failed! hanging...");
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index 57cba5c65d3b..1bcdb3e30d26 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -78,15 +78,14 @@ static int boot_prep_linux(bootm_headers_t *images)
size_t len;
int ret;
 
-#ifdef CONFIG_OF_LIBFDT
-   if (images->ft_len) {
+   if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && 
images->ft_len) {
debug("using: FDT\n");
if (image_setup_linux(images)) {
puts("FDT creation failed! 

[PATCH v3 1/3] lmb: Fix lmb property's defination under struct lmb

[Michal Simek]

From: Ashok Reddy Soma 

Under struct lmb {} the lmb property's should be defined only if
CONFIG_LMB_MEMORY_REGIONS is defined.

Signed-off-by: Ashok Reddy Soma 
Signed-off-by: Michal Simek 

Signed-off-by: Michal Simek 
---

(no changes since v2)

Changes in v2:
- Also fix lib/lmb.c

 include/lmb.h | 2 +-
 lib/lmb.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lmb.h b/include/lmb.h
index ab277ca80004..1476d78c2823 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -68,7 +68,7 @@ struct lmb_region {
 struct lmb {
struct lmb_region memory;
struct lmb_region reserved;
-#if !IS_ENABLED(CONFIG_LMB_USE_MAX_REGIONS)
+#if IS_ENABLED(CONFIG_LMB_MEMORY_REGIONS)
struct lmb_property memory_regions[CONFIG_LMB_MEMORY_REGIONS];
struct lmb_property reserved_regions[CONFIG_LMB_RESERVED_REGIONS];
 #endif
diff --git a/lib/lmb.c b/lib/lmb.c
index f72996a4248e..f21fe672ae96 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -108,7 +108,7 @@ void lmb_init(struct lmb *lmb)
 #if IS_ENABLED(CONFIG_LMB_USE_MAX_REGIONS)
lmb->memory.max = CONFIG_LMB_MAX_REGIONS;
lmb->reserved.max = CONFIG_LMB_MAX_REGIONS;
-#else
+#elif IS_ENABLED(CONFIG_LMB_MEMORY_REGIONS)
lmb->memory.max = CONFIG_LMB_MEMORY_REGIONS;
lmb->reserved.max = CONFIG_LMB_RESERVED_REGIONS;
lmb->memory.region = lmb->memory_regions;
-- 
2.36.1

Re: [PATCH v2 1/2] power: pmic: rk8xx: Support sysreset shutdown method

[Michal Suchánek]

Hello,

this causes regression on pinebook pro:

resetting ...
System reset not supported on this platform
### ERROR ### Please RESET the board ###

Is there something missing in the DT for this board?

Or perhaps a fallback should be provided in absence of the PMIC?

Thanks

Michal

On Fri, May 27, 2022 at 01:18:19PM -0500, Chris Morgan wrote:
> From: Chris Morgan 
> 
> Add support for sysreset shutdown for this PMIC. The values were pulled
> from the various datasheets, but for now it has only been tested on
> the rk817 (for an Odroid Go Advance).
> 
> Signed-off-by: Chris Morgan 
> Reviewed-by: Jaehoon Chung 
> Reviewed-by: Kever Yang 
> ---
>  drivers/power/pmic/rk8xx.c | 50 +-
>  1 file changed, 49 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
> index 5f442fea68..1ffbecc02a 100644
> --- a/drivers/power/pmic/rk8xx.c
> +++ b/drivers/power/pmic/rk8xx.c
> @@ -6,10 +6,50 @@
>  
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
>  #include 
> +#include 
> +
> +static int rk8xx_sysreset_request(struct udevice *dev, enum sysreset_t type)
> +{
> + struct rk8xx_priv *priv = dev_get_priv(dev->parent);
> +
> + if (type != SYSRESET_POWER_OFF)
> + return -EPROTONOSUPPORT;
> +
> + switch (priv->variant) {
> + case RK805_ID:
> + case RK808_ID:
> + case RK816_ID:
> + case RK818_ID:
> + pmic_clrsetbits(dev->parent, REG_DEVCTRL, 0, BIT(0));
> + break;
> + case RK809_ID:
> + case RK817_ID:
> + pmic_clrsetbits(dev->parent, RK817_REG_SYS_CFG3, 0,
> + BIT(0));
> + break;
> + default:
> + printf("Unknown PMIC RK%x: Cannot shutdown\n",
> +priv->variant);
> + return -EPROTONOSUPPORT;
> + };
> +
> + return -EINPROGRESS;
> +}
> +
> +static struct sysreset_ops rk8xx_sysreset_ops = {
> + .request= rk8xx_sysreset_request,
> +};
> +
> +U_BOOT_DRIVER(rk8xx_sysreset) = {
> + .name   = "rk8xx_sysreset",
> + .id = UCLASS_SYSRESET,
> + .ops= _sysreset_ops,
> +};
>  
>  static struct reg_data rk817_init_reg[] = {
>  /* enable the under-voltage protection,
> @@ -61,7 +101,7 @@ static int rk8xx_read(struct udevice *dev, uint reg, 
> uint8_t *buff, int len)
>  static int rk8xx_bind(struct udevice *dev)
>  {
>   ofnode regulators_node;
> - int children;
> + int children, ret;
>  
>   regulators_node = dev_read_subnode(dev, "regulators");
>   if (!ofnode_valid(regulators_node)) {
> @@ -72,6 +112,14 @@ static int rk8xx_bind(struct udevice *dev)
>  
>   debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
>  
> + if (CONFIG_IS_ENABLED(SYSRESET)) {
> + ret = device_bind_driver_to_node(dev, "rk8xx_sysreset",
> +  "rk8xx_sysreset",
> +  dev_ofnode(dev), NULL);
> + if (ret)
> + return ret;
> + }
> +
>   children = pmic_bind_children(dev, regulators_node, pmic_children_info);
>   if (!children)
>   debug("%s: %s - no child found\n", __func__, dev->name);
> -- 
> 2.25.1
> 

[PATCH] sunxi: dts: OrangePi Zero: Fixup SPI flash device node

[Michal Suchanek]

For some reason the flash cannot be probed as is - the u-boot DT lookup
code fails to find the definition, and sf complains about invalid cs.

Fixes: 280294c5df ("sunxi: boards: Enable SPI flash support in U-Boot proper")
Signed-off-by: Michal Suchanek 
---
 arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts 
b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
index b08e84c616..034f0f77a0 100644
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -167,10 +167,8 @@
/* Enable SPI NOR by default: it optional on Orange Pi Zero boards */
status = "okay";
 
-   flash@0 {
-   #address-cells = <1>;
-   #size-cells = <1>;
-   compatible = "mxicy,mx25l1606e", "winbond,w25q128";
+   spiflash: flash@0 {
+   compatible = "mxicy,mx25l1606e", "winbond,w25q128", 
"jedec,spi-nor";
reg = <0>;
spi-max-frequency = <4000>;
};
-- 
2.36.1

Re: [PATCH v2] doc: board: amlogic: add documentation on boot flow

[Neil Armstrong]

Hi,

On Wed, 6 Jul 2022 11:36:49 +0200, Neil Armstrong wrote:
> This is a preliminary documentation introducing different
> boot sequences, and notably the recovery mode.
> 
> 

Thanks, Applied to https://source.denx.de/u-boot/custodians/u-boot-amlogic 
(u-boot-amlogic-test)

[1/1] doc: board: amlogic: add documentation on boot flow
  
https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/647ba68841dbb5de82983a1cad4cf42bcf63b9b3

-- 
Neil

[PATCH] configs: sunxi: OrangePi Zero: enable Macronix flash support

[Michal Suchanek]

The boards that come with a flash memory pre-soldered have a Macronix
flash chip.

Fixes: 280294c5df ("sunxi: boards: Enable SPI flash support in U-Boot proper")
Signed-off-by: Michal Suchanek 
---
 configs/orangepi_zero_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig
index 2dc69d2994..f7f3bfbcc4 100644
--- a/configs/orangepi_zero_defconfig
+++ b/configs/orangepi_zero_defconfig
@@ -8,6 +8,7 @@ CONFIG_DRAM_CLK=624
 CONFIG_SPL_SPI_SUNXI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_CONSOLE_MUX=y
+CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SUN8I_EMAC=y
 CONFIG_SPI=y
-- 
2.36.1

Re: [PATCH 4/4] ARM: dts: stm32: add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)

[Patrice CHOTARD]

Hi Patrick

On 7/5/22 16:55, Patrick Delaunay wrote:
> Add a "secure" version of STM32 boards based on SCMI when RCC_TZCR.TZEN=1.
> 
> Only boards provided by STMicroelectronics are concerned:
> -STM32MP157A-DK1
> -STM32MP157C-DK2
> -STM32MP157C-ED1
> -STM32MP157C-EV1
> 
> The resources secured by RCC_TZCR.TZEN=1 are managed by OP-TEE
> and the associated SCMI services, reset and clock.
> 
> These device trees are only supported with stm32mp15_defconfig,
> with OP-TEE, SCMI and without SPL support.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
>  arch/arm/dts/Makefile |   4 +
>  arch/arm/dts/stm32mp15-scmi-u-boot.dtsi   | 167 ++
>  arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi |  57 ++
>  arch/arm/dts/stm32mp157c-dk2-scmi-u-boot.dtsi |   6 +
>  arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi |  47 +
>  arch/arm/dts/stm32mp157c-ev1-scmi-u-boot.dtsi |  17 ++
>  doc/board/st/stm32mp1.rst |  19 ++
>  7 files changed, 317 insertions(+)
>  create mode 100644 arch/arm/dts/stm32mp15-scmi-u-boot.dtsi
>  create mode 100644 arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi
>  create mode 100644 arch/arm/dts/stm32mp157c-dk2-scmi-u-boot.dtsi
>  create mode 100644 arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi
>  create mode 100644 arch/arm/dts/stm32mp157c-ev1-scmi-u-boot.dtsi
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 87b210dbb01..a6b5295afc3 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -1171,13 +1171,17 @@ dtb-$(CONFIG_STM32MP13x) += \
>  
>  dtb-$(CONFIG_STM32MP15x) += \
>   stm32mp157a-dk1.dtb \
> + stm32mp157a-dk1-scmi.dtb \
>   stm32mp157a-icore-stm32mp1-ctouch2.dtb \
>   stm32mp157a-icore-stm32mp1-edimm2.2.dtb \
>   stm32mp157a-microgea-stm32mp1-microdev2.0.dtb \
>   stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dtb \
>   stm32mp157c-dk2.dtb \
> + stm32mp157c-dk2-scmi.dtb \
>   stm32mp157c-ed1.dtb \
> + stm32mp157c-ed1-scmi.dtb \
>   stm32mp157c-ev1.dtb \
> + stm32mp157c-ev1-scmi.dtb \
>   stm32mp157c-odyssey.dtb \
>   stm32mp15xx-dhcom-drc02.dtb \
>   stm32mp15xx-dhcom-pdk2.dtb \
> diff --git a/arch/arm/dts/stm32mp15-scmi-u-boot.dtsi 
> b/arch/arm/dts/stm32mp15-scmi-u-boot.dtsi
> new file mode 100644
> index 000..314fc39a054
> --- /dev/null
> +++ b/arch/arm/dts/stm32mp15-scmi-u-boot.dtsi
> @@ -0,0 +1,167 @@
> +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
> +/*
> + * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
> + */
> +
> +/ {
> + aliases {
> + gpio0 = 
> + gpio1 = 
> + gpio2 = 
> + gpio3 = 
> + gpio4 = 
> + gpio5 = 
> + gpio6 = 
> + gpio7 = 
> + gpio8 = 
> + gpio9 = 
> + gpio10 = 
> + gpio25 = 
> + pinctrl0 = 
> + pinctrl1 = _z;
> + };
> +
> + binman: binman {
> + multiple-images;
> + };
> +
> + soc {
> + u-boot,dm-pre-reloc;
> +
> + ddr: ddr@5a003000 {
> + u-boot,dm-pre-reloc;
> +
> + compatible = "st,stm32mp1-ddr";
> +
> + reg = <0x5a003000 0x550
> +0x5a004000 0x234>;
> +
> + status = "okay";
> + };
> + };
> +
> + /* need PSCI for sysreset during board_f */
> + psci {
> + u-boot,dm-pre-proper;
> + };
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-proper;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> +/* pre-reloc probe = reserve video frame buffer in video_reserve() */
> + {
> + u-boot,dm-pre-proper;
> +};
> +
> +/* temp = waiting kernel update */
> +_rproc {
> + resets = <_reset RST_SCMI_MCU>,
> +  <_reset RST_SCMI_MCU_HOLD_BOOT>;
> + reset-names = "mcu_rst", "hold_boot";
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> +_z {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-proper;
> +};
> +
> + {
> + resets = < USART1_R>;
> +};
> +
> + {
> + resets = < USART2_R>;
> +};
> +
> + {
> + resets = < USART3_R>;
> +};
> +
> + {
> + resets = < UART4_R>;
> +};
> +
> + {
> + resets = < UART5_R>;
> +};
> +
> + {
> + resets = < USART6_R>;
> 

Re: [PATCH 3/4] configs: stm32mp15: increase malloc size for pre-reloc

[Patrice CHOTARD]

Hi Patrick

On 7/5/22 16:55, Patrick Delaunay wrote:
> With support of SCMI in OP-TEE, the early malloc usage
> increase, the associated defined CONFIG_SYS_MALLOC_F_LEN
> need to be increased.
> 
> For example, for stm32mp15_defconfig and
> stm32mp157c-dk2-scmi.dtsi, we have:
> 
> Early malloc usage: 14098 / 8
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
>  configs/stm32mp15_defconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
> index 48185d32baa..76b187bead1 100644
> --- a/configs/stm32mp15_defconfig
> +++ b/configs/stm32mp15_defconfig
> @@ -1,7 +1,7 @@
>  CONFIG_ARM=y
>  CONFIG_ARCH_STM32MP=y
>  CONFIG_TFABOOT=y
> -CONFIG_SYS_MALLOC_F_LEN=0x3000
> +CONFIG_SYS_MALLOC_F_LEN=0x2
>  CONFIG_ENV_OFFSET=0x48
>  CONFIG_ENV_SECT_SIZE=0x4
>  CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH 2/4] clk: stm32: add support compatible st,stm32mp1-rcc-secure

[Patrice CHOTARD]

Hi PAtrick

On 7/5/22 16:55, Patrick Delaunay wrote:
> Add support for new compatible st,stm32mp1-rcc-secure used when the
> RCC resource is managed by secured world (RCC_TZCR.TZEN=1)
> iand when SCMI is used.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
>  drivers/misc/stm32_rcc.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c
> index b816503bfa2..c1e5428a6b8 100644
> --- a/drivers/misc/stm32_rcc.c
> +++ b/drivers/misc/stm32_rcc.c
> @@ -84,6 +84,7 @@ static const struct udevice_id stm32_rcc_ids[] = {
>   {.compatible = "st,stm32f746-rcc", .data = (ulong)_rcc_clk_f7 },
>   {.compatible = "st,stm32h743-rcc", .data = (ulong)_rcc_clk_h7 },
>   {.compatible = "st,stm32mp1-rcc", .data = (ulong)_rcc_clk_mp1 },
> + {.compatible = "st,stm32mp1-rcc-secure", .data = 
> (ulong)_rcc_clk_mp1 },
>   {.compatible = "st,stm32mp13-rcc", .data = (ulong)_rcc_clk_mp13 },
>   { }
>  };

Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH 1/4] ARM: dts: stm32mp15: alignment with v5.19

[Patrice CHOTARD]

Hi Patrick

On 7/5/22 16:55, Patrick Delaunay wrote:
> Device tree alignment with Linux kernel v5.19-rc1
> 
> - ARM: dts: stm32: Add alternate pinmux for ethernet0 pins
> - ARM: dts: stm32: Add alternate pinmux for mco2 pins
> - ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
> - ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group
> - dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
> - dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
> - dt-bindings: clock: stm32mp15: rename CK_SCMI define
> - dt-bindings: reset: stm32mp15: rename RST_SCMI define
> - dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains
>   on stm32mp15
> - dt-bindings: clk: cleanup comments
> - ARM: dts: align SPI NOR node name with dtschema
> - ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP15
> - ARM: dts: stm32: Add SCMI version of STM32 boards (DK1/DK2/ED1/EV1)
> - ARM: dts: stm32: move SCMI related nodes in a dedicated file for
>   stm32mp15
> 
> + patch from stm32-dt-for-v5.19-fixes-2
> 
> - ARM: dts: stm32: move SCMI related nodes in a dedicated file for
>   stm32mp15
> - ARM: dts: stm32: fix pwr regulators references to use scmi
> - ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
> - ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
> - ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
> - ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
>  arch/arm/dts/stm32mp15-pinctrl.dtsi |  64 
>  arch/arm/dts/stm32mp15-scmi.dtsi| 109 
>  arch/arm/dts/stm32mp151.dtsi|  10 +-
>  arch/arm/dts/stm32mp157a-dk1-scmi.dts   |  79 ++
>  arch/arm/dts/stm32mp157c-dk2-scmi.dts   |  85 +++
>  arch/arm/dts/stm32mp157c-ed1-scmi.dts   |  84 +++
>  arch/arm/dts/stm32mp157c-ev1-scmi.dts   |  90 
>  arch/arm/dts/stm32mp157c-ev1.dts|   4 +-
>  include/dt-bindings/clock/stm32fx-clock.h   |   4 +-
>  include/dt-bindings/clock/stm32mp1-clks.h   |  23 +
>  include/dt-bindings/pinctrl/stm32-pinfunc.h |   1 +
>  include/dt-bindings/reset/stm32mp1-resets.h |  14 +++
>  12 files changed, 558 insertions(+), 9 deletions(-)
>  create mode 100644 arch/arm/dts/stm32mp15-scmi.dtsi
>  create mode 100644 arch/arm/dts/stm32mp157a-dk1-scmi.dts
>  create mode 100644 arch/arm/dts/stm32mp157c-dk2-scmi.dts
>  create mode 100644 arch/arm/dts/stm32mp157c-ed1-scmi.dts
>  create mode 100644 arch/arm/dts/stm32mp157c-ev1-scmi.dts
> 
> diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi 
> b/arch/arm/dts/stm32mp15-pinctrl.dtsi
> index b92a149a186..d3ed10335df 100644
> --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi
> +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi
> @@ -379,6 +379,40 @@
>   };
>   };
>  
> + ethernet0_rmii_pins_c: rmii-2 {
> + pins1 {
> + pinmux = , /* 
> ETH1_RMII_TXD0 */
> +  , /* 
> ETH1_RMII_TXD1 */
> +  , /* 
> ETH1_RMII_TX_EN */
> +  ,  /* 
> ETH1_RMII_REF_CLK */
> +  ,  /* ETH1_MDIO */
> +  ;  /* ETH1_MDC */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <2>;
> + };
> + pins2 {
> + pinmux = ,  /* 
> ETH1_RMII_RXD0 */
> +  ,  /* 
> ETH1_RMII_RXD1 */
> +  ;  /* 
> ETH1_RMII_CRS_DV */
> + bias-disable;
> + };
> + };
> +
> + ethernet0_rmii_sleep_pins_c: rmii-sleep-2 {
> + pins1 {
> + pinmux = , /* 
> ETH1_RMII_TXD0 */
> +  , /* 
> ETH1_RMII_TXD1 */
> +  , /* 
> ETH1_RMII_TX_EN */
> +  ,  /* ETH1_MDIO 
> */
> +  ,  /* ETH1_MDC */
> +  ,  /* 
> ETH1_RMII_RXD0 */
> +  ,  /* 
> ETH1_RMII_RXD1 */
> +  ,  /* 
> ETH1_RMII_REF_CLK */
> +  ;  /* 
> ETH1_RMII_CRS_DV */
> + };
> + };
> +
>   fmc_pins_a: fmc-0 {
>   pins1 {
>   pinmux = , /* FMC_NOE */
> @@ -889,6 +923,21 @@
>   };
>   };
>  
> + mco2_pins_a: mco2-0 {
> + pins {
> + pinmux = ; /* MCO2 */
> + bias-disable;
> + drive-push-pull;
> + slew-rate = <2>;
> + };
> + };
> +
> + mco2_sleep_pins_a: mco2-sleep-0 {
> + pins {
> + pinmux = ; /* MCO2 */
> + };
> + };
> +
>   m_can1_pins_a: m-can1-0 {
>   pins1 {
>   

Re: [PATCH v2 10/10] configs: stm32mp13: activate some command

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:20, Patrick Delaunay wrote:
> Activate useful commands in STM32MP13x config, already activated in
> stm32mp15_defconfig.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  configs/stm32mp13_defconfig | 16 
>  1 file changed, 16 insertions(+)
> 
> diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
> index f58c73b7c79..f94798a9ff8 100644
> --- a/configs/stm32mp13_defconfig
> +++ b/configs/stm32mp13_defconfig
> @@ -20,17 +20,25 @@ CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
>  CONFIG_SYS_PROMPT="STM32MP> "
>  CONFIG_CMD_ADTIMG=y
>  CONFIG_CMD_ERASEENV=y
> +CONFIG_CMD_NVEDIT_EFI=y
>  CONFIG_CMD_MEMINFO=y
>  CONFIG_CMD_MEMTEST=y
> +CONFIG_CMD_UNZIP=y
>  CONFIG_CMD_CLK=y
>  CONFIG_CMD_GPIO=y
>  CONFIG_CMD_I2C=y
> +CONFIG_CMD_LSBLK=y
>  CONFIG_CMD_MMC=y
>  CONFIG_CMD_CACHE=y
> +CONFIG_CMD_EFIDEBUG=y
>  CONFIG_CMD_TIME=y
>  CONFIG_CMD_RNG=y
>  CONFIG_CMD_TIMER=y
> +CONFIG_CMD_REGULATOR=y
> +CONFIG_CMD_EXT4_WRITE=y
> +CONFIG_CMD_MTDPARTS=y
>  CONFIG_CMD_LOG=y
> +CONFIG_CMD_UBI=y
>  CONFIG_OF_LIVE=y
>  CONFIG_ENV_IS_NOWHERE=y
>  CONFIG_ENV_IS_IN_MMC=y
> @@ -38,9 +46,16 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>  CONFIG_SYS_MMC_ENV_DEV=-1
>  CONFIG_CLK_SCMI=y
> +CONFIG_GPIO_HOG=y
>  CONFIG_DM_I2C=y
>  CONFIG_SYS_I2C_STM32F7=y
> +CONFIG_LED=y
> +CONFIG_LED_GPIO=y
> +CONFIG_SUPPORT_EMMC_BOOT=y
>  CONFIG_STM32_SDMMC2=y
> +CONFIG_MTD=y
> +CONFIG_DM_MTD=y
> +CONFIG_SYS_MTDPARTS_RUNTIME=y
>  CONFIG_DM_ETH=y
>  CONFIG_PINCONF=y
>  CONFIG_DM_REGULATOR=y
> @@ -58,6 +73,7 @@ CONFIG_TEE=y
>  CONFIG_OPTEE=y
>  # CONFIG_OPTEE_TA_AVB is not set
>  CONFIG_ERRNO_STR=y
> +CONFIG_FDT_FIXUP_PARTITIONS=y
>  # CONFIG_LMB_USE_MAX_REGIONS is not set
>  CONFIG_LMB_MEMORY_REGIONS=2
>  CONFIG_LMB_RESERVED_REGIONS=16
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 09/10] configs: stm32mp13: activate I2C support

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:20, Patrick Delaunay wrote:
> Activate the I2C driver in STM32MP13x config.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  configs/stm32mp13_defconfig | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
> index 9b0c5a36b04..f58c73b7c79 100644
> --- a/configs/stm32mp13_defconfig
> +++ b/configs/stm32mp13_defconfig
> @@ -24,6 +24,7 @@ CONFIG_CMD_MEMINFO=y
>  CONFIG_CMD_MEMTEST=y
>  CONFIG_CMD_CLK=y
>  CONFIG_CMD_GPIO=y
> +CONFIG_CMD_I2C=y
>  CONFIG_CMD_MMC=y
>  CONFIG_CMD_CACHE=y
>  CONFIG_CMD_TIME=y
> @@ -37,6 +38,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>  CONFIG_SYS_MMC_ENV_DEV=-1
>  CONFIG_CLK_SCMI=y
> +CONFIG_DM_I2C=y
> +CONFIG_SYS_I2C_STM32F7=y
>  CONFIG_STM32_SDMMC2=y
>  CONFIG_DM_ETH=y
>  CONFIG_PINCONF=y
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 08/10] configs: stm32mp13: activate RTC support

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:20, Patrick Delaunay wrote:
> Activate the RTC driver in STM32MP13x config.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  configs/stm32mp13_defconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
> index 3fa1642b2e4..9b0c5a36b04 100644
> --- a/configs/stm32mp13_defconfig
> +++ b/configs/stm32mp13_defconfig
> @@ -47,6 +47,8 @@ CONFIG_DM_REGULATOR_SCMI=y
>  CONFIG_RESET_SCMI=y
>  CONFIG_DM_RNG=y
>  CONFIG_RNG_OPTEE=y
> +CONFIG_DM_RTC=y
> +CONFIG_RTC_STM32=y
>  CONFIG_SERIAL_RX_BUFFER=y
>  CONFIG_SYSRESET_PSCI=y
>  CONFIG_TEE=y

Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 07/10] configs: stm32mp13: activate RNG support

[Patrice CHOTARD]

Hi PAtrick

On 6/30/22 10:20, Patrick Delaunay wrote:
> Activate the RNG driver provided by OP-TEE.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  configs/stm32mp13_defconfig | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
> index b5dcec78f51..3fa1642b2e4 100644
> --- a/configs/stm32mp13_defconfig
> +++ b/configs/stm32mp13_defconfig
> @@ -27,6 +27,7 @@ CONFIG_CMD_GPIO=y
>  CONFIG_CMD_MMC=y
>  CONFIG_CMD_CACHE=y
>  CONFIG_CMD_TIME=y
> +CONFIG_CMD_RNG=y
>  CONFIG_CMD_TIMER=y
>  CONFIG_CMD_LOG=y
>  CONFIG_OF_LIVE=y
> @@ -44,6 +45,8 @@ CONFIG_DM_REGULATOR_FIXED=y
>  CONFIG_DM_REGULATOR_GPIO=y
>  CONFIG_DM_REGULATOR_SCMI=y
>  CONFIG_RESET_SCMI=y
> +CONFIG_DM_RNG=y
> +CONFIG_RNG_OPTEE=y
>  CONFIG_SERIAL_RX_BUFFER=y
>  CONFIG_SYSRESET_PSCI=y
>  CONFIG_TEE=y
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 06/10] configs: stm32mp13: Add support for baudrates higher than 115200

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:20, Patrick Delaunay wrote:
> On STM32MP13x STMicroelectronics boards, the UART can reliably go up to
> 400 bauds when connected to the external ST-LINKV3.
> 
> This patch adds the support of higher baudrates on STMicroelectronics
> STM32MP13x boards with ST-LINKV3.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  include/configs/stm32mp13_st_common.h | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/include/configs/stm32mp13_st_common.h 
> b/include/configs/stm32mp13_st_common.h
> index ec64b12f7ab..c51022b40d2 100644
> --- a/include/configs/stm32mp13_st_common.h
> +++ b/include/configs/stm32mp13_st_common.h
> @@ -14,4 +14,9 @@
>  
>  #include 
>  
> +/* uart with on-board st-link */
> +#define CONFIG_SYS_BAUDRATE_TABLE  { 9600, 19200, 38400, 57600, 115200, \
> +  230400, 460800, 921600, \
> +  100, 200, 400}
> +
>  #endif

Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 05/10] ARM: dts: stm32mp13: activate led on STM32MP13F-DK

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:20, Patrick Delaunay wrote:
> Activate the led managed in stm32mp1 board for U-Boot indication
> in STM32MP13F-DK device tree.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  arch/arm/dts/stm32mp135f-dk-u-boot.dtsi | 10 ++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi 
> b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
> index dfe5bbb2e34..cbe4eb56083 100644
> --- a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
> @@ -11,8 +11,18 @@
>   };
>  
>   config {
> + u-boot,boot-led = "led-blue";
> + u-boot,error-led = "led-red";
>   u-boot,mmc-env-partition = "u-boot-env";
>   };
> +
> + leds {
> + led-red {
> + color = ;
> + gpios = < 13 GPIO_ACTIVE_LOW>;
> + default-state = "off";
> + };
> + };
>  };
>  
>   {

Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 04/10] ARM: dts: stm32mp13: alignment with v5.19

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:20, Patrick Delaunay wrote:
> Device tree alignment with Linux kernel v5.19-rc1 with:
> - ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk
> - ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk
> - ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131
> - ARM: dts: stm32: enable RTC support on stm32mp135f-dk
> - ARM: dts: stm32: add RTC node on stm32mp131
> - ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  arch/arm/dts/stm32mp131.dtsi| 19 ++-
>  arch/arm/dts/stm32mp135f-dk.dts | 29 +
>  2 files changed, 47 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
> index 950e172e455..a30989f287e 100644
> --- a/arch/arm/dts/stm32mp131.dtsi
> +++ b/arch/arm/dts/stm32mp131.dtsi
> @@ -75,6 +75,12 @@
>   compatible = "fixed-clock";
>   clock-frequency = <9900>;
>   };
> +
> + clk_rtc_k: clk-rtc-k {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <32768>;
> + };
>   };
>  
>   intc: interrupt-controller@a0021000 {
> @@ -218,6 +224,15 @@
>   status = "disabled";
>   };
>  
> + rtc: rtc@5c004000 {
> + compatible = "st,stm32mp1-rtc";
> + reg = <0x5c004000 0x400>;
> + interrupts-extended = < 19 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <_pclk4>, <_rtc_k>;
> + clock-names = "pclk", "rtc_ck";
> + status = "disabled";
> + };
> +
>   bsec: efuse@5c005000 {
>   compatible = "st,stm32mp13-bsec";
>   reg = <0x5c005000 0x400>;
> @@ -239,11 +254,13 @@
>* Break node order to solve dependency probe issue between
>* pinctrl and exti.
>*/
> - pinctrl: pin-controller@50002000 {
> + pinctrl: pinctrl@50002000 {
>   #address-cells = <1>;
>   #size-cells = <1>;
>   compatible = "st,stm32mp135-pinctrl";
>   ranges = <0 0x50002000 0x8400>;
> + interrupt-parent = <>;
> + st,syscfg = < 0x60 0xff>;
>   pins-are-numbered;
>  
>   gpioa: gpio@50002000 {
> diff --git a/arch/arm/dts/stm32mp135f-dk.dts b/arch/arm/dts/stm32mp135f-dk.dts
> index ee100d108ea..09d6226d598 100644
> --- a/arch/arm/dts/stm32mp135f-dk.dts
> +++ b/arch/arm/dts/stm32mp135f-dk.dts
> @@ -6,6 +6,9 @@
>  
>  /dts-v1/;
>  
> +#include 
> +#include 
> +#include 
>  #include "stm32mp135.dtsi"
>  #include "stm32mp13xf.dtsi"
>  #include "stm32mp13-pinctrl.dtsi"
> @@ -23,6 +26,28 @@
>   reg = <0xc000 0x2000>;
>   };
>  
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + user-pa13 {
> + label = "User-PA13";
> + linux,code = ;
> + gpios = < 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led-blue {
> + function = LED_FUNCTION_HEARTBEAT;
> + color = ;
> + gpios = < 14 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "heartbeat";
> + default-state = "off";
> + };
> + };
> +
>   vdd_sd: vdd-sd {
>   compatible = "regulator-fixed";
>   regulator-name = "vdd_sd";
> @@ -37,6 +62,10 @@
>   status = "okay";
>  };
>  
> + {
> + status = "okay";
> +};
> +
>   {
>   pinctrl-names = "default", "opendrain", "sleep";
>   pinctrl-0 = <_b4_pins_a _clk_pins_a>;


Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 03/10] stm32mp: add support of STM32MP13x Rev.Y

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:20, Patrick Delaunay wrote:
> Add support of STM32MP13x Rev.Y for the Silicon revision REV_ID = 0x1003.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> Changes in v2:
> - fix value of CPU_REV1_2 = 0x1003, because minor version in REV_ID
>   is bitfield at SoC level (0 = 0, 1 = 1, 2 = 3, 3 = 7, 4 =F, )
> 
>  arch/arm/mach-stm32mp/include/mach/sys_proto.h | 1 +
>  arch/arm/mach-stm32mp/stm32mp13x.c | 3 +++
>  2 files changed, 4 insertions(+)
> 
> diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h 
> b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
> index 4b564e86dc5..f19a70e53e0 100644
> --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
> +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
> @@ -41,6 +41,7 @@ u32 get_cpu_dev(void);
>  
>  #define CPU_REV1 0x1000
>  #define CPU_REV1_1   0x1001
> +#define CPU_REV1_2   0x1003
>  #define CPU_REV2 0x2000
>  #define CPU_REV2_1   0x2001
>  
> diff --git a/arch/arm/mach-stm32mp/stm32mp13x.c 
> b/arch/arm/mach-stm32mp/stm32mp13x.c
> index bd3f24c349a..845d973ad1b 100644
> --- a/arch/arm/mach-stm32mp/stm32mp13x.c
> +++ b/arch/arm/mach-stm32mp/stm32mp13x.c
> @@ -126,6 +126,9 @@ void get_soc_name(char name[SOC_NAME_SIZE])
>   case CPU_REV1_1:
>   cpu_r = "Z";
>   break;
> + case CPU_REV1_2:
> + cpu_r = "Y";
> + break;
>   default:
>   cpu_r = "?";
>   break;
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 02/10] rng: stm32mp1_rng: add conditional reset feature for STM32MP13x

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:20, Patrick Delaunay wrote:
> From: Lionel Debieve 
> 
> New IP adds a conditional reset that impact the clock
> error management. It is now linked to a new compatible.
> 
> Signed-off-by: Lionel Debieve 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  drivers/rng/stm32mp1_rng.c | 61 +-
>  1 file changed, 47 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/rng/stm32mp1_rng.c b/drivers/rng/stm32mp1_rng.c
> index 8ea00e3e890..89da78c6c8b 100644
> --- a/drivers/rng/stm32mp1_rng.c
> +++ b/drivers/rng/stm32mp1_rng.c
> @@ -18,22 +18,28 @@
>  #include 
>  #include 
>  
> -#define RNG_CR 0x00
> -#define RNG_CR_RNGEN BIT(2)
> -#define RNG_CR_CED BIT(5)
> +#define RNG_CR   0x00
> +#define RNG_CR_RNGEN BIT(2)
> +#define RNG_CR_CED   BIT(5)
> +#define RNG_CR_CONDRST   BIT(30)
>  
> -#define RNG_SR 0x04
> -#define RNG_SR_SEIS BIT(6)
> -#define RNG_SR_CEIS BIT(5)
> -#define RNG_SR_SECS BIT(2)
> -#define RNG_SR_DRDY BIT(0)
> +#define RNG_SR   0x04
> +#define RNG_SR_SEIS  BIT(6)
> +#define RNG_SR_CEIS  BIT(5)
> +#define RNG_SR_SECS  BIT(2)
> +#define RNG_SR_DRDY  BIT(0)
>  
> -#define RNG_DR 0x08
> +#define RNG_DR   0x08
> +
> +struct stm32_rng_data {
> + bool has_cond_reset;
> +};
>  
>  struct stm32_rng_plat {
>   fdt_addr_t base;
>   struct clk clk;
>   struct reset_ctl rst;
> + const struct stm32_rng_data *data;
>  };
>  
>  static int stm32_rng_read(struct udevice *dev, void *data, size_t len)
> @@ -83,18 +89,36 @@ static int stm32_rng_read(struct udevice *dev, void 
> *data, size_t len)
>  static int stm32_rng_init(struct stm32_rng_plat *pdata)
>  {
>   int err;
> + u32 cr, sr;
>  
>   err = clk_enable(>clk);
>   if (err)
>   return err;
>  
> + cr = readl(pdata->base + RNG_CR);
> +
>   /* Disable CED */
> - writel(RNG_CR_RNGEN | RNG_CR_CED, pdata->base + RNG_CR);
> + cr |= RNG_CR_CED;
> + if (pdata->data->has_cond_reset) {
> + cr |= RNG_CR_CONDRST;
> + writel(cr, pdata->base + RNG_CR);
> + cr &= ~RNG_CR_CONDRST;
> + writel(cr, pdata->base + RNG_CR);
> + err = readl_poll_timeout(pdata->base + RNG_CR, cr,
> +  (!(cr & RNG_CR_CONDRST)), 1);
> + if (err)
> + return err;
> + }
>  
>   /* clear error indicators */
>   writel(0, pdata->base + RNG_SR);
>  
> - return 0;
> + cr |= RNG_CR_RNGEN;
> + writel(cr, pdata->base + RNG_CR);
> +
> + err = readl_poll_timeout(pdata->base + RNG_SR, sr,
> +  sr & RNG_SR_DRDY, 1);
> + return err;
>  }
>  
>  static int stm32_rng_cleanup(struct stm32_rng_plat *pdata)
> @@ -108,6 +132,8 @@ static int stm32_rng_probe(struct udevice *dev)
>  {
>   struct stm32_rng_plat *pdata = dev_get_plat(dev);
>  
> + pdata->data = (struct stm32_rng_data *)dev_get_driver_data(dev);
> +
>   reset_assert(>rst);
>   udelay(20);
>   reset_deassert(>rst);
> @@ -146,10 +172,17 @@ static const struct dm_rng_ops stm32_rng_ops = {
>   .read = stm32_rng_read,
>  };
>  
> +static const struct stm32_rng_data stm32mp13_rng_data = {
> + .has_cond_reset = true,
> +};
> +
> +static const struct stm32_rng_data stm32_rng_data = {
> + .has_cond_reset = false,
> +};
> +
>  static const struct udevice_id stm32_rng_match[] = {
> - {
> - .compatible = "st,stm32-rng",
> - },
> + {.compatible = "st,stm32mp13-rng", .data = (ulong)_rng_data},
> + {.compatible = "st,stm32-rng", .data = (ulong)_rng_data},
>   {},
>  };
>  
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 01/10] i2c: stm32: add support for the st, stm32mp13 SOC

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:20, Patrick Delaunay wrote:
> The stm32mp13 soc differs from the stm32mp15 in terms of
> clear register offset for controlling the FMP (Fast Mode Plus).
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  drivers/i2c/stm32f7_i2c.c | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
> index c6ae65badb7..bf2a6c9b4bd 100644
> --- a/drivers/i2c/stm32f7_i2c.c
> +++ b/drivers/i2c/stm32f7_i2c.c
> @@ -267,6 +267,10 @@ static const struct stm32_i2c_data stm32mp15_data = {
>   .fmp_clr_offset = 0x40,
>  };
>  
> +static const struct stm32_i2c_data stm32mp13_data = {
> + .fmp_clr_offset = 0x4,
> +};
> +
>  static int stm32_i2c_check_device_busy(struct stm32_i2c_priv *i2c_priv)
>  {
>   struct stm32_i2c_regs *regs = i2c_priv->regs;
> @@ -957,6 +961,7 @@ static const struct dm_i2c_ops stm32_i2c_ops = {
>  static const struct udevice_id stm32_i2c_of_match[] = {
>   { .compatible = "st,stm32f7-i2c", .data = (ulong)_data },
>   { .compatible = "st,stm32mp15-i2c", .data = (ulong)_data },
> + { .compatible = "st,stm32mp13-i2c", .data = (ulong)_data },
>   {}
>  };
>  
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 3/3] mmc: stm32_sdmmc2: introduce of_to_plat ops

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:01, Patrick Delaunay wrote:
> Add the uclass ops of_to_plat to parse the device tree properties
> to respect the expected sequence by the driver model.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  drivers/mmc/stm32_sdmmc2.c | 95 --
>  1 file changed, 50 insertions(+), 45 deletions(-)
> 
> diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
> index 41f375b9d32..bfce8a2e4a6 100644
> --- a/drivers/mmc/stm32_sdmmc2.c
> +++ b/drivers/mmc/stm32_sdmmc2.c
> @@ -645,6 +645,47 @@ static const struct dm_mmc_ops stm32_sdmmc2_ops = {
>   .host_power_cycle = stm32_sdmmc2_host_power_cycle,
>  };
>  
> +static int stm32_sdmmc2_of_to_plat(struct udevice *dev)
> +{
> + struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
> + struct mmc_config *cfg = >cfg;
> + int ret;
> +
> + plat->base = dev_read_addr(dev);
> + if (plat->base == FDT_ADDR_T_NONE)
> + return -EINVAL;
> +
> + if (dev_read_bool(dev, "st,neg-edge"))
> + plat->clk_reg_msk |= SDMMC_CLKCR_NEGEDGE;
> + if (dev_read_bool(dev, "st,sig-dir"))
> + plat->pwr_reg_msk |= SDMMC_POWER_DIRPOL;
> + if (dev_read_bool(dev, "st,use-ckin"))
> + plat->clk_reg_msk |= SDMMC_CLKCR_SELCLKRX_CKIN;
> +
> + cfg->f_min = 40;
> + cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
> + cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
> + cfg->name = "STM32 SD/MMC";
> + cfg->host_caps = 0;
> + cfg->f_max = 5200;
> + ret = mmc_of_parse(dev, cfg);
> + if (ret)
> + return ret;
> +
> + ret = clk_get_by_index(dev, 0, >clk);
> + if (ret)
> + return ret;
> +
> + ret = reset_get_by_index(dev, 0, >reset_ctl);
> + if (ret)
> + dev_dbg(dev, "No reset provided\n");
> +
> + gpio_request_by_name(dev, "cd-gpios", 0, >cd_gpio,
> +  GPIOD_IS_IN);
> +
> + return 0;
> +}
> +
>  static int stm32_sdmmc2_probe_level_translator(struct udevice *dev)
>  {
>   struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
> @@ -653,12 +694,6 @@ static int stm32_sdmmc2_probe_level_translator(struct 
> udevice *dev)
>   struct gpio_desc ckin_gpio;
>   int clk_hi, clk_lo, ret;
>  
> - /*
> -  * Assume the level translator is present if st,use-ckin is set.
> -  * This is to cater for DTs which do not implement this test.
> -  */
> - plat->clk_reg_msk |= SDMMC_CLKCR_SELCLKRX_CKIN;
> -
>   ret = gpio_request_by_name(dev, "st,cmd-gpios", 0, _gpio,
>  GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
>   if (ret)
> @@ -709,54 +744,23 @@ static int stm32_sdmmc2_probe(struct udevice *dev)
>  {
>   struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
>   struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
> - struct mmc_config *cfg = >cfg;
>   int ret;
>  
> - plat->base = dev_read_addr(dev);
> - if (plat->base == FDT_ADDR_T_NONE)
> - return -EINVAL;
> -
> - if (dev_read_bool(dev, "st,neg-edge"))
> - plat->clk_reg_msk |= SDMMC_CLKCR_NEGEDGE;
> - if (dev_read_bool(dev, "st,sig-dir"))
> - plat->pwr_reg_msk |= SDMMC_POWER_DIRPOL;
> - if (dev_read_bool(dev, "st,use-ckin"))
> - stm32_sdmmc2_probe_level_translator(dev);
> -
> - ret = clk_get_by_index(dev, 0, >clk);
> - if (ret)
> - return ret;
> -
>   ret = clk_enable(>clk);
> - if (ret)
> - goto clk_free;
> -
> - ret = reset_get_by_index(dev, 0, >reset_ctl);
> - if (ret)
> - dev_dbg(dev, "No reset provided\n");
> -
> - gpio_request_by_name(dev, "cd-gpios", 0, >cd_gpio,
> -  GPIOD_IS_IN);
> -
> - cfg->f_min = 40;
> - cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
> - cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
> - cfg->name = "STM32 SD/MMC";
> -
> - cfg->host_caps = 0;
> - cfg->f_max = 5200;
> - mmc_of_parse(dev, cfg);
> + if (ret) {
> + clk_free(>clk);
> + return ret;
> + }
>  
>   upriv->mmc = >mmc;
>  
> + if (plat->clk_reg_msk & SDMMC_CLKCR_SELCLKRX_CKIN)
> + stm32_sdmmc2_probe_level_translator(dev);
> +
>   /* SDMMC init */
>   stm32_sdmmc2_reset(plat);
> - return 0;
> -
> -clk_free:
> - clk_free(>clk);
>  
> - return ret;
> + return 0;
>  }
>  
>  static int stm32_sdmmc2_bind(struct udevice *dev)
> @@ -778,5 +782,6 @@ U_BOOT_DRIVER(stm32_sdmmc2) = {
>   .ops = _sdmmc2_ops,
>   .probe = stm32_sdmmc2_probe,
>   .bind = stm32_sdmmc2_bind,
> + .of_to_plat = stm32_sdmmc2_of_to_plat,
>   .plat_auto  = sizeof(struct stm32_sdmmc2_plat),
>  };
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 2/3] mmc: stm32_sdmmc2: remove privdata

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:01, Patrick Delaunay wrote:
> All the elements of privdata are static and build from device tree,
> they are moved in platdata to prepare the support of ops
> of_to_plat.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  drivers/mmc/stm32_sdmmc2.c | 145 ++---
>  1 file changed, 70 insertions(+), 75 deletions(-)
> 
> diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
> index e3853b7fbfb..41f375b9d32 100644
> --- a/drivers/mmc/stm32_sdmmc2.c
> +++ b/drivers/mmc/stm32_sdmmc2.c
> @@ -30,9 +30,6 @@
>  struct stm32_sdmmc2_plat {
>   struct mmc_config cfg;
>   struct mmc mmc;
> -};
> -
> -struct stm32_sdmmc2_priv {
>   fdt_addr_t base;
>   struct clk clk;
>   struct reset_ctl reset_ctl;
> @@ -208,7 +205,7 @@ static void stm32_sdmmc2_start_data(struct udevice *dev,
>   struct mmc_data *data,
>   struct stm32_sdmmc2_ctx *ctx)
>  {
> - struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
> + struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
>   u32 data_ctrl, idmabase0;
>  
>   /* Configure the SDMMC DPSM (Data Path State Machine) */
> @@ -224,10 +221,10 @@ static void stm32_sdmmc2_start_data(struct udevice *dev,
>   }
>  
>   /* Set the SDMMC DataLength value */
> - writel(ctx->data_length, priv->base + SDMMC_DLEN);
> + writel(ctx->data_length, plat->base + SDMMC_DLEN);
>  
>   /* Write to SDMMC DCTRL */
> - writel(data_ctrl, priv->base + SDMMC_DCTRL);
> + writel(data_ctrl, plat->base + SDMMC_DCTRL);
>  
>   /* Cache align */
>   ctx->cache_start = rounddown(idmabase0, ARCH_DMA_MINALIGN);
> @@ -242,19 +239,19 @@ static void stm32_sdmmc2_start_data(struct udevice *dev,
>   flush_dcache_range(ctx->cache_start, ctx->cache_end);
>  
>   /* Enable internal DMA */
> - writel(idmabase0, priv->base + SDMMC_IDMABASE0);
> - writel(SDMMC_IDMACTRL_IDMAEN, priv->base + SDMMC_IDMACTRL);
> + writel(idmabase0, plat->base + SDMMC_IDMABASE0);
> + writel(SDMMC_IDMACTRL_IDMAEN, plat->base + SDMMC_IDMACTRL);
>  }
>  
>  static void stm32_sdmmc2_start_cmd(struct udevice *dev,
>  struct mmc_cmd *cmd, u32 cmd_param,
>  struct stm32_sdmmc2_ctx *ctx)
>  {
> - struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
> + struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
>   u32 timeout = 0;
>  
> - if (readl(priv->base + SDMMC_CMD) & SDMMC_CMD_CPSMEN)
> - writel(0, priv->base + SDMMC_CMD);
> + if (readl(plat->base + SDMMC_CMD) & SDMMC_CMD_CPSMEN)
> + writel(0, plat->base + SDMMC_CMD);
>  
>   cmd_param |= cmd->cmdidx | SDMMC_CMD_CPSMEN;
>   if (cmd->resp_type & MMC_RSP_PRESENT) {
> @@ -277,30 +274,30 @@ static void stm32_sdmmc2_start_cmd(struct udevice *dev,
>   if (ctx->data_length) {
>   timeout = SDMMC_CMD_TIMEOUT;
>   } else {
> - writel(0, priv->base + SDMMC_DCTRL);
> + writel(0, plat->base + SDMMC_DCTRL);
>  
>   if (cmd->resp_type & MMC_RSP_BUSY)
>   timeout = SDMMC_CMD_TIMEOUT;
>   }
>  
>   /* Set the SDMMC Data TimeOut value */
> - writel(timeout, priv->base + SDMMC_DTIMER);
> + writel(timeout, plat->base + SDMMC_DTIMER);
>  
>   /* Clear flags */
> - writel(SDMMC_ICR_STATIC_FLAGS, priv->base + SDMMC_ICR);
> + writel(SDMMC_ICR_STATIC_FLAGS, plat->base + SDMMC_ICR);
>  
>   /* Set SDMMC argument value */
> - writel(cmd->cmdarg, priv->base + SDMMC_ARG);
> + writel(cmd->cmdarg, plat->base + SDMMC_ARG);
>  
>   /* Set SDMMC command parameters */
> - writel(cmd_param, priv->base + SDMMC_CMD);
> + writel(cmd_param, plat->base + SDMMC_CMD);
>  }
>  
>  static int stm32_sdmmc2_end_cmd(struct udevice *dev,
>   struct mmc_cmd *cmd,
>   struct stm32_sdmmc2_ctx *ctx)
>  {
> - struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
> + struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
>   u32 mask = SDMMC_STA_CTIMEOUT;
>   u32 status;
>   int ret;
> @@ -314,7 +311,7 @@ static int stm32_sdmmc2_end_cmd(struct udevice *dev,
>   }
>  
>   /* Polling status register */
> - ret = readl_poll_timeout(priv->base + SDMMC_STA, status, status & mask,
> + ret = readl_poll_timeout(plat->base + SDMMC_STA, status, status & mask,
>1);
>  
>   if (ret < 0) {
> @@ -339,11 +336,11 @@ static int stm32_sdmmc2_end_cmd(struct udevice *dev,
>   }
>  
>   if (status & SDMMC_STA_CMDREND && cmd->resp_type & MMC_RSP_PRESENT) {
> - cmd->response[0] = readl(priv->base + SDMMC_RESP1);
> + cmd->response[0] = readl(plat->base + SDMMC_RESP1);
>   if (cmd->resp_type & MMC_RSP_136) {
> - 

Re: [PATCH v2 1/6] patman: Fix updating argument defaults from settings

[Simon Glass]

Hi Doug,

On Wed, 6 Jul 2022 at 18:08, Doug Anderson  wrote:
>
> Hi,
>
> On Tue, Jul 5, 2022 at 11:16 AM Sean Anderson  wrote:
> >
> > Hi Doug,
> >
> > On 7/1/22 4:23 PM, Douglas Anderson wrote:
> > > Ever since commit 4600767d294d ("patman: Refactor how the default
> > > subcommand works"), when I use patman on the Linux tree I get grumbles
> > > about unknown tags. This is because the Linux default making
> > > process_tags be False wasn't working anymore.
> > >
> > > It appears that the comment claiming that the defaults propagates
> > > through all subparsers no longer works for some reason.
> > >
> > > We're already looking at all the subparsers anyway. Let's just update
> > > each one.
> > >
> > > Fixes: 4600767d294d ("patman: Refactor how the default subcommand works")
> > > Signed-off-by: Douglas Anderson 
> > > Tested-by: Brian Norris 
> > > Reviewed-by: Brian Norris 
> > > ---
> > >
> > > (no changes since v1)
> > >
> > >  tools/patman/settings.py | 41 +---
> > >  1 file changed, 22 insertions(+), 19 deletions(-)
> > >
> > > diff --git a/tools/patman/settings.py b/tools/patman/settings.py
> > > index 7c2b5c196c06..5eefe3d1f55e 100644
> > > --- a/tools/patman/settings.py
> > > +++ b/tools/patman/settings.py
> > > @@ -244,28 +244,31 @@ def _UpdateDefaults(main_parser, config):
> > >if isinstance(action, argparse._SubParsersAction)
> > >for _, subparser in action.choices.items()]
> > >
> > > +unknown_settings = set(name for name, val in 
> > > config.items('settings'))
> > > +
> > >  # Collect the defaults from each parser
> > > -defaults = {}
> > >  for parser in parsers:
> > >  pdefs = parser.parse_known_args()[0]
> > > -defaults.update(vars(pdefs))
> > > -
> > > -# Go through the settings and collect defaults
> > > -for name, val in config.items('settings'):
> > > -if name in defaults:
> > > -default_val = defaults[name]
> > > -if isinstance(default_val, bool):
> > > -val = config.getboolean('settings', name)
> > > -elif isinstance(default_val, int):
> > > -val = config.getint('settings', name)
> > > -elif isinstance(default_val, str):
> > > -val = config.get('settings', name)
> > > -defaults[name] = val
> > > -else:
> > > -print("WARNING: Unknown setting %s" % name)
> > > -
> > > -# Set all the defaults (this propagates through all subparsers)
> > > -main_parser.set_defaults(**defaults)
> > > +defaults = dict(vars(pdefs))
> > > +
> > > +# Go through the settings and collect defaults
> > > +for name, val in config.items('settings'):
> > > +if name in defaults:
> > > +default_val = defaults[name]
> > > +if isinstance(default_val, bool):
> > > +val = config.getboolean('settings', name)
> > > +elif isinstance(default_val, int):
> > > +val = config.getint('settings', name)
> > > +elif isinstance(default_val, str):
> > > +val = config.get('settings', name)
> > > +defaults[name] = val
> > > +unknown_settings.discard(name)
> > > +
> > > +# Set all the defaults
> > > +parser.set_defaults(**defaults)
> > > +
> > > +for name in sorted(unknown_settings):
> > > +print("WARNING: Unknown setting %s" % name)
> >
> > Can you see if 4780f7d8a6b ("patman: Fix defaults not propagating to
> > subparsers") [1] addresses this problem? The implementation is different,
> > but I believe these should have the same effect.
>
> To my mind the logic of your patch is a bit harder to follow, but I
> believe you're correct that it accomplishes the same thing. ...and my
> quick test also seems to confirm that yours works fine. Too bad it
> wasn't already in "-next" or it would have saved me a bit of time...

+Tom Rini

It's been languishing for two months due to me taking a break. The PR
itself was sent a week ago but is waiting on one discussion.

>
> I'm curious whether you agree that the logic in my patch is a little
> simpler. Should I re-post it as a squashed revert of yours and then
> apply mine and call it a "simplify" instead of a bugfix? ...or just
> leave yours alone? If we leave yours alone, I guess my patch #2 needs
> a trivial rebase to fix a merge conflict.
>

Regards,
Simon

Re: [PATCH v2 1/3] mmc: stm32_sdmmc2: cosmetic: rename stm32_sdmmc_bind

[Patrice CHOTARD]

Hi Patrick

On 6/30/22 10:01, Patrick Delaunay wrote:
> Rename stm32_sdmmc_bind to stm32_sdmmc2_bind as all other functions
> in SDMMCv2 driver
> 
> series-changes: 2
> - fix typo in commit message (/oter function/other functions/)
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> (no changes since v1)
> 
>  drivers/mmc/stm32_sdmmc2.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
> index 81b07609a91..e3853b7fbfb 100644
> --- a/drivers/mmc/stm32_sdmmc2.c
> +++ b/drivers/mmc/stm32_sdmmc2.c
> @@ -763,7 +763,7 @@ clk_free:
>   return ret;
>  }
>  
> -static int stm32_sdmmc_bind(struct udevice *dev)
> +static int stm32_sdmmc2_bind(struct udevice *dev)
>  {
>   struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
>  
> @@ -781,7 +781,7 @@ U_BOOT_DRIVER(stm32_sdmmc2) = {
>   .of_match = stm32_sdmmc2_ids,
>   .ops = _sdmmc2_ops,
>   .probe = stm32_sdmmc2_probe,
> - .bind = stm32_sdmmc_bind,
> + .bind = stm32_sdmmc2_bind,
>   .priv_auto  = sizeof(struct stm32_sdmmc2_priv),
>   .plat_auto  = sizeof(struct stm32_sdmmc2_plat),
>  };
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH] board: stm32mp1: remove test on CONFIG_DM_REGULATOR

[Patrice CHOTARD]

Hi Patrick

On 6/20/22 12:36, Patrick Delaunay wrote:
> The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can
> now be removed, they are no more needed since the commit 16cc5ad0b439
> ("power: regulator: add dummy helper").
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
>  board/st/stm32mp1/stm32mp1.c | 8 ++--
>  1 file changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> index 9496890d164..8c162b42a59 100644
> --- a/board/st/stm32mp1/stm32mp1.c
> +++ b/board/st/stm32mp1/stm32mp1.c
> @@ -494,7 +494,7 @@ static void sysconf_init(void)
>   ret = uclass_get_device_by_driver(UCLASS_PMIC,
> DM_DRIVER_GET(stm32mp_pwr_pmic),
> _dev);
> - if (!ret && IS_ENABLED(CONFIG_DM_REGULATOR)) {
> + if (!ret) {
>   ret = uclass_get_device_by_driver(UCLASS_MISC,
> DM_DRIVER_GET(stm32mp_bsec),
> );
> @@ -555,9 +555,6 @@ static int board_stm32mp15x_dk2_init(void)
>   struct gpio_desc hdmi, audio;
>   int ret = 0;
>  
> - if (!IS_ENABLED(CONFIG_DM_REGULATOR))
> - return -ENODEV;
> -
>   /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
>   node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
>   if (!ofnode_valid(node)) {
> @@ -658,8 +655,7 @@ int board_init(void)
>   if (board_is_stm32mp15x_dk2())
>   board_stm32mp15x_dk2_init();
>  
> - if (IS_ENABLED(CONFIG_DM_REGULATOR))
> - regulators_enable_boot_on(_DEBUG);
> + regulators_enable_boot_on(_DEBUG);
>  
>   /*
>* sysconf initialisation done only when U-Boot is running in secure


Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH] stm32mp: simplify the STM32MP15x package parsing code

[Patrice CHOTARD]

Hi Patrick

On 6/20/22 09:50, Patrick Delaunay wrote:
> Simplify the package parsing code for STM32MP15X as package can be
> affected with get_cpu_package() result.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
>  arch/arm/mach-stm32mp/stm32mp15x.c | 15 +++
>  1 file changed, 3 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/mach-stm32mp/stm32mp15x.c 
> b/arch/arm/mach-stm32mp/stm32mp15x.c
> index a093e6163e6..660c907a6ba 100644
> --- a/arch/arm/mach-stm32mp/stm32mp15x.c
> +++ b/arch/arm/mach-stm32mp/stm32mp15x.c
> @@ -274,7 +274,6 @@ static void get_cpu_string_offsets(unsigned int *type, 
> unsigned int *pkg,
>   u32 cpu_type = get_cpu_type();
>   u32 ct = cpu_type & ~(BIT(7) | BIT(0));
>   u32 cm = ((cpu_type & BIT(7)) >> 6) | (cpu_type & BIT(0));
> - u32 cp = get_cpu_package();
>  
>   /* Bits 0 and 7 are the ACDF, 00:C 01:A 10:F 11:D */
>   switch (ct) {
> @@ -293,17 +292,9 @@ static void get_cpu_string_offsets(unsigned int *type, 
> unsigned int *pkg,
>   }
>  
>   /* Package */
> - switch (cp) {
> - case STM32MP15_PKG_AA_LBGA448:
> - case STM32MP15_PKG_AB_LBGA354:
> - case STM32MP15_PKG_AC_TFBGA361:
> - case STM32MP15_PKG_AD_TFBGA257:
> - *pkg = cp;
> - break;
> - default:
> - *pkg = 0;
> - break;
> - }
> + *pkg = get_cpu_package();
> + if (*pkg > STM32MP15_PKG_AA_LBGA448)
> + *pkg = STM32MP15_PKG_UNKNOWN;
>  
>   /* Revision */
>   switch (get_cpu_rev()) {
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v8 2/4] mtd: spi-nor-core: Adding different type of command extension in Soft Reset

[liao jaime]

Hi Jagan

>
> On Mon, Jul 4, 2022 at 11:42 AM JaimeLiao  wrote:
> >
> > Power-on-Reset is a method to restore flash back to 1S-1S-1S mode from 
> > 8D-8D-8D
> > in the begging of probe.
> >
> > Command extension type is not standardized across flash vendors in DTR mode.
> >
> > For suiting different vendor flash devices, adding a flag to seperate types 
> > for
> > soft reset on boot.
> >
> > Signed-off-by: JaimeLiao 
> > ---
> >  drivers/mtd/spi/Kconfig| 7 +++
> >  drivers/mtd/spi/spi-nor-core.c | 7 ++-
> >  2 files changed, 13 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
> > index f350c7e5dc..5bb1baa019 100644
> > --- a/drivers/mtd/spi/Kconfig
> > +++ b/drivers/mtd/spi/Kconfig
> > @@ -97,6 +97,13 @@ config SPI_FLASH_SMART_HWCAPS
> >  can support a type of operation in a much more refined way compared
> >  to using flags like SPI_RX_DUAL, SPI_TX_QUAD, etc.
> >
> > +config SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT
> > +   bool "Command extension type is INVERT for Software Reset on boot"
> > +   default n
> > +   help
> > +Because of SFDP information can not be get before boot.
> > +So define command extension type is INVERT when Software Reset on 
> > boot only.
> > +
> >  config SPI_FLASH_SOFT_RESET
> > bool "Software Reset support for SPI NOR flashes"
> > help
> > diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
> > index 5d319e4c0f..50460feaf8 100644
> > --- a/drivers/mtd/spi/spi-nor-core.c
> > +++ b/drivers/mtd/spi/spi-nor-core.c
> > @@ -3697,7 +3697,12 @@ static int spi_nor_soft_reset(struct spi_nor *nor)
> > enum spi_nor_cmd_ext ext;
> >
> > ext = nor->cmd_ext_type;
> > -   nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
> > +   if (nor->cmd_ext_type == SPI_NOR_EXT_NONE) {
> > +   nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;
> > +#if CONFIG_IS_ENABLED(SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT)
> > +   nor->cmd_ext_type = SPI_NOR_EXT_INVERT;
>
> Better check those parts whose extension is not standard instead of CONFIG.
spi_nor_soft_reset will be execute before read ID and read SFDP so
that I think we are hard
to get information from flash device.
>
> Jagan.

Thanks
Jaime

Re: [PATCH 2/2] ARM: dts: stm32mp13: add SCMI nodes

[Patrice CHOTARD]

Hi Patrick

On 7/6/22 18:20, Patrick Delaunay wrote:
> Add the node for SCMI firmware with the associated reserved memory nodes
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
>  arch/arm/dts/stm32mp13-u-boot.dtsi | 20 +++
>  arch/arm/dts/stm32mp131.dtsi   | 31 ++
>  2 files changed, 51 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi 
> b/arch/arm/dts/stm32mp13-u-boot.dtsi
> index adc7e67ee58..01552adb7c4 100644
> --- a/arch/arm/dts/stm32mp13-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi
> @@ -90,6 +90,26 @@
>   u-boot,dm-pre-reloc;
>  };
>  
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> +_clk {
> + u-boot,dm-pre-reloc;
> +};
> +
> +_reset {
> + u-boot,dm-pre-reloc;
> +};
> +
> +_shm {
> + u-boot,dm-pre-reloc;
> +};
> +
> +_sram {
> + u-boot,dm-pre-reloc;
> +};
> +
>   {
>   u-boot,dm-pre-reloc;
>  };
> diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
> index 652743fd06e..8f7af65e3ed 100644
> --- a/arch/arm/dts/stm32mp131.dtsi
> +++ b/arch/arm/dts/stm32mp131.dtsi
> @@ -27,11 +27,42 @@
>   interrupt-parent = <>;
>   };
>  
> + scmi_sram: sram@2000 {
> + compatible = "mmio-sram";
> + reg = <0x2000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x2000 0x1000>;
> +
> + scmi_shm: scmi_shm@0 {
> + compatible = "arm,scmi-shmem";
> + reg = <0 0x80>;
> + };
> + };
> +
>   firmware {
>   optee: optee {
>   method = "smc";
>   compatible = "linaro,optee-tz";
>   };
> +
> + scmi: scmi {
> + compatible = "linaro,scmi-optee";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + linaro,optee-channel-id = <0>;
> + shmem = <_shm>;
> +
> + scmi_clk: protocol@14 {
> + reg = <0x14>;
> + #clock-cells = <1>;
> + };
> +
> + scmi_reset: protocol@16 {
> + reg = <0x16>;
> + #reset-cells = <1>;
> + };
> + };
>   };
>  
>   clocks {
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH 1/2] ARM: dts: stm32mp13: add OP-TEE nodes

[Patrice CHOTARD]

Hi Patrick

On 7/6/22 18:20, Patrick Delaunay wrote:
> Add the node for OP-TEE firmware with the associated reserved memory nodes
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
>  arch/arm/dts/stm32mp13-u-boot.dtsi |  4 
>  arch/arm/dts/stm32mp131.dtsi   |  7 +++
>  arch/arm/dts/stm32mp135f-dk.dts| 11 +++
>  3 files changed, 22 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi 
> b/arch/arm/dts/stm32mp13-u-boot.dtsi
> index 1b5b3586905..adc7e67ee58 100644
> --- a/arch/arm/dts/stm32mp13-u-boot.dtsi
> +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi
> @@ -82,6 +82,10 @@
>   u-boot,dm-pre-reloc;
>  };
>  
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
>   {
>   u-boot,dm-pre-reloc;
>  };
> diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
> index 950e172e455..652743fd06e 100644
> --- a/arch/arm/dts/stm32mp131.dtsi
> +++ b/arch/arm/dts/stm32mp131.dtsi
> @@ -27,6 +27,13 @@
>   interrupt-parent = <>;
>   };
>  
> + firmware {
> + optee: optee {
> + method = "smc";
> + compatible = "linaro,optee-tz";
> + };
> + };
> +
>   clocks {
>   clk_axi: clk-axi {
>   #clock-cells = <0>;
> diff --git a/arch/arm/dts/stm32mp135f-dk.dts b/arch/arm/dts/stm32mp135f-dk.dts
> index ee100d108ea..31c510f976a 100644
> --- a/arch/arm/dts/stm32mp135f-dk.dts
> +++ b/arch/arm/dts/stm32mp135f-dk.dts
> @@ -23,6 +23,17 @@
>   reg = <0xc000 0x2000>;
>   };
>  
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + optee@de00 {
> + reg = <0xde00 0x200>;
> + no-map;
> + };
> + };
> +
>   vdd_sd: vdd-sd {
>   compatible = "regulator-fixed";
>   regulator-name = "vdd_sd";

Reviewed-by: Patrice Chotard 

Thanks
Patrice