Hi Tom,
On 20/03/24 4:10 am, Tom Rini wrote:
> On Wed, Feb 28, 2024 at 05:36:45PM +0530, MD Danish Anwar wrote:
>
>> Add APIs to set a firmware_name to a rproc and boot the rproc with the
>> same firmware.
>>
>> Clients can call rproc_set_firmware() API to set firmware_name for a rproc
>>
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> When using OF_LIVE, the debug UART driver won't be probed if it's a
> subnode of the geni-se-qup controller. Add a NOP driver for the
> controller to correctly discover its child nodes.
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> The .direction_input and .direction_output ops are deprecated, and don't
> seem to behave properly for us. Implement our own .set_flags op to
> handle this correctly.
>
> Signed-off-by: Caleb Connolly
> ---
> drivers/gpio/msm_gpio.c | 27
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> Most devices only initialise the USB clocks for us if we boot via
> "fastboot boot", add the missing clock configuration to get both USB
> ports working regardless of the bootloader state.
>
> Signed-off-by: Caleb Connolly
> ---
>
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> Define the GDSC power domains for SDM845.
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
> drivers/clk/qcom/clock-sdm845.c | 18 ++
> 1 file changed, 18 insertions(+)
>
Reviewed-by: Sumit Garg
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> The RCG registers always have the same offsets, so only store the base
> CMD register address and calculate the others relative to that.
>
> Signed-off-by: Caleb Connolly
> ---
> drivers/clk/qcom/clock-apq8016.c | 39 +
>
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> Enable support for the DWC3 USB controller and required dependencies for
> Qualcomm boards, specifically the DB845c:
> * IOMMU / SMMU
> * USB high-speed PHYs
> * Mass storage and ACM gadgets
>
> Signed-off-by: Caleb Connolly
> ---
>
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> From: Bhupesh Sharma
>
> Some Qualcomm SoCs newer than SDM845 feature a so-called "7nm phy"
> driver, notable the SM8250 SoC which will gain U-Boot support in
> upcoming patches.
>
> Introduce a driver based on the Linux driver.
>
>
On Tue, Mar 19, 2024 at 03:53:24PM +0100, Neil Armstrong wrote:
> While meson_sm_read_efuse() doesn't overflow, the string is not
> zero terminated and env_set() will buffer overflow and add random
> characters to environment.
>
In the Linux kernel we would give this a CVE because it's
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> Some devices like the UART and clock controller reference an RPM(h)
> power domain. We don't support this device in U-Boot, so add
> DM_FLAG_DEFAULT_PD_CTRL_OFF to tell DM core not to try and enable the
> power domain.
>
> Signed-off-by:
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> From: Bhupesh Sharma
>
> The Snapdragon 845 and several other Qualcomm SoCs feature this
> USB high-speed phy. Add a driver for it based on the Linux driver, with
> support for the SDM845, and the QCM2290 and SM6115 SoCs which will gain
>
| 123 -
> .../reset/amlogic,meson-g12a-audio-reset.h | 53 -
> .../dt-bindings/reset/amlogic,meson-g12a-reset.h | 137 --
> .../dt-bindings/reset/amlogic,meson-gxbb-reset.h | 161 --
> include/dt-bindings/sound/meson-aiu.h | 18 -
> include/dt-bindings/sound/meson-g12a-toacodec.h| 10 -
> include/dt-bindings/sound/meson-g12a-tohdmitx.h| 13 -
> 116 files changed, 42 insertions(+), 21511 deletions(-)
Glad to see these diff stats, FWIW:
Reviewed-by: Sumit Garg
-Sumit
> ---
> base-commit: b145877c22b391a4872c875145a8f86f6ffebaba
> change-id: 20240319-u-boot-of-upstream-46454fded5ea
>
> Best regards,
> --
> Neil Armstrong
>
On Tue, 19 Mar 2024 at 20:15, Caleb Connolly wrote:
>
> Hi Sumit,
>
> On 19/03/2024 13:49, Sumit Garg wrote:
> > Hi Caleb,
> >
> > On Tue, 19 Mar 2024 at 17:52, Caleb Connolly
> > wrote:
> >>
> >> We don't support USB super-speed in U-Boot yet, we lack the SS PHY
> >> drivers, however from my
LDR format files are used primarily by Analog Devices processors but may
be of interest to other vendors. Previously support existed for this
format as part of the U-Boot build, but it has been unmaintained and
unused for a long time. In preparation for adding support for modern ADI
processors
On Tue, Mar 19, 2024 at 09:09:22PM -0400, Greg Malysa wrote:
> LDR format files are used primarily by Analog Devices processors but may
> be of interest to other vendors. Previously support existed for this
> format as part of the U-Boot build, but it has been unmaintained and
> unused for a long
LDR format files are used primarily by Analog Devices processors but may
be of interest to other vendors. Previously support existed for this
format as part of the U-Boot build, but it has been unmaintained and
unused for a long time. In preparation for adding support for modern ADI
processors
On Wed, Feb 28, 2024 at 05:36:45PM +0530, MD Danish Anwar wrote:
> Add APIs to set a firmware_name to a rproc and boot the rproc with the
> same firmware.
>
> Clients can call rproc_set_firmware() API to set firmware_name for a rproc
> whereas rproc_boot() will load the firmware set by
I reworked the commit message because I noticed the upstream Linux kernel has a
difference with the Raspberry Pi fork of the kernel regarding the algorithm
used to determine the MAC address of the smsc95xx.
There is no smsc95xx.macaddr in the upstream kernel, and using the upstream
kernel is
Raspberry Pi B models before model 4 don't have an EEPROM nor an OTP to
store the permanent factory MAC address of the NIC.
So the firmware that runs initially computes the factory MAC address of
the board and patches the DTB to give that information to the next
stage.
The MAC is put in the
On Sun, Mar 17, 2024 at 10:24:13AM +0100, Heinrich Schuchardt wrote:
> On 3/16/24 22:50, Janne Grunau via B4 Relay wrote:
> > From: Andre Przywara
> >
> > UEFI relies entirely on unicode output, which actual fonts displayed on
> > the screen might not be ready for.
> >
> > Add a test displaying
Hi,
Volodymyr Babchuk writes:
> Caleb Connolly writes:
>
>> On 11/03/2024 18:23, Volodymyr Babchuk wrote:
>>> Hi Caleb,
>>> Caleb Connolly writes:
>>>
On 06/03/2024 21:24, Volodymyr Babchuk wrote:
>
> Hi Caleb,
>
> Caleb Connolly writes:
>
> [...]
>
On Mon, Mar 18, 2024 at 03:17:33PM +0100, Marek Vasut wrote:
> On 3/18/24 8:33 AM, Janne Grunau wrote:
>
> > +static int usb_blocklist_parse_error(const char *blocklist, size_t pos)
> > +{
> > + printf("usb_blocklist parse error at char %zu in \"%s\"\n", pos,
> > +
Thanks, Sumit!
On Tue, Mar 19, 2024 at 6:02 AM Adam Ford wrote:
>
> On Mon, Mar 18, 2024 at 10:03 AM Marek Vasut
> wrote:
> >
> > Copy dts/upstream/src/arm64/Makefile into dts/upstream/src/arm/Makefile
> > and create a commit. This makes 32bit ARM buildable with OF_UPSTREAM .
> >
> >
On Tue, Mar 19, 2024 at 04:05:31PM +0100, Francesco Dolcini wrote:
> Hello Tom,
>
> On Tue, Mar 19, 2024 at 11:04:27AM -0300, Joao Paulo Goncalves wrote:
> > From: Joao Paulo Goncalves
> >
> > The lowest speed grade of Toradex AM62 SoMs is K speed, resulting in a
> > max value of 800MHz for the
On Mon, Mar 18, 2024 at 09:14:53PM -0300, Fabio Estevam wrote:
> Hi Tom and Sean,
>
> On Fri, Mar 8, 2024 at 5:13 PM Fabio Estevam wrote:
> >
> > Since commit cc7df0b9e8bc ("serial: lpuart: Enable IPG clock")
> > the colibri-imx8qxp board no longer boots.
> >
> > The reason is that the imx8qxp
6
> -0400)
>
> are available in the Git repository at:
>
> https://source.denx.de/u-boot/custodians/u-boot-socfpga.git
> tags/u-boot-socfpga-next-20240319
>
> for you to fetch changes up to 386fca68960994ece0d9da8a69a14495b5f1aedf:
>
> arch: arm: Agilex5
Enable MMC_SPEED_MODE_SET config option in defconfig to enable
mmc rescan for various Sitara devices.
Signed-off-by: Judith Mendez
---
configs/am62px_evm_a53_defconfig | 1 +
configs/am62x_evm_a53_defconfig | 1 +
configs/am64x_evm_a53_defconfig | 1 +
configs/am65x_evm_a53_defconfig | 1 +
On Thu, Mar 7, 2024 at 6:04 PM Sam Protsenko wrote:
>
> Sometimes clocks provided to a consumer might not have .set_rate
> operation (like gate or mux clocks), but have CLK_SET_PARENT_RATE flag
> set. In that case it's usually possible to find a parent up the tree
> which is capable of setting
Hi Lukasz, Sean, Tom,
If there are no comments on this series, can you please apply it?
Thanks!
On Thu, Mar 7, 2024 at 8:18 PM Sam Protsenko wrote:
>
> This short series features a couple of Exynos850 clock driver fixes and
> adds new clocks needed for further eMMC and SD card enablement.
>
>
On Fri, Mar 8, 2024 at 8:01 PM Marek Vasut wrote:
>
> On 3/8/24 6:12 PM, Michał Barnaś wrote:
> > Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
> > This option allows to change the bitstream on the filesystem and apply
> > changes with warm reboot without the need for a
Set CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM as enabled in
chameleon v3 board's defconfig.
Signed-off-by: Michał Barnaś
---
Changes in v3:
- Update defconfig to use renamed Kconfig
configs/socfpga_chameleonv3_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
This option allows to change the bitstream on the filesystem and apply
changes with warm reboot without the need for a power cycle.
Signed-off-by: Michał Barnaś
---
Changes in v3:
- Rebase on current master branch
- Drop
By default, the board requires power cycle (cold boot) to program the
FPGA with bitstream. This change adds Kconfig that allows to enable
reprogramming the FPGA with every boot. This makes the update process
of the bitstream on the filesystem to be applied with simple system
reboot.
Changes in
Hi Quentin,
On 2024-03-19 11:19, Quentin Schulz wrote:
> Hi Jonas,
>
> On 3/15/24 18:34, Jonas Karlman wrote:
>> Rockchip BROM write a boot source id at CFG_IRAM_BASE + 0x10, the id
>> indicate from what storage media TPL/SPL was loaded from.
>>
>> SPL use this value to determine what device
With configs such as "am64x_evm_a53" or "imx8mp_venice" which list
multiple device trees to build we get a warning such as:
scripts/Makefile.spl:578: target 'spl/dts/freescale/' given more than once in
the same rule
If we sort this list first the warning goes away.
Signed-off-by: Tom Rini
---
Hi Sean
On 19.03.2024 19:15, Sean Anderson wrote:
Hi Maxim,
On 3/19/24 12:10, Maxim Moskalets wrote:
[You don't often get email from maximmo...@gmail.com. Learn why this is important at
Hi Maxim,
On 3/19/24 12:10, Maxim Moskalets wrote:
> [You don't often get email from maximmo...@gmail.com. Learn why this is
> important at
>
Some operating systems (e.g. seL4) and embedded applications are ELF
images. It is convenient to use FIT-images to implement trusted boot.
Added "elf" image type for booting using bootm command.
Signed-off-by: Maxim Moskalets
---
boot/bootm_os.c | 21 +
boot/image-fit.c |
On 2024-03-19 16:59, Jonas Karlman wrote:
On 2024-03-19 10:44, Dragan Simic wrote:
On 2024-03-15 18:34, Jonas Karlman wrote:
diff --git a/arch/arm/mach-rockchip/spl.c
b/arch/arm/mach-rockchip/spl.c
index 1586a093fc37..27e996b504e7 100644
--- a/arch/arm/mach-rockchip/spl.c
+++
Hi Dragan,
On 2024-03-19 10:44, Dragan Simic wrote:
> Hello Jonas,
>
> Please see a few comments below.
>
> On 2024-03-15 18:34, Jonas Karlman wrote:
>> Rockchip BROM write a boot source id at CFG_IRAM_BASE + 0x10, the id
>> indicate from what storage media TPL/SPL was loaded from.
>
>
Hello Tom,
On Tue, Mar 19, 2024 at 11:04:27AM -0300, Joao Paulo Goncalves wrote:
> From: Joao Paulo Goncalves
>
> The lowest speed grade of Toradex AM62 SoMs is K speed, resulting in a
> max value of 800MHz for the CPU operating frequency. A solution with
> runtime selection of the CPU
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
EFUSE_SN_SIZE);
+ serial[len] = '\0';
if (len == EFUSE_SN_SIZE)
env_set("serial#", serial);
}
---
base-commit: b145877c22b391a4872c875145a8f86f6ffebaba
change-id: 20240319-u-boot-fix-p200-serial-a017f57caf88
Best regards,
--
Neil Armstrong
Hi Sumit,
On 19/03/2024 13:49, Sumit Garg wrote:
> Hi Caleb,
>
> On Tue, 19 Mar 2024 at 17:52, Caleb Connolly
> wrote:
>>
>> We don't support USB super-speed in U-Boot yet, we lack the SS PHY
>> drivers, however from my testing even with a PHY driver there seem to be
>> other issues when
Enable OF_UPSTREAM to use upstream DT and add amlogic/ prefix to the
DEFAULT_DEVICE_TREE. And thereby directly build DTB from dts/upstream/src/
including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory.
Cc: Sumit Garg
Signed-off-by: Neil Armstrong
---
arch/arm/mach-meson/Kconfig
Enable OF_UPSTREAM to use upstream DT and add amlogic/ prefix to the
DEFAULT_DEVICE_TREE. And thereby directly build DTB from dts/upstream/src/
including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory.
Cc: Sumit Garg
Signed-off-by: Neil Armstrong
---
arch/arm/mach-meson/Kconfig
21511 deletions(-)
---
base-commit: b145877c22b391a4872c875145a8f86f6ffebaba
change-id: 20240319-u-boot-of-upstream-46454fded5ea
Best regards,
--
Neil Armstrong
On 3/19/24 9:39 AM, Wadim Egorov wrote:
Am 18.03.24 um 22:48 schrieb Marek Vasut:
On 3/18/24 6:16 PM, Mathieu Othacehe wrote:
Enable the `usb` command and some USB drivers.
Signed-off-by: Mathieu Othacehe
---
configs/imx93-phyboard-segin_defconfig | 8
1 file changed, 8
On 3/19/24 9:26 AM, Primoz Fiser wrote:
Hi Marek,
On 18. 03. 24 22:48, Marek Vasut wrote:
On 3/18/24 6:16 PM, Mathieu Othacehe wrote:
Enable both usbotg1 and usbotg2 ports.
Drop fullstop from $subject end.
Signed-off-by: Mathieu Othacehe
---
arch/arm/dts/imx93-phyboard-segin.dts | 13
From: Joao Paulo Goncalves
The lowest speed grade of Toradex AM62 SoMs is K speed, resulting in a
max value of 800MHz for the CPU operating frequency. A solution with
runtime selection of the CPU frequency is already planned to avoid these
kinds of problems in the future.
Fixes: 8fb8a6d49977
On Mon, Mar 18, 2024 at 04:44:48PM -0700, Benjamin Schneider wrote:
> Update existing armada-37xx DTS files with those in linux
> and add devicetree for ESPRESSObin Ultra device.
>
> Signed-off-by: Benjamin Schneider
Please depend on:
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> The USB VBUS supply for the type-A port is enabled via a GPIO regulator.
> This is incorrectly modelled in Linux where only the PCIe dependency is
> expressed.
Can we send a fix for the Linux kernel DTS to correctly model it? We
can then
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> We don't support the RPM(h)PD power domains in U-Boot, and we don't need
> to - the necessary resources are on, and we aren't going to enter any
> low power modes.
>
> We could try using a no-op device, but this requires adding a compatible
Hi Caleb,
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> We don't support USB super-speed in U-Boot yet, we lack the SS PHY
> drivers, however from my testing even with a PHY driver there seem to be
> other issues when talking to super-speed peripherals.
>
> In pursuit of maintaining
On Tue, 19 Mar 2024 at 17:52, Caleb Connolly wrote:
>
> Qualcomm FDTs are on the larger size, and with the addition of DT
> modifications during board_init() it makes sense to enable OF_LIVE
> globally. The cost of building the tree should be offset by the
> increased efficiency at which we can
Add a test for the button_cmd feature. This validates that commands can
be mapped to two buttons, that the correct command runs based on which
button is pressed, that only 1 command is run, and that no command runs
if button_cmd_0_name is wrong or unset.
Additionally, fix a potential
> +static void dwc3_qcom_glue_configure(struct udevice *dev, int index,
> + enum usb_dr_mode mode)
> +{
> + struct dwc3_glue_data *glue = dev_get_plat(dev);
> + void __iomem *qscratch_base = (void __iomem *)glue->regs;
CI is not happy with this, it fails
On Mon, Mar 18, 2024 at 10:03 AM Marek Vasut
wrote:
>
> Copy dts/upstream/src/arm64/Makefile into dts/upstream/src/arm/Makefile
> and create a commit. This makes 32bit ARM buildable with OF_UPSTREAM .
>
> Signed-off-by: Marek Vasut
Tested-by: Adam Ford #am3517-evm
> ---
> Cc: Adam Ford
> Cc:
Hello,
I have a question regarding the loading of boot.scr file by u-boot. I am
working on Raspberry pi-u-boot setup and would like to store multiple boot
scripts in the boot partition. For example, what happens when I have
multiple files like boot-rpi4.scr, boot-rpi3.scr in the boot partition?
Hi Fabio,
On Tue, Mar 19, 2024 at 09:13:12AM -0300, Fabio Estevam wrote:
> Hi Pierre,
>
> On Tue, Mar 19, 2024 at 8:39 AM Pierre-Clément Tosi wrote:
>
> > This means gd->arch.tlb_addr pointing to the live PTs during
> > setup_pgtables().
> >
> > In arch/arm/cpu/armv8, setup_all_pgtables()
On Mon, 11 Mar 2024 21:33:44 +, Volodymyr Babchuk wrote:
> Set of pre-req patches for Qualcomm SA8155P-ADP board support.
>
> This path series consist of generic qcom changes that may benefit
> different boards. It is the part of the bigger series that adds
> SA8155P-ADP support, but I am
Qualcomm FDTs are on the larger size, and with the addition of DT
modifications during board_init() it makes sense to enable OF_LIVE
globally. The cost of building the tree should be offset by the
increased efficiency at which we can walk it.
Some rough measurements with CONFIG_BOOTSTAGE suggests
Enable support for the DWC3 USB controller and required dependencies for
Qualcomm boards, specifically the DB845c:
* IOMMU / SMMU
* USB high-speed PHYs
* Mass storage and ACM gadgets
Signed-off-by: Caleb Connolly
---
configs/qcom_defconfig | 49 ++---
The USB VBUS supply for the type-A port is enabled via a GPIO regulator.
This is incorrectly modelled in Linux where only the PCIe dependency is
expressed. Add a U-Boot specific dtsi snippet so that this supply will
get enabled when initialising USB.
Signed-off-by: Caleb Connolly
---
We don't support the RPM(h)PD power domains in U-Boot, and we don't need
to - the necessary resources are on, and we aren't going to enter any
low power modes.
We could try using a no-op device, but this requires adding a compatible
for every platform, and just pollutes the driver model. So
We don't support USB super-speed in U-Boot yet, we lack the SS PHY
drivers, however from my testing even with a PHY driver there seem to be
other issues when talking to super-speed peripherals.
In pursuit of maintaining upstream DT compatibility, and simplifying
porting for new devices, let's
The .direction_input and .direction_output ops are deprecated, and don't
seem to behave properly for us. Implement our own .set_flags op to
handle this correctly.
Signed-off-by: Caleb Connolly
---
drivers/gpio/msm_gpio.c | 27 +--
1 file changed, 21 insertions(+), 6
When using OF_LIVE, the debug UART driver won't be probed if it's a
subnode of the geni-se-qup controller. Add a NOP driver for the
controller to correctly discover its child nodes.
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
drivers/serial/serial_msm_geni.c | 13
Most devices only initialise the USB clocks for us if we boot via
"fastboot boot", add the missing clock configuration to get both USB
ports working regardless of the bootloader state.
Signed-off-by: Caleb Connolly
---
drivers/clk/qcom/clock-sdm845.c | 25 +
1 file
Define the GDSC power domains for SDM845.
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
drivers/clk/qcom/clock-sdm845.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/clk/qcom/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c
index
The RCG registers always have the same offsets, so only store the base
CMD register address and calculate the others relative to that.
Signed-off-by: Caleb Connolly
---
drivers/clk/qcom/clock-apq8016.c | 39 +
drivers/clk/qcom/clock-apq8096.c | 28 +
Some devices like the UART and clock controller reference an RPM(h)
power domain. We don't support this device in U-Boot, so add
DM_FLAG_DEFAULT_PD_CTRL_OFF to tell DM core not to try and enable the
power domain.
Signed-off-by: Caleb Connolly
---
drivers/clk/qcom/clock-qcom.c| 2 ++
From: Bhupesh Sharma
Some Qualcomm SoCs newer than SDM845 feature a so-called "7nm phy"
driver, notable the SM8250 SoC which will gain U-Boot support in
upcoming patches.
Introduce a driver based on the Linux driver.
Signed-off-by: Bhupesh Sharma
[code cleanup, switch to clk/reset_bulk APIs]
Update Bhupesh's email to his new one.
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
Cc: Bhupesh Sharma
---
.mailmap | 1 +
1 file changed, 1 insertion(+)
diff --git a/.mailmap b/.mailmap
index d1f08f3eca8a..f6e0847b2168 100644
--- a/.mailmap
+++ b/.mailmap
@@ -29,8 +29,9 @@
From: Bhupesh Sharma
The Snapdragon 845 and several other Qualcomm SoCs feature this
USB high-speed phy. Add a driver for it based on the Linux driver, with
support for the SDM845, and the QCM2290 and SM6115 SoCs which will gain
support in U-Boot in future patches.
Signed-off-by: Bhupesh Sharma
wer domain support [2].
A feature branch based on qcom-next with the necessary dependencies
for testing the Dragonboard845c can be found at [3].
[1]:
https://lore.kernel.org/u-boot/20240319-b4-qcom-usb-v3-0-09ba1f86d...@linaro.org
[2]:
https://lore.kernel.org/u-boot/20240311213334.3567389-1-volo
The priv struct was wrong in dump_boot_mappings(). Causing errors when
compiling with -DDEBUG. Fix this.
Reviewed-by: Mattijs Korpershoek
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
drivers/iommu/qcom-hyp-smmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
UFS storage often uses a 4096-byte sector size, add support for dynamic
sector sizes based loosely on the Linux implementation.
Reviewed-by: Mattijs Korpershoek
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
cmd/usb_mass_storage.c | 4 --
To actually use the gadget the peripheral driver must be probed and we
must call g_dnl_clear_detach(). Otherwise acm_stdio_start() will always
fail to find a UDC on DT platforms.
Reviewed-by: Mattijs Korpershoek
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
This series enables support for Qualcomm platforms in the DWC3 driver,
adds support for arbitrary sector sizes to the USB mass storage gadget,
and fixes an issue with the CDC ACM driver where it wouldn't initialise
the USB device.
Additionally, it fixes a syntax bug in the Qualcomm SMMU driver,
The Qualcomm specific dwc3 wrapper isn't hugely complicated, implemented
the missing initialisation for host and gadget mode.
Reviewed-by: Mattijs Korpershoek
Reviewed-by: Marek Vasut
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
drivers/usb/dwc3/dwc3-generic.c | 81
DWC3 platforms depend on DM_USB_GADGET for gadget drivers to work,
otherwise compilation fails due to no implementation of
dm_usb_gadget_handle_interrupts().
Reviewed-by: Mattijs Korpershoek
Reviewed-by: Neil Armstrong
Signed-off-by: Caleb Connolly
---
drivers/usb/dwc3/Kconfig | 1 +
1 file
Hi Pierre,
On Tue, Mar 19, 2024 at 8:39 AM Pierre-Clément Tosi wrote:
> This means gd->arch.tlb_addr pointing to the live PTs during setup_pgtables().
>
> In arch/arm/cpu/armv8, setup_all_pgtables() runs with SCTLR_ELx.M unset.
>
> In arch/arm/cpu/armv8/fsl-layerscape, setup_pgtables() is
When a file is created in the linux and corresponding file permission
is set, if the file needs to be modified in uboot during the startup
process, the modified file permission will be reset to 755. Therefore,
when the ext4fs_write() function is called, if the file already exists,
the file
Hello! Ping.
On Wed, Mar 06, 2024 at 04:49:00PM +0300, Alexey Romanov wrote:
> Hello!
>
> This series adds support for the UBI block device, which
> allows to read/write data block by block. For example,
> it can now be used for BCB or Android AB command:
>
> $ bcb load ubi 0 part_name
>
>
Hello! Ping.
On Thu, Mar 07, 2024 at 04:07:23PM +0300, Alexey Romanov wrote:
> Hello!
>
> This series adds support for the mtdblock device, which
> allows to read/write data block by block. For example,
> it can now be used for BCB or Android AB command:
>
> $ bcb load mtd 0 part_name
>
>
Add the initial version of the device tree for the Ampere BMC
platform, which is equipped with the Aspeed AST2600 BMC SoC.
Signed-off-by: Chanh Nguyen
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/ast2600-ampere.dts | 113
2 files changed, 114
Hello everyone,
Am Mon, Mar 18, 2024 at 11:15:18AM + schrieb mihai.s...@microchip.com:
>
> > The command is very useful.
> > I would like to have also the ONFI timing mode printed for nand-flash
> >
>
> As far as I can see the
Hi Marc,
On Tue, Mar 19, 2024 at 09:43:03AM +, Marc Zyngier wrote:
> This seems pretty reasonable, thanks for looking into this. However, I
> can't help but notice that this is done without any BBM, and no TLBI
> either.
>
> Are we guaranteed that the updated page tables are not live at the
From: Manikanta Guntupalli
Add "rts-gpios" and "linux,rs485-enabled-at-boot-time" properties
to uartps node to support RS485 on KD240.
Signed-off-by: Manikanta Guntupalli
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sck-kd-g-revA.dtso | 2 ++
1 file changed, 2 insertions(+)
diff
Hello Quentin,
On 2024-03-19 11:19, Quentin Schulz wrote:
On 3/15/24 18:34, Jonas Karlman wrote:
Rockchip BROM write a boot source id at CFG_IRAM_BASE + 0x10, the id
indicate from what storage media TPL/SPL was loaded from.
SPL use this value to determine what device "same-as-spl" represent
On 3/19/24 03:44, Marek Vasut wrote:
> Define dfu_alt_info with SPI NOR layout to make it easy to
> install or update bootloader in the SPI NOR using dfu-util.
>
> Use the following U-Boot commands to start DFU mode:
> "
> => sf probe && dfu 0 mtd
> "
>
> Use the following dfu-util invocation
Hi Jonas,
On 3/15/24 18:34, Jonas Karlman wrote:
Rockchip BROM write a boot source id at CFG_IRAM_BASE + 0x10, the id
indicate from what storage media TPL/SPL was loaded from.
SPL use this value to determine what device "same-as-spl" represent when
determining from where FIT should be loaded.
Hello Jonas,
Please see a few comments below.
On 2024-03-15 18:34, Jonas Karlman wrote:
Rockchip BROM write a boot source id at CFG_IRAM_BASE + 0x10, the id
indicate from what storage media TPL/SPL was loaded from.
s/write/writes/
s/indicate/indicates/
There are also a few more similar
On Mon, 18 Mar 2024 19:35:49 +,
Pierre-Clément Tosi wrote:
>
> The implementation of map_range() creates the requested mapping by
> walking the page tables, iterating over multiple PTEs and/or descending
> into existing table mappings as needed. When doing so, it assumes any
> pre-existing
On 07.03.24 14:07, Alexey Romanov wrote:
> Bind SPI-NAND driver to MTD block driver.
>
> Signed-off-by: Alexey Romanov
Reviewed-by: Frieder Schrempf
> ---
> drivers/mtd/nand/spi/core.c | 20
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/mtd/nand/spi/core.c
On 2024/3/16 01:34, Jonas Karlman wrote:
Rockchip BROM write a boot source id at CFG_IRAM_BASE + 0x10, the id
indicate from what storage media TPL/SPL was loaded from.
SPL use this value to determine what device "same-as-spl" represent when
determining from where FIT should be loaded. This
Hi Łukasz,
On Mon, Feb 19, 2024 at 01:41:39PM +0100, Łukasz Stelmach wrote:
> The first time virtio_init() gets called from board_init() PCI isn't
> ready. Thus any virtio-over-PCI (e.g. network interfaces) devices can't
> be detected and used without additional `virtio scan` scan in the shell
>
Am 18.03.24 um 22:48 schrieb Marek Vasut:
On 3/18/24 6:16 PM, Mathieu Othacehe wrote:
Enable the `usb` command and some USB drivers.
Signed-off-by: Mathieu Othacehe
---
configs/imx93-phyboard-segin_defconfig | 8
1 file changed, 8 insertions(+)
diff --git
Hi Marek,
On 18. 03. 24 22:48, Marek Vasut wrote:
> On 3/18/24 6:16 PM, Mathieu Othacehe wrote:
>> Enable both usbotg1 and usbotg2 ports.
>
> Drop fullstop from $subject end.
>
>> Signed-off-by: Mathieu Othacehe
>> ---
>> arch/arm/dts/imx93-phyboard-segin.dts | 13 +
>> 1 file
Hi Mathieu,
On 18. 03. 24 18:16, Mathieu Othacehe wrote:
> Enable the `usb` command and some USB drivers.
>
I would rephrase commit msg to something like this:
Add USB support by enabling `usb` command and required USB drivers.
> Signed-off-by: Mathieu Othacehe
> ---
>
1 - 100 of 105 matches
Mail list logo
