date:20240321

Re: [PATCH v3 04/11] imx8mp: power-domain: Don't power off pd_bus

2024-03-21 Thread Sumit Garg

On Fri, 22 Mar 2024 at 00:47, Marek Vasut  wrote:
>
> On 3/21/24 6:46 AM, Sumit Garg wrote:
> > On Thu, 21 Mar 2024 at 11:06, Marek Vasut  wrote:
> >>
> >> On 3/15/24 11:41 AM, Sumit Garg wrote:
> >>> On Fri, 15 Mar 2024 at 14:53, Marek Vasut  wrote:
> 
>  On 3/15/24 6:31 AM, Sumit Garg wrote:
> > On Thu, 14 Mar 2024 at 09:45, Marek Vasut  wrote:
> >>
> >> On 3/12/24 8:03 AM, Sumit Garg wrote:
> >>> power_domain_on/off() isn't refcounted and power domain bus shouldn't 
> >>> be
> >>> turned off for a single peripheral domain as it would negatively 
> >>> affect
> >>> other peripheral domains. So lets just skip turning off bus power
> >>> domain.
> >>
> >> What exactly is the issue and how did you trigger it ?
> >>
> >> Details please.
> >
> > I suppose the issue can be triggered via the "=> usb start => usb
> > stop" sequence where one of the USB controllers is configured in
> > peripheral mode.
> 
>  'usb start ; usb stop' causes no problems on MX8MP , maybe the test case
>  is more extensive ?
> 
>  Please, write down the necessary steps to reproduce this problem, and
>  what happens when that problem occurs.
> >>>
> >>> After digging in more, it looks like dev_power_domain_off() is never
> >>> (U-Boot life-cycle) invoked for USB controller devices derived from
> >>> DT. So this USB power domain sequence is never reachable.
> >>
> >> The imx8mp_hsiomix_off() is never called on 'usb stop' command ?
> >>
> >
> > Yeah, that's the case.
> >
> >> But then why would the 'usb start ; usb stop' test break power domain
> >> state here ?
> >
> > It won't break with current implementation, earlier I made this
> > assumption that 'usb stop' turns down the power domain.
>
> So, maybe I am a little confused, what is this patch solving then ?
>

It isn't actually solving anything since there isn't a need for
refcount for PD bus since power domain off isn't exercised during the
lifecycle of U-Boot. Hence, I dropped it.

> >>> BTW, dev_power_domain_on() is invoked when USB controller devices are
> >>> added based on DT.
> >>
> >> I would expect imx8mp_hsiomix_off() to be called either on 'usb stop' or
> >> just before Linux boots .
> >>
> >> [...]
> >>
> >> Why not add counter into imx8mp_hsiomix_priv structure in this driver ?
> >
> > Sure I can do that but do you think the current approach can have any
> > side effects?
> 
>  Bus domain not getting cycled (which can leave it in some odd state),
>  and increased power consumption if the next stage doesn't turn the
>  domain off.
> >>>
> >>> Given above, would you like me to drop power domain off path entirely
> >>> here?
> >>
> >> Can the series go in without this patch ?
> >
> > Okay let me drop this patch.
>
> We can fix whatever it is that needs to be fixed in a smaller follow up
> series.

Sure, see below.

>
> >>> I think if people are concerned about power consumption then it
> >>> should be implemented properly in U-Boot to remove all the DT based
> >>> devices before passing on control to the next stage.
> >>
> >> I would expect imx8mp_hsiomix_off() to be called either on 'usb stop' or
> >> just before Linux boots (esp. at that point), so if you do not power off
> >> the bus domain before booting Linux, you may hand over a device which
> >> was not fully power cycled.
> >
> > Unfortunately that's the current situation I see. IMO, the better
> > solution would be to just remove all the DT devices before passing on
> > control to Linux. That should automatically power off devices.
>
> Doesn't CONFIG_DM_DEVICE_REMOVE=y do something like that already ?

I just did simple experiment via following diff:

diff --git a/drivers/power/domain/imx8mp-hsiomix.c
b/drivers/power/domain/imx8mp-hsiomix.c
index 6188a04c45e..0ddcd39923a 100644
--- a/drivers/power/domain/imx8mp-hsiomix.c
+++ b/drivers/power/domain/imx8mp-hsiomix.c
@@ -101,6 +101,7 @@ static int imx8mp_hsiomix_set(struct power_domain
*power_domain, bool power_on)
if (gpr_reg0_bits)
setbits_le32(priv->base + GPR_REG0, gpr_reg0_bits);
} else {
+   while(1);
if (gpr_reg0_bits)
clrbits_le32(priv->base + GPR_REG0, gpr_reg0_bits);

The boot doesn't hang suggesting that CONFIG_DM_DEVICE_REMOVE=y isn't
effective to remove any DT devices. It can for sure be another
followup series to make it effective.

-Sumit

Re: [PATCH v3 07/11] phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHY

2024-03-21 Thread Sumit Garg

On Fri, 22 Mar 2024 at 00:47, Marek Vasut  wrote:
>
> On 3/21/24 1:40 PM, Sumit Garg wrote:
> > On Thu, 14 Mar 2024 at 09:46, Marek Vasut  wrote:
> >>
> >> On 3/12/24 8:03 AM, Sumit Garg wrote:
> >>> Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
> >>> PHY initialization moved to this standalone PHY driver.
> >>>
> >>> Inspired from counterpart Linux kernel v6.8-rc3 driver:
> >>> drivers/phy/freescale/phy-fsl-imx8m-pcie.c. Use last Linux kernel driver
> >>> reference commit 7559e7572c03 ("phy: Explicitly include correct DT
> >>> includes").
> >>
> >> [...]
> >>
> >>> +static int imx8_pcie_phy_probe(struct udevice *dev)
> >>> +{
> >>> + struct imx8_pcie_phy *imx8_phy = dev_get_priv(dev);
> >>> + ofnode gpr;
> >>> + int ret = 0;
> >>> +
> >>> + imx8_phy->drvdata = (void *)dev_get_driver_data(dev);
> >>> + imx8_phy->base = dev_read_addr(dev);
> >>> + if (!imx8_phy->base)
> >>> + return -EINVAL;
> >>> +
> >>> + /* get PHY refclk pad mode */
> >>> + dev_read_u32(dev, "fsl,refclk-pad-mode", 
> >>> _phy->refclk_pad_mode);
> >>> +
> >>> + imx8_phy->tx_deemph_gen1 = dev_read_u32_default(dev,
> >>> + 
> >>> "fsl,tx-deemph-gen1",
> >>> + 0);
> >>> + imx8_phy->tx_deemph_gen2 = dev_read_u32_default(dev,
> >>> + 
> >>> "fsl,tx-deemph-gen2",
> >>> + 0);
> >>> + imx8_phy->clkreq_unused = dev_read_bool(dev, 
> >>> "fsl,clkreq-unsupported");
> >>> +
> >>> + /* Grab GPR config register range */
> >>> + gpr = ofnode_by_compatible(ofnode_null(), imx8_phy->drvdata->gpr);
> >>> + if (ofnode_equal(gpr, ofnode_null())) {
> >>> + dev_err(dev, "unable to find GPR node\n");
> >>> + return -ENODEV;
> >>> + }
> >>> +
> >>> + imx8_phy->iomuxc_gpr = syscon_node_to_regmap(gpr);
> >>> + if (IS_ERR(imx8_phy->iomuxc_gpr)) {
> >>> + dev_err(dev, "unable to find iomuxc registers\n");
> >>> + return PTR_ERR(imx8_phy->iomuxc_gpr);
> >>> + }
> >>
> >> syscon_regmap_lookup_by_compatible() should simplify these two steps ^ .
> >>
> >
> > After a close look, that API isn't supported by U-Boot yet. So I will
> > keep the existing implementation with your review tag. I hope that's
> > fine with you.
>
> Oh, uh, I had a local patch from previous round of PCIe experiments, I
> just sent it out, you are on CC. Can you do a follow up fix once this
> series V4 is in ?

Sure I can do that as a followup once your patch is merged.

-Sumit

[PATCH] arm: dts: kirkwood: Enable upstream DT on Kirkwood boards

2024-03-21 Thread Tony Dinh

Enable OF_UPSTREAM to use upstream DT and add marvell/ prefix to the
DEFAULT_DEVICE_TREE for Kirkwood boards. And so we can directly build
DTBs from dts/upstream/src/arm/marvell, and including *-u-boot.dtsi
files from arch/arm/dts/ directory.

Background:

Hi Stefan,
Hi Michael,

I did a survey and we currently have 28 Kirkwood boards. Using some
commands and filters, here are the finding.

git grep -li arch_kirkwood configs | xargs grep DEVICE_TREE | cut -d '"' -f2 | 
xargs -n1 sh -c 'diff -qs  arch/arm/dts/$1.dts 
dts/upstream/src/arm/marvell/$1.dts' sh | grep differ

diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifkw.dts: No such file or 
directory
diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifxcat.dts: No such file 
or directory

Files arch/arm/dts/kirkwood-dockstar.dts and 
dts/upstream/src/arm/marvell/kirkwood-dockstar.dts differ
Files arch/arm/dts/kirkwood-dreamplug.dts and 
dts/upstream/src/arm/marvell/kirkwood-dreamplug.dts differ
Files arch/arm/dts/kirkwood-goflexnet.dts and 
dts/upstream/src/arm/marvell/kirkwood-goflexnet.dts differ
Files arch/arm/dts/kirkwood-guruplug-server-plus.dts and 
dts/upstream/src/arm/marvell/kirkwood-guruplug-server-plus.dts differ
Files arch/arm/dts/kirkwood-iconnect.dts and 
dts/upstream/src/arm/marvell/kirkwood-iconnect.dts differ
Files arch/arm/dts/kirkwood-net2big.dts and 
dts/upstream/src/arm/marvell/kirkwood-net2big.dts differ
Files arch/arm/dts/kirkwood-ns2max.dts and 
dts/upstream/src/arm/marvell/kirkwood-ns2max.dts differ
Files arch/arm/dts/kirkwood-ns2mini.dts and 
dts/upstream/src/arm/marvell/kirkwood-ns2mini.dts differ
Files arch/arm/dts/kirkwood-nsa310s.dts and 
dts/upstream/src/arm/marvell/kirkwood-nsa310s.dts differ
Files arch/arm/dts/kirkwood-nsa325.dts and 
dts/upstream/src/arm/marvell/kirkwood-nsa325.dts differ
Files arch/arm/dts/kirkwood-openrd-client.dts and 
dts/upstream/src/arm/marvell/kirkwood-openrd-client.dts differ

diff -qrbu arch/arm/dts/ dts/upstream/src/arm/marvell/ | grep kirkwood | grep 
".dtsi "

Files arch/arm/dts/kirkwood-6192.dtsi and 
dts/upstream/src/arm/marvell/kirkwood-6192.dtsi differ
Files arch/arm/dts/kirkwood-6281.dtsi and 
dts/upstream/src/arm/marvell/kirkwood-6281.dtsi differ
Files arch/arm/dts/kirkwood-98dx4122.dtsi and 
dts/upstream/src/arm/marvell/kirkwood-98dx4122.dtsi differ
Files arch/arm/dts/kirkwood-dnskw.dtsi and 
dts/upstream/src/arm/marvell/kirkwood-dnskw.dtsi differ
Files arch/arm/dts/kirkwood.dtsi and dts/upstream/src/arm/marvell/kirkwood.dtsi 
differ
Files arch/arm/dts/kirkwood-lsxl.dtsi and 
dts/upstream/src/arm/marvell/kirkwood-lsxl.dtsi differ
Files arch/arm/dts/kirkwood-nsa3x0-common.dtsi and 
dts/upstream/src/arm/marvell/kirkwood-nsa3x0-common.dtsi differ
Files arch/arm/dts/kirkwood-synology.dtsi and 
dts/upstream/src/arm/marvell/kirkwood-synology.dtsi differ

And after reviewing these differences, the following are my observation.

OF_LIST is not used in these Kirkwood boards.

1. Boards that have only u-boot DTS that should be opt-out for now with 
"#CONFIG_OF_UPSTREAM is not set"

diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifkw.dts: No such file or 
directory
diff: dts/upstream/src/arm/marvell/kirkwood-atl-sbx81lifxcat.dts: No such file 
or directory

2. DTS and DTSI files that have only cosmetic, style, or binding changes (safe 
to take)

Files arch/arm/dts/kirkwood-dockstar.dts and 
dts/upstream/src/arm/marvell/kirkwood-dockstar.dts differ
Files arch/arm/dts/kirkwood-goflexnet.dts and 
dts/upstream/src/arm/marvell/kirkwood-goflexnet.dts differ
Files arch/arm/dts/kirkwood-guruplug-server-plus.dts and 
dts/upstream/src/arm/marvell/kirkwood-guruplug-server-plus.dts differ
Files arch/arm/dts/kirkwood-iconnect.dts and 
dts/upstream/src/arm/marvell/kirkwood-iconnect.dts differ
Files arch/arm/dts/kirkwood-net2big.dts and 
dts/upstream/src/arm/marvell/kirkwood-net2big.dts differ
Files arch/arm/dts/kirkwood-ns2max.dts and 
dts/upstream/src/arm/marvell/kirkwood-ns2max.dts differ
Files arch/arm/dts/kirkwood-ns2mini.dts and 
dts/upstream/src/arm/marvell/kirkwood-ns2mini.dts differ
Files arch/arm/dts/kirkwood-nsa325.dts and 
dts/upstream/src/arm/marvell/kirkwood-nsa325.dts differ
Files arch/arm/dts/kirkwood-openrd-client.dts and 
dts/upstream/src/arm/marvell/kirkwood-openrd-client.dts differ

Files arch/arm/dts/kirkwood-dnskw.dtsi and 
dts/upstream/src/arm/marvell/kirkwood-dnskw.dtsi differ
Files arch/arm/dts/kirkwood.dtsi and dts/upstream/src/arm/marvell/kirkwood.dtsi 
differ
Files arch/arm/dts/kirkwood-synology.dtsi and 
dts/upstream/src/arm/marvell/kirkwood-synology.dtsi differ

3. DTS files that are newer in upstream (safe to take with regression test)

Files arch/arm/dts/kirkwood-nsa310s.dts and 
dts/upstream/src/arm/marvell/kirkwood-nsa310s.dts differ

4. DTSI files that have additional PCI-related bindings in upstream (safe to 
take with regression test)

Files arch/arm/dts/kirkwood-6192.dtsi and 
dts/upstream/src/arm/marvell/kirkwood-6192.dtsi differ
Files

Re: [PATCH v2 4/6] usb: Add environment based device blocklist

2024-03-21 Thread Marek Vasut


On 3/19/24 10:17 PM, Janne Grunau wrote:

Hi,

sorry for the abysmal delay in response.


On Mon, Mar 18, 2024 at 03:17:33PM +0100, Marek Vasut wrote:

On 3/18/24 8:33 AM, Janne Grunau wrote:


+static int usb_blocklist_parse_error(const char *blocklist, size_t pos)
+{
+   printf("usb_blocklist parse error at char %zu in \"%s\"\n", pos,
+  blocklist);
+   return 0;


This could be static void without return 0 at the end.


the return is there to break out of the while loop on parsing errors in a 
single statement. This probably won't be necessary after using strsep and 
sscanf in the parsing function but see below.


Ahh, now I see it. But then, shouldn't this return -ENODEV here already ?


It returns 0 so that parsing errors in the blocklist do not result
in blocking every USB device. That looked to me like the
less bad error behavior to me.


In unix , 0 is considered success and non-zero failure .

How about this:

- Return -EINVAL here (parsing failed)


If we return 0 / negated errors we do not need this function and we can
simply report the parsing error when usb_device_is_blocked() return
-EINVAL.


- Instead of 'return 1' in usb_device_is_blocked() return -ENODEV
- In usb_select_config(), check
if usb_device_is_blocked returned 0, no device blocked OK
if usb_device_is_blocked returned -ENODEV, device blocked,
  return -ENODEV
if usb_device_is_blocked returned any other error, parsing error
  return that error


I think the preferable option is to ignore parsing errors. If we
would propagate the error the result would be that every USB device is
ignored.


Good point.


What do you think ?


Fine by me, -EINVAL makes the parsing error reporting less awkward. Only
open question is what should happen on parsing errors.


I agree, ignore/skip the parsing errors and report to user that 
something couldn't be parsed, that works.



locally modified and ready to resend once we agree on the behavior on
parsing errors


Thanks, I think we are in agreement.

[PATCH v3] tools: copyfile: use 64k instead of 512 buffer

2024-03-21 Thread Ahelenia Ziemiańska

This is a trivial but significant optimization:
mkimage took >200ms (and 49489 writes (of which 49456 512)),
now it takes  110ms (and   419 writes (of which   386 64k)).

sendfile is much more appropriate for this and is done in one syscall,
but doesn't bring any significant speedups over 64k r/w
at the 13M size ranges, so there's no need to introduce
#if __linux__
while((size = sendfile(fd_dst, fd_src, NULL, 128 * 1024 * 1024)) > 0)
;
if(size != -1) {
ret = 0;
goto out;
}
#endif

Also extract the buffer size to a constant.

Signed-off-by: Ahelenia Ziemiańska 
Reviewed-by: Dragan Simic 
---
On Thu, Mar 21, 2024 at 08:49:52PM +0100, Dragan Simic wrote:
> On 2024-03-21 19:29, Ahelenia Ziemiańska wrote:
> > This is a trivial but significant optimisation:
> s/optimisation/optimization/
This seems to run counter to precedent of not doing americans'
imperialism for them for free
(I see -ise/-ize in free variation even in my 100-deep checkout).

> > +#define copyfile_bufsize (64 * 1024)
> This is not the right place for such a preprocessor directive.
> Instead, it should be placed at the start of the file.
>
> Also, it should use all uppercase letters.
FTR, neither of these points seem to be universal;
I modelled this after tools/mtk_image.c (also cf. scripts/kconfig/expr.c),
but there are at least 25 other function-local macros
(as in git grep -B1 '^#define' | grep -c -A1 -e '-{' returns 27).

Also kinda weird to explicitly request a macro
only to review it back to a constant, but whatever.

 tools/fit_common.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/tools/fit_common.c b/tools/fit_common.c
index 2d417d47..37066203 100644
--- a/tools/fit_common.c
+++ b/tools/fit_common.c
@@ -129,6 +129,7 @@ int copyfile(const char *src, const char *dst)
 {
int fd_src = -1, fd_dst = -1;
void *buf = NULL;
+   const size_t bufsize = 64 * 1024;
ssize_t size;
size_t count;
int ret = -1;
@@ -145,14 +146,14 @@ int copyfile(const char *src, const char *dst)
goto out;
}
 
-   buf = calloc(1, 512);
+   buf = calloc(1, bufsize);
if (!buf) {
printf("Can't allocate buffer to copy file\n");
goto out;
}
 
while (1) {
-   size = read(fd_src, buf, 512);
+   size = read(fd_src, buf, bufsize);
if (size < 0) {
printf("Can't read file %s\n", src);
goto out;
-- 
2.39.2


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[PATCH v2 22/24] dt-bindings: drop remaining device headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream.

Remaining device headers for small vendors

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/arm/coresight-cti-dt.h |  37 -
 include/dt-bindings/arm/ux500_pm_domains.h |  15 --
 include/dt-bindings/bus/moxtet.h   |  16 --
 include/dt-bindings/display/tda998x.h  |   8 -
 include/dt-bindings/gpio/aspeed-gpio.h |  51 --
 include/dt-bindings/gpio/uniphier-gpio.h   |  18 --
 .../dt-bindings/interrupt-controller/apple-aic.h   |  15 --
 include/dt-bindings/interrupt-controller/arm-gic.h |  23 ---
 include/dt-bindings/interrupt-controller/irq-st.h  |  30 
 .../dt-bindings/interrupt-controller/irqc-rzg2l.h  |  25 ---
 .../dt-bindings/interrupt-controller/mips-gic.h|   9 -
 include/dt-bindings/leds/leds-netxbig.h|  18 --
 include/dt-bindings/leds/leds-ns2.h|   9 -
 include/dt-bindings/leds/leds-pca9532.h|  18 --
 include/dt-bindings/media/tda1997x.h   |  74 -
 include/dt-bindings/media/video-interfaces.h   |  16 --
 include/dt-bindings/mfd/atmel-flexcom.h|  15 --
 include/dt-bindings/mfd/dbx500-prcmu.h |  84 --
 include/dt-bindings/net/mscc-phy-vsc8531.h |  31 
 include/dt-bindings/net/qca-ar803x.h   |  13 --
 include/dt-bindings/phy/phy-am654-serdes.h |  13 --
 include/dt-bindings/phy/phy-cadence.h  |  24 ---
 include/dt-bindings/pinctrl/apple.h|  13 --
 include/dt-bindings/pinctrl/dra.h  |  79 -
 include/dt-bindings/power/owl-s700-powergate.h |  19 ---
 include/dt-bindings/power/raspberrypi-power.h  |  41 -
 .../dt-bindings/regulator/dlg,da9063-regulator.h   |  16 --
 include/dt-bindings/regulator/maxim,max77802.h |  18 --
 include/dt-bindings/reset/actions,s700-reset.h |  34 
 include/dt-bindings/reset/actions,s900-reset.h |  65 
 include/dt-bindings/reset/altr,rst-mgr-a10.h   | 110 -
 include/dt-bindings/reset/altr,rst-mgr-s10.h   |  96 ---
 include/dt-bindings/reset/altr,rst-mgr.h   |  82 -
 include/dt-bindings/reset/nuvoton,npcm7xx-reset.h  |  91 --
 .../dt-bindings/reset/raspberrypi,firmware-reset.h |  13 --
 include/dt-bindings/reset/sama7g5-reset.h  |  10 --
 include/dt-bindings/reset/snps,hsdk-reset.h|  17 --
 include/dt-bindings/reset/starfive,jh7110-crg.h| 183 -
 include/dt-bindings/sound/apq8016-lpass.h  |   9 -
 include/dt-bindings/sound/tlv320aic31xx.h  |  14 --
 40 files changed, 1472 deletions(-)

diff --git a/include/dt-bindings/arm/coresight-cti-dt.h 
b/include/dt-bindings/arm/coresight-cti-dt.h
deleted file mode 100644
index 61e7bdf8ea6e..
--- a/include/dt-bindings/arm/coresight-cti-dt.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides constants for the defined trigger signal
- * types on CoreSight CTI.
- */
-
-#ifndef _DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H
-#define _DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H
-
-#define GEN_IO 0
-#define GEN_INTREQ 1
-#define GEN_INTACK 2
-#define GEN_HALTREQ3
-#define GEN_RESTARTREQ 4
-#define PE_EDBGREQ 5
-#define PE_DBGRESTART  6
-#define PE_CTIIRQ  7
-#define PE_PMUIRQ  8
-#define PE_DBGTRIGGER  9
-#define ETM_EXTOUT 10
-#define ETM_EXTIN  11
-#define SNK_FULL   12
-#define SNK_ACQCOMP13
-#define SNK_FLUSHCOMP  14
-#define SNK_FLUSHIN15
-#define SNK_TRIGIN 16
-#define STM_ASYNCOUT   17
-#define STM_TOUT_SPTE  18
-#define STM_TOUT_SW19
-#define STM_TOUT_HETE  20
-#define STM_HWEVENT21
-#define ELA_TSTART 22
-#define ELA_TSTOP  23
-#define ELA_DBGREQ 24
-#define CTI_TRIG_MAX   25
-
-#endif /*_DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H */
diff --git a/include/dt-bindings/arm/ux500_pm_domains.h 
b/include/dt-bindings/arm/ux500_pm_domains.h
deleted file mode 100644
index 9bd764f0c9e6..
--- a/include/dt-bindings/arm/ux500_pm_domains.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2014 Linaro Ltd.
- *
- * Author: Ulf Hansson 
- */
-#ifndef _DT_BINDINGS_ARM_UX500_PM_DOMAINS_H
-#define _DT_BINDINGS_ARM_UX500_PM_DOMAINS_H
-
-#define DOMAIN_VAPE0
-
-/* Number of PM domains. */
-#define NR_DOMAINS (DOMAIN_VAPE + 1)
-
-#endif
diff --git a/include/dt-bindings/bus/moxtet.h b/include/dt-bindings/bus/moxtet.h
deleted file mode 100644
index 10528de7b3ef..
--- a/include/dt-bindings/bus/moxtet.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Constant for device tree bindings for Turris Mox module configuration bus
- *
- * Copyright (C) 2019 Marek Behún 
- */
-
-#ifndef _DT_BINDINGS_BUS_MOXTET_H
-#define _DT_BINDINGS_BUS_MOXTET_H
-
-#define MOXTET_IRQ_PCI 0
-#define MOXTET_IRQ_USB3

[PATCH v2 23/24] dt-bindings: drop generic headers

2024-03-21 Thread Caleb Connolly

Drop all the subsystem headers that are compatible with the headers in
dts/upstream.

Signed-off-by: Caleb Connolly 
Tested-by: Neil Armstrong  # on AML-S805X-AC
Tested-by: Neil Armstrong  # on AML-S905X-CC
Tested-by: Neil Armstrong  # on BPI-M2S
Tested-by: Neil Armstrong  # on BPI-M5
---
 include/dt-bindings/ata/ahci.h |  20 -
 include/dt-bindings/gpio/gpio.h|  42 --
 include/dt-bindings/input/gpio-keys.h  |  13 -
 include/dt-bindings/input/input.h  |  17 -
 include/dt-bindings/input/linux-event-codes.h  | 806 -
 include/dt-bindings/interrupt-controller/irq.h |  19 -
 include/dt-bindings/leds/common.h  | 106 
 include/dt-bindings/mux/mux.h  |  17 -
 include/dt-bindings/phy/phy.h  |  26 -
 include/dt-bindings/pwm/pwm.h  |  14 -
 include/dt-bindings/spmi/spmi.h|  10 -
 include/dt-bindings/thermal/thermal.h  |  15 -
 include/dt-bindings/usb/pd.h   |  88 ---
 13 files changed, 1193 deletions(-)

diff --git a/include/dt-bindings/ata/ahci.h b/include/dt-bindings/ata/ahci.h
deleted file mode 100644
index b3f3b7cf9af8..
--- a/include/dt-bindings/ata/ahci.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
-/*
- * This header provides constants for most AHCI bindings.
- */
-
-#ifndef _DT_BINDINGS_ATA_AHCI_H
-#define _DT_BINDINGS_ATA_AHCI_H
-
-/* Host Bus Adapter generic platform capabilities */
-#define HBA_SSS(1 << 27)
-#define HBA_SMPS   (1 << 28)
-
-/* Host Bus Adapter port-specific platform capabilities */
-#define HBA_PORT_HPCP  (1 << 18)
-#define HBA_PORT_MPSP  (1 << 19)
-#define HBA_PORT_CPD   (1 << 20)
-#define HBA_PORT_ESP   (1 << 21)
-#define HBA_PORT_FBSCP (1 << 22)
-
-#endif
diff --git a/include/dt-bindings/gpio/gpio.h b/include/dt-bindings/gpio/gpio.h
deleted file mode 100644
index c029467e828b..
--- a/include/dt-bindings/gpio/gpio.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides constants for most GPIO bindings.
- *
- * Most GPIO bindings include a flags cell as part of the GPIO specifier.
- * In most cases, the format of the flags cell uses the standard values
- * defined in this header.
- */
-
-#ifndef _DT_BINDINGS_GPIO_GPIO_H
-#define _DT_BINDINGS_GPIO_GPIO_H
-
-/* Bit 0 express polarity */
-#define GPIO_ACTIVE_HIGH 0
-#define GPIO_ACTIVE_LOW 1
-
-/* Bit 1 express single-endedness */
-#define GPIO_PUSH_PULL 0
-#define GPIO_SINGLE_ENDED 2
-
-/* Bit 2 express Open drain or open source */
-#define GPIO_LINE_OPEN_SOURCE 0
-#define GPIO_LINE_OPEN_DRAIN 4
-
-/*
- * Open Drain/Collector is the combination of single-ended open drain 
interface.
- * Open Source/Emitter is the combination of single-ended open source 
interface.
- */
-#define GPIO_OPEN_DRAIN (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_DRAIN)
-#define GPIO_OPEN_SOURCE (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_SOURCE)
-
-/* Bit 3 express GPIO suspend/resume and reset persistence */
-#define GPIO_PERSISTENT 0
-#define GPIO_TRANSITORY 8
-
-/* Bit 4 express pull up */
-#define GPIO_PULL_UP 16
-
-/* Bit 5 express pull down */
-#define GPIO_PULL_DOWN 32
-
-#endif
diff --git a/include/dt-bindings/input/gpio-keys.h 
b/include/dt-bindings/input/gpio-keys.h
deleted file mode 100644
index 8962df79e753..
--- a/include/dt-bindings/input/gpio-keys.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides constants for gpio keys bindings.
- */
-
-#ifndef _DT_BINDINGS_GPIO_KEYS_H
-#define _DT_BINDINGS_GPIO_KEYS_H
-
-#define EV_ACT_ANY 0x00/* asserted or deasserted */
-#define EV_ACT_ASSERTED0x01/* asserted */
-#define EV_ACT_DEASSERTED  0x02/* deasserted */
-
-#endif /* _DT_BINDINGS_GPIO_KEYS_H */
diff --git a/include/dt-bindings/input/input.h 
b/include/dt-bindings/input/input.h
deleted file mode 100644
index a21413324a3f..
--- a/include/dt-bindings/input/input.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * This header provides constants for most input bindings.
- *
- * Most input bindings include key code, matrix key code format.
- * In most cases, key code and matrix key code format uses
- * the standard values/macro defined in this header.
- */
-
-#ifndef _DT_BINDINGS_INPUT_INPUT_H
-#define _DT_BINDINGS_INPUT_INPUT_H
-
-#include "linux-event-codes.h"
-
-#define MATRIX_KEY(row, col, code) \
-   row) & 0xFF) << 24) | (((col) & 0xFF) << 16) | ((code) & 0x))
-
-#endif /* _DT_BINDINGS_INPUT_INPUT_H */
diff --git a/include/dt-bindings/input/linux-event-codes.h 
b/include/dt-bindings/input/linux-event-codes.h
deleted file mode 100644
index 331458c0e710..
--- a/include/dt-bindings/input/linux-event-codes.h
+++ /dev/null
@@ -1,806 +0,0 @@
-/*
- * Input event codes
- *
- **** IMPORTANT ***
- * This file is not only included from

[PATCH v2 24/24] dts: support building all dtb files for a specific vendor

2024-03-21 Thread Caleb Connolly

This adjusts OF_UPSTREAM to behave more like the kernel by allowing for
all the devicetree files for a given vendor to be compiled. This is
useful for Qualcomm in particular as most boards are supported by a
single U-Boot build just provided with a different DT.

Signed-off-by: Caleb Connolly 
---
 dts/Kconfig  | 24 
 scripts/Makefile.dts | 13 +
 2 files changed, 37 insertions(+)

diff --git a/dts/Kconfig b/dts/Kconfig
index b9b6367154ef..6883a000a052 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -100,8 +100,32 @@ config OF_UPSTREAM
  However, newer boards whose devicetree source files haven't landed in
  the dts/upstream subtree, they can override this option to have the
  DT build from existing U-Boot tree location instead.
 
+config OF_UPSTREAM_BUILD_VENDOR
+   bool "Build all devicetree files for a particular vendor"
+   depends on OF_UPSTREAM
+   help
+ Enable building all devicetree files for a particular vendor. This
+ is useful for generic U-Boot configurations where many boards can
+ be supported with a single binary.
+
+ This is only available for platforms using upstream devicetree.
+
+config OF_UPSTREAM_VENDOR
+   string "Vendor to build all upstream devicetree files for"
+   depends on OF_UPSTREAM_BUILD_VENDOR
+   default "qcom" if ARCH_SNAPDRAGON
+   default "rockchip" if ARCH_ROCKCHIP
+   default "amlogic" if ARCH_MESON
+   default "allwinner" if ARCH_SUNXI
+   default "mediatek" if ARCH_MEDIATEK
+   default "marvell" if ARCH_MVEBU || ARCH_KIRKWOOD
+   default "xilinx" if ARCH_VERSAL || ARCH_ZYNQ
+   default "nvidia" if ARCH_TEGRA
+   help
+ Select the vendor to build all devicetree files for.
+
 choice
prompt "Provider of DTB for DT control"
depends on OF_CONTROL
 
diff --git a/scripts/Makefile.dts b/scripts/Makefile.dts
index 5e2429c6170c..790f3c508f19 100644
--- a/scripts/Makefile.dts
+++ b/scripts/Makefile.dts
@@ -1,3 +1,16 @@
 # SPDX-License-Identifier: GPL-2.0+
 
 dtb-y += $(patsubst %,%.dtb,$(subst ",,$(CONFIG_DEFAULT_DEVICE_TREE) 
$(CONFIG_OF_LIST) $(CONFIG_SPL_OF_LIST)))
+
+ifeq ($(CONFIG_OF_UPSTREAM_BUILD_VENDOR),y)
+ifeq ($(CONFIG_ARM64),y)
+dt_dir := $(srctree)/dts/upstream/src/arm64
+else
+dt_dir := $(srctree)/dts/upstream/src/$(ARCH)
+endif
+
+dtb-vendor_dts := $(patsubst %.dts,%.dtb,$(wildcard $(dt_dir)/$(subst 
",,$(CONFIG_OF_UPSTREAM_VENDOR))/*.dts))
+
+dtb-y += $(subst $(dt_dir)/,,$(dtb-vendor_dts))
+
+endif

-- 
2.44.0

[PATCH v2 21/24] dt-bindings: drop clock headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream.

Clock headers for remaining smaller vendors that are compatible with
dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/actions,s700-cmu.h  | 118 ---
 include/dt-bindings/clock/actions,s900-cmu.h  | 129 
 include/dt-bindings/clock/agilex-clock.h  |  71 -
 include/dt-bindings/clock/boston-clock.h  |  12 -
 include/dt-bindings/clock/fsl,qoriq-clockgen.h|  15 -
 include/dt-bindings/clock/lpc32xx-clock.h |  58 
 include/dt-bindings/clock/maxim,max77802.h|  22 --
 include/dt-bindings/clock/nuvoton,npcm7xx-clock.h |  46 ---
 include/dt-bindings/clock/rv1108-cru.h| 356 --
 include/dt-bindings/clock/versaclock.h|  13 -
 include/dt-bindings/clock/vf610-clock.h   | 202 
 11 files changed, 1042 deletions(-)

diff --git a/include/dt-bindings/clock/actions,s700-cmu.h 
b/include/dt-bindings/clock/actions,s700-cmu.h
deleted file mode 100644
index 3e1942996724..
--- a/include/dt-bindings/clock/actions,s700-cmu.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0
- *
- * Device Tree binding constants for Actions Semi S700 Clock Management Unit
- *
- * Copyright (c) 2014 Actions Semi Inc.
- * Author: David Liu 
- *
- * Author: Pathiban Nallathambi 
- * Author: Saravanan Sekar 
- */
-
-#ifndef __DT_BINDINGS_CLOCK_S700_H
-#define __DT_BINDINGS_CLOCK_S700_H
-
-#define CLK_NONE   0
-
-/* pll clocks */
-#define CLK_CORE_PLL   1
-#define CLK_DEV_PLL2
-#define CLK_DDR_PLL3
-#define CLK_NAND_PLL   4
-#define CLK_DISPLAY_PLL5
-#define CLK_TVOUT_PLL  6
-#define CLK_CVBS_PLL   7
-#define CLK_AUDIO_PLL  8
-#define CLK_ETHERNET_PLL   9
-
-/* system clock */
-#define CLK_CPU10
-#define CLK_DEV11
-#define CLK_AHB12
-#define CLK_APB13
-#define CLK_DMAC   14
-#define CLK_NOC0_CLK_MUX   15
-#define CLK_NOC1_CLK_MUX   16
-#define CLK_HP_CLK_MUX 17
-#define CLK_HP_CLK_DIV 18
-#define CLK_NOC1_CLK_DIV   19
-#define CLK_NOC0   20
-#define CLK_NOC1   21
-#define CLK_SENOR_SRC  22
-
-/* peripheral device clock */
-#define CLK_GPIO   23
-#define CLK_TIMER  24
-#define CLK_DSI25
-#define CLK_CSI26
-#define CLK_SI 27
-#define CLK_DE 28
-#define CLK_HDE29
-#define CLK_VDE30
-#define CLK_VCE31
-#define CLK_NAND   32
-#define CLK_SD033
-#define CLK_SD134
-#define CLK_SD235
-
-#define CLK_UART0  36
-#define CLK_UART1  37
-#define CLK_UART2  38
-#define CLK_UART3  39
-#define CLK_UART4  40
-#define CLK_UART5  41
-#define CLK_UART6  42
-
-#define CLK_PWM0   43
-#define CLK_PWM1   44
-#define CLK_PWM2   45
-#define CLK_PWM3   46
-#define CLK_PWM4   47
-#define CLK_PWM5   48
-#define CLK_GPU3D  49
-
-#define CLK_I2C0   50
-#define CLK_I2C1   51
-#define CLK_I2C2   52
-#define CLK_I2C3   53
-
-#define CLK_SPI0   54
-#define CLK_SPI1   55
-#define CLK_SPI2   56
-#define CLK_SPI3   57
-
-#define CLK_USB3_480MPLL0  58
-#define CLK_USB3_480MPHY0  59
-#define CLK_USB3_5GPHY 60
-#define CLK_USB3_CCE   61
-#define CLK_USB3_MAC   62
-
-#define CLK_LCD63
-#define CLK_HDMI_AUDIO 64
-#define CLK_I2SRX  65
-#define CLK_I2STX  66
-
-#define CLK_SENSOR067
-#define CLK_SENSOR168
-
-#define CLK_HDMI_DEV   69
-
-#define CLK_ETHERNET   70
-#define CLK_RMII_REF   71
-
-#define CLK_USB2H0_PLLEN   72
-#define CLK_USB2H0_PHY 73
-#define CLK_USB2H0_CCE 74
-#define CLK_USB2H1_PLLEN   75
-#define CLK_USB2H1_PHY 76
-#define

[PATCH v2 20/24] sifive: drop clock headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream.

Small driver/dts change to fix compatibility.

Signed-off-by: Caleb Connolly 
---
 arch/riscv/dts/fu540-c000-u-boot.dtsi | 26 +-
 drivers/clk/sifive/fu540-prci.c   |  8 
 include/dt-bindings/clock/sifive-fu540-prci.h | 18 --
 include/dt-bindings/clock/sifive-fu740-prci.h | 24 
 4 files changed, 17 insertions(+), 59 deletions(-)

diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi 
b/arch/riscv/dts/fu540-c000-u-boot.dtsi
index 360679a1781a..0f8181436410 100644
--- a/arch/riscv/dts/fu540-c000-u-boot.dtsi
+++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi
@@ -6,42 +6,42 @@
 #include 
 
 / {
cpus {
-   assigned-clocks = < PRCI_CLK_COREPLL>;
+   assigned-clocks = < FU540_PRCI_CLK_COREPLL>;
assigned-clock-rates = <10>;
bootph-pre-ram;
cpu0: cpu@0 {
-   clocks = < PRCI_CLK_COREPLL>;
+   clocks = < FU540_PRCI_CLK_COREPLL>;
bootph-pre-ram;
status = "okay";
cpu0_intc: interrupt-controller {
bootph-pre-ram;
};
};
cpu1: cpu@1 {
-   clocks = < PRCI_CLK_COREPLL>;
+   clocks = < FU540_PRCI_CLK_COREPLL>;
bootph-pre-ram;
cpu1_intc: interrupt-controller {
bootph-pre-ram;
};
};
cpu2: cpu@2 {
-   clocks = < PRCI_CLK_COREPLL>;
+   clocks = < FU540_PRCI_CLK_COREPLL>;
bootph-pre-ram;
cpu2_intc: interrupt-controller {
bootph-pre-ram;
};
};
cpu3: cpu@3 {
-   clocks = < PRCI_CLK_COREPLL>;
+   clocks = < FU540_PRCI_CLK_COREPLL>;
bootph-pre-ram;
cpu3_intc: interrupt-controller {
bootph-pre-ram;
};
};
cpu4: cpu@4 {
-   clocks = < PRCI_CLK_COREPLL>;
+   clocks = < FU540_PRCI_CLK_COREPLL>;
bootph-pre-ram;
cpu4_intc: interrupt-controller {
bootph-pre-ram;
};
@@ -66,22 +66,22 @@
bootph-pre-ram;
};
prci: clock-controller@1000 {
#reset-cells = <1>;
-   resets = < PRCI_RST_DDR_CTRL_N>,
-< PRCI_RST_DDR_AXI_N>,
-< PRCI_RST_DDR_AHB_N>,
-< PRCI_RST_DDR_PHY_N>,
-< PRCI_RST_GEMGXL_N>;
+   resets = < FU540_PRCI_RST_DDR_CTRL_N>,
+< FU540_PRCI_RST_DDR_AXI_N>,
+< FU540_PRCI_RST_DDR_AHB_N>,
+< FU540_PRCI_RST_DDR_PHY_N>,
+< FU540_PRCI_RST_GEMGXL_N>;
reset-names = "ddr_ctrl", "ddr_axi", "ddr_ahb",
"ddr_phy", "gemgxl_reset";
};
dmc: dmc@100b {
compatible = "sifive,fu540-c000-ddr";
reg = <0x0 0x100b 0x0 0x0800
   0x0 0x100b2000 0x0 0x2000
   0x0 0x100b8000 0x0 0x1000>;
-   clocks = < PRCI_CLK_DDRPLL>;
+   clocks = < FU540_PRCI_CLK_DDRPLL>;
clock-frequency = <93324>;
bootph-pre-ram;
};
};
@@ -99,9 +99,9 @@
bootph-pre-ram;
 };
 
  {
-   assigned-clocks = < PRCI_CLK_GEMGXLPLL>;
+   assigned-clocks = < FU540_PRCI_CLK_GEMGXLPLL>;
assigned-clock-rates = <12500>;
 };
 
  {
diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index ceb2c6fab0da..b019f682ac49 100644
--- a/drivers/clk/sifive/fu540-prci.c
+++ b/drivers/clk/sifive/fu540-prci.c
@@ -58,27 +58,27 @@ static const struct __prci_clock_ops 
sifive_fu540_prci_tlclksel_clk_ops = {
 };
 
 /* List of clock controls provided by the PRCI */
 struct __prci_clock __prci_init_clocks_fu540[] = {
-   [PRCI_CLK_COREPLL] = {
+   [FU540_PRCI_CLK_COREPLL] = {
.name = "corepll",
.parent_name = "hfclk",
.ops = _fu540_prci_wrpll_clk_ops,
.pwd = &__prci_corepll_data,
},
-   [PRCI_CLK_DDRPLL] = {
+   [FU540_PRCI_CLK_DDRPLL] = {

[PATCH v2 19/24] hisi: drop dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/hi3660-clock.h | 214 ---
 include/dt-bindings/clock/hi6220-clock.h | 173 -
 include/dt-bindings/pinctrl/hisi.h   |  74 ---
 3 files changed, 461 deletions(-)

diff --git a/include/dt-bindings/clock/hi3660-clock.h 
b/include/dt-bindings/clock/hi3660-clock.h
deleted file mode 100644
index e1374e180943..
--- a/include/dt-bindings/clock/hi3660-clock.h
+++ /dev/null
@@ -1,214 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (c) 2016-2017 Linaro Ltd.
- * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
- */
-
-#ifndef __DTS_HI3660_CLOCK_H
-#define __DTS_HI3660_CLOCK_H
-
-/* fixed rate clocks */
-#define HI3660_CLKIN_SYS   0
-#define HI3660_CLKIN_REF   1
-#define HI3660_CLK_FLL_SRC 2
-#define HI3660_CLK_PPLL0   3
-#define HI3660_CLK_PPLL1   4
-#define HI3660_CLK_PPLL2   5
-#define HI3660_CLK_PPLL3   6
-#define HI3660_CLK_SCPLL   7
-#define HI3660_PCLK8
-#define HI3660_CLK_UART0_DBG   9
-#define HI3660_CLK_UART6   10
-#define HI3660_OSC32K  11
-#define HI3660_OSC19M  12
-#define HI3660_CLK_480M13
-#define HI3660_CLK_INV 14
-
-/* clk in crgctrl */
-#define HI3660_FACTOR_UART315
-#define HI3660_CLK_FACTOR_MMC  16
-#define HI3660_CLK_GATE_I2C0   17
-#define HI3660_CLK_GATE_I2C1   18
-#define HI3660_CLK_GATE_I2C2   19
-#define HI3660_CLK_GATE_I2C6   20
-#define HI3660_CLK_DIV_SYSBUS  21
-#define HI3660_CLK_DIV_320M22
-#define HI3660_CLK_DIV_A53 23
-#define HI3660_CLK_GATE_SPI0   24
-#define HI3660_CLK_GATE_SPI2   25
-#define HI3660_PCIEPHY_REF 26
-#define HI3660_CLK_ABB_USB 27
-#define HI3660_HCLK_GATE_SDIO0 28
-#define HI3660_HCLK_GATE_SD29
-#define HI3660_CLK_GATE_AOMM   30
-#define HI3660_PCLK_GPIO0  31
-#define HI3660_PCLK_GPIO1  32
-#define HI3660_PCLK_GPIO2  33
-#define HI3660_PCLK_GPIO3  34
-#define HI3660_PCLK_GPIO4  35
-#define HI3660_PCLK_GPIO5  36
-#define HI3660_PCLK_GPIO6  37
-#define HI3660_PCLK_GPIO7  38
-#define HI3660_PCLK_GPIO8  39
-#define HI3660_PCLK_GPIO9  40
-#define HI3660_PCLK_GPIO10 41
-#define HI3660_PCLK_GPIO11 42
-#define HI3660_PCLK_GPIO12 43
-#define HI3660_PCLK_GPIO13 44
-#define HI3660_PCLK_GPIO14 45
-#define HI3660_PCLK_GPIO15 46
-#define HI3660_PCLK_GPIO16 47
-#define HI3660_PCLK_GPIO17 48
-#define HI3660_PCLK_GPIO18 49
-#define HI3660_PCLK_GPIO19 50
-#define HI3660_PCLK_GPIO20 51
-#define HI3660_PCLK_GPIO21 52
-#define HI3660_CLK_GATE_SPI3   53
-#define HI3660_CLK_GATE_I2C7   54
-#define HI3660_CLK_GATE_I2C3   55
-#define HI3660_CLK_GATE_SPI1   56
-#define HI3660_CLK_GATE_UART1  57
-#define HI3660_CLK_GATE_UART2  58
-#define HI3660_CLK_GATE_UART4  59
-#define HI3660_CLK_GATE_UART5  60
-#define HI3660_CLK_GATE_I2C4   61
-#define HI3660_CLK_GATE_DMAC   62
-#define HI3660_PCLK_GATE_DSS   63
-#define HI3660_ACLK_GATE_DSS   64
-#define HI3660_CLK_GATE_LDI1   65
-#define HI3660_CLK_GATE_LDI0   66
-#define HI3660_CLK_GATE_VIVOBUS67
-#define HI3660_CLK_GATE_EDC0   68
-#define HI3660_CLK_GATE_TXDPHY0_CFG69
-#define HI3660_CLK_GATE_TXDPHY0_REF70
-#define HI3660_CLK_GATE_TXDPHY1_CFG71
-#define HI3660_CLK_GATE_TXDPHY1_REF72
-#define HI3660_ACLK_GATE_USB3OTG   73
-#define HI3660_CLK_GATE_SPI4   74
-#define HI3660_CLK_GATE_SD 75
-#define HI3660_CLK_GATE_SDIO0  76
-#define HI3660_CLK_GATE_UFS_SUBSYS 77
-#define HI3660_PCLK_GATE_DSI0  78
-#define HI3660_PCLK_GATE_DSI1  79
-#define HI3660_ACLK_GATE_PCIE  80
-#define HI3660_PCLK_GATE_PCIE_SYS   81
-#define HI3660_CLK_GATE_PCIEAUX82
-#define HI3660_PCLK_GATE_PCIE_PHY  83
-#define HI3660_CLK_ANDGT_LDI0  84
-#define HI3660_CLK_ANDGT_LDI1  85
-#define HI3660_CLK_ANDGT_EDC0  86
-#define HI3660_CLK_GATE_UFSPHY_GT  87
-#define HI3660_CLK_ANDGT_MMC   88
-#define HI3660_CLK_ANDGT_SD89
-#define HI3660_CLK_A53HPM_ANDGT90
-#define HI3660_CLK_ANDGT_SDIO  91
-#define HI3660_CLK_ANDGT_UART0 92
-#define HI3660_CLK_ANDGT_UART1 93
-#define HI3660_CLK_ANDGT_UARTH 94
-#define HI3660_CLK_ANDGT_SPI   95
-#define

[PATCH v2 17/24] mtk: drop dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/mt7622-clk.h| 270 ---
 include/dt-bindings/clock/mt7629-clk.h| 206 --
 include/dt-bindings/clock/mt8183-clk.h| 329 -
 include/dt-bindings/pinctrl/mt65xx.h  |  41 --
 include/dt-bindings/pinctrl/mt8365-pinfunc.h  | 858 --
 include/dt-bindings/power/mediatek,mt8365-power.h |  19 -
 include/dt-bindings/reset/mt7621-reset.h  |  38 -
 7 files changed, 1761 deletions(-)

diff --git a/include/dt-bindings/clock/mt7622-clk.h 
b/include/dt-bindings/clock/mt7622-clk.h
deleted file mode 100644
index 76fcaff0e42e..
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ /dev/null
@@ -1,270 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (c) 2019 MediaTek Inc.
- */
-#ifndef _DT_BINDINGS_CLK_MT7622_H
-#define _DT_BINDINGS_CLK_MT7622_H
-
-/* TOPCKGEN */
-
-/* FIXED_CLKS */
-#define CLK_TOP_TO_U2_PHY  0
-#define CLK_TOP_TO_U2_PHY_1P   1
-#define CLK_TOP_PCIE0_PIPE_EN  2
-#define CLK_TOP_PCIE1_PIPE_EN  3
-#define CLK_TOP_SSUSB_TX250M   4
-#define CLK_TOP_SSUSB_EQ_RX250M5
-#define CLK_TOP_SSUSB_CDR_REF  6
-#define CLK_TOP_SSUSB_CDR_FB   7
-#define CLK_TOP_SATA_ASIC  8
-#define CLK_TOP_SATA_RBC   9
-/* FIXED_DIVS */
-#define CLK_TOP_TO_USB3_SYS10
-#define CLK_TOP_P1_1MHZ11
-#define CLK_TOP_4MHZ   12
-#define CLK_TOP_P0_1MHZ13
-#define CLK_TOP_TXCLK_SRC_PRE  14
-#define CLK_TOP_RTC15
-#define CLK_TOP_MEMPLL 16
-#define CLK_TOP_DMPLL  17
-#define CLK_TOP_SYSPLL_D2  18
-#define CLK_TOP_SYSPLL1_D2 19
-#define CLK_TOP_SYSPLL1_D4 20
-#define CLK_TOP_SYSPLL1_D8 21
-#define CLK_TOP_SYSPLL2_D4 22
-#define CLK_TOP_SYSPLL2_D8 23
-#define CLK_TOP_SYSPLL_D5  24
-#define CLK_TOP_SYSPLL3_D2 25
-#define CLK_TOP_SYSPLL3_D4 26
-#define CLK_TOP_SYSPLL4_D2 27
-#define CLK_TOP_SYSPLL4_D4 28
-#define CLK_TOP_SYSPLL4_D1629
-#define CLK_TOP_UNIVPLL30
-#define CLK_TOP_UNIVPLL_D2 31
-#define CLK_TOP_UNIVPLL1_D232
-#define CLK_TOP_UNIVPLL1_D433
-#define CLK_TOP_UNIVPLL1_D834
-#define CLK_TOP_UNIVPLL1_D16   35
-#define CLK_TOP_UNIVPLL2_D236
-#define CLK_TOP_UNIVPLL2_D437
-#define CLK_TOP_UNIVPLL2_D838
-#define CLK_TOP_UNIVPLL2_D16   39
-#define CLK_TOP_UNIVPLL_D5 40
-#define CLK_TOP_UNIVPLL3_D241
-#define CLK_TOP_UNIVPLL3_D442
-#define CLK_TOP_UNIVPLL3_D16   43
-#define CLK_TOP_UNIVPLL_D7 44
-#define CLK_TOP_UNIVPLL_D80_D4 45
-#define CLK_TOP_UNIV48M46
-#define CLK_TOP_SGMIIPLL   47
-#define CLK_TOP_SGMIIPLL_D248
-#define CLK_TOP_AUD1PLL49
-#define CLK_TOP_AUD2PLL50
-#define CLK_TOP_AUD_I2S2_MCK   51
-#define CLK_TOP_TO_USB3_REF52
-#define CLK_TOP_PCIE1_MAC_EN   53
-#define CLK_TOP_PCIE0_MAC_EN   54
-#define CLK_TOP_ETH_500M   55
-/* TOP_MUXES */
-#define CLK_TOP_AXI_SEL56
-#define CLK_TOP_MEM_SEL57
-#define CLK_TOP_DDRPHYCFG_SEL  58
-#define CLK_TOP_ETH_SEL59
-#define CLK_TOP_PWM_SEL60
-#define CLK_TOP_F10M_REF_SEL   61
-#define CLK_TOP_NFI_INFRA_SEL  62
-#define CLK_TOP_FLASH_SEL  63
-#define CLK_TOP_UART_SEL   64
-#define CLK_TOP_SPI0_SEL   65
-#define CLK_TOP_SPI1_SEL   66
-#define CLK_TOP_MSDC50_0_SEL   67
-#define CLK_TOP_MSDC30_0_SEL   68
-#define CLK_TOP_MSDC30_1_SEL   69
-#define CLK_TOP_A1SYS_HP_SEL   70
-#define CLK_TOP_A2SYS_HP_SEL   71
-#define CLK_TOP_INTDIR_SEL 72
-#define CLK_TOP_AUD_INTBUS_SEL 73
-#define CLK_TOP_PMICSPI_SEL74
-#define CLK_TOP_SCP_SEL75
-#define CLK_TOP_ATB_SEL76
-#define CLK_TOP_HIF_SEL77
-#define CLK_TOP_AUDIO_SEL  78
-#define CLK_TOP_U2_SEL 79
-#define CLK_TOP_AUD1_SEL   80
-#define CLK_TOP_AUD2_SEL   81
-#define CLK_TOP_IRRX_SEL   82
-#define CLK_TOP_IRTX_SEL   83
-#define CLK_TOP_ASM_L_SEL  84
-#define CLK_TOP_ASM_M_SEL  85
-#define CLK_TOP_ASM_H_SEL  86
-#define CLK_TOP_APLL1_SEL  87
-#define CLK_TOP_APLL2_SEL  88
-#define CLK_TOP_I2S0_MCK_SEL   89

[PATCH v2 18/24] microchip: drop dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream

Adjust header include path naming for mpfs clock.

Signed-off-by: Caleb Connolly 
---
 arch/riscv/dts/mpfs.dtsi |  2 +-
 drivers/clk/microchip/mpfs_clk.c |  2 +-
 drivers/clk/microchip/mpfs_clk_cfg.c |  2 +-
 drivers/clk/microchip/mpfs_clk_msspll.c  |  2 +-
 drivers/clk/microchip/mpfs_clk_periph.c  |  2 +-
 include/dt-bindings/clock/at91.h | 23 
 include/dt-bindings/clock/microchip-mpfs-clock.h | 71 
 include/dt-bindings/dma/at91.h   | 52 -
 include/dt-bindings/mfd/at91-usart.h | 17 --
 include/dt-bindings/net/microchip-lan78xx.h  | 21 ---
 include/dt-bindings/pinctrl/at91.h   | 49 
 include/dt-bindings/sound/microchip,pdmc.h   | 13 -
 12 files changed, 5 insertions(+), 251 deletions(-)

diff --git a/arch/riscv/dts/mpfs.dtsi b/arch/riscv/dts/mpfs.dtsi
index 6012a2850703..5827d5c5d19b 100644
--- a/arch/riscv/dts/mpfs.dtsi
+++ b/arch/riscv/dts/mpfs.dtsi
@@ -1,8 +1,8 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /* Copyright (c) 2020-2021 Microchip Technology Inc */
 
-#include "dt-bindings/clock/microchip-mpfs-clock.h"
+#include 
 
 / {
#address-cells = <2>;
#size-cells = <2>;
diff --git a/drivers/clk/microchip/mpfs_clk.c b/drivers/clk/microchip/mpfs_clk.c
index 08f8bfcecbed..44ac4306eace 100644
--- a/drivers/clk/microchip/mpfs_clk.c
+++ b/drivers/clk/microchip/mpfs_clk.c
@@ -10,9 +10,9 @@
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include "mpfs_clk.h"
 
diff --git a/drivers/clk/microchip/mpfs_clk_cfg.c 
b/drivers/clk/microchip/mpfs_clk_cfg.c
index 5739fd66e8df..953e88e283ed 100644
--- a/drivers/clk/microchip/mpfs_clk_cfg.c
+++ b/drivers/clk/microchip/mpfs_clk_cfg.c
@@ -9,9 +9,9 @@
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include "mpfs_clk.h"
 
diff --git a/drivers/clk/microchip/mpfs_clk_msspll.c 
b/drivers/clk/microchip/mpfs_clk_msspll.c
index f37c0d86047c..7b5020404549 100644
--- a/drivers/clk/microchip/mpfs_clk_msspll.c
+++ b/drivers/clk/microchip/mpfs_clk_msspll.c
@@ -8,9 +8,9 @@
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include "mpfs_clk.h"
 
diff --git a/drivers/clk/microchip/mpfs_clk_periph.c 
b/drivers/clk/microchip/mpfs_clk_periph.c
index ddeccb914575..16823402def3 100644
--- a/drivers/clk/microchip/mpfs_clk_periph.c
+++ b/drivers/clk/microchip/mpfs_clk_periph.c
@@ -9,9 +9,9 @@
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 
 #include "mpfs_clk.h"
 
diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h
deleted file mode 100644
index ab3ee241d10c..
--- a/include/dt-bindings/clock/at91.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This header provides constants for AT91 pmc status.
- *
- * The constants defined in this header are being used in dts.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef _DT_BINDINGS_CLK_AT91_H
-#define _DT_BINDINGS_CLK_AT91_H
-
-#define AT91_PMC_MOSCS 0   /* MOSCS Flag */
-#define AT91_PMC_LOCKA 1   /* PLLA Lock */
-#define AT91_PMC_LOCKB 2   /* PLLB Lock */
-#define AT91_PMC_MCKRDY3   /* Master Clock */
-#define AT91_PMC_LOCKU 6   /* UPLL Lock */
-#define AT91_PMC_PCKRDY(id)(8 + (id))  /* Programmable Clock */
-#define AT91_PMC_MOSCSELS  16  /* Main Oscillator Selection */
-#define AT91_PMC_MOSCRCS   17  /* Main On-Chip RC */
-#define AT91_PMC_CFDEV 18  /* Clock Failure Detector Event 
*/
-#define AT91_PMC_GCKRDY24  /* Generated Clocks */
-
-#endif
diff --git a/include/dt-bindings/clock/microchip-mpfs-clock.h 
b/include/dt-bindings/clock/microchip-mpfs-clock.h
deleted file mode 100644
index 79775a5134ca..
--- a/include/dt-bindings/clock/microchip-mpfs-clock.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
-/*
- * Daire McNamara,
- * Copyright (C) 2020-2022 Microchip Technology Inc.  All rights reserved.
- */
-
-#ifndef _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_
-#define _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_
-
-#define CLK_CPU0
-#define CLK_AXI1
-#define CLK_AHB2
-
-#define CLK_ENVM   3
-#define CLK_MAC0   4
-#define CLK_MAC1   5
-#define CLK_MMC6
-#define CLK_TIMER  7
-#define CLK_MMUART08
-#define CLK_MMUART19
-#define CLK_MMUART210
-#define CLK_MMUART311
-#define CLK_MMUART412
-#define CLK_SPI0   13
-#define CLK_SPI1   14
-#define CLK_I2C0   15
-#define CLK_I2C1   16
-#define CLK_CAN0   17
-#define CLK_CAN1   18
-#define CLK_USB19
-#define CLK_RESERVED

[PATCH v2 16/24] xlnx: drop dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/xlnx-versal-clk.h| 123 ---
 include/dt-bindings/clock/xlnx-zynqmp-clk.h| 126 
 include/dt-bindings/dma/xlnx-zynqmp-dpdma.h|  16 ---
 include/dt-bindings/pinctrl/pinctrl-zynqmp.h   |  19 
 include/dt-bindings/power/xlnx-zynqmp-power.h  |  50 --
 include/dt-bindings/reset/xlnx-versal-resets.h | 105 
 include/dt-bindings/reset/xlnx-zynqmp-resets.h | 130 -
 7 files changed, 569 deletions(-)

diff --git a/include/dt-bindings/clock/xlnx-versal-clk.h 
b/include/dt-bindings/clock/xlnx-versal-clk.h
deleted file mode 100644
index 264d634d226e..
--- a/include/dt-bindings/clock/xlnx-versal-clk.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- *  Copyright (C) 2019 Xilinx Inc.
- *
- */
-
-#ifndef _DT_BINDINGS_CLK_VERSAL_H
-#define _DT_BINDINGS_CLK_VERSAL_H
-
-#define PMC_PLL1
-#define APU_PLL2
-#define RPU_PLL3
-#define CPM_PLL4
-#define NOC_PLL5
-#define PLL_MAX6
-#define PMC_PRESRC 7
-#define PMC_POSTCLK8
-#define PMC_PLL_OUT9
-#define PPLL   10
-#define NOC_PRESRC 11
-#define NOC_POSTCLK12
-#define NOC_PLL_OUT13
-#define NPLL   14
-#define APU_PRESRC 15
-#define APU_POSTCLK16
-#define APU_PLL_OUT17
-#define APLL   18
-#define RPU_PRESRC 19
-#define RPU_POSTCLK20
-#define RPU_PLL_OUT21
-#define RPLL   22
-#define CPM_PRESRC 23
-#define CPM_POSTCLK24
-#define CPM_PLL_OUT25
-#define CPLL   26
-#define PPLL_TO_XPD27
-#define NPLL_TO_XPD28
-#define APLL_TO_XPD29
-#define RPLL_TO_XPD30
-#define EFUSE_REF  31
-#define SYSMON_REF 32
-#define IRO_SUSPEND_REF33
-#define USB_SUSPEND34
-#define SWITCH_TIMEOUT 35
-#define RCLK_PMC   36
-#define RCLK_LPD   37
-#define WDT38
-#define TTC0   39
-#define TTC1   40
-#define TTC2   41
-#define TTC3   42
-#define GEM_TSU43
-#define GEM_TSU_LB 44
-#define MUXED_IRO_DIV2 45
-#define MUXED_IRO_DIV4 46
-#define PSM_REF47
-#define GEM0_RX48
-#define GEM0_TX49
-#define GEM1_RX50
-#define GEM1_TX51
-#define CPM_CORE_REF   52
-#define CPM_LSBUS_REF  53
-#define CPM_DBG_REF54
-#define CPM_AUX0_REF   55
-#define CPM_AUX1_REF   56
-#define QSPI_REF   57
-#define OSPI_REF   58
-#define SDIO0_REF  59
-#define SDIO1_REF  60
-#define PMC_LSBUS_REF  61
-#define I2C_REF62
-#define TEST_PATTERN_REF   63
-#define DFT_OSC_REF64
-#define PMC_PL0_REF65
-#define PMC_PL1_REF66
-#define PMC_PL2_REF67
-#define PMC_PL3_REF68
-#define CFU_REF69
-#define SPARE_REF  70
-#define NPI_REF71
-#define HSM0_REF   72
-#define HSM1_REF   73
-#define SD_DLL_REF 74
-#define FPD_TOP_SWITCH 75
-#define FPD_LSBUS  76

[PATCH v2 14/24] tegra: drop clock dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/tegra114-car.h| 343 -
 include/dt-bindings/clock/tegra124-car-common.h | 345 -
 include/dt-bindings/clock/tegra124-car.h|  19 -
 include/dt-bindings/clock/tegra186-clock.h  | 940 
 include/dt-bindings/clock/tegra20-car.h | 158 
 include/dt-bindings/clock/tegra210-car.h| 401 --
 include/dt-bindings/clock/tegra30-car.h | 273 ---
 7 files changed, 2479 deletions(-)

diff --git a/include/dt-bindings/clock/tegra114-car.h 
b/include/dt-bindings/clock/tegra114-car.h
deleted file mode 100644
index 534c03f8ad72..
--- a/include/dt-bindings/clock/tegra114-car.h
+++ /dev/null
@@ -1,343 +0,0 @@
-/*
- * This header provides constants for binding nvidia,tegra114-car.
- *
- * The first 160 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB
- * registers. These IDs often match those in the CAR's RST_DEVICES registers,
- * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In
- * this case, those clocks are assigned IDs above 160 in order to highlight
- * this issue. Implementations that interpret these clock IDs as bit values
- * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to
- * explicitly handle these special cases.
- *
- * The balance of the clocks controlled by the CAR are assigned IDs of 160 and
- * above.
- */
-
-#ifndef _DT_BINDINGS_CLOCK_TEGRA114_CAR_H
-#define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H
-
-/* 0 */
-/* 1 */
-/* 2 */
-/* 3 */
-#define TEGRA114_CLK_RTC 4
-#define TEGRA114_CLK_TIMER 5
-#define TEGRA114_CLK_UARTA 6
-/* 7 (register bit affects uartb and vfir) */
-/* 8 */
-#define TEGRA114_CLK_SDMMC2 9
-/* 10 (register bit affects spdif_in and spdif_out) */
-#define TEGRA114_CLK_I2S1 11
-#define TEGRA114_CLK_I2C1 12
-#define TEGRA114_CLK_NDFLASH 13
-#define TEGRA114_CLK_SDMMC1 14
-#define TEGRA114_CLK_SDMMC4 15
-/* 16 */
-#define TEGRA114_CLK_PWM 17
-#define TEGRA114_CLK_I2S2 18
-#define TEGRA114_CLK_EPP 19
-/* 20 (register bit affects vi and vi_sensor) */
-#define TEGRA114_CLK_GR2D 21
-#define TEGRA114_CLK_USBD 22
-#define TEGRA114_CLK_ISP 23
-#define TEGRA114_CLK_GR3D 24
-/* 25 */
-#define TEGRA114_CLK_DISP2 26
-#define TEGRA114_CLK_DISP1 27
-#define TEGRA114_CLK_HOST1X 28
-#define TEGRA114_CLK_VCP 29
-#define TEGRA114_CLK_I2S0 30
-/* 31 */
-
-#define TEGRA114_CLK_MC 32
-/* 33 */
-#define TEGRA114_CLK_APBDMA 34
-/* 35 */
-#define TEGRA114_CLK_KBC 36
-/* 37 */
-/* 38 */
-/* 39 (register bit affects fuse and fuse_burn) */
-#define TEGRA114_CLK_KFUSE 40
-#define TEGRA114_CLK_SBC1 41
-#define TEGRA114_CLK_NOR 42
-/* 43 */
-#define TEGRA114_CLK_SBC2 44
-/* 45 */
-#define TEGRA114_CLK_SBC3 46
-#define TEGRA114_CLK_I2C5 47
-#define TEGRA114_CLK_DSIA 48
-/* 49 */
-#define TEGRA114_CLK_MIPI 50
-#define TEGRA114_CLK_HDMI 51
-#define TEGRA114_CLK_CSI 52
-/* 53 */
-#define TEGRA114_CLK_I2C2 54
-#define TEGRA114_CLK_UARTC 55
-#define TEGRA114_CLK_MIPI_CAL 56
-#define TEGRA114_CLK_EMC 57
-#define TEGRA114_CLK_USB2 58
-#define TEGRA114_CLK_USB3 59
-/* 60 */
-#define TEGRA114_CLK_VDE 61
-#define TEGRA114_CLK_BSEA 62
-#define TEGRA114_CLK_BSEV 63
-
-/* 64 */
-#define TEGRA114_CLK_UARTD 65
-/* 66 */
-#define TEGRA114_CLK_I2C3 67
-#define TEGRA114_CLK_SBC4 68
-#define TEGRA114_CLK_SDMMC3 69
-/* 70 */
-#define TEGRA114_CLK_OWR 71
-/* 72 */
-#define TEGRA114_CLK_CSITE 73
-/* 74 */
-/* 75 */
-#define TEGRA114_CLK_LA 76
-#define TEGRA114_CLK_TRACE 77
-#define TEGRA114_CLK_SOC_THERM 78
-#define TEGRA114_CLK_DTV 79
-#define TEGRA114_CLK_NDSPEED 80
-#define TEGRA114_CLK_I2CSLOW 81
-#define TEGRA114_CLK_DSIB 82
-#define TEGRA114_CLK_TSEC 83
-/* 84 */
-/* 85 */
-/* 86 */
-/* 87 */
-/* 88 */
-#define TEGRA114_CLK_XUSB_HOST 89
-/* 90 */
-#define TEGRA114_CLK_MSENC 91
-#define TEGRA114_CLK_CSUS 92
-/* 93 */
-/* 94 */
-/* 95 (bit affects xusb_dev and xusb_dev_src) */
-
-/* 96 */
-/* 97 */
-/* 98 */
-#define TEGRA114_CLK_MSELECT 99
-#define TEGRA114_CLK_TSENSOR 100
-#define TEGRA114_CLK_I2S3 101
-#define TEGRA114_CLK_I2S4 102
-#define TEGRA114_CLK_I2C4 103
-#define TEGRA114_CLK_SBC5 104
-#define TEGRA114_CLK_SBC6 105
-#define TEGRA114_CLK_D_AUDIO 106
-#define TEGRA114_CLK_APBIF 107
-#define TEGRA114_CLK_DAM0 108
-#define TEGRA114_CLK_DAM1 109
-#define TEGRA114_CLK_DAM2 110
-#define TEGRA114_CLK_HDA2CODEC_2X 111
-/* 112 */
-#define TEGRA114_CLK_AUDIO0_2X 113
-#define TEGRA114_CLK_AUDIO1_2X 114
-#define TEGRA114_CLK_AUDIO2_2X 115
-#define TEGRA114_CLK_AUDIO3_2X 116
-#define TEGRA114_CLK_AUDIO4_2X 117
-#define TEGRA114_CLK_SPDIF_2X 118
-#define TEGRA114_CLK_ACTMON 119
-#define TEGRA114_CLK_EXTERN1 120
-#define TEGRA114_CLK_EXTERN2 121
-#define TEGRA114_CLK_EXTERN3 122
-/* 123 */
-/* 124 */
-#define TEGRA114_CLK_HDA 125
-/* 126 */
-#define TEGRA114_CLK_SE 127
-
-#define TEGRA114_CLK_HDA2HDMI 128
-/* 129 */
-/* 130 */
-/* 131 */
-/* 132 */
-/* 133 */
-/* 134 */
-/* 135 */
-/* 136 */
-/* 137

[PATCH v2 15/24] tegra: drop dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream.

Small driver adjustment to fix compatibility.

Signed-off-by: Caleb Connolly 
---
 arch/arm/dts/tegra186.dtsi   |   2 +-
 drivers/mailbox/tegra-hsp.c  |   2 +-
 include/dt-bindings/gpio/tegra-gpio.h|  51 --
 include/dt-bindings/mailbox/tegra186-hsp.h   |  19 ---
 include/dt-bindings/memory/tegra114-mc.h |  25 ---
 include/dt-bindings/memory/tegra124-mc.h |  31 
 include/dt-bindings/memory/tegra210-mc.h |  36 
 include/dt-bindings/memory/tegra30-mc.h  |  24 ---
 include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h |   7 -
 include/dt-bindings/pinctrl/pinctrl-tegra.h  |  37 
 include/dt-bindings/power/tegra186-powergate.h   |  28 
 include/dt-bindings/reset/tegra124-car.h |  12 --
 include/dt-bindings/reset/tegra186-reset.h   | 205 ---
 include/dt-bindings/thermal/tegra124-soctherm.h  |  14 --
 14 files changed, 2 insertions(+), 491 deletions(-)

diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index edcb7aacb8ee..58dadc944888 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -313,9 +313,9 @@
};
 
bpmp: bpmp {
compatible = "nvidia,tegra186-bpmp";
-   mboxes = < HSP_MBOX_TYPE_DB HSP_DB_MASTER_BPMP>;
+   mboxes = < TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_BPMP>;
/*
 * In theory, these references, and the configuration in the
 * node these reference point at, are board-specific, since
 * they depend on the BCT's memory carve-out setup, the
diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
index 08c51c40f141..e5a3d8243780 100644
--- a/drivers/mailbox/tegra-hsp.c
+++ b/drivers/mailbox/tegra-hsp.c
@@ -62,9 +62,9 @@ static void tegra_hsp_writel(struct tegra_hsp *thsp, uint32_t 
val,
 
 static int tegra_hsp_db_id(ulong chan_id)
 {
switch (chan_id) {
-   case (HSP_MBOX_TYPE_DB << 16) | HSP_DB_MASTER_BPMP:
+   case (TEGRA_HSP_MBOX_TYPE_DB << 16) | TEGRA_HSP_DB_MASTER_BPMP:
return TEGRA_HSP_DB_ID_BPMP;
default:
debug("Invalid channel ID\n");
return -EINVAL;
diff --git a/include/dt-bindings/gpio/tegra-gpio.h 
b/include/dt-bindings/gpio/tegra-gpio.h
deleted file mode 100644
index a1c09e88e80b..
--- a/include/dt-bindings/gpio/tegra-gpio.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * This header provides constants for binding nvidia,tegra*-gpio.
- *
- * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
- * provide names for this.
- *
- * The second cell contains standard flag values specified in gpio.h.
- */
-
-#ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H
-#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H
-
-#include 
-
-#define TEGRA_GPIO_PORT_A 0
-#define TEGRA_GPIO_PORT_B 1
-#define TEGRA_GPIO_PORT_C 2
-#define TEGRA_GPIO_PORT_D 3
-#define TEGRA_GPIO_PORT_E 4
-#define TEGRA_GPIO_PORT_F 5
-#define TEGRA_GPIO_PORT_G 6
-#define TEGRA_GPIO_PORT_H 7
-#define TEGRA_GPIO_PORT_I 8
-#define TEGRA_GPIO_PORT_J 9
-#define TEGRA_GPIO_PORT_K 10
-#define TEGRA_GPIO_PORT_L 11
-#define TEGRA_GPIO_PORT_M 12
-#define TEGRA_GPIO_PORT_N 13
-#define TEGRA_GPIO_PORT_O 14
-#define TEGRA_GPIO_PORT_P 15
-#define TEGRA_GPIO_PORT_Q 16
-#define TEGRA_GPIO_PORT_R 17
-#define TEGRA_GPIO_PORT_S 18
-#define TEGRA_GPIO_PORT_T 19
-#define TEGRA_GPIO_PORT_U 20
-#define TEGRA_GPIO_PORT_V 21
-#define TEGRA_GPIO_PORT_W 22
-#define TEGRA_GPIO_PORT_X 23
-#define TEGRA_GPIO_PORT_Y 24
-#define TEGRA_GPIO_PORT_Z 25
-#define TEGRA_GPIO_PORT_AA 26
-#define TEGRA_GPIO_PORT_BB 27
-#define TEGRA_GPIO_PORT_CC 28
-#define TEGRA_GPIO_PORT_DD 29
-#define TEGRA_GPIO_PORT_EE 30
-#define TEGRA_GPIO_PORT_FF 31
-
-#define TEGRA_GPIO(port, offset) \
-   ((TEGRA_GPIO_PORT_##port * 8) + offset)
-
-#endif
diff --git a/include/dt-bindings/mailbox/tegra186-hsp.h 
b/include/dt-bindings/mailbox/tegra186-hsp.h
deleted file mode 100644
index b4864325d74b..
--- a/include/dt-bindings/mailbox/tegra186-hsp.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * This header provides constants for binding nvidia,tegra186-hsp.
- *
- * The number with HSP_DB_MASTER prefix indicates the bit that is
- * associated with a master ID in the doorbell registers.
- */
-
-#ifndef _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
-#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
-
-#define HSP_MBOX_TYPE_DB 0x0
-#define HSP_MBOX_TYPE_SM 0x1
-#define HSP_MBOX_TYPE_SS 0x2
-#define HSP_MBOX_TYPE_AS 0x3
-
-#define HSP_DB_MASTER_CCPLEX 17
-#define HSP_DB_MASTER_BPMP 19
-
-#endif
diff --git a/include/dt-bindings/memory/tegra114-mc.h 
b/include/dt-bindings/memory/tegra114-mc.h
deleted file mode 100644
index 8f48985a3139..
--- a/include/dt-bindings/memory/tegra114-mc.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifndef DT_BINDINGS_MEMORY_TEGRA114_MC_H
-#define

[PATCH v2 13/24] ti: drop dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 drivers/net/phy/dp83869.c  |   2 +
 include/dt-bindings/bus/ti-sysc.h  |  28 
 include/dt-bindings/clk/ti-dra7-atl.h  |  40 -
 include/dt-bindings/clock/am3.h| 227 -
 include/dt-bindings/clock/omap4.h  | 149 ---
 include/dt-bindings/clock/omap5.h  | 129 
 include/dt-bindings/media/omap3-isp.h  |  22 ---
 include/dt-bindings/mux/ti-serdes.h| 190 
 include/dt-bindings/net/ti-dp83867.h   |  53 ---
 include/dt-bindings/net/ti-dp83869.h   |  60 
 include/dt-bindings/phy/phy-ti.h   |  21 ---
 include/dt-bindings/pinctrl/am33xx.h   | 172 --
 include/dt-bindings/pinctrl/am43xx.h   |  39 -
 include/dt-bindings/pinctrl/omap.h |  91 
 include/dt-bindings/reset/ti-syscon.h  |  38 -
 include/dt-bindings/soc/ti,sci_pm_domain.h |   9 --
 16 files changed, 2 insertions(+), 1268 deletions(-)

diff --git a/drivers/net/phy/dp83869.c b/drivers/net/phy/dp83869.c
index f9d4782580e9..fa6be1f3ecde 100644
--- a/drivers/net/phy/dp83869.c
+++ b/drivers/net/phy/dp83869.c
@@ -105,8 +105,10 @@
 #define DP83869_IO_MUX_CFG_CLK_O_DISABLE   BIT(6)
 #define DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT 8
 #define DP83869_IO_MUX_CFG_CLK_O_SEL_MASK  \
GENMASK(0x1f, DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT)
+/* Special flag to indicate clock should be off */
+#define DP83869_CLK_O_SEL_OFF  0x
 
 /* CFG3 bits */
 #define DP83869_CFG3_PORT_MIRROR_ENBIT(0)
 
diff --git a/include/dt-bindings/bus/ti-sysc.h 
b/include/dt-bindings/bus/ti-sysc.h
deleted file mode 100644
index eae427454374..
--- a/include/dt-bindings/bus/ti-sysc.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* TI sysc interconnect target module defines */
-
-/* Generic sysc found on omap2 and later, also known as type1 */
-#define SYSC_OMAP2_CLOCKACTIVITY   (3 << 8)
-#define SYSC_OMAP2_EMUFREE (1 << 5)
-#define SYSC_OMAP2_ENAWAKEUP   (1 << 2)
-#define SYSC_OMAP2_SOFTRESET   (1 << 1)
-#define SYSC_OMAP2_AUTOIDLE(1 << 0)
-
-/* Generic sysc found on omap4 and later, also known as type2 */
-#define SYSC_OMAP4_DMADISABLE  (1 << 16)
-#define SYSC_OMAP4_FREEEMU (1 << 1)/* Also known as 
EMUFREE */
-#define SYSC_OMAP4_SOFTRESET   (1 << 0)
-
-/* SmartReflex sysc found on 36xx and later */
-#define SYSC_OMAP3_SR_ENAWAKEUP(1 << 26)
-
-#define SYSC_DRA7_MCAN_ENAWAKEUP   (1 << 4)
-
-/* PRUSS sysc found on AM33xx/AM43xx/AM57xx */
-#define SYSC_PRUSS_SUB_MWAIT   (1 << 5)
-#define SYSC_PRUSS_STANDBY_INIT(1 << 4)
-
-/* SYSCONFIG STANDBYMODE/MIDLEMODE/SIDLEMODE supported by hardware */
-#define SYSC_IDLE_FORCE0
-#define SYSC_IDLE_NO   1
-#define SYSC_IDLE_SMART2
-#define SYSC_IDLE_SMART_WKUP   3
diff --git a/include/dt-bindings/clk/ti-dra7-atl.h 
b/include/dt-bindings/clk/ti-dra7-atl.h
deleted file mode 100644
index 42dd4164f6f4..
--- a/include/dt-bindings/clk/ti-dra7-atl.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This header provides constants for DRA7 ATL (Audio Tracking Logic)
- *
- * The constants defined in this header are used in dts files
- *
- * Copyright (C) 2013 Texas Instruments, Inc.
- *
- * Peter Ujfalusi 
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_DRA7_ATL_H
-#define _DT_BINDINGS_CLK_DRA7_ATL_H
-
-#define DRA7_ATL_WS_MCASP1_FSR 0
-#define DRA7_ATL_WS_MCASP1_FSX 1
-#define DRA7_ATL_WS_MCASP2_FSR 2
-#define DRA7_ATL_WS_MCASP2_FSX 3
-#define DRA7_ATL_WS_MCASP3_FSX 4
-#define DRA7_ATL_WS_MCASP4_FSX 5
-#define DRA7_ATL_WS_MCASP5_FSX 6
-#define DRA7_ATL_WS_MCASP6_FSX 7
-#define DRA7_ATL_WS_MCASP7_FSX 8
-#define DRA7_ATL_WS_MCASP8_FSX 9
-#define DRA7_ATL_WS_MCASP8_AHCLKX  10
-#define DRA7_ATL_WS_XREF_CLK3  11
-#define DRA7_ATL_WS_XREF_CLK0  12
-#define DRA7_ATL_WS_XREF_CLK1  13
-#define DRA7_ATL_WS_XREF_CLK2  14
-#define DRA7_ATL_WS_OSC1_X115
-
-#endif
diff --git a/include/dt-bindings/clock/am3.h b/include/dt-bindings/clock/am3.h
deleted file mode 100644
index 86a8806e2140..
--- a/include/dt-bindings/clock/am3.h
+++ /dev/null
@@ -1,227 +0,0 @@
-/*
- * Copyright

[PATCH v2 11/24] exynos: drop dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream.

Small driver and DTS adjustments to use upstream headers.

Signed-off-by: Caleb Connolly 
---
 arch/arm/dts/exynos7420.dtsi |   2 +-
 drivers/clk/exynos/clk-exynos7420.c  |   2 +-
 include/dt-bindings/clock/exynos7420-clk.h   | 207 
 include/dt-bindings/clock/exynos850.h| 337 ---
 include/dt-bindings/soc/samsung,exynos-usi.h |  17 --
 5 files changed, 2 insertions(+), 563 deletions(-)

diff --git a/arch/arm/dts/exynos7420.dtsi b/arch/arm/dts/exynos7420.dtsi
index 373f48cf2eca..ba9666f3de01 100644
--- a/arch/arm/dts/exynos7420.dtsi
+++ b/arch/arm/dts/exynos7420.dtsi
@@ -7,9 +7,9 @@
  */
 
 /dts-v1/;
 #include "skeleton.dtsi"
-#include 
+#include 
 / {
compatible = "samsung,exynos7420";
 
fin_pll: xxti {
diff --git a/drivers/clk/exynos/clk-exynos7420.c 
b/drivers/clk/exynos/clk-exynos7420.c
index 9caa932e12fb..cd6d67a0752b 100644
--- a/drivers/clk/exynos/clk-exynos7420.c
+++ b/drivers/clk/exynos/clk-exynos7420.c
@@ -10,9 +10,9 @@
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #define PLL145X_MDIV_SHIFT 16
 #define PLL145X_MDIV_MASK  0x3ff
 #define PLL145X_PDIV_SHIFT 8
diff --git a/include/dt-bindings/clock/exynos7420-clk.h 
b/include/dt-bindings/clock/exynos7420-clk.h
deleted file mode 100644
index 10c558611085..
--- a/include/dt-bindings/clock/exynos7420-clk.h
+++ /dev/null
@@ -1,207 +0,0 @@
-/*
- * Copyright (c) 2014 Samsung Electronics Co., Ltd.
- * Author: Naveen Krishna Ch 
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef _DT_BINDINGS_CLOCK_EXYNOS7_H
-#define _DT_BINDINGS_CLOCK_EXYNOS7_H
-
-/* TOPC */
-#define DOUT_ACLK_PERIS1
-#define DOUT_SCLK_BUS0_PLL 2
-#define DOUT_SCLK_BUS1_PLL 3
-#define DOUT_SCLK_CC_PLL   4
-#define DOUT_SCLK_MFC_PLL  5
-#define DOUT_ACLK_CCORE_1336
-#define DOUT_ACLK_MSCL_532 7
-#define ACLK_MSCL_532  8
-#define DOUT_SCLK_AUD_PLL  9
-#define FOUT_AUD_PLL   10
-#define SCLK_AUD_PLL   11
-#define SCLK_MFC_PLL_B 12
-#define SCLK_MFC_PLL_A 13
-#define SCLK_BUS1_PLL_B14
-#define SCLK_BUS1_PLL_A15
-#define SCLK_BUS0_PLL_B16
-#define SCLK_BUS0_PLL_A17
-#define SCLK_CC_PLL_B  18
-#define SCLK_CC_PLL_A  19
-#define ACLK_CCORE_133 20
-#define ACLK_PERIS_66  21
-#define TOPC_NR_CLK22
-
-/* TOP0 */
-#define DOUT_ACLK_PERIC1   1
-#define DOUT_ACLK_PERIC0   2
-#define CLK_SCLK_UART0 3
-#define CLK_SCLK_UART1 4
-#define CLK_SCLK_UART2 5
-#define CLK_SCLK_UART3 6
-#define CLK_SCLK_SPI0  7
-#define CLK_SCLK_SPI1  8
-#define CLK_SCLK_SPI2  9
-#define CLK_SCLK_SPI3  10
-#define CLK_SCLK_SPI4  11
-#define CLK_SCLK_SPDIF 12
-#define CLK_SCLK_PCM1  13
-#define CLK_SCLK_I2S1  14
-#define CLK_ACLK_PERIC0_66 15
-#define CLK_ACLK_PERIC1_66 16
-#define TOP0_NR_CLK17
-
-/* TOP1 */
-#define DOUT_ACLK_FSYS1_2001
-#define DOUT_ACLK_FSYS0_2002
-#define DOUT_SCLK_MMC2 3
-#define DOUT_SCLK_MMC1 4
-#define DOUT_SCLK_MMC0 5
-#define CLK_SCLK_MMC2  6
-#define CLK_SCLK_MMC1  7
-#define CLK_SCLK_MMC0  8
-#define CLK_ACLK_FSYS0_200 9
-#define CLK_ACLK_FSYS1_200 10
-#define CLK_SCLK_PHY_FSYS1 11
-#define CLK_SCLK_PHY_FSYS1_26M 12
-#define MOUT_SCLK_UFSUNIPRO20  13
-#define DOUT_SCLK_UFSUNIPRO20  14
-#define CLK_SCLK_UFSUNIPRO20   15
-#define DOUT_SCLK_PHY_FSYS116
-#define DOUT_SCLK_PHY_FSYS1_26M17
-#define TOP1_NR_CLK18
-
-/* CCORE */
-#define PCLK_RTC   1
-#define CCORE_NR_CLK   2
-
-/* PERIC0 */
-#define PCLK_UART0 1
-#define SCLK_UART0 2
-#define PCLK_HSI2C03
-#define PCLK_HSI2C14
-#define PCLK_HSI2C45
-#define PCLK_HSI2C56
-#define PCLK_HSI2C97
-#define PCLK_HSI2C10   8
-#define PCLK_HSI2C11   9
-#define PCLK_PWM   10
-#define SCLK_PWM   11
-#define PCLK_ADCIF 12
-#define

[PATCH v2 12/24] bcm: drop dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream

Fix bcm6318 USB clock name

Signed-off-by: Caleb Connolly 
---
 arch/mips/dts/brcm,bcm6318.dtsi|  2 +-
 include/dt-bindings/clock/bcm-nsp.h| 51 
 include/dt-bindings/clock/bcm2835-aux.h|  9 -
 include/dt-bindings/clock/bcm2835.h| 62 --
 include/dt-bindings/clock/bcm6318-clock.h  | 47 --
 include/dt-bindings/clock/bcm63268-clock.h | 51 
 include/dt-bindings/clock/bcm6328-clock.h  | 24 
 include/dt-bindings/clock/bcm6358-clock.h  | 23 ---
 include/dt-bindings/clock/bcm6362-clock.h  | 32 ---
 include/dt-bindings/clock/bcm6368-clock.h  | 30 ---
 include/dt-bindings/pinctrl/bcm2835.h  | 26 -
 include/dt-bindings/reset/bcm6318-reset.h  | 25 
 include/dt-bindings/reset/bcm63268-reset.h | 31 ---
 include/dt-bindings/reset/bcm6328-reset.h  | 23 ---
 include/dt-bindings/reset/bcm6358-reset.h  | 20 --
 include/dt-bindings/reset/bcm6362-reset.h  | 27 -
 include/dt-bindings/reset/bcm6368-reset.h  | 21 --
 include/dt-bindings/soc/bcm2835-pm.h   | 28 --
 18 files changed, 1 insertion(+), 531 deletions(-)

diff --git a/arch/mips/dts/brcm,bcm6318.dtsi b/arch/mips/dts/brcm,bcm6318.dtsi
index 5813de7bf6b9..b9cc0712f8bc 100644
--- a/arch/mips/dts/brcm,bcm6318.dtsi
+++ b/arch/mips/dts/brcm,bcm6318.dtsi
@@ -181,9 +181,9 @@
usbh: usb-phy@10005200 {
compatible = "brcm,bcm6318-usbh";
reg = <0x10005200 0x30>;
#phy-cells = <0>;
-   clocks = <_clk BCM6318_CLK_USB>;
+   clocks = <_clk BCM6318_CLK_USBD>;
clock-names = "usbh";
power-domains = <_pwr BCM6318_PWR_USB>;
resets = <_rst BCM6318_RST_USBH>;
 
diff --git a/include/dt-bindings/clock/bcm-nsp.h 
b/include/dt-bindings/clock/bcm-nsp.h
deleted file mode 100644
index ad5827cde782..
--- a/include/dt-bindings/clock/bcm-nsp.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- * * Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in
- *   the documentation and/or other materials provided with the
- *   distribution.
- * * Neither the name of Broadcom Corporation nor the names of its
- *   contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _CLOCK_BCM_NSP_H
-#define _CLOCK_BCM_NSP_H
-
-/* GENPLL clock channel ID */
-#define BCM_NSP_GENPLL 0
-#define BCM_NSP_GENPLL_PHY_CLK 1
-#define BCM_NSP_GENPLL_ENET_SW_CLK 2
-#define BCM_NSP_GENPLL_USB_PHY_REF_CLK 3
-#define BCM_NSP_GENPLL_IPROCFAST_CLK   4
-#define BCM_NSP_GENPLL_SATA1_CLK   5
-#define BCM_NSP_GENPLL_SATA2_CLK   6
-
-/* LCPLL0 clock channel ID */
-#define BCM_NSP_LCPLL0 0
-#define BCM_NSP_LCPLL0_PCIE_PHY_REF_CLK1
-#define BCM_NSP_LCPLL0_SDIO_CLK2
-#define BCM_NSP_LCPLL0_DDR_PHY_CLK 3
-
-#endif /* _CLOCK_BCM_NSP_H */
diff --git a/include/dt-bindings/clock/bcm2835-aux.h 
b/include/dt-bindings/clock/bcm2835-aux.h
deleted file mode 100644
index bb79de383a3b..
--- a/include/dt-bindings/clock/bcm2835-aux.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2015 Broadcom Corporation
- */
-
-#define BCM2835_AUX_CLOCK_UART 0
-#define BCM2835_AUX_CLOCK_SPI1 1
-#define BCM2835_AUX_CLOCK_SPI2 2
-#define

[PATCH v2 10/24] rockchip: drop remaining dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream.

Small driver adjustment to fix compatibility, adjusted rk3368-sheep.dts
to replace some GPIO defines with literals.

Signed-off-by: Caleb Connolly 
---
 arch/arm/dts/rk3368-sheep.dts |   8 +-
 drivers/pinctrl/rockchip/pinctrl-rk3568.c | 186 +++---
 include/dt-bindings/pinctrl/rockchip.h|  60 --
 include/dt-bindings/power/px30-power.h|  27 -
 include/dt-bindings/power/rk3066-power.h  |  22 -
 include/dt-bindings/power/rk3188-power.h  |  24 -
 include/dt-bindings/power/rk3228-power.h  |  21 -
 include/dt-bindings/power/rk3288-power.h  |  32 -
 include/dt-bindings/power/rk3328-power.h  |  19 -
 include/dt-bindings/power/rk3399-power.h  |  53 --
 include/dt-bindings/power/rk3568-power.h  |  32 -
 include/dt-bindings/power/rk3588-power.h  |  69 --
 include/dt-bindings/power/rockchip,rv1126-power.h |  35 -
 include/dt-bindings/reset/rockchip,rk3588-cru.h   | 754 --
 include/dt-bindings/soc/rockchip,boot-mode.h  |  16 -
 include/dt-bindings/soc/rockchip,vop2.h   |  18 -
 16 files changed, 97 insertions(+), 1279 deletions(-)

diff --git a/arch/arm/dts/rk3368-sheep.dts b/arch/arm/dts/rk3368-sheep.dts
index 120dec1a3de9..03fb4c3e8f8b 100644
--- a/arch/arm/dts/rk3368-sheep.dts
+++ b/arch/arm/dts/rk3368-sheep.dts
@@ -237,25 +237,25 @@
 
  {
ir {
ir_int: ir-int {
-   rockchip,pins = <3 30 RK_FUNC_GPIO _pull_none>;
+   rockchip,pins = <3 30 0 _pull_none>;
};
};
 
keys {
pwr_key: pwr-key {
-   rockchip,pins = <0 2 RK_FUNC_GPIO _pull_none>;
+   rockchip,pins = <0 2 0 _pull_none>;
};
};
 
pmic {
pmic_sleep: pmic-sleep {
-   rockchip,pins = <0 0 RK_FUNC_2 _pull_none>;
+   rockchip,pins = <0 0 2 _pull_none>;
};
 
pmic_int: pmic-int {
-   rockchip,pins = <0 5 RK_FUNC_GPIO _pull_up>;
+   rockchip,pins = <0 5 0 _pull_up>;
};
};
 };
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3568.c 
b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
index 1d4391982605..6a49f02ee3be 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3568.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
@@ -12,101 +12,101 @@
 
 #include "pinctrl-rockchip.h"
 
 static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
-   MR_PMUGRF(RK_GPIO0, RK_PB7, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(1, 0, 
0)), /* PWM0 IO mux selection M0 */
-   MR_PMUGRF(RK_GPIO0, RK_PC7, RK_FUNC_2, 0x0110, RK_GENMASK_VAL(1, 0, 
1)), /* PWM0 IO mux selection M1 */
-   MR_PMUGRF(RK_GPIO0, RK_PC0, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(3, 2, 
0)), /* PWM1 IO mux selection M0 */
-   MR_PMUGRF(RK_GPIO0, RK_PB5, RK_FUNC_4, 0x0110, RK_GENMASK_VAL(3, 2, 
1)), /* PWM1 IO mux selection M1 */
-   MR_PMUGRF(RK_GPIO0, RK_PC1, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(5, 4, 
0)), /* PWM2 IO mux selection M0 */
-   MR_PMUGRF(RK_GPIO0, RK_PB6, RK_FUNC_4, 0x0110, RK_GENMASK_VAL(5, 4, 
1)), /* PWM2 IO mux selection M1 */
-   MR_TOPGRF(RK_GPIO0, RK_PB3, RK_FUNC_2, 0x0300, RK_GENMASK_VAL(0, 0, 
0)), /* CAN0 IO mux selection M0 */
-   MR_TOPGRF(RK_GPIO2, RK_PA1, RK_FUNC_4, 0x0300, RK_GENMASK_VAL(0, 0, 
1)), /* CAN0 IO mux selection M1 */
-   MR_TOPGRF(RK_GPIO1, RK_PA1, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(2, 2, 
0)), /* CAN1 IO mux selection M0 */
-   MR_TOPGRF(RK_GPIO4, RK_PC3, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(2, 2, 
1)), /* CAN1 IO mux selection M1 */
-   MR_TOPGRF(RK_GPIO4, RK_PB5, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(4, 4, 
0)), /* CAN2 IO mux selection M0 */
-   MR_TOPGRF(RK_GPIO2, RK_PB2, RK_FUNC_4, 0x0300, RK_GENMASK_VAL(4, 4, 
1)), /* CAN2 IO mux selection M1 */
-   MR_TOPGRF(RK_GPIO4, RK_PC4, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(6, 6, 
0)), /* EDPDP_HPDIN IO mux selection M0 */
-   MR_TOPGRF(RK_GPIO0, RK_PC2, RK_FUNC_2, 0x0300, RK_GENMASK_VAL(6, 6, 
1)), /* EDPDP_HPDIN IO mux selection M1 */
-   MR_TOPGRF(RK_GPIO3, RK_PB1, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(8, 8, 
0)), /* GMAC1 IO mux selection M0 */
-   MR_TOPGRF(RK_GPIO4, RK_PA7, RK_FUNC_3, 0x0300, RK_GENMASK_VAL(8, 8, 
1)), /* GMAC1 IO mux selection M1 */
-   MR_TOPGRF(RK_GPIO4, RK_PD1, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(10, 10, 
0)), /* HDMITX IO mux selection M0 */
-   MR_TOPGRF(RK_GPIO0, RK_PC7, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(10, 10, 
1)), /* HDMITX IO mux selection M1 */
-   MR_TOPGRF(RK_GPIO0, RK_PB6, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(14, 14, 
0)), /* I2C2 IO mux selection M0 */
-   MR_TOPGRF(RK_GPIO4, RK_PB4, RK_FUNC_1, 0x0300, RK_GENMASK_VAL(14, 14, 
1)), /* I2C2 IO mux selection M1 */
-   MR_TOPGRF(RK_GPIO1, RK_PA0, RK_FUNC_1, 0x0304, RK_GENMASK_VAL(0, 0, 
0)), /* I2C3

[PATCH v2 08/24] stm: drop dt-binding headers

2024-03-21 Thread Caleb Connolly

Dropped in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/ste-ab8500.h |  12 -
 include/dt-bindings/clock/stih407-clks.h   |  90 ---
 include/dt-bindings/clock/stih410-clks.h   |  25 --
 include/dt-bindings/clock/stm32fx-clock.h  |  63 -
 include/dt-bindings/clock/stm32h7-clks.h   | 167 -
 include/dt-bindings/clock/stm32mp1-clks.h  | 274 -
 include/dt-bindings/clock/stm32mp13-clks.h | 229 -
 include/dt-bindings/mfd/st,stpmic1.h   |  50 
 include/dt-bindings/mfd/st-lpc.h   |  16 --
 include/dt-bindings/mfd/stm32f4-rcc.h  | 108 
 include/dt-bindings/mfd/stm32f7-rcc.h  | 116 -
 include/dt-bindings/mfd/stm32h7-rcc.h  | 138 ---
 include/dt-bindings/pinctrl/stm32-pinfunc.h|  45 
 .../dt-bindings/regulator/st,stm32mp13-regulator.h |  42 
 include/dt-bindings/reset/stih407-resets.h |  65 -
 include/dt-bindings/reset/stm32mp1-resets.h| 123 -
 include/dt-bindings/reset/stm32mp13-resets.h   | 100 
 17 files changed, 1663 deletions(-)

diff --git a/include/dt-bindings/clock/ste-ab8500.h 
b/include/dt-bindings/clock/ste-ab8500.h
deleted file mode 100644
index fb42dd0cab5f..
--- a/include/dt-bindings/clock/ste-ab8500.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __STE_CLK_AB8500_H__
-#define __STE_CLK_AB8500_H__
-
-#define AB8500_SYSCLK_BUF2 0
-#define AB8500_SYSCLK_BUF3 1
-#define AB8500_SYSCLK_BUF4 2
-#define AB8500_SYSCLK_ULP  3
-#define AB8500_SYSCLK_INT  4
-#define AB8500_SYSCLK_AUDIO5
-
-#endif
diff --git a/include/dt-bindings/clock/stih407-clks.h 
b/include/dt-bindings/clock/stih407-clks.h
deleted file mode 100644
index 082edd9badfa..
--- a/include/dt-bindings/clock/stih407-clks.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * This header provides constants clk index STMicroelectronics
- * STiH407 SoC.
- */
-#ifndef _DT_BINDINGS_CLK_STIH407
-#define _DT_BINDINGS_CLK_STIH407
-
-/* CLOCKGEN A0 */
-#define CLK_IC_LMI00
-#define CLK_IC_LMI11
-
-/* CLOCKGEN C0 */
-#define CLK_ICN_GPU0
-#define CLK_FDMA   1
-#define CLK_NAND   2
-#define CLK_HVA3
-#define CLK_PROC_STFE  4
-#define CLK_PROC_TP5
-#define CLK_RX_ICN_DMU 6
-#define CLK_RX_ICN_DISP_0  6
-#define CLK_RX_ICN_DISP_1  6
-#define CLK_RX_ICN_HVA 7
-#define CLK_RX_ICN_TS  7
-#define CLK_ICN_CPU8
-#define CLK_TX_ICN_DMU 9
-#define CLK_TX_ICN_HVA 9
-#define CLK_TX_ICN_TS  9
-#define CLK_ICN_COMPO  9
-#define CLK_MMC_0  10
-#define CLK_MMC_1  11
-#define CLK_JPEGDEC12
-#define CLK_ICN_REG13
-#define CLK_TRACE_A9   13
-#define CLK_PTI_STM13
-#define CLK_EXT2F_A9   13
-#define CLK_IC_BDISP_0 14
-#define CLK_IC_BDISP_1 15
-#define CLK_PP_DMU 16
-#define CLK_VID_DMU17
-#define CLK_DSS_LPC18
-#define CLK_ST231_AUD_019
-#define CLK_ST231_GP_0 19
-#define CLK_ST231_GP_1 20
-#define CLK_ST231_DMU  21
-#define CLK_ICN_LMI22
-#define CLK_TX_ICN_DISP_0  23
-#define CLK_TX_ICN_DISP_1  23
-#define CLK_ICN_SBC24
-#define CLK_STFE_FRC2  25
-#define CLK_ETH_PHY26
-#define CLK_ETH_REF_PHYCLK 27
-#define CLK_FLASH_PROMIP   28
-#define CLK_MAIN_DISP  29
-#define CLK_AUX_DISP   30
-#define CLK_COMPO_DVP  31
-
-/* CLOCKGEN D0 */
-#define CLK_PCM_0  0
-#define CLK_PCM_1  1
-#define CLK_PCM_2  2
-#define CLK_SPDIFF 3
-
-/* CLOCKGEN D2 */
-#define CLK_PIX_MAIN_DISP  0
-#define CLK_PIX_PIP1
-#define CLK_PIX_GDP1   2
-#define CLK_PIX_GDP2   3
-#define CLK_PIX_GDP3   4
-#define CLK_PIX_GDP4   5
-#define CLK_PIX_AUX_DISP   6
-#define CLK_DENC   7
-#define CLK_PIX_HDDAC  8
-#define CLK_HDDAC  9
-#define CLK_SDDAC  10
-#define CLK_PIX_DVO11
-#define CLK_DVO12
-#define CLK_PIX_HDMI   13
-#define CLK_TMDS_HDMI  14
-#define CLK_REF_HDMIPHY15
-
-/* CLOCKGEN D3 */
-#define CLK_STFE_FRC1  0
-#define CLK_TSOUT_01
-#define CLK_TSOUT_12
-#define CLK_MCHI   3
-#define CLK_VSENS_COMPO4
-#define CLK_FRC1_REMOTE5
-#define CLK_LPC_0  6
-#define CLK_LPC_1  7
-#endif
diff --git a/include/dt-bindings/clock/stih410-clks.h 
b/include/dt-bindings/clock/stih410-clks.h
deleted file mode 100644
index

[PATCH v2 07/24] amlogic: drop dt-binding headers

2024-03-21 Thread Caleb Connolly

Dropped in favour of dts/upstream

Signed-off-by: Caleb Connolly 
Reviewed-by: Neil Armstrong 
Tested-by: Neil Armstrong  # on AML-S805X-AC
Tested-by: Neil Armstrong  # on AML-S905X-CC
Tested-by: Neil Armstrong  # on BPI-M2S
Tested-by: Neil Armstrong  # on BPI-M5
---
 .../clock/amlogic,a1-peripherals-clkc.h| 168 -
 include/dt-bindings/clock/amlogic,a1-pll-clkc.h|  25 ---
 include/dt-bindings/clock/axg-aoclkc.h |  31 
 include/dt-bindings/clock/axg-audio-clkc.h |  94 
 include/dt-bindings/clock/axg-clkc.h   | 100 
 include/dt-bindings/clock/g12a-aoclkc.h|  36 -
 include/dt-bindings/clock/g12a-clkc.h  | 153 ---
 include/dt-bindings/clock/gxbb-aoclkc.h|  74 -
 include/dt-bindings/clock/gxbb-clkc.h  | 151 --
 include/dt-bindings/gpio/meson-a1-gpio.h   |  73 -
 include/dt-bindings/gpio/meson-axg-gpio.h  | 116 --
 include/dt-bindings/gpio/meson-g12a-gpio.h | 114 --
 include/dt-bindings/gpio/meson-gxbb-gpio.h | 148 --
 include/dt-bindings/gpio/meson-gxl-gpio.h  | 125 ---
 include/dt-bindings/power/meson-a1-power.h |  32 
 include/dt-bindings/power/meson-axg-power.h|  14 --
 include/dt-bindings/power/meson-g12a-power.h   |  13 --
 include/dt-bindings/power/meson-gxbb-power.h   |  13 --
 include/dt-bindings/power/meson-sm1-power.h|  18 ---
 include/dt-bindings/reset/amlogic,meson-a1-reset.h |  76 --
 .../reset/amlogic,meson-axg-audio-arb.h|  19 ---
 .../dt-bindings/reset/amlogic,meson-axg-reset.h| 123 ---
 .../reset/amlogic,meson-g12a-audio-reset.h |  53 ---
 .../dt-bindings/reset/amlogic,meson-g12a-reset.h   | 137 -
 .../dt-bindings/reset/amlogic,meson-gxbb-reset.h   | 161 
 include/dt-bindings/reset/axg-aoclkc.h |  20 ---
 include/dt-bindings/reset/g12a-aoclkc.h|  18 ---
 include/dt-bindings/reset/gxbb-aoclkc.h|  66 
 include/dt-bindings/sound/meson-aiu.h  |  18 ---
 include/dt-bindings/sound/meson-g12a-toacodec.h|  10 --
 include/dt-bindings/sound/meson-g12a-tohdmitx.h|  13 --
 31 files changed, 2212 deletions(-)

diff --git a/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h 
b/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h
deleted file mode 100644
index 06f198ee7623..
--- a/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h
+++ /dev/null
@@ -1,168 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
-/*
- * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
- * Author: Jian Hu 
- *
- * Copyright (c) 2023, SberDevices. All Rights Reserved.
- * Author: Dmitry Rokosov 
- */
-
-#ifndef __A1_PERIPHERALS_CLKC_H
-#define __A1_PERIPHERALS_CLKC_H
-
-#define CLKID_XTAL_IN  0
-#define CLKID_FIXPLL_IN1
-#define CLKID_USB_PHY_IN   2
-#define CLKID_USB_CTRL_IN  3
-#define CLKID_HIFIPLL_IN   4
-#define CLKID_SYSPLL_IN5
-#define CLKID_DDS_IN   6
-#define CLKID_SYS  7
-#define CLKID_CLKTREE  8
-#define CLKID_RESET_CTRL   9
-#define CLKID_ANALOG_CTRL  10
-#define CLKID_PWR_CTRL 11
-#define CLKID_PAD_CTRL 12
-#define CLKID_SYS_CTRL 13
-#define CLKID_TEMP_SENSOR  14
-#define CLKID_AM2AXI_DIV   15
-#define CLKID_SPICC_B  16
-#define CLKID_SPICC_A  17
-#define CLKID_MSR  18
-#define CLKID_AUDIO19
-#define CLKID_JTAG_CTRL20
-#define CLKID_SARADC_EN21
-#define CLKID_PWM_EF   22
-#define CLKID_PWM_CD   23
-#define CLKID_PWM_AB   24
-#define CLKID_CEC  25
-#define CLKID_I2C_S26
-#define CLKID_IR_CTRL  27
-#define CLKID_I2C_M_D  28
-#define CLKID_I2C_M_C  29
-#define CLKID_I2C_M_B  30
-#define CLKID_I2C_M_A  31
-#define CLKID_ACODEC   32
-#define CLKID_OTP  33
-#define CLKID_SD_EMMC_A34
-#define CLKID_USB_PHY  35
-#define CLKID_USB_CTRL 36
-#define CLKID_SYS_DSPB 37
-#define CLKID_SYS_DSPA 38
-#define CLKID_DMA  39
-#define CLKID_IRQ_CTRL 40
-#define CLKID_NIC  41
-#define CLKID_GIC  42
-#define CLKID_UART_C   43
-#define CLKID_UART_B   44
-#define CLKID_UART_A   45
-#define CLKID_SYS_PSRAM46
-#define CLKID_RSA  47
-#define CLKID_CORESIGHT48
-#define CLKID_AM2AXI_VAD   49
-#define CLKID_AUDIO_VAD50
-#define CLKID_AXI_DMC  51
-#define CLKID_AXI_PSRAM52
-#define CLKID_RAMB 53
-#define CLKID_RAMA 54
-#define

[PATCH v2 06/24] imx: drop dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/interconnect/fsl,imx8mp.h | 59 ---
 include/dt-bindings/interconnect/imx8mm.h | 50 
 include/dt-bindings/interconnect/imx8mn.h | 41 
 include/dt-bindings/interconnect/imx8mq.h | 48 ---
 include/dt-bindings/phy/phy-imx8-pcie.h   | 14 --
 include/dt-bindings/power/fsl,imx93-power.h   | 15 --
 include/dt-bindings/power/imx7-power.h| 13 --
 include/dt-bindings/power/imx8mm-power.h  | 31 -
 include/dt-bindings/power/imx8mn-power.h  | 20 
 include/dt-bindings/power/imx8mp-power.h  | 59 ---
 include/dt-bindings/power/imx8mq-power.h  | 24 --
 include/dt-bindings/power/imx8ulp-power.h | 26 ---
 include/dt-bindings/reset/imx7-reset.h| 52 -
 include/dt-bindings/reset/imx8mp-reset.h  | 50 
 include/dt-bindings/reset/imx8mq-reset.h  | 67 ---
 include/dt-bindings/reset/imx8ulp-pcc-reset.h | 59 ---
 include/dt-bindings/sound/fsl-imx-audmux.h| 64 -
 17 files changed, 692 deletions(-)

diff --git a/include/dt-bindings/interconnect/fsl,imx8mp.h 
b/include/dt-bindings/interconnect/fsl,imx8mp.h
deleted file mode 100644
index 7357d417529a..
--- a/include/dt-bindings/interconnect/fsl,imx8mp.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR MIT */
-/*
- * Interconnect framework driver for i.MX SoC
- *
- * Copyright 2022 NXP
- * Peng Fan 
- */
-
-#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MP_H
-#define __DT_BINDINGS_INTERCONNECT_IMX8MP_H
-
-#define IMX8MP_ICN_NOC 0
-#define IMX8MP_ICN_MAIN1
-#define IMX8MP_ICS_DRAM2
-#define IMX8MP_ICS_OCRAM   3
-#define IMX8MP_ICM_A53 4
-#define IMX8MP_ICM_SUPERMIX5
-#define IMX8MP_ICM_GIC 6
-#define IMX8MP_ICM_MLMIX   7
-
-#define IMX8MP_ICN_AUDIO   8
-#define IMX8MP_ICM_DSP 9
-#define IMX8MP_ICM_SDMA2PER10
-#define IMX8MP_ICM_SDMA2BURST  11
-#define IMX8MP_ICM_SDMA3PER12
-#define IMX8MP_ICM_SDMA3BURST  13
-#define IMX8MP_ICM_EDMA14
-
-#define IMX8MP_ICN_GPU 15
-#define IMX8MP_ICM_GPU2D   16
-#define IMX8MP_ICM_GPU3D   17
-
-#define IMX8MP_ICN_HDMI18
-#define IMX8MP_ICM_HRV 19
-#define IMX8MP_ICM_LCDIF_HDMI  20
-#define IMX8MP_ICM_HDCP21
-
-#define IMX8MP_ICN_HSIO22
-#define IMX8MP_ICM_NOC_PCIE23
-#define IMX8MP_ICM_USB124
-#define IMX8MP_ICM_USB225
-#define IMX8MP_ICM_PCIE26
-
-#define IMX8MP_ICN_MEDIA   27
-#define IMX8MP_ICM_LCDIF_RD28
-#define IMX8MP_ICM_LCDIF_WR29
-#define IMX8MP_ICM_ISI030
-#define IMX8MP_ICM_ISI131
-#define IMX8MP_ICM_ISI232
-#define IMX8MP_ICM_ISP033
-#define IMX8MP_ICM_ISP134
-#define IMX8MP_ICM_DWE 35
-
-#define IMX8MP_ICN_VIDEO   36
-#define IMX8MP_ICM_VPU_G1  37
-#define IMX8MP_ICM_VPU_G2  38
-#define IMX8MP_ICM_VPU_H1  39
-
-#endif /* __DT_BINDINGS_INTERCONNECT_IMX8MP_H */
diff --git a/include/dt-bindings/interconnect/imx8mm.h 
b/include/dt-bindings/interconnect/imx8mm.h
deleted file mode 100644
index 8f10bb06cb59..
--- a/include/dt-bindings/interconnect/imx8mm.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Interconnect framework driver for i.MX SoC
- *
- * Copyright (c) 2019, BayLibre
- * Copyright (c) 2019-2020, NXP
- * Author: Alexandre Bailon 
- */
-
-#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MM_H
-#define __DT_BINDINGS_INTERCONNECT_IMX8MM_H
-
-#define IMX8MM_ICN_NOC 1
-#define IMX8MM_ICS_DRAM2
-#define IMX8MM_ICS_OCRAM   3
-#define IMX8MM_ICM_A53 4
-
-#define IMX8MM_ICM_VPU_H1  5
-#define IMX8MM_ICM_VPU_G1  6
-#define IMX8MM_ICM_VPU_G2  7
-#define IMX8MM_ICN_VIDEO   8
-
-#define IMX8MM_ICM_GPU2D   9
-#define IMX8MM_ICM_GPU3D   10
-#define IMX8MM_ICN_GPU 11
-
-#define IMX8MM_ICM_CSI 12
-#define IMX8MM_ICM_LCDIF   13
-#define IMX8MM_ICN_MIPI14
-
-#define IMX8MM_ICM_USB115
-#define IMX8MM_ICM_USB216
-#define IMX8MM_ICM_PCIE17
-#define IMX8MM_ICN_HSIO18
-
-#define IMX8MM_ICM_SDMA2   19
-#define IMX8MM_ICM_SDMA3   20
-#define IMX8MM_ICN_AUDIO   21
-
-#define IMX8MM_ICN_ENET22
-#define IMX8MM_ICM_ENET23
-
-#define IMX8MM_ICN_MAIN24
-#define IMX8MM_ICM_NAND25
-#define IMX8MM_ICM_SDMA1   26
-#define IMX8MM_ICM_USDHC1  27
-#define IMX8MM_ICM_USDHC2  28
-#define IMX8MM_ICM_USDHC3  29
-
-#endif /*

[PATCH v2 05/24] imx: drop clock dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/imx5-clock.h  | 219 -
 include/dt-bindings/clock/imx6qdl-clock.h   | 278 -
 include/dt-bindings/clock/imx6sl-clock.h| 178 ---
 include/dt-bindings/clock/imx6sll-clock.h   | 210 -
 include/dt-bindings/clock/imx6sx-clock.h| 281 -
 include/dt-bindings/clock/imx6ul-clock.h| 262 
 include/dt-bindings/clock/imx7d-clock.h | 456 
 include/dt-bindings/clock/imx7ulp-clock.h   | 119 
 include/dt-bindings/clock/imx8mm-clock.h| 286 -
 include/dt-bindings/clock/imx8mn-clock.h| 262 
 include/dt-bindings/clock/imx8mp-clock.h| 401 
 include/dt-bindings/clock/imx8mq-clock.h| 431 --
 include/dt-bindings/clock/imx8ulp-clock.h   | 258 
 include/dt-bindings/clock/imx93-clock.h | 208 -
 include/dt-bindings/clock/imxrt1050-clock.h |  72 -
 15 files changed, 3921 deletions(-)

diff --git a/include/dt-bindings/clock/imx5-clock.h 
b/include/dt-bindings/clock/imx5-clock.h
deleted file mode 100644
index d382fc71aa83..
--- a/include/dt-bindings/clock/imx5-clock.h
+++ /dev/null
@@ -1,219 +0,0 @@
-/*
- * Copyright 2013 Lucas Stach, Pengutronix 
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#ifndef __DT_BINDINGS_CLOCK_IMX5_H
-#define __DT_BINDINGS_CLOCK_IMX5_H
-
-#define IMX5_CLK_DUMMY 0
-#define IMX5_CLK_CKIL  1
-#define IMX5_CLK_OSC   2
-#define IMX5_CLK_CKIH1 3
-#define IMX5_CLK_CKIH2 4
-#define IMX5_CLK_AHB   5
-#define IMX5_CLK_IPG   6
-#define IMX5_CLK_AXI_A 7
-#define IMX5_CLK_AXI_B 8
-#define IMX5_CLK_UART_PRED 9
-#define IMX5_CLK_UART_ROOT 10
-#define IMX5_CLK_ESDHC_A_PRED  11
-#define IMX5_CLK_ESDHC_B_PRED  12
-#define IMX5_CLK_ESDHC_C_SEL   13
-#define IMX5_CLK_ESDHC_D_SEL   14
-#define IMX5_CLK_EMI_SEL   15
-#define IMX5_CLK_EMI_SLOW_PODF 16
-#define IMX5_CLK_NFC_PODF  17
-#define IMX5_CLK_ECSPI_PRED18
-#define IMX5_CLK_ECSPI_PODF19
-#define IMX5_CLK_USBOH3_PRED   20
-#define IMX5_CLK_USBOH3_PODF   21
-#define IMX5_CLK_USB_PHY_PRED  22
-#define IMX5_CLK_USB_PHY_PODF  23
-#define IMX5_CLK_CPU_PODF  24
-#define IMX5_CLK_DI_PRED   25
-#define IMX5_CLK_TVE_SEL   27
-#define IMX5_CLK_UART1_IPG_GATE28
-#define IMX5_CLK_UART1_PER_GATE29
-#define IMX5_CLK_UART2_IPG_GATE30
-#define IMX5_CLK_UART2_PER_GATE31
-#define IMX5_CLK_UART3_IPG_GATE32
-#define IMX5_CLK_UART3_PER_GATE33
-#define IMX5_CLK_I2C1_GATE 34
-#define IMX5_CLK_I2C2_GATE 35
-#define IMX5_CLK_GPT_IPG_GATE  36
-#define IMX5_CLK_PWM1_IPG_GATE 37
-#define IMX5_CLK_PWM1_HF_GATE  38
-#define IMX5_CLK_PWM2_IPG_GATE 39
-#define IMX5_CLK_PWM2_HF_GATE  40
-#define IMX5_CLK_GPT_HF_GATE   41
-#define IMX5_CLK_FEC_GATE  42
-#define IMX5_CLK_USBOH3_PER_GATE   43
-#define IMX5_CLK_ESDHC1_IPG_GATE   44
-#define IMX5_CLK_ESDHC2_IPG_GATE   45
-#define IMX5_CLK_ESDHC3_IPG_GATE   46
-#define IMX5_CLK_ESDHC4_IPG_GATE   47
-#define IMX5_CLK_SSI1_IPG_GATE 48
-#define IMX5_CLK_SSI2_IPG_GATE 49
-#define IMX5_CLK_SSI3_IPG_GATE 50
-#define IMX5_CLK_ECSPI1_IPG_GATE   51
-#define IMX5_CLK_ECSPI1_PER_GATE   52
-#define IMX5_CLK_ECSPI2_IPG_GATE   53
-#define IMX5_CLK_ECSPI2_PER_GATE   54
-#define IMX5_CLK_CSPI_IPG_GATE 55
-#define IMX5_CLK_SDMA_GATE 56
-#define IMX5_CLK_EMI_SLOW_GATE 57
-#define IMX5_CLK_IPU_SEL   58
-#define IMX5_CLK_IPU_GATE  59
-#define IMX5_CLK_NFC_GATE  60
-#define IMX5_CLK_IPU_DI1_GATE  61
-#define IMX5_CLK_VPU_SEL   62
-#define IMX5_CLK_VPU_GATE  63
-#define IMX5_CLK_VPU_REFERENCE_GATE64
-#define IMX5_CLK_UART4_IPG_GATE65
-#define IMX5_CLK_UART4_PER_GATE66
-#define IMX5_CLK_UART5_IPG_GATE67
-#define IMX5_CLK_UART5_PER_GATE68
-#define IMX5_CLK_TVE_GATE  69
-#define IMX5_CLK_TVE_PRED  70
-#define IMX5_CLK_ESDHC1_PER_GATE   71
-#define IMX5_CLK_ESDHC2_PER_GATE   72
-#define IMX5_CLK_ESDHC3_PER_GATE   73
-#define IMX5_CLK_ESDHC4_PER_GATE   74
-#define IMX5_CLK_USB_PHY_GATE  75
-#define

[PATCH v2 04/24] sunxi: drop remaining dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/dma/sun4i-a10.h   |  56 ---
 include/dt-bindings/pinctrl/sun4i-a10.h   |  62 
 include/dt-bindings/reset/sun20i-d1-ccu.h |  79 
 include/dt-bindings/reset/sun20i-d1-r-ccu.h   |  16 
 include/dt-bindings/reset/sun4i-a10-ccu.h |  69 --
 include/dt-bindings/reset/sun50i-a64-ccu.h|  98 ---
 include/dt-bindings/reset/sun50i-h6-ccu.h |  73 ---
 include/dt-bindings/reset/sun50i-h6-r-ccu.h   |  18 
 include/dt-bindings/reset/sun50i-h616-ccu.h   |  70 --
 include/dt-bindings/reset/sun5i-ccu.h |  23 -
 include/dt-bindings/reset/sun6i-a31-ccu.h | 106 -
 include/dt-bindings/reset/sun8i-a23-a33-ccu.h |  87 -
 include/dt-bindings/reset/sun8i-a83t-ccu.h|  98 ---
 include/dt-bindings/reset/sun8i-de2.h |  15 ---
 include/dt-bindings/reset/sun8i-h3-ccu.h  | 106 -
 include/dt-bindings/reset/sun8i-r-ccu.h   |  53 ---
 include/dt-bindings/reset/sun8i-r40-ccu.h | 130 --
 include/dt-bindings/reset/sun8i-v3s-ccu.h |  81 
 include/dt-bindings/reset/sun9i-a80-ccu.h | 102 
 include/dt-bindings/reset/sun9i-a80-de.h  |  58 
 include/dt-bindings/reset/sun9i-a80-usb.h |  56 ---
 include/dt-bindings/reset/suniv-ccu-f1c100s.h |  38 
 22 files changed, 1494 deletions(-)

diff --git a/include/dt-bindings/dma/sun4i-a10.h 
b/include/dt-bindings/dma/sun4i-a10.h
deleted file mode 100644
index 8caba9ef7e9d..
--- a/include/dt-bindings/dma/sun4i-a10.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright 2014 Maxime Ripard
- *
- * Maxime Ripard 
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __DT_BINDINGS_DMA_SUN4I_A10_H_
-#define __DT_BINDINGS_DMA_SUN4I_A10_H_
-
-#define SUN4I_DMA_NORMAL   0
-#define SUN4I_DMA_DEDICATED1
-
-#endif /* __DT_BINDINGS_DMA_SUN4I_A10_H_ */
diff --git a/include/dt-bindings/pinctrl/sun4i-a10.h 
b/include/dt-bindings/pinctrl/sun4i-a10.h
deleted file mode 100644
index f7553c143b40..
--- a/include/dt-bindings/pinctrl/sun4i-a10.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright 2014 Maxime Ripard
- *
- * Maxime Ripard 
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2

[PATCH v2 03/24] sunxi: drop clock dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/sun20i-d1-ccu.h | 158 
 include/dt-bindings/clock/sun20i-d1-r-ccu.h   |  19 ---
 include/dt-bindings/clock/sun4i-a10-ccu.h | 202 --
 include/dt-bindings/clock/sun4i-a10-pll2.h|  53 ---
 include/dt-bindings/clock/sun50i-a64-ccu.h| 138 --
 include/dt-bindings/clock/sun50i-h6-ccu.h | 125 
 include/dt-bindings/clock/sun50i-h6-r-ccu.h   |  27 
 include/dt-bindings/clock/sun50i-h616-ccu.h   | 116 ---
 include/dt-bindings/clock/sun5i-ccu.h |  97 -
 include/dt-bindings/clock/sun6i-a31-ccu.h | 193 
 include/dt-bindings/clock/sun6i-rtc.h |  10 --
 include/dt-bindings/clock/sun7i-a20-ccu.h |  53 ---
 include/dt-bindings/clock/sun8i-a23-a33-ccu.h | 129 
 include/dt-bindings/clock/sun8i-a83t-ccu.h| 140 --
 include/dt-bindings/clock/sun8i-de2.h |  21 ---
 include/dt-bindings/clock/sun8i-h3-ccu.h  | 152 ---
 include/dt-bindings/clock/sun8i-r-ccu.h   |  59 
 include/dt-bindings/clock/sun8i-r40-ccu.h | 191 
 include/dt-bindings/clock/sun8i-tcon-top.h|  11 --
 include/dt-bindings/clock/sun8i-v3s-ccu.h | 111 --
 include/dt-bindings/clock/sun9i-a80-ccu.h | 162 -
 include/dt-bindings/clock/sun9i-a80-de.h  |  80 --
 include/dt-bindings/clock/sun9i-a80-usb.h |  59 
 include/dt-bindings/clock/suniv-ccu-f1c100s.h |  72 -
 24 files changed, 2378 deletions(-)

diff --git a/include/dt-bindings/clock/sun20i-d1-ccu.h 
b/include/dt-bindings/clock/sun20i-d1-ccu.h
deleted file mode 100644
index fdbfb404f92a..
--- a/include/dt-bindings/clock/sun20i-d1-ccu.h
+++ /dev/null
@@ -1,158 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
-/*
- * Copyright (C) 2020 huangzhen...@allwinnertech.com
- * Copyright (C) 2021 Samuel Holland 
- */
-
-#ifndef _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_
-#define _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_
-
-#define CLK_PLL_CPUX   0
-#define CLK_PLL_DDR0   1
-#define CLK_PLL_PERIPH0_4X 2
-#define CLK_PLL_PERIPH0_2X 3
-#define CLK_PLL_PERIPH0_800M   4
-#define CLK_PLL_PERIPH05
-#define CLK_PLL_PERIPH0_DIV3   6
-#define CLK_PLL_VIDEO0_4X  7
-#define CLK_PLL_VIDEO0_2X  8
-#define CLK_PLL_VIDEO0 9
-#define CLK_PLL_VIDEO1_4X  10
-#define CLK_PLL_VIDEO1_2X  11
-#define CLK_PLL_VIDEO1 12
-#define CLK_PLL_VE 13
-#define CLK_PLL_AUDIO0_4X  14
-#define CLK_PLL_AUDIO0_2X  15
-#define CLK_PLL_AUDIO0 16
-#define CLK_PLL_AUDIO1 17
-#define CLK_PLL_AUDIO1_DIV218
-#define CLK_PLL_AUDIO1_DIV519
-#define CLK_CPUX   20
-#define CLK_CPUX_AXI   21
-#define CLK_CPUX_APB   22
-#define CLK_PSI_AHB23
-#define CLK_APB0   24
-#define CLK_APB1   25
-#define CLK_MBUS   26
-#define CLK_DE 27
-#define CLK_BUS_DE 28
-#define CLK_DI 29
-#define CLK_BUS_DI 30
-#define CLK_G2D31
-#define CLK_BUS_G2D32
-#define CLK_CE 33
-#define CLK_BUS_CE 34
-#define CLK_VE 35
-#define CLK_BUS_VE 36
-#define CLK_BUS_DMA37
-#define CLK_BUS_MSGBOX038
-#define CLK_BUS_MSGBOX139
-#define CLK_BUS_MSGBOX240
-#define CLK_BUS_SPINLOCK   41
-#define CLK_BUS_HSTIMER42
-#define CLK_AVS43
-#define CLK_BUS_DBG44
-#define CLK_BUS_PWM45
-#define CLK_BUS_IOMMU  46
-#define CLK_DRAM   47
-#define CLK_MBUS_DMA   48
-#define CLK_MBUS_VE49
-#define CLK_MBUS_CE50
-#define CLK_MBUS_TVIN  51
-#define CLK_MBUS_CSI   52
-#define CLK_MBUS_G2D   53
-#define CLK_MBUS_RISCV 54
-#define CLK_BUS_DRAM   55
-#define CLK_MMC0   56
-#define CLK_MMC1   57
-#define CLK_MMC2   58
-#define CLK_BUS_MMC0   59
-#define CLK_BUS_MMC1   60
-#define CLK_BUS_MMC2   61
-#define CLK_BUS_UART0  62
-#define CLK_BUS_UART1  63
-#define CLK_BUS_UART2  64
-#define CLK_BUS_UART3  65
-#define CLK_BUS_UART4  66
-#define CLK_BUS_UART5  67
-#define CLK_BUS_I2C0   68
-#define CLK_BUS_I2C1   69
-#define CLK_BUS_I2C2   70
-#define CLK_BUS_I2C3   71
-#define CLK_SPI0   72
-#define CLK_SPI1   73
-#define CLK_BUS_SPI0   74
-#define CLK_BUS_SPI1   75
-#define CLK_EMAC_25M   76
-#define CLK_BUS_EMAC   77
-#define CLK_IR_TX  78

[PATCH v2 02/24] qcom: drop remaining dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/dma/qcom-gpi.h |  11 -
 include/dt-bindings/firmware/qcom,scm.h|  39 --
 include/dt-bindings/iio/qcom,spmi-vadc.h   | 300 ---
 include/dt-bindings/interconnect/qcom,msm8916.h| 100 -
 .../dt-bindings/interconnect/qcom,msm8996-cbf.h|  12 -
 include/dt-bindings/interconnect/qcom,msm8996.h| 163 
 include/dt-bindings/interconnect/qcom,osm-l3.h |  15 -
 include/dt-bindings/interconnect/qcom,sdm845.h | 150 
 include/dt-bindings/phy/phy-qcom-qmp.h |  20 -
 include/dt-bindings/phy/phy-qcom-qusb2.h   |  37 --
 include/dt-bindings/pinctrl/qcom,pmic-gpio.h   | 164 
 include/dt-bindings/pinctrl/qcom,pmic-mpp.h| 106 --
 include/dt-bindings/power/qcom-rpmpd.h | 412 -
 .../dt-bindings/regulator/qcom,rpmh-regulator.h|  36 --
 include/dt-bindings/reset/qcom,gcc-msm8916.h   | 100 -
 include/dt-bindings/reset/qcom,sdm845-aoss.h   |  17 -
 include/dt-bindings/reset/qcom,sdm845-pdc.h|  22 --
 include/dt-bindings/soc/qcom,apr.h |  28 --
 include/dt-bindings/soc/qcom,rpmh-rsc.h|  14 -
 include/dt-bindings/sound/qcom,lpass.h |  46 ---
 include/dt-bindings/sound/qcom,q6afe.h |   9 -
 include/dt-bindings/sound/qcom,q6asm.h |  26 --
 include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h | 234 
 include/dt-bindings/sound/qcom,wcd9335.h   |  15 -
 24 files changed, 2076 deletions(-)

diff --git a/include/dt-bindings/dma/qcom-gpi.h 
b/include/dt-bindings/dma/qcom-gpi.h
deleted file mode 100644
index ebda2a37f52a..
--- a/include/dt-bindings/dma/qcom-gpi.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
-/* Copyright (c) 2020, Linaro Ltd.  */
-
-#ifndef __DT_BINDINGS_DMA_QCOM_GPI_H__
-#define __DT_BINDINGS_DMA_QCOM_GPI_H__
-
-#define QCOM_GPI_SPI   1
-#define QCOM_GPI_UART  2
-#define QCOM_GPI_I2C   3
-
-#endif /* __DT_BINDINGS_DMA_QCOM_GPI_H__ */
diff --git a/include/dt-bindings/firmware/qcom,scm.h 
b/include/dt-bindings/firmware/qcom,scm.h
deleted file mode 100644
index 6de8b08e1e79..
--- a/include/dt-bindings/firmware/qcom,scm.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
-/*
- * Copyright (c) 2010-2015, 2018-2019 The Linux Foundation. All rights 
reserved.
- * Copyright (C) 2015 Linaro Ltd.
- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
- */
-
-#ifndef _DT_BINDINGS_FIRMWARE_QCOM_SCM_H
-#define _DT_BINDINGS_FIRMWARE_QCOM_SCM_H
-
-#define QCOM_SCM_VMID_TZ   0x1
-#define QCOM_SCM_VMID_HLOS 0x3
-#define QCOM_SCM_VMID_SSC_Q6   0x5
-#define QCOM_SCM_VMID_ADSP_Q6  0x6
-#define QCOM_SCM_VMID_CP_TOUCH 0x8
-#define QCOM_SCM_VMID_CP_BITSTREAM 0x9
-#define QCOM_SCM_VMID_CP_PIXEL 0xA
-#define QCOM_SCM_VMID_CP_NON_PIXEL 0xB
-#define QCOM_SCM_VMID_CP_CAMERA0xD
-#define QCOM_SCM_VMID_HLOS_FREE0xE
-#define QCOM_SCM_VMID_MSS_MSA  0xF
-#define QCOM_SCM_VMID_MSS_NONMSA   0x10
-#define QCOM_SCM_VMID_CP_SEC_DISPLAY   0x11
-#define QCOM_SCM_VMID_CP_APP   0x12
-#define QCOM_SCM_VMID_LPASS0x16
-#define QCOM_SCM_VMID_WLAN 0x18
-#define QCOM_SCM_VMID_WLAN_CE  0x19
-#define QCOM_SCM_VMID_CP_SPSS_SP   0x1A
-#define QCOM_SCM_VMID_CP_CAMERA_PREVIEW 0x1D
-#define QCOM_SCM_VMID_CDSP 0x1E
-#define QCOM_SCM_VMID_CP_SPSS_SP_SHARED 0x22
-#define QCOM_SCM_VMID_CP_SPSS_HLOS_SHARED 0x24
-#define QCOM_SCM_VMID_ADSP_HEAP0x25
-#define QCOM_SCM_VMID_CP_CDSP  0x2A
-#define QCOM_SCM_VMID_NAV  0x2B
-#define QCOM_SCM_VMID_TVM  0x2D
-#define QCOM_SCM_VMID_OEMVM0x31
-
-#endif
diff --git a/include/dt-bindings/iio/qcom,spmi-vadc.h 
b/include/dt-bindings/iio/qcom,spmi-vadc.h
deleted file mode 100644
index 08adfe25964c..
--- a/include/dt-bindings/iio/qcom,spmi-vadc.h
+++ /dev/null
@@ -1,300 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2012-2014,2018,2020 The Linux Foundation. All rights reserved.
- */
-
-#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_H
-#define _DT_BINDINGS_QCOM_SPMI_VADC_H
-
-/* Voltage ADC channels */
-#define VADC_USBIN 0x00
-#define VADC_DCIN  0x01
-#define VADC_VCHG_SNS  0x02
-#define VADC_SPARE1_03 0x03
-#define VADC_USB_ID_MV 0x04
-#define VADC_VCOIN 0x05
-#define VADC_VBAT_SNS  0x06
-#define VADC_VSYS  0x07
-#define VADC_DIE_TEMP  0x08
-#define VADC_REF_625MV

[PATCH v2 01/24] qcom: drop clock dt-binding headers

2024-03-21 Thread Caleb Connolly

Drop in favour of dts/upstream. This is just the clock headers.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/qcom,camcc-sdm845.h| 116 
 include/dt-bindings/clock/qcom,dispcc-sdm845.h   |  56 
 include/dt-bindings/clock/qcom,gcc-ipq4019.h | 169 ---
 include/dt-bindings/clock/qcom,gcc-msm8916.h | 179 ---
 include/dt-bindings/clock/qcom,gcc-msm8996.h | 362 ---
 include/dt-bindings/clock/qcom,gcc-qcs404.h  | 180 ---
 include/dt-bindings/clock/qcom,gcc-sdm845.h  | 246 ---
 include/dt-bindings/clock/qcom,gpucc-sdm845.h|  24 --
 include/dt-bindings/clock/qcom,lpass-sdm845.h|  15 -
 include/dt-bindings/clock/qcom,mmcc-msm8996.h| 295 --
 include/dt-bindings/clock/qcom,rpmcc.h   | 174 ---
 include/dt-bindings/clock/qcom,rpmh.h|  37 ---
 include/dt-bindings/clock/qcom,turingcc-qcs404.h |  15 -
 include/dt-bindings/clock/qcom,videocc-sdm845.h  |  35 ---
 14 files changed, 1903 deletions(-)

diff --git a/include/dt-bindings/clock/qcom,camcc-sdm845.h 
b/include/dt-bindings/clock/qcom,camcc-sdm845.h
deleted file mode 100644
index 4f7a2d2320bf..
--- a/include/dt-bindings/clock/qcom,camcc-sdm845.h
+++ /dev/null
@@ -1,116 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2018, The Linux Foundation. All rights reserved.
- */
-
-#ifndef _DT_BINDINGS_CLK_SDM_CAM_CC_SDM845_H
-#define _DT_BINDINGS_CLK_SDM_CAM_CC_SDM845_H
-
-/* CAM_CC clock registers */
-#define CAM_CC_BPS_AHB_CLK 0
-#define CAM_CC_BPS_AREG_CLK1
-#define CAM_CC_BPS_AXI_CLK 2
-#define CAM_CC_BPS_CLK 3
-#define CAM_CC_BPS_CLK_SRC 4
-#define CAM_CC_CAMNOC_ATB_CLK  5
-#define CAM_CC_CAMNOC_AXI_CLK  6
-#define CAM_CC_CCI_CLK 7
-#define CAM_CC_CCI_CLK_SRC 8
-#define CAM_CC_CPAS_AHB_CLK9
-#define CAM_CC_CPHY_RX_CLK_SRC 10
-#define CAM_CC_CSI0PHYTIMER_CLK11
-#define CAM_CC_CSI0PHYTIMER_CLK_SRC12
-#define CAM_CC_CSI1PHYTIMER_CLK13
-#define CAM_CC_CSI1PHYTIMER_CLK_SRC14
-#define CAM_CC_CSI2PHYTIMER_CLK15
-#define CAM_CC_CSI2PHYTIMER_CLK_SRC16
-#define CAM_CC_CSI3PHYTIMER_CLK17
-#define CAM_CC_CSI3PHYTIMER_CLK_SRC18
-#define CAM_CC_CSIPHY0_CLK 19
-#define CAM_CC_CSIPHY1_CLK 20
-#define CAM_CC_CSIPHY2_CLK 21
-#define CAM_CC_CSIPHY3_CLK 22
-#define CAM_CC_FAST_AHB_CLK_SRC23
-#define CAM_CC_FD_CORE_CLK 24
-#define CAM_CC_FD_CORE_CLK_SRC 25
-#define CAM_CC_FD_CORE_UAR_CLK 26
-#define CAM_CC_ICP_APB_CLK 27
-#define CAM_CC_ICP_ATB_CLK 28
-#define CAM_CC_ICP_CLK 29
-#define CAM_CC_ICP_CLK_SRC 30
-#define CAM_CC_ICP_CTI_CLK 31
-#define CAM_CC_ICP_TS_CLK  32
-#define CAM_CC_IFE_0_AXI_CLK   33
-#define CAM_CC_IFE_0_CLK   34
-#define CAM_CC_IFE_0_CLK_SRC   35
-#define CAM_CC_IFE_0_CPHY_RX_CLK   36
-#define CAM_CC_IFE_0_CSID_CLK  37
-#define CAM_CC_IFE_0_CSID_CLK_SRC  38
-#define CAM_CC_IFE_0_DSP_CLK   39
-#define CAM_CC_IFE_1_AXI_CLK   40
-#define CAM_CC_IFE_1_CLK   41
-#define CAM_CC_IFE_1_CLK_SRC   42
-#define CAM_CC_IFE_1_CPHY_RX_CLK   43
-#define CAM_CC_IFE_1_CSID_CLK  44
-#define CAM_CC_IFE_1_CSID_CLK_SRC  45
-#define CAM_CC_IFE_1_DSP_CLK   46
-#define CAM_CC_IFE_LITE_CLK47
-#define CAM_CC_IFE_LITE_CLK_SRC48
-#define CAM_CC_IFE_LITE_CPHY_RX_CLK49
-#define CAM_CC_IFE_LITE_CSID_CLK   50
-#define CAM_CC_IFE_LITE_CSID_CLK_SRC   51
-#define CAM_CC_IPE_0_AHB_CLK   52
-#define CAM_CC_IPE_0_AREG_CLK  53
-#define CAM_CC_IPE_0_AXI_CLK   54
-#define CAM_CC_IPE_0_CLK   55
-#define CAM_CC_IPE_0_CLK_SRC   56
-#define CAM_CC_IPE_1_AHB_CLK

[PATCH v2 00/24] Drop DT upstream compatible dt-binding headers

2024-03-21 Thread Caleb Connolly

Many of the dt-binding headers in U-Boot are based on the upstream ones
from Linux, occasionally with minor changes. Although some have
additional things defined or are totally different.

This series attempts to drop as many of these headers as is easily
possible. Those with differing APIs were left as-is.

Most of this work was done with a script, with some manual fixing at the
end.

All-in, we're dropping 393 of the 489 headers from include/dt-bindings.

Due to how the include paths are configured, U-Boot headers override
upstream ones by the same name, resulting in some upstream DTBs failing
to compile (e.g. those that use newer linux-event-codes.h). Swapping the
include order would conversely break a bunch of U-Boot DTS files and
drivers.

Hopefully this makes a good dent, and future efforts to align more
architectures with upstream DT will help drop the remaining headers.

In addition, the final patch in this series adds support for compiling
all upstream DTS files for a given vendor. This is useful in cases where
a single U-Boot binary can support many boards, and maintaining a list
of supported DTB files would quickly become arduous (as is the case with
Qualcomm).

---
Changes in v2:
- Adjust OF_UPSTREAM_VENDOR defaults for marvell
- Drop renesas patches for now, Marek will pick them up
- Add back some headers which are actually still needed
- Fix some additional compilation issues (rk3368-sheep, microchip mpfs,
  brcm6318)
- Adjust rockchip/pinctrl-rk3568.c to just use literals instead of
  U-Boot specific aliases (RK_GPIO1 -> 1, RK_FUNC_1 -> 1).
- Link to v1: 
https://lore.kernel.org/r/20240304-b4-upstream-dt-headers-v1-0-b7ff41925...@linaro.org

---
Caleb Connolly (24):
  qcom: drop clock dt-binding headers
  qcom: drop remaining dt-binding headers
  sunxi: drop clock dt-binding headers
  sunxi: drop remaining dt-binding headers
  imx: drop clock dt-binding headers
  imx: drop dt-binding headers
  amlogic: drop dt-binding headers
  stm: drop dt-binding headers
  rockchip: drop clock dt-binding headers
  rockchip: drop remaining dt-binding headers
  exynos: drop dt-binding headers
  bcm: drop dt-binding headers
  ti: drop dt-binding headers
  tegra: drop clock dt-binding headers
  tegra: drop dt-binding headers
  xlnx: drop dt-binding headers
  mtk: drop dt-binding headers
  microchip: drop dt-binding headers
  hisi: drop dt-binding headers
  sifive: drop clock headers
  dt-bindings: drop clock headers
  dt-bindings: drop remaining device headers
  dt-bindings: drop generic headers
  dts: support building all dtb files for a specific vendor

 arch/arm/dts/exynos7420.dtsi   |   2 +-
 arch/arm/dts/rk3368-sheep.dts  |   8 +-
 arch/arm/dts/rk3399-u-boot.dtsi|   2 +-
 arch/arm/dts/tegra186.dtsi |   2 +-
 arch/mips/dts/brcm,bcm6318.dtsi|   2 +-
 arch/riscv/dts/fu540-c000-u-boot.dtsi  |  26 +-
 arch/riscv/dts/mpfs.dtsi   |   2 +-
 drivers/clk/exynos/clk-exynos7420.c|   2 +-
 drivers/clk/microchip/mpfs_clk.c   |   2 +-
 drivers/clk/microchip/mpfs_clk_cfg.c   |   2 +-
 drivers/clk/microchip/mpfs_clk_msspll.c|   2 +-
 drivers/clk/microchip/mpfs_clk_periph.c|   2 +-
 drivers/clk/rockchip/clk_rk3399.c  |   2 +-
 drivers/clk/sifive/fu540-prci.c|   8 +-
 drivers/mailbox/tegra-hsp.c|   2 +-
 drivers/net/phy/dp83869.c  |   2 +
 drivers/pinctrl/rockchip/pinctrl-rk3568.c  | 186 ++--
 dts/Kconfig|  24 +
 include/dt-bindings/arm/coresight-cti-dt.h |  37 -
 include/dt-bindings/arm/ux500_pm_domains.h |  15 -
 include/dt-bindings/ata/ahci.h |  20 -
 include/dt-bindings/bus/moxtet.h   |  16 -
 include/dt-bindings/bus/ti-sysc.h  |  28 -
 include/dt-bindings/clk/ti-dra7-atl.h  |  40 -
 include/dt-bindings/clock/actions,s700-cmu.h   | 118 ---
 include/dt-bindings/clock/actions,s900-cmu.h   | 129 ---
 include/dt-bindings/clock/agilex-clock.h   |  71 --
 include/dt-bindings/clock/am3.h| 227 -
 .../clock/amlogic,a1-peripherals-clkc.h| 168 
 include/dt-bindings/clock/amlogic,a1-pll-clkc.h|  25 -
 include/dt-bindings/clock/at91.h   |  23 -
 include/dt-bindings/clock/axg-aoclkc.h |  31 -
 include/dt-bindings/clock/axg-audio-clkc.h |  94 ---
 include/dt-bindings/clock/axg-clkc.h   | 100 ---
 include/dt-bindings/clock/bcm-nsp.h|  51 --
 include/dt-bindings/clock/bcm2835-aux.h|   9 -
 include/dt-bindings/clock/bcm2835.h|  62 --
 include/dt-bindings/clock/bcm6318-clock.h

Re: [PATCH v3] tools: copyfile: use 64k instead of 512 buffer

2024-03-21 Thread Dragan Simic

On 2024-03-21 21:37, Ahelenia Ziemiańska wrote:

This is a trivial but significant optimization:
mkimage took >200ms (and 49489 writes (of which 49456 512)),
now it takes  110ms (and   419 writes (of which   386 64k)).

sendfile is much more appropriate for this and is done in one syscall,
but doesn't bring any significant speedups over 64k r/w
at the 13M size ranges, so there's no need to introduce
#if __linux__
while((size = sendfile(fd_dst, fd_src, NULL, 128 * 1024 * 1024)) > 0)
;
if(size != -1) {
ret = 0;
goto out;
}
#endif

Also extract the buffer size to a constant.

Signed-off-by: Ahelenia Ziemiańska 
Reviewed-by: Dragan Simic 

Please, remove my Reviewed-by tag from this version of the patch,
because it no longer applies.

---
On Thu, Mar 21, 2024 at 08:49:52PM +0100, Dragan Simic wrote:

On 2024-03-21 19:29, Ahelenia Ziemiańska wrote:
> This is a trivial but significant optimisation:
s/optimisation/optimization/

This seems to run counter to precedent of not doing americans'
imperialism for them for free
(I see -ise/-ize in free variation even in my 100-deep checkout).

Well, that's politics, which I have no interest about.

> +#define copyfile_bufsize (64 * 1024)
This is not the right place for such a preprocessor directive.
Instead, it should be placed at the start of the file.

Also, it should use all uppercase letters.

FTR, neither of these points seem to be universal;
I modelled this after tools/mtk_image.c (also cf. 
scripts/kconfig/expr.c),

but there are at least 25 other function-local macros
(as in git grep -B1 '^#define' | grep -c -A1 -e '-{' returns 27).

AFAICT, scripts/kconfig/expr.c could use come cleanups.

Also kinda weird to explicitly request a macro
only to review it back to a constant, but whatever.

Well, it isn't weird.  See, the instances of a preprocessor #define
directive are replaced with its definition before the source code
reaches the compiler, making it, in this case, a bit easier for the
compiler to do its job.

The way you wrote it below, the compiler will almost surely optimize
out the constant variable and replace it with the literal number in
the generated object code, but that puts unnecessary burden on the
compiler, which can be avoided by feeding it with the literal number,
using a preprocessor directive.

 tools/fit_common.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/tools/fit_common.c b/tools/fit_common.c
index 2d417d47..37066203 100644
--- a/tools/fit_common.c
+++ b/tools/fit_common.c
@@ -129,6 +129,7 @@ int copyfile(const char *src, const char *dst)
 {
int fd_src = -1, fd_dst = -1;
void *buf = NULL;
+   const size_t bufsize = 64 * 1024;
ssize_t size;
size_t count;
int ret = -1;
@@ -145,14 +146,14 @@ int copyfile(const char *src, const char *dst)
goto out;
}

-   buf = calloc(1, 512);
+   buf = calloc(1, bufsize);
if (!buf) {
printf("Can't allocate buffer to copy file\n");
goto out;
}

while (1) {
-   size = read(fd_src, buf, 512);
+   size = read(fd_src, buf, bufsize);
if (size < 0) {
printf("Can't read file %s\n", src);
goto out;

Re: [PATCH RFC 26/26] dts: support building all dtb files for a specific vendor

2024-03-21 Thread Caleb Connolly

Hi Sumit,

On 06/03/2024 11:50, Sumit Garg wrote:
> On Tue, 5 Mar 2024 at 19:45, Caleb Connolly  wrote:
>>
>> [trimmed CC list a bit as this is getting offtopic for the original thread]
>>
>> On 05/03/2024 13:14, Sumit Garg wrote:
>>> On Tue, 5 Mar 2024 at 18:21, Caleb Connolly  
>>> wrote:



 On 05/03/2024 12:35, Sumit Garg wrote:
> Hi Caleb,
>
> On Mon, 4 Mar 2024 at 22:22, Caleb Connolly  
> wrote:
>>
>> This adjusts OF_UPSTREAM to behave more like the kernel by allowing for
>> all the devicetree files for a given vendor to be compiled. This is
>> useful for Qualcomm in particular as most boards are supported by a
>> single U-Boot build just provided with a different DT.
>>
>> Signed-off-by: Caleb Connolly 
>> ---
>>  dts/Kconfig  | 24 
>>  scripts/Makefile.dts | 17 -
>>  2 files changed, 40 insertions(+), 1 deletion(-)
>>
>> diff --git a/dts/Kconfig b/dts/Kconfig
>> index b9b6367154ef..67d9dc489856 100644
>> --- a/dts/Kconfig
>> +++ b/dts/Kconfig
>> @@ -100,8 +100,32 @@ config OF_UPSTREAM
>>   However, newer boards whose devicetree source files haven't 
>> landed in
>>   the dts/upstream subtree, they can override this option to 
>> have the
>>   DT build from existing U-Boot tree location instead.
>>
>> +config OF_UPSTREAM_BUILD_VENDOR
>> +   bool "Build all devicetree files for a particular vendor"
>> +   depends on OF_UPSTREAM
>> +   help
>> + Enable building all devicetree files for a particular vendor. 
>> This
>
> Do we really want to build all the DTBs even if many of those aren't
> supported by U-Boot at all? I would have rather added Makefile targets
> for boards which really supports a single defconfig eg.
> qcom_defconfig.

 Yes, for the 4 Qualcomm SoCs currently supported there are 51 dts
 targets that ought to be able to run U-Boot to some extent
>>>
>>> Have you tested U-Boot on all of them? IMO, it would be good to make
>>> people aware about supported boards via listing their DTs at least.
>>
>> Well the "ideal" goal is that every SoC in upstream is supported. All of
>> the changes I've introduced so far work towards that end, so this is
>> just another step in that direction. Obviously it's a lofty one, but I
>> see no reason to intentionally make things harder for ourselves by
>> gatekeeping what DTB files we build.
>>
>> I have additional features planned that help here, and plenty more
>> ideas... But I can confirm that most of the phones (which are pretty
>> much identical to the reference boards) do indeed "just work" provided
>> the SoC is supported.
>>
>> It makes sense to use board/qualcomm//MAINTAINERS for this
>> imo, there we can reference the specific dts files so device maintainers
>> can be CC'd if there are relevant changes when deviceree-rebasing is
>> updated.
>>
>> I would like to update the Qualcomm docs to describe the general
>> approach here and help guide new contributors. But (as is hopefully
>> obvious by this email) I'm still very much learning as I go. What do you
>> think?
> 
> I am still not convinced that we should be building all the DTBs if
> all of them aren't supported. The docs are there to help people about
> what they have built rather than the opposite being what you have
> built isn't currently supported.
> 
> However, I will let others chime in too. Maybe I am missing something.

Hi Sumit,

I guess nobody else has very strong opinions on this... I've thought on
it some more and I definitely get your concern about not having a
specific list of supported devices.

However, I think the potential for a device to be supported without
having to send any patches to U-Boot (just upstream the DTS!) is pretty
awesome... Would it be a suitable middleground to maintain a list of
supported Qualcomm devices (and features) in the documentation?

Kind regards,
> 
> -Sumit
> 
>>>

 $ ls -l dts/upstream/src/arm6/qcom/{msm8916,sdm845,msm8996,qcs404}*.dts\
 | wc -l
 51

>>>
>>> qcom_defconfig currently only supports sdm845 and qcs404.
>>>
 What do you mean by a "makefile target"? Like copying
 arch/arm64/boot/dts/qcom/Makefile from Linux? I guess my concern here
 would be keeping it in sync, and introducing additional busywork when
 porting.
>>>
>>> See following diff:
>>>
>>> diff --git a/dts/upstream/src/arm64/Makefile 
>>> b/dts/upstream/src/arm64/Makefile
>>> index 9a8f6aa35846..ecc15021cb08 100644
>>> --- a/dts/upstream/src/arm64/Makefile
>>> +++ b/dts/upstream/src/arm64/Makefile
>>> @@ -2,6 +2,10 @@
>>>
>>>  include $(srctree)/scripts/Makefile.dts
>>>
>>> +dtb-$(CONFIG_ARCH_SNAPDRAGON) += qcom/sdm845-db845c.dtb \
>>> +   qcom/sdm845-samsung-starqltechn.dtb \
>>> +   qcom/qcs404-evb-4000.dtb
>>> +
>>>  targets += $(dtb-y)
>>>

 We do

[PATCH 1/1] rtc: goldfish_rtc_probe should be static

2024-03-21 Thread Heinrich Schuchardt

There is no need to export goldfish_rtc_probe().

Fixes: 2d6dc19fd25d ("rtc: driver for Goldfish RTC")
Signed-off-by: Heinrich Schuchardt 
---
 drivers/rtc/goldfish_rtc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/rtc/goldfish_rtc.c b/drivers/rtc/goldfish_rtc.c
index 1ace9903858..3231eb0daf8 100644
--- a/drivers/rtc/goldfish_rtc.c
+++ b/drivers/rtc/goldfish_rtc.c
@@ -72,7 +72,7 @@ static int goldfish_rtc_set(struct udevice *dev, const struct 
rtc_time *time)
return 0;
 }
 
-int goldfish_rtc_probe(struct udevice *dev)
+static int goldfish_rtc_probe(struct udevice *dev)
 {
struct goldfish_rtc *priv = dev_get_priv(dev);
fdt_addr_t addr;
-- 
2.43.0

Re: [PATCH v2] tools: copyfile: use 64k instead of 512 buffer

2024-03-21 Thread Dragan Simic


Hello Ahelenia,

Please see my comments below.

On 2024-03-21 19:29, Ahelenia Ziemiańska wrote:

This is a trivial but significant optimisation:


s/optimisation/optimization/


mkimage took >200ms (and 49489 writes (of which 49456 512)),
now it takes  110ms (and   419 writes (of which   386 64k)).

sendfile is much more appropriate for this and is done in one syscall,
but doesn't bring any significant speedups over 64k r/w
at the 13M size ranges, so there's no need to introduce
#if __linux__
while((size = sendfile(fd_dst, fd_src, NULL, 128 * 1024 * 1024)) > 0)
;
if(size != -1) {
ret = 0;
goto out;
}
#endif

Also lift up the buffer size to a macro.


s/lift up/extract/
s/macro/constant/


Signed-off-by: Ahelenia Ziemiańska 
Reviewed-by: Dragan Simic 
---
 tools/fit_common.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/tools/fit_common.c b/tools/fit_common.c
index 2d417d47..1df4785c 100644
--- a/tools/fit_common.c
+++ b/tools/fit_common.c
@@ -127,6 +127,7 @@ err:

 int copyfile(const char *src, const char *dst)
 {
+#define copyfile_bufsize (64 * 1024)


This is not the right place for such a preprocessor directive.
Instead, it should be placed at the start of the file.

Also, it should use all uppercase letters.


int fd_src = -1, fd_dst = -1;
void *buf = NULL;
ssize_t size;
@@ -145,14 +146,14 @@ int copyfile(const char *src, const char *dst)
goto out;
}

-   buf = calloc(1, 512);
+   buf = calloc(1, copyfile_bufsize);
if (!buf) {
printf("Can't allocate buffer to copy file\n");
goto out;
}

while (1) {
-   size = read(fd_src, buf, 512);
+   size = read(fd_src, buf, copyfile_bufsize);
if (size < 0) {
printf("Can't read file %s\n", src);
goto out;

Re: [PATCH 1/2] usb: udc: dwc3: Fold board dm_usb_gadget_handle_interrupts() into DWC3 gadget

2024-03-21 Thread Marek Vasut


On 3/21/24 11:01 AM, Mattijs Korpershoek wrote:

Hi Marek,

Thank you for the patch.

On dim., mars 17, 2024 at 05:42, Marek Vasut  
wrote:


The dm_usb_gadget_handle_interrupts() has no place in board code. Move
this into DWC3 driver. The OMAP implementation is special, add new weak
dwc3_uboot_interrupt_status() function to decide whether DWC3 interrupt
handling should be called, and override it in OMAP DWC3 code, to repair
the special OMAP interrupt handling code until OMAP gets switched over
to DM UDC proper.

Signed-off-by: Marek Vasut 


Reviewed-by: Mattijs Korpershoek 

Tested that I could scan for usb mass storage and that I can use
fastboot:

=> fastboot usb 0
crq->brequest:0x0
=> usb start
starting USB...
Bus usb@ff50: Register 3000140 NbrPorts 3
Starting the controller
USB XHCI 1.10
scanning bus usb@ff50 for devices... 3 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found

=> usb storage
   Device 0: Vendor: SanDisk Rev: 1.00 Prod: Ultra
 Type: Removable Hard Disk
 Capacity: 29328.0 MB = 28.6 GB (60063744 x 512)

Tested-by: Mattijs Korpershoek  # vim3


Thank you!

Please feel free to pick this via DFU tree in a week or two, so others 
can comment on this and test this too.

Re: [PATCH 1/2] usb: udc: dwc3: Fold board dm_usb_gadget_handle_interrupts() into DWC3 gadget

2024-03-21 Thread Marek Vasut


On 3/21/24 6:05 PM, Caleb Connolly wrote:



On 20/03/2024 20:18, Marek Vasut wrote:

On 3/18/24 1:47 PM, Caleb Connolly wrote:



On 17/03/2024 04:42, Marek Vasut wrote:

The dm_usb_gadget_handle_interrupts() has no place in board code. Move
this into DWC3 driver. The OMAP implementation is special, add new weak
dwc3_uboot_interrupt_status() function to decide whether DWC3 interrupt
handling should be called, and override it in OMAP DWC3 code, to repair
the special OMAP interrupt handling code until OMAP gets switched over
to DM UDC proper.

Signed-off-by: Marek Vasut 


Reviewed-by: Caleb Connolly 


Thank you. If you have a hardware with DWC3 , can you please also test
this series ? I am afraid this may break things, although it is likely
to break mostly select MX8M boards.


heh yeah it looked like it would be fine for qcom, but better safe than
sorry :P

Thanks for the ping.

Tested-by: Caleb Connolly  # qcom sdm845


Thank you!

Re: [PATCH v3 04/11] imx8mp: power-domain: Don't power off pd_bus

2024-03-21 Thread Marek Vasut


On 3/21/24 6:46 AM, Sumit Garg wrote:

On Thu, 21 Mar 2024 at 11:06, Marek Vasut  wrote:


On 3/15/24 11:41 AM, Sumit Garg wrote:

On Fri, 15 Mar 2024 at 14:53, Marek Vasut  wrote:


On 3/15/24 6:31 AM, Sumit Garg wrote:

On Thu, 14 Mar 2024 at 09:45, Marek Vasut  wrote:


On 3/12/24 8:03 AM, Sumit Garg wrote:

power_domain_on/off() isn't refcounted and power domain bus shouldn't be
turned off for a single peripheral domain as it would negatively affect
other peripheral domains. So lets just skip turning off bus power
domain.


What exactly is the issue and how did you trigger it ?

Details please.


I suppose the issue can be triggered via the "=> usb start => usb
stop" sequence where one of the USB controllers is configured in
peripheral mode.


'usb start ; usb stop' causes no problems on MX8MP , maybe the test case
is more extensive ?

Please, write down the necessary steps to reproduce this problem, and
what happens when that problem occurs.


After digging in more, it looks like dev_power_domain_off() is never
(U-Boot life-cycle) invoked for USB controller devices derived from
DT. So this USB power domain sequence is never reachable.


The imx8mp_hsiomix_off() is never called on 'usb stop' command ?



Yeah, that's the case.


But then why would the 'usb start ; usb stop' test break power domain
state here ?


It won't break with current implementation, earlier I made this
assumption that 'usb stop' turns down the power domain.


So, maybe I am a little confused, what is this patch solving then ?


BTW, dev_power_domain_on() is invoked when USB controller devices are
added based on DT.


I would expect imx8mp_hsiomix_off() to be called either on 'usb stop' or
just before Linux boots .

[...]


Why not add counter into imx8mp_hsiomix_priv structure in this driver ?


Sure I can do that but do you think the current approach can have any
side effects?


Bus domain not getting cycled (which can leave it in some odd state),
and increased power consumption if the next stage doesn't turn the
domain off.


Given above, would you like me to drop power domain off path entirely
here?


Can the series go in without this patch ?


Okay let me drop this patch.


We can fix whatever it is that needs to be fixed in a smaller follow up 
series.



I think if people are concerned about power consumption then it
should be implemented properly in U-Boot to remove all the DT based
devices before passing on control to the next stage.


I would expect imx8mp_hsiomix_off() to be called either on 'usb stop' or
just before Linux boots (esp. at that point), so if you do not power off
the bus domain before booting Linux, you may hand over a device which
was not fully power cycled.


Unfortunately that's the current situation I see. IMO, the better
solution would be to just remove all the DT devices before passing on
control to Linux. That should automatically power off devices.


Doesn't CONFIG_DM_DEVICE_REMOVE=y do something like that already ?

Re: [PATCH v3 07/11] phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHY

2024-03-21 Thread Marek Vasut


On 3/21/24 1:40 PM, Sumit Garg wrote:

On Thu, 14 Mar 2024 at 09:46, Marek Vasut  wrote:


On 3/12/24 8:03 AM, Sumit Garg wrote:

Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
PHY initialization moved to this standalone PHY driver.

Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/phy/freescale/phy-fsl-imx8m-pcie.c. Use last Linux kernel driver
reference commit 7559e7572c03 ("phy: Explicitly include correct DT
includes").


[...]


+static int imx8_pcie_phy_probe(struct udevice *dev)
+{
+ struct imx8_pcie_phy *imx8_phy = dev_get_priv(dev);
+ ofnode gpr;
+ int ret = 0;
+
+ imx8_phy->drvdata = (void *)dev_get_driver_data(dev);
+ imx8_phy->base = dev_read_addr(dev);
+ if (!imx8_phy->base)
+ return -EINVAL;
+
+ /* get PHY refclk pad mode */
+ dev_read_u32(dev, "fsl,refclk-pad-mode", _phy->refclk_pad_mode);
+
+ imx8_phy->tx_deemph_gen1 = dev_read_u32_default(dev,
+ "fsl,tx-deemph-gen1",
+ 0);
+ imx8_phy->tx_deemph_gen2 = dev_read_u32_default(dev,
+ "fsl,tx-deemph-gen2",
+ 0);
+ imx8_phy->clkreq_unused = dev_read_bool(dev, "fsl,clkreq-unsupported");
+
+ /* Grab GPR config register range */
+ gpr = ofnode_by_compatible(ofnode_null(), imx8_phy->drvdata->gpr);
+ if (ofnode_equal(gpr, ofnode_null())) {
+ dev_err(dev, "unable to find GPR node\n");
+ return -ENODEV;
+ }
+
+ imx8_phy->iomuxc_gpr = syscon_node_to_regmap(gpr);
+ if (IS_ERR(imx8_phy->iomuxc_gpr)) {
+ dev_err(dev, "unable to find iomuxc registers\n");
+ return PTR_ERR(imx8_phy->iomuxc_gpr);
+ }


syscon_regmap_lookup_by_compatible() should simplify these two steps ^ .



After a close look, that API isn't supported by U-Boot yet. So I will
keep the existing implementation with your review tag. I hope that's
fine with you.


Oh, uh, I had a local patch from previous round of PCIe experiments, I 
just sent it out, you are on CC. Can you do a follow up fix once this 
series V4 is in ?

Re: [PATCH v3 2/3] configs: imx93-phyboard-segin: Add USB support

2024-03-21 Thread Marek Vasut


On 3/21/24 3:45 PM, Mathieu Othacehe wrote:

Add USB support by enabling `usb` command and required USB drivers.

Signed-off-by: Mathieu Othacehe 
---
  configs/imx93-phyboard-segin_defconfig | 8 
  1 file changed, 8 insertions(+)

diff --git a/configs/imx93-phyboard-segin_defconfig 
b/configs/imx93-phyboard-segin_defconfig
index 24f9bd553aa..0345e7deeab 100644
--- a/configs/imx93-phyboard-segin_defconfig
+++ b/configs/imx93-phyboard-segin_defconfig
@@ -67,6 +67,7 @@ CONFIG_CMD_GPIO=y
  CONFIG_CMD_I2C=y
  CONFIG_CMD_MMC=y
  CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_USB=y
  CONFIG_CMD_SNTP=y
  CONFIG_CMD_CACHE=y
  CONFIG_CMD_EFIDEBUG=y
@@ -132,6 +133,13 @@ CONFIG_SPL_SYSRESET=y
  CONFIG_SYSRESET_WATCHDOG=y
  CONFIG_DM_THERMAL=y
  CONFIG_IMX_TMU=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"


$ git grep -i usb.*phytec configs
configs/phycore_pcl063_defconfig:CONFIG_USB_GADGET_MANUFACTURER="Phytec"
configs/phycore_pcl063_ull_defconfig:CONFIG_USB_GADGET_MANUFACTURER="Phytec"

It would be good to be consistent.

Also, what is the vendor/product number those two boards use ?

Also, it would be good to fix the extra leading zero in those board 
boards vendor number, this, in both configs:


CONFIG_USB_GADGET_VENDOR_NUM=0x01b67

Re: [PATCH v3 1/3] arm: dts: imx93-phyboard-segin: Add USB support

2024-03-21 Thread Marek Vasut


On 3/21/24 3:45 PM, Mathieu Othacehe wrote:

Enable both usbotg1 and usbotg2 ports. Disable over-current as OC pins are
not connected to the SoC.

This


"This addition to ...-u-boot.dtsi is temporary, ..." would be clearer.


is temporary, until USB support is added to imx93-phyboard-segin.dts
in Linux.

Signed-off-by: Mathieu Othacehe 


Reviewed-by: Marek Vasut

Re: [PATCH v4 08/11] pcie_imx: Update header to describe it as a legacy driver

2024-03-21 Thread Marek Vasut


On 3/21/24 3:55 PM, Sumit Garg wrote:

Since now we have the modern pcie_dw_imx.c driver for iMX SoCs,
encourage people to switch to that for any further new iMX SoC support
or even for the older iMX6 SoCs too.

Suggested-by: Peter Robinson 
Signed-off-by: Sumit Garg 


Reviewed-by: Marek Vasut

[PATCH v2] tools: open FIT image read-only

2024-03-21 Thread Ahelenia Ziemiańska

Open for reading as O_RDONLY instead of O_RDWR:
the only usage of the fd is for the single read() below;
this prevented
mkimage -f auto -A arm64 \
-T kernel -C lz4 -d Image-6.6.15.lz4 \
-b mt8173-elm-hana-6.6.15.dtb outf
when the inputs were unwritable.

Link: https://bugs.debian.org/1063097
Signed-off-by: Ahelenia Ziemiańska 
Reviewed-by: Dragan Simic 
---
 tools/fit_image.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index beef1fa8..0fccfbb4 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -137,7 +137,7 @@ static int fdt_property_file(struct image_tool_params 
*params,
int ret;
int fd;
 
-   fd = open(fname, O_RDWR | O_BINARY);
+   fd = open(fname, O_RDONLY | O_BINARY);
if (fd < 0) {
fprintf(stderr, "%s: Can't open %s: %s\n",
params->cmdname, fname, strerror(errno));
-- 
2.39.2


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[PATCH v2] tools: copyfile: use 64k instead of 512 buffer

2024-03-21 Thread Ahelenia Ziemiańska

This is a trivial but significant optimisation:
mkimage took >200ms (and 49489 writes (of which 49456 512)),
now it takes  110ms (and   419 writes (of which   386 64k)).

sendfile is much more appropriate for this and is done in one syscall,
but doesn't bring any significant speedups over 64k r/w
at the 13M size ranges, so there's no need to introduce
#if __linux__
while((size = sendfile(fd_dst, fd_src, NULL, 128 * 1024 * 1024)) > 0)
;
if(size != -1) {
ret = 0;
goto out;
}
#endif

Also lift up the buffer size to a macro.

Signed-off-by: Ahelenia Ziemiańska 
Reviewed-by: Dragan Simic 
---
 tools/fit_common.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/tools/fit_common.c b/tools/fit_common.c
index 2d417d47..1df4785c 100644
--- a/tools/fit_common.c
+++ b/tools/fit_common.c
@@ -127,6 +127,7 @@ err:
 
 int copyfile(const char *src, const char *dst)
 {
+#define copyfile_bufsize (64 * 1024)
int fd_src = -1, fd_dst = -1;
void *buf = NULL;
ssize_t size;
@@ -145,14 +146,14 @@ int copyfile(const char *src, const char *dst)
goto out;
}
 
-   buf = calloc(1, 512);
+   buf = calloc(1, copyfile_bufsize);
if (!buf) {
printf("Can't allocate buffer to copy file\n");
goto out;
}
 
while (1) {
-   size = read(fd_src, buf, 512);
+   size = read(fd_src, buf, copyfile_bufsize);
if (size < 0) {
printf("Can't read file %s\n", src);
goto out;
-- 
2.39.2


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Re: [PATCH v1] board: toradex: verdin-am62_r5: Increase SPL_STACK_R_MALLOC_SIMPLE_LEN

2024-03-21 Thread Tom Rini

On Thu, Mar 21, 2024 at 06:07:32PM +0100, Francesco Dolcini wrote:
> On Wed, Mar 20, 2024 at 01:48:45PM -0300, Hiago De Franco wrote:
> > From: Hiago De Franco 
> > 
> > Increase the SPL_STACK_R_MALLOC_SIMPLE_LEN to 0x20 to accommodate the
> > size of tispl.bin fit image. With the recent upgrade of ti-linux-firmware
> > from version v9.1.0 to v9.2.5, the size of tispl.bin fit image has
> > increased to 1.4MB, causing allocation errors in the R5 SPL:
> > 
> > ```
> > alloc space exhausted
> > Could not get FIT buffer of 1325056 bytes
> > check CONFIG_SPL_SYS_MALLOC_SIZE
> > ```
> > 
> > Signed-off-by: Hiago De Franco 
> Reviewed-by: Francesco Dolcini 
> 
> 
> Tom, this is also a candidate for master, thanks :-)

OK, thanks.

-- 
Tom


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Re: Pull request efi-2024-04-rc5-2

2024-03-21 Thread Tom Rini

On Thu, Mar 21, 2024 at 08:56:12AM +0100, Heinrich Schuchardt wrote:

> Dear Tom,
> 
> The following changes since commit 6ec096a7116a5f1f7dfac5f69ef192429331905c:
> 
>   Merge tag 'u-boot-imx-master-20240317' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2024-03-17 19:43:02
> -0400)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-efi.git
> tags/efi-2024-04-rc5-2
> 
> for you to fetch changes up to fcd0c8b8474f7db0b94608424715a73fbeba92dc:
> 
>   patman: Properly document the patchwork_url setting (2024-03-21
> 07:36:54 +0100)
> 
> Gitlab CI showed no issues:
> https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/20013
> 

Applied to u-boot/master, thanks!

-- 
Tom


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[PATCH v2 6/6] doc: describe Milk-V Mars board

2024-03-21 Thread Heinrich Schuchardt

Add instructions to build U-Boot for the Milk-V Mars board

Signed-off-by: Heinrich Schuchardt 
---
v2:
describe how to preset fdtfile
---
 doc/board/starfive/index.rst   |   1 +
 doc/board/starfive/milk-v_mars.rst | 111 +
 2 files changed, 112 insertions(+)
 create mode 100644 doc/board/starfive/milk-v_mars.rst

diff --git a/doc/board/starfive/index.rst b/doc/board/starfive/index.rst
index 0c52dc7b095..2762bf74c11 100644
--- a/doc/board/starfive/index.rst
+++ b/doc/board/starfive/index.rst
@@ -6,4 +6,5 @@ StarFive
 .. toctree::
:maxdepth: 1
 
+   milk-v_mars.rst
visionfive2
diff --git a/doc/board/starfive/milk-v_mars.rst 
b/doc/board/starfive/milk-v_mars.rst
new file mode 100644
index 000..9cfd5d7bddd
--- /dev/null
+++ b/doc/board/starfive/milk-v_mars.rst
@@ -0,0 +1,111 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Milk-V Mars
+===
+
+U-Boot for the Milk-V Mars uses the same U-Boot binaries as the VisionFive 2
+board. In U-Boot SPL the actual board is detected and the device-tree patched
+accordingly.
+
+Building
+
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+   export CROSS_COMPILE=
+
+The M-mode software OpenSBI provides the supervisor binary interface (SBI) and
+is responsible for the switch to S-Mode. It is a prerequisite to build U-Boot.
+Support for the JH7110 was introduced in OpenSBI 1.2. It is recommended to use
+a current release.
+
+.. code-block:: console
+
+   git clone https://github.com/riscv/opensbi.git
+   cd opensbi
+   make PLATFORM=generic FW_TEXT_START=0x4000 FW_OPTIONS=0
+
+Now build the U-Boot SPL and U-Boot proper.
+
+.. code-block:: console
+
+   cd 
+   make starfive_visionfive2_defconfig
+   make 
OPENSBI=$(opensbi_dir)/build/platform/generic/firmware/fw_dynamic.bin
+
+This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well
+as the FIT image (u-boot.itb) with OpenSBI and U-Boot.
+
+Device-tree selection
+~
+
+Depending on the board version U-Boot set variable $fdtfile to either
+starfive/jh7110-starfive-visionfive-2-v1.2a.dtb or
+starfive/jh7110-starfive-visionfive-2-v1.3b.dtb.
+
+To overrule this selection the variable can be set manually and saved in the
+environment
+
+::
+
+setenv fdtfile my_device-tree.dtb
+env save
+
+or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to set to
+provide a default value.
+
+Boot source selection
+~
+
+The board provides the DIP switches MSEL[1:0] to select the boot device out of
+SPI flash, eMMC, SD-card, UART. To select booting from SD-card set the DIP
+switches MSEL[1:0] to 10.
+
+Preparing the SD-Card
+~
+
+The device firmware loads U-Boot SPL (u-boot-spl.bin.normal.out) from the
+partition with type GUID 2E54B353-1271-4842-806F-E436D6AF6985. You are free
+to choose any partition number.
+
+With the default configuration U-Boot SPL loads the U-Boot FIT image
+(u-boot.itb) from partition 2 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2).
+When formatting it is recommended to use GUID
+BC13C2FF-59E6-4262-A352-B275FD6F7172 for this partition.
+
+The FIT image (u-boot.itb) is a combination of OpenSBI's fw_dynamic.bin,
+u-boot-nodtb.bin and the device tree blob.
+
+Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch)
+
+.. code-block:: bash
+
+   sudo sgdisk --clear \
+ --set-alignment=2 \
+ --new=1:4096:8191 --change-name=1:spl 
--typecode=1:2E54B353-1271-4842-806F-E436D6AF6985\
+ --new=2:8192:16383 --change-name=2:uboot 
--typecode=2:BC13C2FF-59E6-4262-A352-B275FD6F7172  \
+ --new=3:16384:1654784 --change-name=3:system 
--typecode=3:EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 \
+ /dev/sdb
+
+Copy U-Boot to the SD card
+
+.. code-block:: bash
+
+   sudo dd if=u-boot-spl.bin.normal.out of=/dev/sdb1
+   sudo dd if=u-boot.itb of=/dev/sdb2
+
+   sudo mount /dev/sdb3 /mnt/
+   sudo cp u-boot-spl.bin.normal.out /mnt/
+   sudo cp u-boot.itb /mnt/
+   sudo cp Image.gz /mnt/
+   sudo cp initramfs.cpio.gz /mnt/
+   sudo cp jh7110-starfive-visionfive-2.dtb /mnt/
+   sudo umount /mnt
+
+Booting
+~~~
+
+Once you plugin the sdcard and power up, you should see the U-Boot prompt.
-- 
2.43.0

[PATCH v2 5/6] riscv: starfive: avoid including common.h

2024-03-21 Thread Heinrich Schuchardt

The usage of common.h is deprecated. Remove it from board files.

Signed-off-by: Heinrich Schuchardt 
---
v2:
no change
---
 board/starfive/visionfive2/spl.c| 1 -
 board/starfive/visionfive2/starfive_visionfive2.c   | 1 -
 board/starfive/visionfive2/visionfive2-i2c-eeprom.c | 1 -
 3 files changed, 3 deletions(-)

diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c
index e0e33cb37ba..1683bb99a51 100644
--- a/board/starfive/visionfive2/spl.c
+++ b/board/starfive/visionfive2/spl.c
@@ -4,7 +4,6 @@
  * Author: Yanhong Wang
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/starfive/visionfive2/starfive_visionfive2.c 
b/board/starfive/visionfive2/starfive_visionfive2.c
index 5ae8b850280..a86bca533b2 100644
--- a/board/starfive/visionfive2/starfive_visionfive2.c
+++ b/board/starfive/visionfive2/starfive_visionfive2.c
@@ -4,7 +4,6 @@
  * Author: Yanhong Wang
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/starfive/visionfive2/visionfive2-i2c-eeprom.c 
b/board/starfive/visionfive2/visionfive2-i2c-eeprom.c
index a9f4376c8e1..ddef7d61235 100644
--- a/board/starfive/visionfive2/visionfive2-i2c-eeprom.c
+++ b/board/starfive/visionfive2/visionfive2-i2c-eeprom.c
@@ -4,7 +4,6 @@
  * Author: Yanhong Wang
  */
 
-#include 
 #include 
 #include 
 #include 
-- 
2.43.0

[PATCH v2 4/6] board: starfive: support Milk-V Mars board

2024-03-21 Thread Heinrich Schuchardt

The differences between the Milk-V Mars board and the VisionFive 2 board
are small enough that we can support both using the same U-Boot build.

* The model and compatible property are taken from proposed Linux patches.
* The EEPROM is atmel,24c02 according to the vendor U-Boot.
* The second Ethernet port is not available.

Signed-off-by: Heinrich Schuchardt 
---
v2:
do not overwrite /soc/i2c@1205/eeprom@50/compatible

---
 board/starfive/visionfive2/spl.c | 99 
 1 file changed, 87 insertions(+), 12 deletions(-)

diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c
index 1b49945d11b..e0e33cb37ba 100644
--- a/board/starfive/visionfive2/spl.c
+++ b/board/starfive/visionfive2/spl.c
@@ -27,6 +27,26 @@ struct starfive_vf2_pro {
const char *value;
 };
 
+static const struct starfive_vf2_pro milk_v_mars[] = {
+   {"/soc/ethernet@1603", "starfive,tx-use-rgmii-clk", NULL},
+   {"/soc/ethernet@1604", "starfive,tx-use-rgmii-clk", NULL},
+
+   {"/soc/ethernet@1603/mdio/ethernet-phy@0",
+   "motorcomm,tx-clk-adj-enabled", NULL},
+   {"/soc/ethernet@1603/mdio/ethernet-phy@0",
+   "motorcomm,tx-clk-100-inverted", NULL},
+   {"/soc/ethernet@1603/mdio/ethernet-phy@0",
+   "motorcomm,tx-clk-1000-inverted", NULL},
+   {"/soc/ethernet@1603/mdio/ethernet-phy@0",
+   "motorcomm,rx-clk-drv-microamp", "3970"},
+   {"/soc/ethernet@1603/mdio/ethernet-phy@0",
+   "motorcomm,rx-data-drv-microamp", "2910"},
+   {"/soc/ethernet@1603/mdio/ethernet-phy@0",
+   "rx-internal-delay-ps", "1900"},
+   {"/soc/ethernet@1603/mdio/ethernet-phy@0",
+   "tx-internal-delay-ps", "1500"},
+};
+
 static const struct starfive_vf2_pro starfive_vera[] = {
{"/soc/ethernet@1603/mdio/ethernet-phy@0", "rx-internal-delay-ps",
"1900"},
@@ -67,6 +87,49 @@ static const struct starfive_vf2_pro starfive_verb[] = {
"tx-internal-delay-ps", "0"},
 };
 
+void spl_fdt_fixup_mars(void *fdt)
+{
+   static const char compat[] = "milkv,mars\0starfive,jh7110";
+   u32 phandle;
+   u8 i;
+   int offset;
+   int ret;
+
+   fdt_setprop(fdt, fdt_path_offset(fdt, "/"), "compatible", compat, 
sizeof(compat));
+   fdt_setprop_string(fdt, fdt_path_offset(fdt, "/"), "model",
+  "Milk-V Mars");
+
+   /* gmac0 */
+   offset = fdt_path_offset(fdt, "/soc/clock-controller@1700");
+   phandle = fdt_get_phandle(fdt, offset);
+   offset = fdt_path_offset(fdt, "/soc/ethernet@1603");
+
+   fdt_setprop_u32(fdt, offset, "assigned-clocks", phandle);
+   fdt_appendprop_u32(fdt, offset, "assigned-clocks", 
JH7110_AONCLK_GMAC0_TX);
+   fdt_setprop_u32(fdt, offset,  "assigned-clock-parents", phandle);
+   fdt_appendprop_u32(fdt, offset,  "assigned-clock-parents",
+  JH7110_AONCLK_GMAC0_RMII_RTX);
+
+   /* gmac1 */
+   fdt_setprop_string(fdt, fdt_path_offset(fdt, "/soc/ethernet@1604"),
+  "status", "disabled");
+
+   for (i = 0; i < ARRAY_SIZE(milk_v_mars); i++) {
+   offset = fdt_path_offset(fdt, milk_v_mars[i].path);
+
+   if (starfive_verb[i].value)
+   ret = fdt_setprop_u32(fdt, offset, milk_v_mars[i].name,
+ dectoul(milk_v_mars[i].value, 
NULL));
+   else
+   ret = fdt_setprop_empty(fdt, offset, 
milk_v_mars[i].name);
+
+   if (ret) {
+   pr_err("%s set prop %s fail.\n", __func__, 
milk_v_mars[i].name);
+   break;
+   }
+   }
+}
+
 void spl_fdt_fixup_version_a(void *fdt)
 {
static const char compat[] = 
"starfive,visionfive-2-v1.2a\0starfive,jh7110";
@@ -167,22 +230,34 @@ void spl_fdt_fixup_version_b(void *fdt)
 void spl_perform_fixups(struct spl_image_info *spl_image)
 {
u8 version;
+   const char *product_id;
 
-   version = get_pcb_revision_from_eeprom();
-   switch (version) {
-   case 'a':
-   case 'A':
-   spl_fdt_fixup_version_a(spl_image->fdt_addr);
-   break;
-
-   case 'b':
-   case 'B':
-   default:
-   spl_fdt_fixup_version_b(spl_image->fdt_addr);
+   product_id = get_product_id_from_eeprom();
+   if (!product_id) {
+   pr_err("Can't read EEPROM\n");
+   return;
+   }
+   if (!strncmp(product_id, "MARS", 4)) {
+   spl_fdt_fixup_mars(spl_image->fdt_addr);
+   } else if (!strncmp(product_id, "VF7110", 6)) {
+   version = get_pcb_revision_from_eeprom();
+   switch (version) {
+   case 'a':
+   case 'A':
+   spl_fdt_fixup_version_a(spl_image->fdt_addr);
+

[PATCH v2 2/6] eeprom: starfive: function get_product_id_from_eeprom()

2024-03-21 Thread Heinrich Schuchardt

Export a function get_product_id_from_eeprom() to read the product ID.
This value can be used for fixing up the device-tree on JH7110 based
products.

Signed-off-by: Heinrich Schuchardt 
---
v2:
no change
---
 arch/riscv/include/asm/arch-jh7110/eeprom.h | 9 +
 board/starfive/visionfive2/visionfive2-i2c-eeprom.c | 8 
 2 files changed, 17 insertions(+)

diff --git a/arch/riscv/include/asm/arch-jh7110/eeprom.h 
b/arch/riscv/include/asm/arch-jh7110/eeprom.h
index d2776d5b6cb..62d184aeb57 100644
--- a/arch/riscv/include/asm/arch-jh7110/eeprom.h
+++ b/arch/riscv/include/asm/arch-jh7110/eeprom.h
@@ -12,4 +12,13 @@
 u8 get_pcb_revision_from_eeprom(void);
 u32 get_ddr_size_from_eeprom(void);
 
+/**
+ * get_product_id_from_eeprom - get product ID string
+ *
+ * A string like "VF7110A1-2228-D008E000-0001" is returned.
+ *
+ * Return: product ID string
+ */
+const char *get_product_id_from_eeprom(void);
+
 #endif /* _ASM_RISCV_EEPROM_H */
diff --git a/board/starfive/visionfive2/visionfive2-i2c-eeprom.c 
b/board/starfive/visionfive2/visionfive2-i2c-eeprom.c
index c36de1a5125..a9f4376c8e1 100644
--- a/board/starfive/visionfive2/visionfive2-i2c-eeprom.c
+++ b/board/starfive/visionfive2/visionfive2-i2c-eeprom.c
@@ -405,6 +405,14 @@ static void set_product_id(char *string)
update_crc();
 }
 
+const char *get_product_id_from_eeprom(void)
+{
+   if (read_eeprom())
+   return NULL;
+
+   return pbuf.eeprom.atom1.data.pstr;
+}
+
 int do_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
char *cmd;
-- 
2.43.0

[PATCH v2 3/6] riscv: set fdtfile on Milk-V Mars

2024-03-21 Thread Heinrich Schuchardt

Set environment variable fdtfile to the correct value for the Milk-V Mars
board.

Signed-off-by: Heinrich Schuchardt 
---
v2:
rebase patch
---
 .../visionfive2/starfive_visionfive2.c| 43 +--
 1 file changed, 30 insertions(+), 13 deletions(-)

diff --git a/board/starfive/visionfive2/starfive_visionfive2.c 
b/board/starfive/visionfive2/starfive_visionfive2.c
index 76439179fa7..5ae8b850280 100644
--- a/board/starfive/visionfive2/starfive_visionfive2.c
+++ b/board/starfive/visionfive2/starfive_visionfive2.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -17,6 +18,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 #define JH7110_L2_PREFETCHER_BASE_ADDR 0x203
 #define JH7110_L2_PREFETCHER_HART_OFFSET   0x2000
+#define FDTFILE_MILK_V_MARS \
+   "starfive/jh7110-milkv-mars.dtb"
 #define FDTFILE_VISIONFIVE2_1_2A \
"starfive/jh7110-starfive-visionfive-2-v1.2a.dtb"
 #define FDTFILE_VISIONFIVE2_1_3B \
@@ -48,24 +51,38 @@ static void set_fdtfile(void)
 {
u8 version;
const char *fdtfile;
+   const char *product_id;
 
fdtfile = env_get("fdtfile");
if (fdtfile)
return;
 
-   version = get_pcb_revision_from_eeprom();
-   switch (version) {
-   case 'a':
-   case 'A':
-   fdtfile = FDTFILE_VISIONFIVE2_1_2A;
-   break;
-
-   case 'b':
-   case 'B':
-   default:
-   fdtfile = FDTFILE_VISIONFIVE2_1_3B;
-   break;
-   };
+   product_id = get_product_id_from_eeprom();
+   if (!product_id) {
+   log_err("Can't read EEPROM\n");
+   return;
+   }
+   if (!strncmp(product_id, "MARS", 4)) {
+   fdtfile = FDTFILE_MILK_V_MARS;
+   } else if (!strncmp(product_id, "VF7110", 6)) {
+   version = get_pcb_revision_from_eeprom();
+
+   switch (version) {
+   case 'a':
+   case 'A':
+   fdtfile = FDTFILE_VISIONFIVE2_1_2A;
+   break;
+
+   case 'b':
+   case 'B':
+   default:
+   fdtfile = FDTFILE_VISIONFIVE2_1_3B;
+   break;
+   }
+   } else {
+   log_err("Unknown product\n");
+   return;
+   }
 
env_set("fdtfile", fdtfile);
 }
-- 
2.43.0

[PATCH v2 1/6] riscv: do not set default fdt for VisionFive 2

2024-03-21 Thread Heinrich Schuchardt

Currently in set_fdtfile() we set the value of environment variable fdtfile
unconditionally. The implies that a value in the environment will be
ignored.

With the patch environment variable fdtfile will only be set if it does not
yet exist. This requires that CONFIG_DEFAULT_FDT_FILE is not set.

Now the user can either set and save fdtfile interactively or in the U-Boot
configuration to overrule the device-tree name chosen based on the
hardware in set_fdtfile().

Reported-by: E Shattow 
Signed-off-by: Heinrich Schuchardt 
---
v2:
new patch
---
 .../visionfive2/starfive_visionfive2.c |  4 
 configs/starfive_visionfive2_defconfig |  1 -
 doc/board/starfive/visionfive2.rst | 18 ++
 3 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/board/starfive/visionfive2/starfive_visionfive2.c 
b/board/starfive/visionfive2/starfive_visionfive2.c
index 78e118d5a05..76439179fa7 100644
--- a/board/starfive/visionfive2/starfive_visionfive2.c
+++ b/board/starfive/visionfive2/starfive_visionfive2.c
@@ -49,6 +49,10 @@ static void set_fdtfile(void)
u8 version;
const char *fdtfile;
 
+   fdtfile = env_get("fdtfile");
+   if (fdtfile)
+   return;
+
version = get_pcb_revision_from_eeprom();
switch (version) {
case 'a':
diff --git a/configs/starfive_visionfive2_defconfig 
b/configs/starfive_visionfive2_defconfig
index 7a3f1d4dbdf..fa80d489f5e 100644
--- a/configs/starfive_visionfive2_defconfig
+++ b/configs/starfive_visionfive2_defconfig
@@ -40,7 +40,6 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 debug rootwait earlycon=sbi"
 CONFIG_USE_PREBOOT=y
 CONFIG_PREBOOT="nvme scan; usb start; setenv fdt_addr ${fdtcontroladdr}; fdt 
addr ${fdtcontroladdr};"
-CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2.dtb"
 CONFIG_SYS_CBSIZE=256
 CONFIG_SYS_PBSIZE=276
 CONFIG_DISPLAY_CPUINFO=y
diff --git a/doc/board/starfive/visionfive2.rst 
b/doc/board/starfive/visionfive2.rst
index abda8ac21bc..2e04c02dca5 100644
--- a/doc/board/starfive/visionfive2.rst
+++ b/doc/board/starfive/visionfive2.rst
@@ -71,6 +71,24 @@ Program the SD card
 This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well
 as the FIT image (u-boot.itb) with OpenSBI and U-Boot.
 
+Device-tree selection
+~
+
+Depending on the board version U-Boot set variable $fdtfile to either
+starfive/jh7110-starfive-visionfive-2-v1.2a.dtb or
+starfive/jh7110-starfive-visionfive-2-v1.3b.dtb.
+
+To overrule this selection the variable can be set manually and saved in the
+environment
+
+::
+
+setenv fdtfile my_device-tree.dtb
+env save
+
+or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to set to
+provide a default value.
+
 Flashing
 
 
-- 
2.43.0

[PATCH v2 0/6] riscv: add support for Milk-V Mars board

2024-03-21 Thread Heinrich Schuchardt

The Milk-V Mars board is technically very close to the StarFive
VisionFive 2 board.

With this patch series the VisionFive 2 U-Boot SPL will detect that it
is running on a Milk-V board and patch the device-tree accordingly.
This is the same approach that has been taken to handle the differences
between the Visionfive 2 1.2B and 1.3A revisions.

v2:
do not set default fdt for VisionFive 2
do not overwrite /soc/i2c@1205/eeprom@50/compatible

*** BLURB HERE ***

Heinrich Schuchardt (6):
  riscv: do not set default fdt for VisionFive 2
  eeprom: starfive: function get_product_id_from_eeprom()
  riscv: set fdtfile on Milk-V Mars
  board: starfive: support Milk-V Mars board
  riscv: starfive: avoid including common.h
  doc: describe Milk-V Mars board

 arch/riscv/include/asm/arch-jh7110/eeprom.h   |   9 ++
 board/starfive/visionfive2/spl.c  | 100 ++--
 .../visionfive2/starfive_visionfive2.c|  48 +---
 .../visionfive2/visionfive2-i2c-eeprom.c  |   9 +-
 configs/starfive_visionfive2_defconfig|   1 -
 doc/board/starfive/index.rst  |   1 +
 doc/board/starfive/milk-v_mars.rst| 111 ++
 doc/board/starfive/visionfive2.rst|  18 +++
 8 files changed, 268 insertions(+), 29 deletions(-)
 create mode 100644 doc/board/starfive/milk-v_mars.rst

-- 
2.43.0

[PATCH] tpm: display message when using gpio-reset instead of when missing it

2024-03-21 Thread Tim Harvey

Instead of displaying what looks like an error message if a
gpio-reset dt prop is missing for a TPM dipslay a more
informative message about resetting the TPM if the gpio is found:

before:
tpm_tis_spi_probe: missing reset GPIO

after:
tpm@0: performing 1ms reset on gpio@3021:12

Note that the reset dt binding prop used in this driver is not
dt-compliant; it does not exist in the Linux dt-bindings documentation
and the reset is not done by the Linux driver.

Signed-off-by: Tim Harvey 
---
 drivers/tpm/tpm2_tis_spi.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c
index de9cf8f21e07..944540f7a711 100644
--- a/drivers/tpm/tpm2_tis_spi.c
+++ b/drivers/tpm/tpm2_tis_spi.c
@@ -237,14 +237,14 @@ static int tpm_tis_spi_probe(struct udevice *dev)
/* legacy reset */
ret = gpio_request_by_name(dev, "gpio-reset", 0,
   _gpio, GPIOD_IS_OUT);
-   if (ret) {
-   log(LOGC_NONE, LOGL_NOTICE,
-   "%s: missing reset GPIO\n", __func__);
+   if (ret)
goto init;
-   }
log(LOGC_NONE, LOGL_NOTICE,
"%s: gpio-reset is deprecated\n", __func__);
}
+   log(LOGC_NONE, LOGL_NOTICE,
+   "%s: performing 1ms reset on %s:%d\n", dev->name,
+   reset_gpio.dev->name, reset_gpio.offset);
dm_gpio_set_value(_gpio, 1);
mdelay(1);
dm_gpio_set_value(_gpio, 0);
-- 
2.25.1

Re: [PATCH v1] board: toradex: verdin-am62_r5: Increase SPL_STACK_R_MALLOC_SIMPLE_LEN

2024-03-21 Thread Francesco Dolcini

On Wed, Mar 20, 2024 at 01:48:45PM -0300, Hiago De Franco wrote:
> From: Hiago De Franco 
> 
> Increase the SPL_STACK_R_MALLOC_SIMPLE_LEN to 0x20 to accommodate the
> size of tispl.bin fit image. With the recent upgrade of ti-linux-firmware
> from version v9.1.0 to v9.2.5, the size of tispl.bin fit image has
> increased to 1.4MB, causing allocation errors in the R5 SPL:
> 
> ```
> alloc space exhausted
> Could not get FIT buffer of 1325056 bytes
> check CONFIG_SPL_SYS_MALLOC_SIZE
> ```
> 
> Signed-off-by: Hiago De Franco 
Reviewed-by: Francesco Dolcini 


Tom, this is also a candidate for master, thanks :-)

Francesco

Re: [PATCH 1/2] usb: udc: dwc3: Fold board dm_usb_gadget_handle_interrupts() into DWC3 gadget

2024-03-21 Thread Caleb Connolly




On 20/03/2024 20:18, Marek Vasut wrote:
> On 3/18/24 1:47 PM, Caleb Connolly wrote:
>>
>>
>> On 17/03/2024 04:42, Marek Vasut wrote:
>>> The dm_usb_gadget_handle_interrupts() has no place in board code. Move
>>> this into DWC3 driver. The OMAP implementation is special, add new weak
>>> dwc3_uboot_interrupt_status() function to decide whether DWC3 interrupt
>>> handling should be called, and override it in OMAP DWC3 code, to repair
>>> the special OMAP interrupt handling code until OMAP gets switched over
>>> to DM UDC proper.
>>>
>>> Signed-off-by: Marek Vasut 
>>
>> Reviewed-by: Caleb Connolly 
> 
> Thank you. If you have a hardware with DWC3 , can you please also test
> this series ? I am afraid this may break things, although it is likely
> to break mostly select MX8M boards.

heh yeah it looked like it would be fine for qcom, but better safe than
sorry :P

Thanks for the ping.

Tested-by: Caleb Connolly  # qcom sdm845

-- 
// Caleb (they/them)

Re: [PATCH] usb: gadget: UMS: fix 64-bit division on ARM32

2024-03-21 Thread Caleb Connolly




On 21/03/2024 16:48, Mattijs Korpershoek wrote:
> Hi Caleb,
> 
> Thank you for the patch.
> 
> On jeu., mars 21, 2024 at 15:28, Caleb Connolly  
> wrote:
> 
>> The patch introducing support for dynamic sector sizes changed the types
>> used in some divisions, resulting in the compiler attempting to use
>> libgcc helpers (__aeabi_ldivmod). Replace these divisions with calls to
>> lldiv() to handle this correctly.
>>
>> Fixes: 74e56e0c5065 ("usb: gadget: UMS: support multiple sector sizes")
>> Signed-off-by: Caleb Connolly 
> 
> Reviewed-by: Mattijs Korpershoek 
> 
> Would it be okay if I squashed this into
> commit 74e56e0c5065 ("usb: gadget: UMS: support multiple sector sizes")
> ?
> 
> I'd like to not (intentionally) send any patches that don't compile to Tom.

For sure, feel free to do that.
> 
> 
>> ---
>> Hi Mattijs,
>>
>> Sorry for not catching that sooner! I compile tested this locally and a
> 
> No worries, thanks a lot for the quick fix.
> 
>> CI pipeline is running here: 
>> https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/20029
> 
> I can see from the above pipeline that some other failures are ongoing,
> but they are not related to lldiv().
> 
> arm-linux-gnueabi-ld.bfd: common/dfu.o: in function `run_usb_dnl_gadget':
> common/dfu.c:82:(.text.run_usb_dnl_gadget+0xd8): undefined reference to 
> `dm_usb_gadget_handle_interrupts'
> arm-linux-gnueabi-ld.bfd: common/dfu.c:108:(.text.run_usb_dnl_gadget+0x11c): 
> undefined reference to `dm_usb_gadget_handle_interrupts'
> make[1]: *** [Makefile:1793: u-boot] Error

Ah! I guess this is caused by the "select DM_USB_GADGET" patch...

You can revert it for now and I'll just select DM_USB_GADGET for qcom.

It seems like there's a bunch going on around here with the cleanup by
Marek. I can revisit this once that's settled
> 
> See: 
> https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/jobs/802759#L470
> 
> I suspect that this is related to:
> https://lore.kernel.org/r/all/20240225152715.1821613-1-jo...@kwiboo.se/

Is this fixed by the ("usb: udc: dwc3: Fold board
dm_usb_gadget_handle_interrupts() into DWC3") series?
> 
> 
>>
>> Regards,
>> Caleb
>> ---
>>  drivers/usb/gadget/f_mass_storage.c | 13 +++--
>>  1 file changed, 7 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/usb/gadget/f_mass_storage.c 
>> b/drivers/usb/gadget/f_mass_storage.c
>> index d880928044f4..ef90c7ec7fb5 100644
>> --- a/drivers/usb/gadget/f_mass_storage.c
>> +++ b/drivers/usb/gadget/f_mass_storage.c
>> @@ -239,8 +239,9 @@
>>  /* #define VERBOSE_DEBUG */
>>  /* #define DUMP_MSGS */
>>  
>>  #include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>>  #include 
>> @@ -768,10 +769,10 @@ static int do_read(struct fsg_common *common)
>>  }
>>  
>>  /* Perform the read */
>>  rc = ums[common->lun].read_sector([common->lun],
>> -  file_offset / curlun->blksize,
>> -  amount / curlun->blksize,
>> +  lldiv(file_offset, curlun->blksize),
>> +  lldiv(amount, curlun->blksize),
>>(char __user *)bh->buf);
>>  if (!rc)
>>  return -EIO;
>>  
>> @@ -942,10 +943,10 @@ static int do_write(struct fsg_common *common)
>>  amount = bh->outreq->actual;
>>  
>>  /* Perform the write */
>>  rc = ums[common->lun].write_sector([common->lun],
>> -   file_offset / curlun->blksize,
>> -   amount / curlun->blksize,
>> +   lldiv(file_offset, 
>> curlun->blksize),
>> +   lldiv(amount, curlun->blksize),
>> (char __user *)bh->buf);
>>  if (!rc)
>>  return -EIO;
>>  nwritten = rc * curlun->blksize;
>> @@ -1058,10 +1059,10 @@ static int do_verify(struct fsg_common *common)
>>  }
>>  
>>  /* Perform the read */
>>  rc = ums[common->lun].read_sector([common->lun],
>> -  file_offset / curlun->blksize,
>> -  amount / curlun->blksize,
>> +  lldiv(file_offset, curlun->blksize),
>> +  lldiv(amount, curlun->blksize),
>>(char __user *)bh->buf);
>>  if (!rc)
>>  return -EIO;
>>  nread = rc * curlun->blksize;
>> -- 
>> 2.44.0

-- 
// Caleb (they/them)

Re: [PATCH] usb: gadget: UMS: fix 64-bit division on ARM32

2024-03-21 Thread Mattijs Korpershoek

Hi Caleb,

Thank you for the patch.

On jeu., mars 21, 2024 at 15:28, Caleb Connolly  
wrote:

> The patch introducing support for dynamic sector sizes changed the types
> used in some divisions, resulting in the compiler attempting to use
> libgcc helpers (__aeabi_ldivmod). Replace these divisions with calls to
> lldiv() to handle this correctly.
>
> Fixes: 74e56e0c5065 ("usb: gadget: UMS: support multiple sector sizes")
> Signed-off-by: Caleb Connolly 

Reviewed-by: Mattijs Korpershoek 

Would it be okay if I squashed this into
commit 74e56e0c5065 ("usb: gadget: UMS: support multiple sector sizes")
?

I'd like to not (intentionally) send any patches that don't compile to Tom.


> ---
> Hi Mattijs,
>
> Sorry for not catching that sooner! I compile tested this locally and a

No worries, thanks a lot for the quick fix.

> CI pipeline is running here: 
> https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/20029

I can see from the above pipeline that some other failures are ongoing,
but they are not related to lldiv().

arm-linux-gnueabi-ld.bfd: common/dfu.o: in function `run_usb_dnl_gadget':
common/dfu.c:82:(.text.run_usb_dnl_gadget+0xd8): undefined reference to 
`dm_usb_gadget_handle_interrupts'
arm-linux-gnueabi-ld.bfd: common/dfu.c:108:(.text.run_usb_dnl_gadget+0x11c): 
undefined reference to `dm_usb_gadget_handle_interrupts'
make[1]: *** [Makefile:1793: u-boot] Error

See: 
https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/jobs/802759#L470

I suspect that this is related to:
https://lore.kernel.org/r/all/20240225152715.1821613-1-jo...@kwiboo.se/


>
> Regards,
> Caleb
> ---
>  drivers/usb/gadget/f_mass_storage.c | 13 +++--
>  1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/usb/gadget/f_mass_storage.c 
> b/drivers/usb/gadget/f_mass_storage.c
> index d880928044f4..ef90c7ec7fb5 100644
> --- a/drivers/usb/gadget/f_mass_storage.c
> +++ b/drivers/usb/gadget/f_mass_storage.c
> @@ -239,8 +239,9 @@
>  /* #define VERBOSE_DEBUG */
>  /* #define DUMP_MSGS */
>  
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
>  #include 
> @@ -768,10 +769,10 @@ static int do_read(struct fsg_common *common)
>   }
>  
>   /* Perform the read */
>   rc = ums[common->lun].read_sector([common->lun],
> -   file_offset / curlun->blksize,
> -   amount / curlun->blksize,
> +   lldiv(file_offset, curlun->blksize),
> +   lldiv(amount, curlun->blksize),
> (char __user *)bh->buf);
>   if (!rc)
>   return -EIO;
>  
> @@ -942,10 +943,10 @@ static int do_write(struct fsg_common *common)
>   amount = bh->outreq->actual;
>  
>   /* Perform the write */
>   rc = ums[common->lun].write_sector([common->lun],
> -file_offset / curlun->blksize,
> -amount / curlun->blksize,
> +lldiv(file_offset, 
> curlun->blksize),
> +lldiv(amount, curlun->blksize),
>  (char __user *)bh->buf);
>   if (!rc)
>   return -EIO;
>   nwritten = rc * curlun->blksize;
> @@ -1058,10 +1059,10 @@ static int do_verify(struct fsg_common *common)
>   }
>  
>   /* Perform the read */
>   rc = ums[common->lun].read_sector([common->lun],
> -   file_offset / curlun->blksize,
> -   amount / curlun->blksize,
> +   lldiv(file_offset, curlun->blksize),
> +   lldiv(amount, curlun->blksize),
> (char __user *)bh->buf);
>   if (!rc)
>   return -EIO;
>   nread = rc * curlun->blksize;
> -- 
> 2.44.0

[RFC][PATCH] syscon: Add syscon_regmap_lookup_by_compatible wrapper

2024-03-21 Thread Marek Vasut

Add a wrapper to look up a system controller by a compatible string.

This operates by looking up the given name in the device (device
tree property) of the device using the system controller.

Signed-off-by: Marek Vasut 
---
Cc: Johan Jonker 
Cc: Simon Glass 
Cc: Sumit Garg 
Cc: Tom Rini 
---
 drivers/core/syscon-uclass.c | 27 +++
 include/syscon.h | 13 +
 2 files changed, 40 insertions(+)

diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c
index a47b8bd3c01..b89006c030d 100644
--- a/drivers/core/syscon-uclass.c
+++ b/drivers/core/syscon-uclass.c
@@ -111,6 +111,33 @@ static int syscon_probe_by_ofnode(ofnode node, struct 
udevice **devp)
return 0;
 }
 
+struct regmap *syscon_regmap_lookup_by_compatible(struct udevice *dev,
+ const char *compatible)
+{
+   struct udevice *syscon;
+   struct regmap *r;
+   ofnode node;
+   int err;
+
+   node = ofnode_by_compatible(ofnode_null(), compatible);
+   if (!ofnode_valid(node)) {
+   dev_dbg(dev, "unable to find syscon device\n");
+   return ERR_PTR(-EINVAL);
+   }
+
+   err = syscon_probe_by_ofnode(node, );
+   if (err)
+   return ERR_PTR(-ENODEV);
+
+   r = syscon_get_regmap(syscon);
+   if (!r) {
+   dev_dbg(dev, "unable to find regmap\n");
+   return ERR_PTR(-ENODEV);
+   }
+
+   return r;
+}
+
 struct regmap *syscon_regmap_lookup_by_phandle(struct udevice *dev,
   const char *name)
 {
diff --git a/include/syscon.h b/include/syscon.h
index 7a5ee3fa26b..88f264d801b 100644
--- a/include/syscon.h
+++ b/include/syscon.h
@@ -60,6 +60,19 @@ int syscon_get_by_driver_data(ulong driver_data, struct 
udevice **devp);
  */
 struct regmap *syscon_get_regmap_by_driver_data(ulong driver_data);
 
+/**
+ * syscon_regmap_lookup_by_compatible() - Look up a controller by a compatible 
string
+ *
+ * This operates by looking up the given name in the device (device
+ * tree property) of the device using the system controller.
+ *
+ * @dev:   Device using the system controller
+ * @compatible:Compatible string of the system controller
+ * Return: A pointer to the regmap if found, ERR_PTR(-ve) on error
+ */
+struct regmap *syscon_regmap_lookup_by_compatible(struct udevice *dev,
+ const char *compatible);
+
 /**
  * syscon_regmap_lookup_by_phandle() - Look up a controller by a phandle
  *
-- 
2.43.0

Re: [PATCH] arm64: zynqmp: Also support JTAG as alternative boot mode

2024-03-21 Thread Sean Anderson

On 3/20/24 07:18, Michal Simek wrote:
> if (reg >> BOOT_MODE_ALT_SHIFT) condition rules out alternative jtag boot
> mode which is 0. When 0 was used origin(HW) boot mode was used instead.
> That's why directly fill reg variable with requested boot mode and don't
> let code to read value back. "else" part of code remain unchanged.
> 
> Signed-off-by: Michal Simek 
> ---
> 
>  arch/arm/mach-zynqmp/spl.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c
> index 5af735aa5cef..979ff3aef6c2 100644
> --- a/arch/arm/mach-zynqmp/spl.c
> +++ b/arch/arm/mach-zynqmp/spl.c
> @@ -91,13 +91,14 @@ u32 spl_boot_device(void)
>  
>  #if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)
>   /* Change default boot mode at run-time */
> + reg = CONFIG_SPL_ZYNQMP_ALT_BOOTMODE;
>   writel(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT,
>  _base->boot_mode);
> -#endif
> -
> +#else
>   reg = readl(_base->boot_mode);
>   if (reg >> BOOT_MODE_ALT_SHIFT)
>   reg >>= BOOT_MODE_ALT_SHIFT;
> +#endif
>  
>   bootmode = reg & BOOT_MODES_MASK;
>  

Looks fine; can we change this to

if (IS_ENABLED(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)) {
...
} else {
...
}

?

--Sean

[PATCH] arm64: zynqmp: Describe DisplayPort connector for Kria

2024-03-21 Thread Michal Simek

From: Vishal Sagar 

Add a device tree node to describe the DisplayPort connector, and
connect it to the DPSUB output.

The patch was tested on kv260-revB/rev2 and also kr260-revB.

Signed-off-by: Vishal Sagar 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 20 
 arch/arm/dts/zynqmp-sck-kv-g-revB.dtso | 20 
 2 files changed, 40 insertions(+)

diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso 
b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
index 6c29f6574134..0a0cbd2b69ae 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
@@ -66,6 +66,18 @@
#clock-cells = <0>;
clock-frequency = <7425>;
};
+
+   dpcon {
+   compatible = "dp-connector";
+   label = "P11";
+   type = "full-size";
+
+   port {
+   dpcon_in: endpoint {
+   remote-endpoint = <_dp_out>;
+   };
+   };
+   };
 };
 
  { /* I2C_SCK C26/C27 - MIO from SOM */
@@ -130,6 +142,14 @@
phy-names = "dp-phy0";
phys = < 1 PHY_TYPE_DP 0 1>;
assigned-clock-rates = <2700>, <2500>, <3>;
+
+   ports {
+   port@5 {
+   dpsub_dp_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
 };
 
 _dpdma {
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso 
b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
index a4b4465d2038..a449c1161b1e 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
@@ -63,6 +63,18 @@
#clock-cells = <0>;
clock-frequency = <2700>;
};
+
+   dpcon {
+   compatible = "dp-connector";
+   label = "P11";
+   type = "full-size";
+
+   port {
+   dpcon_in: endpoint {
+   remote-endpoint = <_dp_out>;
+   };
+   };
+   };
 };
 
  { /* I2C_SCK C23/C24 - MIO from SOM */
@@ -97,6 +109,14 @@
phy-names = "dp-phy0", "dp-phy1";
phys = < 1 PHY_TYPE_DP 0 0>, < 0 PHY_TYPE_DP 1 0>;
assigned-clock-rates = <2700>, <2500>, <3>;
+
+   ports {
+   port@5 {
+   dpsub_dp_out: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
 };
 
 _dpdma {
-- 
2.44.0

Re: [PATCH v3 1/3] arm: dts: imx93-phyboard-segin: Add USB support

2024-03-21 Thread Fabio Estevam

Hi Mathieu,

On Thu, Mar 21, 2024 at 11:46 AM Mathieu Othacehe  wrote:
>
> Enable both usbotg1 and usbotg2 ports. Disable over-current as OC pins are
> not connected to the SoC.
>
> This is temporary, until USB support is added to imx93-phyboard-segin.dts
> in Linux.
>
> Signed-off-by: Mathieu Othacehe 

Thanks, this looks better:

Reviewed-by: Fabio Estevam

[PATCH] usb: gadget: UMS: fix 64-bit division on ARM32

2024-03-21 Thread Caleb Connolly

The patch introducing support for dynamic sector sizes changed the types
used in some divisions, resulting in the compiler attempting to use
libgcc helpers (__aeabi_ldivmod). Replace these divisions with calls to
lldiv() to handle this correctly.

Fixes: 74e56e0c5065 ("usb: gadget: UMS: support multiple sector sizes")
Signed-off-by: Caleb Connolly 
---
Hi Mattijs,

Sorry for not catching that sooner! I compile tested this locally and a
CI pipeline is running here: 
https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/20029

Regards,
Caleb
---
 drivers/usb/gadget/f_mass_storage.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/usb/gadget/f_mass_storage.c 
b/drivers/usb/gadget/f_mass_storage.c
index d880928044f4..ef90c7ec7fb5 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -239,8 +239,9 @@
 /* #define VERBOSE_DEBUG */
 /* #define DUMP_MSGS */
 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
@@ -768,10 +769,10 @@ static int do_read(struct fsg_common *common)
}
 
/* Perform the read */
rc = ums[common->lun].read_sector([common->lun],
- file_offset / curlun->blksize,
- amount / curlun->blksize,
+ lldiv(file_offset, curlun->blksize),
+ lldiv(amount, curlun->blksize),
  (char __user *)bh->buf);
if (!rc)
return -EIO;
 
@@ -942,10 +943,10 @@ static int do_write(struct fsg_common *common)
amount = bh->outreq->actual;
 
/* Perform the write */
rc = ums[common->lun].write_sector([common->lun],
-  file_offset / curlun->blksize,
-  amount / curlun->blksize,
+  lldiv(file_offset, 
curlun->blksize),
+  lldiv(amount, curlun->blksize),
   (char __user *)bh->buf);
if (!rc)
return -EIO;
nwritten = rc * curlun->blksize;
@@ -1058,10 +1059,10 @@ static int do_verify(struct fsg_common *common)
}
 
/* Perform the read */
rc = ums[common->lun].read_sector([common->lun],
- file_offset / curlun->blksize,
- amount / curlun->blksize,
+ lldiv(file_offset, curlun->blksize),
+ lldiv(amount, curlun->blksize),
  (char __user *)bh->buf);
if (!rc)
return -EIO;
nread = rc * curlun->blksize;
-- 
2.44.0

Re: [PATCH 1/2] spl: Introduce architecture specific init function

2024-03-21 Thread Michal Simek

čt 21. 3. 2024 v 8:55 odesílatel Lukas Funke <
lukas.funke-...@weidmueller.com> napsal:

> On 20.03.2024 16:49, Andre Przywara wrote:
> > On Wed, 20 Mar 2024 11:33:16 -0400
> > Tom Rini  wrote:
> >
> > Hi,
> >
> >> On Wed, Mar 20, 2024 at 08:52:30PM +0530, Devarsh Thakkar wrote:
> >>> Hi Tom, Lukas,
> >>>
> >>> Thanks for the patch Lukas.
> >>>
> >>> On 20/03/24 20:00, Tom Rini wrote:
>  On Wed, Mar 20, 2024 at 02:19:26PM +0100,
> lukas.funke-...@weidmueller.com wrote:
> 
> > From: Lukas Funke 
> >
> > Some architectures use spl_board_init() in their architecture
> specific
> > implementation. Board developers should be able to add board specific
> > implementation via spl_board_init(). Hence, introduce a
> spl_arch_init()
> > method which is called right before spl_board_init() for architecture
> > specific implementation.
> >
> > Signed-off-by: Lukas Funke 
> 
>  I think this could allow for other SoCs to clean up their existing
> >>>
> >>> Does it make more sense to make this SoC specific then instead of arch
> >>> specific to allow broader range of code?
> >>
> >> "soc" and "arch" are somewhat interchangeable at times, so I think we
> >
> > Isn't "arch" ambiguous anyway? I connect that with CPU architecture, as
> in
> > x86, ARM, RISC-V. And we have that in the top level directories:
> arch/arm,
> > etc.
> > But here it's one level below, isn't it? Where "platform" (or "plat")
> > would be a more suiting term to describe a SoC family, like xilinx or
> > sunxi?
> > So the hierarchy would be really: arch -> plat -> soc -> board?
> >
> > Or am I confused here?
>
> No. But in some cases the 'platform' level is missing: for xilinx it's
> "arch->arm->mach-zynq->", for rockchip it's
> "arch->arm->plat->soc", i.e. "arch->arm->mach-rockchip->rk3399->".
> If we follow your proposed rule it should be:
> arch->arm->mach-xilinx->zynq->. Maybe this is an idea for the next
> cleanup round?
>
> Regarding the patch:
>
> I'd agree that the init code is not (cpu)architecture dependent. Some
> vendors init the console, some init the ddr, some init the leds and so
> on. Thus, we should go one level upwards and change it to
> "spl_soc_init()" if everyone is okay with it?
>
>
In our case soc and plat are the same.
Arch is clear that's armv7/v8,
socs/platform are zynq/zynqmp/versal/versal-net
And boards are generic/kria or antminer, syzygy, topic, etc.

And agree that we should do some cleanup in this.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

[PATCH v4 04/11] imx8mp: power-domain: Add PCIe support

2024-03-21 Thread Sumit Garg

Add support for GPCv2 power domains and clock handling for PCIe and
PCIe PHY.

Tested-by: Tim Harvey  #imx8mp-venice*
Tested-by: Adam Ford  #imx8mp-beacon-kit
Reviewed-by: Marek Vasut 
Signed-off-by: Sumit Garg 
---
 drivers/power/domain/imx8mp-hsiomix.c | 117 +-
 1 file changed, 79 insertions(+), 38 deletions(-)

diff --git a/drivers/power/domain/imx8mp-hsiomix.c 
b/drivers/power/domain/imx8mp-hsiomix.c
index e2d772c5ec7..d3b0c1146ce 100644
--- a/drivers/power/domain/imx8mp-hsiomix.c
+++ b/drivers/power/domain/imx8mp-hsiomix.c
@@ -16,48 +16,85 @@
 #define GPR_REG0   0x0
 #define  PCIE_CLOCK_MODULE_EN  BIT(0)
 #define  USB_CLOCK_MODULE_EN   BIT(1)
+#define  PCIE_PHY_APB_RST  BIT(4)
+#define  PCIE_PHY_INIT_RST BIT(5)
 
 struct imx8mp_hsiomix_priv {
void __iomem *base;
struct clk clk_usb;
+   struct clk clk_pcie;
struct power_domain pd_bus;
struct power_domain pd_usb;
+   struct power_domain pd_pcie;
struct power_domain pd_usb_phy1;
struct power_domain pd_usb_phy2;
+   struct power_domain pd_pcie_phy;
 };
 
-static int imx8mp_hsiomix_on(struct power_domain *power_domain)
+static int imx8mp_hsiomix_set(struct power_domain *power_domain, bool power_on)
 {
struct udevice *dev = power_domain->dev;
struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev);
-   struct power_domain *domain;
+   struct power_domain *domain = NULL;
+   struct clk *clk = NULL;
+   u32 gpr_reg0_bits = 0;
int ret;
 
-   ret = power_domain_on(>pd_bus);
-   if (ret)
-   return ret;
-
-   if (power_domain->id == IMX8MP_HSIOBLK_PD_USB) {
+   switch (power_domain->id) {
+   case IMX8MP_HSIOBLK_PD_USB:
domain = >pd_usb;
-   } else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY1) {
+   clk = >clk_usb;
+   gpr_reg0_bits |= USB_CLOCK_MODULE_EN;
+   break;
+   case IMX8MP_HSIOBLK_PD_USB_PHY1:
domain = >pd_usb_phy1;
-   } else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY2) {
+   break;
+   case IMX8MP_HSIOBLK_PD_USB_PHY2:
domain = >pd_usb_phy2;
-   } else {
-   ret = -EINVAL;
-   goto err_pd;
+   break;
+   case IMX8MP_HSIOBLK_PD_PCIE:
+   domain = >pd_pcie;
+   clk = >clk_pcie;
+   gpr_reg0_bits |= PCIE_CLOCK_MODULE_EN;
+   break;
+   case IMX8MP_HSIOBLK_PD_PCIE_PHY:
+   domain = >pd_pcie_phy;
+   /* Bits to deassert PCIe PHY reset */
+   gpr_reg0_bits |= PCIE_PHY_APB_RST | PCIE_PHY_INIT_RST;
+   break;
+   default:
+   dev_err(dev, "unknown power domain id: %ld\n",
+   power_domain->id);
+   return -EINVAL;
}
 
-   ret = power_domain_on(domain);
-   if (ret)
-   goto err_pd;
+   if (power_on) {
+   ret = power_domain_on(>pd_bus);
+   if (ret)
+   return ret;
 
-   ret = clk_enable(>clk_usb);
-   if (ret)
-   goto err_clk;
+   ret = power_domain_on(domain);
+   if (ret)
+   goto err_pd;
 
-   if (power_domain->id == IMX8MP_HSIOBLK_PD_USB)
-   setbits_le32(priv->base + GPR_REG0, USB_CLOCK_MODULE_EN);
+   if (clk) {
+   ret = clk_enable(clk);
+   if (ret)
+   goto err_clk;
+   }
+
+   if (gpr_reg0_bits)
+   setbits_le32(priv->base + GPR_REG0, gpr_reg0_bits);
+   } else {
+   if (gpr_reg0_bits)
+   clrbits_le32(priv->base + GPR_REG0, gpr_reg0_bits);
+
+   if (clk)
+   clk_disable(clk);
+
+   power_domain_off(domain);
+   power_domain_off(>pd_bus);
+   }
 
return 0;
 
@@ -68,26 +105,14 @@ err_pd:
return ret;
 }
 
-static int imx8mp_hsiomix_off(struct power_domain *power_domain)
+static int imx8mp_hsiomix_on(struct power_domain *power_domain)
 {
-   struct udevice *dev = power_domain->dev;
-   struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev);
-
-   if (power_domain->id == IMX8MP_HSIOBLK_PD_USB)
-   clrbits_le32(priv->base + GPR_REG0, USB_CLOCK_MODULE_EN);
-
-   clk_disable(>clk_usb);
-
-   if (power_domain->id == IMX8MP_HSIOBLK_PD_USB)
-   power_domain_off(>pd_usb);
-   else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY1)
-   power_domain_off(>pd_usb_phy1);
-   else if (power_domain->id == IMX8MP_HSIOBLK_PD_USB_PHY2)
-   power_domain_off(>pd_usb_phy2);
-
-   power_domain_off(>pd_bus);
+   return imx8mp_hsiomix_set(power_domain, true);
+}
 
-   return 0;
+static int imx8mp_hsiomix_off(struct

[PATCH v3 2/3] configs: imx93-phyboard-segin: Add USB support

2024-03-21 Thread Mathieu Othacehe

Add USB support by enabling `usb` command and required USB drivers.

Signed-off-by: Mathieu Othacehe 
---
 configs/imx93-phyboard-segin_defconfig | 8 
 1 file changed, 8 insertions(+)

diff --git a/configs/imx93-phyboard-segin_defconfig 
b/configs/imx93-phyboard-segin_defconfig
index 24f9bd553aa..0345e7deeab 100644
--- a/configs/imx93-phyboard-segin_defconfig
+++ b/configs/imx93-phyboard-segin_defconfig
@@ -67,6 +67,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_USB=y
 CONFIG_CMD_SNTP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EFIDEBUG=y
@@ -132,6 +133,13 @@ CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_THERMAL=y
 CONFIG_IMX_TMU=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1fc9
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0152
+CONFIG_CI_UDC=y
 CONFIG_ULP_WATCHDOG=y
 CONFIG_LZO=y
 CONFIG_BZIP2=y
-- 
2.41.0

[PATCH v3 1/3] arm: dts: imx93-phyboard-segin: Add USB support

2024-03-21 Thread Mathieu Othacehe

Enable both usbotg1 and usbotg2 ports. Disable over-current as OC pins are
not connected to the SoC.

This is temporary, until USB support is added to imx93-phyboard-segin.dts
in Linux.

Signed-off-by: Mathieu Othacehe 
---
 arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi 
b/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi
index 8bf28c2de87..6897c91f4d9 100644
--- a/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi
+++ b/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi
@@ -121,6 +121,21 @@
bootph-some-ram;
 };
 
+/*
+ * Remove once USB support is added to imx93-phyboard-segin.dts upstream.
+ */
+ {
+   disable-over-current;
+   dr_mode = "otg";
+   status = "okay";
+};
+
+ {
+   disable-over-current;
+   dr_mode = "host";
+   status = "okay";
+};
+
  {
bootph-pre-ram;
bootph-some-ram;
-- 
2.41.0

[PATCH v3 3/3] configs: imx93-phyboard-segin: Add fastboot support

2024-03-21 Thread Mathieu Othacehe

Enable the `fastboot` command.

Reviewed-by: Marek Vasut 
Signed-off-by: Mathieu Othacehe 
---
 configs/imx93-phyboard-segin_defconfig | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/configs/imx93-phyboard-segin_defconfig 
b/configs/imx93-phyboard-segin_defconfig
index 0345e7deeab..54215c51c08 100644
--- a/configs/imx93-phyboard-segin_defconfig
+++ b/configs/imx93-phyboard-segin_defconfig
@@ -94,6 +94,12 @@ CONFIG_SPL_CLK_IMX93=y
 CONFIG_CLK_IMX93=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x8280
+CONFIG_FASTBOOT_BUF_SIZE=0x2000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_UUU_SUPPORT=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_GPIO_HOG=y
 CONFIG_IMX_RGPIO2P=y
 CONFIG_DM_I2C=y
-- 
2.41.0

[PATCH v3 0/3] imx93-phyboard-segin: Add USB support.

2024-03-21 Thread Mathieu Othacehe

Hello,

This series adds USB support to imx93-phyboard-segin, in the same way as it
has been done for imx93_var_som here:

https://lists.denx.de/pipermail/u-boot/2024-February/546301.html

Thanks,

Mathieu

Changelog:

v1: https://lists.denx.de/pipermail/u-boot/2024-March/548613.html

Mathieu Othacehe (3):
  arm: dts: imx93-phyboard-segin: Add USB support
  configs: imx93-phyboard-segin: Add USB support
  configs: imx93-phyboard-segin: Add fastboot support

 arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi | 15 +++
 configs/imx93-phyboard-segin_defconfig| 14 ++
 2 files changed, 29 insertions(+)

-- 
2.41.0

Re: Pull request efi-next-20240321

2024-03-21 Thread Tom Rini

On Thu, Mar 21, 2024 at 08:48:00AM +0100, Heinrich Schuchardt wrote:

> Dear Tom,
> 
> The following changes since commit e50cb36cb5e772d5bbd30d070faedf7323406364:
> 
>   Merge branch '2024-03-19-assorted-updates' into next (2024-03-20
> 08:39:05 -0400)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-efi.git
> tags/efi-next-20240321
> 
> for you to fetch changes up to 884785adc1dc5e7b91acb542ba83941951ff2b77:
> 
>   doc: typo Synopis (2024-03-21 07:00:12 +0100)
> 
> Gitlab CI showed no issues:
> https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/20011
> 

Applied to u-boot/next, thanks!

-- 
Tom


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[PATCH v4 11/11] MAINTAINERS: Add entry for PCIe DWC IMX driver

2024-03-21 Thread Sumit Garg

Add myself as maintainer for PCIe DWC IMX driver support.

Acked-by: Marek Vasut 
Signed-off-by: Sumit Garg 
---
 MAINTAINERS | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 8b316c8550e..83fd68e3f39 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1371,6 +1371,12 @@ M:   Simon Glass 
 S: Maintained
 F: tools/patman/
 
+PCIe DWC IMX
+M: Sumit Garg 
+S: Maintained
+F: drivers/pci/pcie_dw_imx.c
+F: drivers/phy/phy-imx8m-pcie.c
+
 PCI Endpoint
 M: Ramon Fried 
 S: Maintained
-- 
2.34.1

[PATCH v4 10/11] imx8mp_venice_defconfig: Enable PCIe/NVMe support

2024-03-21 Thread Sumit Garg

From: Tim Harvey 

Enable PCIe/NVMe support. Also, enable the reset, regmap and syscon
drivers which are a prerequisite for PCIe support.

Signed-off-by: Tim Harvey 
[SG: rebased to next branch tip]
Signed-off-by: Sumit Garg 
---
 configs/imx8mp_venice_defconfig | 8 
 1 file changed, 8 insertions(+)

diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig
index 501ccb0ba8f..6e4addc7728 100644
--- a/configs/imx8mp_venice_defconfig
+++ b/configs/imx8mp_venice_defconfig
@@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-venice-gw71xx-2x"
 CONFIG_SPL_TEXT_BASE=0x92
 CONFIG_TARGET_IMX8MP_VENICE=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
 CONFIG_SYS_MONITOR_LEN=524288
 CONFIG_SPL_MMC=y
 CONFIG_SPL_SERIAL=y
@@ -21,6 +22,7 @@ CONFIG_SPL=y
 CONFIG_ENV_OFFSET_REDUND=0x3f8000
 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800
 CONFIG_SYS_LOAD_ADDR=0x4048
+CONFIG_PCI=y
 CONFIG_SYS_MEMTEST_START=0x4000
 CONFIG_SYS_MEMTEST_END=0x8000
 CONFIG_FIT=y
@@ -63,6 +65,7 @@ CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
 CONFIG_SYS_DISABLE_AUTOLOAD=y
 CONFIG_CMD_CACHE=y
@@ -84,6 +87,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_IP_DEFRAG=y
 CONFIG_TFTP_BLOCKSIZE=4096
 CONFIG_SPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
 CONFIG_CLK_COMPOSITE_CCF=y
 CONFIG_CLK_IMX8MP=y
 CONFIG_GPIO_HOG=y
@@ -112,7 +117,10 @@ CONFIG_FEC_MXC=y
 CONFIG_KSZ9477=y
 CONFIG_RGMII=y
 CONFIG_MII=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_IMX=y
 CONFIG_PHY_IMX8MQ_USB=y
+CONFIG_PHY_IMX8M_PCIE=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y
-- 
2.34.1

[PATCH v4 09/11] verdin-imx8mp_defconfig: Enable PCIe/NVMe support

2024-03-21 Thread Sumit Garg

Enable PCIe/NVMe support. Also, enable the reset driver which
is a prerequisite for PCIe support.

Acked-by: Francesco Dolcini 
Tested-by: Marcel Ziswiler 
Signed-off-by: Sumit Garg 
---
 configs/verdin-imx8mp_defconfig | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig
index 7ac5e65642c..b6194404baa 100644
--- a/configs/verdin-imx8mp_defconfig
+++ b/configs/verdin-imx8mp_defconfig
@@ -16,6 +16,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx8mp-verdin-wifi-dev"
 CONFIG_SPL_TEXT_BASE=0x92
 CONFIG_TARGET_VERDIN_IMX8MP=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
 CONFIG_SYS_MONITOR_LEN=524288
 CONFIG_SPL_MMC=y
 CONFIG_SPL_SERIAL=y
@@ -26,6 +27,7 @@ CONFIG_SPL=y
 CONFIG_IMX_BOOTAUX=y
 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800
 CONFIG_SYS_LOAD_ADDR=0x4820
+CONFIG_PCI=y
 CONFIG_SYS_MEMTEST_START=0x4000
 CONFIG_SYS_MEMTEST_END=0x8000
 CONFIG_REMAKE_ELF=y
@@ -76,6 +78,7 @@ CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
 CONFIG_CMD_READ=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
@@ -145,8 +148,11 @@ CONFIG_DWC_ETH_QOS_IMX=y
 CONFIG_FEC_MXC=y
 CONFIG_RGMII=y
 CONFIG_MII=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_IMX=y
 CONFIG_PHY=y
 CONFIG_PHY_IMX8MQ_USB=y
+CONFIG_PHY_IMX8M_PCIE=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y
-- 
2.34.1

[PATCH v4 08/11] pcie_imx: Update header to describe it as a legacy driver

2024-03-21 Thread Sumit Garg

Since now we have the modern pcie_dw_imx.c driver for iMX SoCs,
encourage people to switch to that for any further new iMX SoC support
or even for the older iMX6 SoCs too.

Suggested-by: Peter Robinson 
Signed-off-by: Sumit Garg 
---
 drivers/pci/pcie_imx.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index 4a18b0e0910..78f2c7d6bcd 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -7,6 +7,14 @@
  * Based on upstream Linux kernel driver:
  * pci-imx6.c: Sean Cross 
  * pcie-designware.c:  Jingoo Han 
+ *
+ * This is a legacy PCIe iMX driver kept to support older iMX6 SoCs. It is
+ * rather tied to quite old port of pcie-designware driver from Linux which
+ * suffices only iMX6 specific needs. But now we have modern PCIe iMX driver
+ * (drivers/pci/pcie_dw_imx.c) utilizing all the common DWC specific bits from
+ * (drivers/pci/pcie_dw_common.*). So you are encouraged to add any further iMX
+ * SoC support there or even better if you posses older iMX6 SoCs then switch
+ * those too in order to have a single modern PCIe iMX driver.
  */
 
 #include 
-- 
2.34.1

[PATCH v4 07/11] pci: Add DW PCIe controller support for iMX8MP SoC

2024-03-21 Thread Sumit Garg

pcie_imx doesn't seem to share any useful code for iMX8 SoC and it is
tied to quite old port of pcie_designware driver from Linux which
suffices only iMX6 specific needs.

But currently we have the common DWC specific bits which alligns pretty
well with DW PCIe controller on iMX8MP SoC. So lets reuse those common
bits instead as a new driver for iMX8 SoCs. It should be fairly easy to
add support for other iMX8 variants to this driver.

iMX8MP SoC also comes up with standalone PCIe PHY support, so hence we
can reuse the generic PHY infrastructure to power on PCIe PHY.

Tested-by: Tim Harvey  #imx8mp-venice*
Tested-by: Adam Ford  #imx8mp-beacon-kit
Reviewed-by: Marek Vasut 
Signed-off-by: Sumit Garg 
---
 drivers/pci/Kconfig   |  11 ++
 drivers/pci/Makefile  |   1 +
 drivers/pci/pcie_dw_imx.c | 338 ++
 3 files changed, 350 insertions(+)
 create mode 100644 drivers/pci/pcie_dw_imx.c

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 463ec47eb92..8d02ab82ad9 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -413,4 +413,15 @@ config PCIE_STARFIVE_JH7110
  Say Y here if you want to enable PLDA XpressRich PCIe controller
  support on StarFive JH7110 SoC.
 
+config PCIE_DW_IMX
+   bool "i.MX DW PCIe controller support"
+   depends on ARCH_IMX8M
+   select PCIE_DW_COMMON
+   select DM_REGULATOR
+   select REGMAP
+   select SYSCON
+   help
+ Say Y here if you want to enable DW PCIe controller support on
+ iMX SoCs.
+
 endif
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 72ef8b4bc77..2927c519129 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -53,3 +53,4 @@ obj-$(CONFIG_PCIE_UNIPHIER) += pcie_uniphier.o
 obj-$(CONFIG_PCIE_XILINX_NWL) += pcie-xilinx-nwl.o
 obj-$(CONFIG_PCIE_PLDA_COMMON) += pcie_plda_common.o
 obj-$(CONFIG_PCIE_STARFIVE_JH7110) += pcie_starfive_jh7110.o
+obj-$(CONFIG_PCIE_DW_IMX) += pcie_dw_imx.o
diff --git a/drivers/pci/pcie_dw_imx.c b/drivers/pci/pcie_dw_imx.c
new file mode 100644
index 000..a2ee228224b
--- /dev/null
+++ b/drivers/pci/pcie_dw_imx.c
@@ -0,0 +1,338 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2024 Linaro Ltd.
+ *
+ * Author: Sumit Garg 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "pcie_dw_common.h"
+
+#define PCIE_LINK_CAPABILITY   0x7c
+#define TARGET_LINK_SPEED_MASK 0xf
+#define LINK_SPEED_GEN_1   0x1
+#define LINK_SPEED_GEN_2   0x2
+#define LINK_SPEED_GEN_3   0x3
+
+#define PCIE_MISC_CONTROL_1_OFF0x8bc
+#define PCIE_DBI_RO_WR_EN  BIT(0)
+
+#define PCIE_PORT_DEBUG0   0x728
+#define PCIE_PORT_DEBUG1   0x72c
+#define PCIE_PORT_DEBUG1_LINK_UP   BIT(4)
+#define PCIE_PORT_DEBUG1_LINK_IN_TRAINING  BIT(29)
+
+#define PCIE_LINK_UP_TIMEOUT_MS100
+
+#define IOMUXC_GPR14_OFFSET0x38
+#define IMX8M_GPR_PCIE_CLK_REQ_OVERRIDE_EN BIT(10)
+#define IMX8M_GPR_PCIE_CLK_REQ_OVERRIDEBIT(11)
+
+struct pcie_dw_imx {
+   /* Must be first member of the struct */
+   struct pcie_dw  dw;
+   struct regmap   *iomuxc_gpr;
+   struct clk_bulk clks;
+   struct gpio_descreset_gpio;
+   struct reset_ctlapps_reset;
+   struct phy  phy;
+   struct udevice  *vpcie;
+};
+
+static void pcie_dw_configure(struct pcie_dw_imx *priv, u32 cap_speed)
+{
+   dw_pcie_dbi_write_enable(>dw, true);
+
+   clrsetbits_le32(priv->dw.dbi_base + PCIE_LINK_CAPABILITY,
+   TARGET_LINK_SPEED_MASK, cap_speed);
+
+   dw_pcie_dbi_write_enable(>dw, false);
+}
+
+static void imx_pcie_ltssm_enable(struct pcie_dw_imx *priv)
+{
+   reset_deassert(>apps_reset);
+}
+
+static void imx_pcie_ltssm_disable(struct pcie_dw_imx *priv)
+{
+   reset_assert(>apps_reset);
+}
+
+static bool is_link_up(u32 val)
+{
+   return ((val & PCIE_PORT_DEBUG1_LINK_UP) &&
+   (!(val & PCIE_PORT_DEBUG1_LINK_IN_TRAINING)));
+}
+
+static int wait_link_up(struct pcie_dw_imx *priv)
+{
+   u32 val;
+
+   return readl_poll_sleep_timeout(priv->dw.dbi_base + PCIE_PORT_DEBUG1,
+   val, is_link_up(val), 1, 10);
+}
+
+static int pcie_link_up(struct pcie_dw_imx *priv, u32 cap_speed)
+{
+   int ret;
+
+   /* DW pre link configurations */
+   pcie_dw_configure(priv, cap_speed);
+
+   /* Initiate link training */
+   imx_pcie_ltssm_enable(priv);
+
+   /* Check that link was established */
+   ret = wait_link_up(priv);
+   if (ret)
+   imx_pcie_ltssm_disable(priv);
+
+

[PATCH v4 06/11] phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHY

2024-03-21 Thread Sumit Garg

Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
PHY initialization moved to this standalone PHY driver.

Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/phy/freescale/phy-fsl-imx8m-pcie.c. Use last Linux kernel driver
reference commit 7559e7572c03 ("phy: Explicitly include correct DT
includes").

Tested-by: Tim Harvey  #imx8mp-venice*
Tested-by: Adam Ford  #imx8mp-beacon-kit
Reviewed-by: Marek Vasut 
Signed-off-by: Sumit Garg 
---
 drivers/phy/Kconfig  |  11 ++
 drivers/phy/Makefile |   1 +
 drivers/phy/phy-imx8m-pcie.c | 283 +++
 3 files changed, 295 insertions(+)
 create mode 100644 drivers/phy/phy-imx8m-pcie.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 60138beca49..8f767877e73 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -284,6 +284,17 @@ config PHY_IMX8MQ_USB
help
  Support the USB3.0 PHY in NXP i.MX8MQ or i.MX8MP SoC
 
+config PHY_IMX8M_PCIE
+   bool "NXP i.MX8MM/i.MX8MP PCIe PHY Driver"
+   depends on PHY
+   depends on IMX8MM || IMX8MP
+   select REGMAP
+   select SYSCON
+   help
+ Support the PCIe PHY in NXP i.MX8MM or i.MX8MP SoC
+
+ This PHY is found on i.MX8M devices supporting PCIe.
+
 config PHY_XILINX_ZYNQMP
tristate "Xilinx ZynqMP PHY driver"
depends on PHY && ARCH_ZYNQMP
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 2e8723186c0..7a2b764492b 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_PHY_DA8XX_USB) += phy-da8xx-usb.o
 obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
 obj-$(CONFIG_PHY_NPCM_USB) += phy-npcm-usb.o
 obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o
+obj-$(CONFIG_PHY_IMX8M_PCIE) += phy-imx8m-pcie.o
 obj-$(CONFIG_PHY_XILINX_ZYNQMP) += phy-zynqmp.o
 obj-y += cadence/
 obj-y += ti/
diff --git a/drivers/phy/phy-imx8m-pcie.c b/drivers/phy/phy-imx8m-pcie.c
new file mode 100644
index 000..2418388cb3c
--- /dev/null
+++ b/drivers/phy/phy-imx8m-pcie.c
@@ -0,0 +1,283 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2024 Linaro Ltd.
+ *
+ * Derived from Linux counterpart driver
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#define IMX8MM_PCIE_PHY_CMN_REG061 0x184
+#define  ANA_PLL_CLK_OUT_TO_EXT_IO_EN  BIT(0)
+#define IMX8MM_PCIE_PHY_CMN_REG062 0x188
+#define  ANA_PLL_CLK_OUT_TO_EXT_IO_SEL BIT(3)
+#define IMX8MM_PCIE_PHY_CMN_REG063 0x18C
+#define  AUX_PLL_REFCLK_SEL_SYS_PLLGENMASK(7, 6)
+#define IMX8MM_PCIE_PHY_CMN_REG064 0x190
+#define  ANA_AUX_RX_TX_SEL_TX  BIT(7)
+#define  ANA_AUX_RX_TERM_GND_ENBIT(3)
+#define  ANA_AUX_TX_TERM   BIT(2)
+#define IMX8MM_PCIE_PHY_CMN_REG065 0x194
+#define  ANA_AUX_RX_TERM   (BIT(7) | BIT(4))
+#define  ANA_AUX_TX_LVLGENMASK(3, 0)
+#define IMX8MM_PCIE_PHY_CMN_REG075 0x1D4
+#define  ANA_PLL_DONE  0x3
+#define PCIE_PHY_TRSV_REG5 0x414
+#define PCIE_PHY_TRSV_REG6 0x418
+
+#define IMX8MM_GPR_PCIE_REF_CLK_SELGENMASK(25, 24)
+#define IMX8MM_GPR_PCIE_REF_CLK_PLLFIELD_PREP(IMX8MM_GPR_PCIE_REF_CLK_SEL, 
0x3)
+#define IMX8MM_GPR_PCIE_REF_CLK_EXTFIELD_PREP(IMX8MM_GPR_PCIE_REF_CLK_SEL, 
0x2)
+#define IMX8MM_GPR_PCIE_AUX_EN BIT(19)
+#define IMX8MM_GPR_PCIE_CMN_RSTBIT(18)
+#define IMX8MM_GPR_PCIE_POWER_OFF  BIT(17)
+#define IMX8MM_GPR_PCIE_SSC_EN BIT(16)
+#define IMX8MM_GPR_PCIE_AUX_EN_OVERRIDEBIT(9)
+
+#define IOMUXC_GPR14_OFFSET0x38
+
+enum imx8_pcie_phy_type {
+   IMX8MM,
+   IMX8MP,
+};
+
+struct imx8_pcie_phy_drvdata {
+   const   char*gpr;
+   enumimx8_pcie_phy_type  variant;
+};
+
+struct imx8_pcie_phy {
+   ulong   base;
+   struct clk  hsio_clk;
+   struct regmap   *iomuxc_gpr;
+   struct reset_ctlperst;
+   struct reset_ctlreset;
+   u32 refclk_pad_mode;
+   u32 tx_deemph_gen1;
+   u32 tx_deemph_gen2;
+   boolclkreq_unused;
+   const struct imx8_pcie_phy_drvdata  *drvdata;
+};
+
+static int imx8_pcie_phy_power_on(struct phy *phy)
+{
+   int ret;
+   u32 val, pad_mode;
+   struct imx8_pcie_phy *imx8_phy = dev_get_priv(phy->dev);
+
+   pad_mode = imx8_phy->refclk_pad_mode;
+   switch (imx8_phy->drvdata->variant) {
+   case IMX8MM:
+   reset_assert(_phy->reset);
+
+   /* Tune PHY de-emphasis setting to pass PCIe compliance. */
+   if (imx8_phy->tx_deemph_gen1)
+   writel(imx8_phy->tx_deemph_gen1,
+  imx8_phy->base + PCIE_PHY_TRSV_REG5);
+   if

[PATCH v4 05/11] imx8mp: power-domain: Expose high performance PLL clock

2024-03-21 Thread Sumit Garg

Expose the high performance PLL as clock framework clock, so the
PCIe PHY can use it when there is no external refclock provided.

Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/pmdomain/imx/imx8mp-blk-ctrl.c. Use last Linux kernel driver
reference commit 7476ddfd36ac ("pmdomain: imx8mp-blk-ctrl: Convert to
platform remove callback returning void").

Tested-by: Tim Harvey  #imx8mp-venice*
Tested-by: Adam Ford  #imx8mp-beacon-kit
Reviewed-by: Marek Vasut 
Signed-off-by: Sumit Garg 
---
 drivers/power/domain/imx8mp-hsiomix.c | 77 +++
 1 file changed, 77 insertions(+)

diff --git a/drivers/power/domain/imx8mp-hsiomix.c 
b/drivers/power/domain/imx8mp-hsiomix.c
index d3b0c1146ce..6188a04c45e 100644
--- a/drivers/power/domain/imx8mp-hsiomix.c
+++ b/drivers/power/domain/imx8mp-hsiomix.c
@@ -6,9 +6,15 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
+#include 
+#include 
 #include 
 
 #include 
@@ -18,6 +24,15 @@
 #define  USB_CLOCK_MODULE_EN   BIT(1)
 #define  PCIE_PHY_APB_RST  BIT(4)
 #define  PCIE_PHY_INIT_RST BIT(5)
+#define GPR_REG1   0x4
+#define  PLL_LOCK  BIT(13)
+#define GPR_REG2   0x8
+#define  P_PLL_MASKGENMASK(5, 0)
+#define  M_PLL_MASKGENMASK(15, 6)
+#define  S_PLL_MASKGENMASK(18, 16)
+#define GPR_REG3   0xc
+#define  PLL_CKE   BIT(17)
+#define  PLL_RST   BIT(31)
 
 struct imx8mp_hsiomix_priv {
void __iomem *base;
@@ -123,6 +138,67 @@ static int imx8mp_hsiomix_of_xlate(struct power_domain 
*power_domain,
return 0;
 }
 
+static int hsio_pll_clk_enable(struct clk *clk)
+{
+   void *base = (void *)dev_get_driver_data(clk->dev);
+   u32 val;
+   int ret;
+
+   /* Setup HSIO PLL as 100 MHz output clock */
+   clrsetbits_le32(base + GPR_REG2,
+   P_PLL_MASK | M_PLL_MASK | S_PLL_MASK,
+   FIELD_PREP(P_PLL_MASK, 12) |
+   FIELD_PREP(M_PLL_MASK, 800) |
+   FIELD_PREP(S_PLL_MASK, 4));
+
+   /* de-assert PLL reset */
+   setbits_le32(base + GPR_REG3, PLL_RST);
+
+   /* enable PLL */
+   setbits_le32(base + GPR_REG3, PLL_CKE);
+
+   /* Check if PLL is locked */
+   ret = readl_poll_sleep_timeout(base + GPR_REG1, val,
+  val & PLL_LOCK, 10, 10);
+   if (ret)
+   dev_err(clk->dev, "failed to lock HSIO PLL\n");
+
+   return ret;
+}
+
+static int hsio_pll_clk_disable(struct clk *clk)
+{
+   void *base = (void *)dev_get_driver_data(clk->dev);
+
+   clrbits_le32(base + GPR_REG3, PLL_CKE | PLL_RST);
+
+   return 0;
+}
+
+static const struct clk_ops hsio_pll_clk_ops = {
+   .enable = hsio_pll_clk_enable,
+   .disable = hsio_pll_clk_disable,
+};
+
+U_BOOT_DRIVER(hsio_pll) = {
+   .name = "hsio-pll",
+   .id = UCLASS_CLK,
+   .ops = _pll_clk_ops,
+};
+
+int imx8mp_hsiomix_bind(struct udevice *dev)
+{
+   struct driver *drv;
+
+   drv = lists_driver_lookup_name("hsio-pll");
+   if (!drv)
+   return -ENOENT;
+
+   return device_bind_with_driver_data(dev, drv, "hsio-pll",
+   (ulong)dev_read_addr_ptr(dev),
+   dev_ofnode(dev), NULL);
+}
+
 static int imx8mp_hsiomix_probe(struct udevice *dev)
 {
struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev);
@@ -193,6 +269,7 @@ U_BOOT_DRIVER(imx8mp_hsiomix) = {
.id = UCLASS_POWER_DOMAIN,
.of_match   = imx8mp_hsiomix_ids,
.probe  = imx8mp_hsiomix_probe,
+   .bind   = imx8mp_hsiomix_bind,
.priv_auto  = sizeof(struct imx8mp_hsiomix_priv),
.ops= _hsiomix_ops,
 };
-- 
2.34.1

[PATCH v4 03/11] reset: imx: Add support for i.MX8MP reset controller

2024-03-21 Thread Sumit Garg

Add support for i.MX8MP reset controller, it has same reset IP inside
as the other iMX7 and iMX8M variants but with different module layout.

Inspired from counterpart Linux kernel v6.8-rc3 driver:
drivers/reset/reset-imx7.c. Use last Linux kernel driver reference
commit bad8a8afe19f ("reset: Explicitly include correct DT includes").

Tested-by: Tim Harvey  #imx8mp-venice*
Tested-by: Adam Ford  #imx8mp-beacon-kit
Reviewed-by: Marek Vasut 
Signed-off-by: Sumit Garg 
---
 drivers/reset/reset-imx7.c | 101 +
 1 file changed, 101 insertions(+)

diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index ca703466605..a3b3132f2fa 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -252,6 +253,102 @@ static int imx8mq_reset_assert(struct reset_ctl *rst)
return 0;
 }
 
+enum imx8mp_src_registers {
+   SRC_SUPERMIX_RCR= 0x0018,
+   SRC_AUDIOMIX_RCR= 0x001c,
+   SRC_MLMIX_RCR   = 0x0028,
+   SRC_GPU2D_RCR   = 0x0038,
+   SRC_GPU3D_RCR   = 0x003c,
+   SRC_VPU_G1_RCR  = 0x0048,
+   SRC_VPU_G2_RCR  = 0x004c,
+   SRC_VPUVC8KE_RCR= 0x0050,
+   SRC_NOC_RCR = 0x0054,
+};
+
+static const struct imx7_src_signal imx8mp_src_signals[IMX8MP_RESET_NUM] = {
+   [IMX8MP_RESET_A53_CORE_POR_RESET0]  = { SRC_A53RCR0, BIT(0) },
+   [IMX8MP_RESET_A53_CORE_POR_RESET1]  = { SRC_A53RCR0, BIT(1) },
+   [IMX8MP_RESET_A53_CORE_POR_RESET2]  = { SRC_A53RCR0, BIT(2) },
+   [IMX8MP_RESET_A53_CORE_POR_RESET3]  = { SRC_A53RCR0, BIT(3) },
+   [IMX8MP_RESET_A53_CORE_RESET0]  = { SRC_A53RCR0, BIT(4) },
+   [IMX8MP_RESET_A53_CORE_RESET1]  = { SRC_A53RCR0, BIT(5) },
+   [IMX8MP_RESET_A53_CORE_RESET2]  = { SRC_A53RCR0, BIT(6) },
+   [IMX8MP_RESET_A53_CORE_RESET3]  = { SRC_A53RCR0, BIT(7) },
+   [IMX8MP_RESET_A53_DBG_RESET0]   = { SRC_A53RCR0, BIT(8) },
+   [IMX8MP_RESET_A53_DBG_RESET1]   = { SRC_A53RCR0, BIT(9) },
+   [IMX8MP_RESET_A53_DBG_RESET2]   = { SRC_A53RCR0, BIT(10) },
+   [IMX8MP_RESET_A53_DBG_RESET3]   = { SRC_A53RCR0, BIT(11) },
+   [IMX8MP_RESET_A53_ETM_RESET0]   = { SRC_A53RCR0, BIT(12) },
+   [IMX8MP_RESET_A53_ETM_RESET1]   = { SRC_A53RCR0, BIT(13) },
+   [IMX8MP_RESET_A53_ETM_RESET2]   = { SRC_A53RCR0, BIT(14) },
+   [IMX8MP_RESET_A53_ETM_RESET3]   = { SRC_A53RCR0, BIT(15) },
+   [IMX8MP_RESET_A53_SOC_DBG_RESET]= { SRC_A53RCR0, BIT(20) },
+   [IMX8MP_RESET_A53_L2RESET]  = { SRC_A53RCR0, BIT(21) },
+   [IMX8MP_RESET_SW_NON_SCLR_M7C_RST]  = { SRC_M4RCR, BIT(0) },
+   [IMX8MP_RESET_OTG1_PHY_RESET]   = { SRC_USBOPHY1_RCR, BIT(0) },
+   [IMX8MP_RESET_OTG2_PHY_RESET]   = { SRC_USBOPHY2_RCR, BIT(0) },
+   [IMX8MP_RESET_SUPERMIX_RESET]   = { SRC_SUPERMIX_RCR, BIT(0) },
+   [IMX8MP_RESET_AUDIOMIX_RESET]   = { SRC_AUDIOMIX_RCR, BIT(0) },
+   [IMX8MP_RESET_MLMIX_RESET]  = { SRC_MLMIX_RCR, BIT(0) },
+   [IMX8MP_RESET_PCIEPHY]  = { SRC_PCIEPHY_RCR, BIT(2) },
+   [IMX8MP_RESET_PCIEPHY_PERST]= { SRC_PCIEPHY_RCR, BIT(3) },
+   [IMX8MP_RESET_PCIE_CTRL_APPS_EN]= { SRC_PCIEPHY_RCR, BIT(6) },
+   [IMX8MP_RESET_PCIE_CTRL_APPS_TURNOFF]   = { SRC_PCIEPHY_RCR, BIT(11) },
+   [IMX8MP_RESET_HDMI_PHY_APB_RESET]   = { SRC_HDMI_RCR, BIT(0) },
+   [IMX8MP_RESET_MEDIA_RESET]  = { SRC_DISP_RCR, BIT(0) },
+   [IMX8MP_RESET_GPU2D_RESET]  = { SRC_GPU2D_RCR, BIT(0) },
+   [IMX8MP_RESET_GPU3D_RESET]  = { SRC_GPU3D_RCR, BIT(0) },
+   [IMX8MP_RESET_GPU_RESET]= { SRC_GPU_RCR, BIT(0) },
+   [IMX8MP_RESET_VPU_RESET]= { SRC_VPU_RCR, BIT(0) },
+   [IMX8MP_RESET_VPU_G1_RESET] = { SRC_VPU_G1_RCR, BIT(0) },
+   [IMX8MP_RESET_VPU_G2_RESET] = { SRC_VPU_G2_RCR, BIT(0) },
+   [IMX8MP_RESET_VPUVC8KE_RESET]   = { SRC_VPUVC8KE_RCR, BIT(0) },
+   [IMX8MP_RESET_NOC_RESET]= { SRC_NOC_RCR, BIT(0) },
+};
+
+static int imx8mp_reset_set(struct reset_ctl *rst, bool assert)
+{
+   struct imx_reset_priv *priv = dev_get_priv(rst->dev);
+   unsigned int bit, value;
+
+   if (rst->id >= IMX8MP_RESET_NUM)
+   return -EINVAL;
+
+   bit = imx8mp_src_signals[rst->id].bit;
+   value = assert ? bit : 0;
+
+   switch (rst->id) {
+   case IMX8MP_RESET_PCIEPHY:
+   /*
+* wait for more than 10us to release phy g_rst and
+* btnrst
+*/
+   if (!assert)
+   udelay(10);
+   break;
+
+   case

[PATCH v4 02/11] reset: imx: Refactor driver to simplify function names

2024-03-21 Thread Sumit Garg

imx7_reset_{deassert/assert}_imx* are a bit more confusing when compared
with imx*_reset_{deassert/assert}. So refactor driver to use function
names easier to understand. This shouldn't affect the functionality
though.

Suggested-by: Marek Vasut 
Reviewed-by: Marek Vasut 
Signed-off-by: Sumit Garg 
---
 drivers/reset/reset-imx7.c | 42 +++---
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index eaef2cc2cdf..ca703466605 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -14,7 +14,7 @@
 #include 
 #include 
 
-struct imx7_reset_priv {
+struct imx_reset_priv {
void __iomem *base;
struct reset_ops ops;
 };
@@ -64,9 +64,9 @@ static const struct imx7_src_signal 
imx7_src_signals[IMX7_RESET_NUM] = {
[IMX7_RESET_DDRC_CORE_RST]  = { SRC_DDRC_RCR, BIT(1) },
 };
 
-static int imx7_reset_deassert_imx7(struct reset_ctl *rst)
+static int imx7_reset_deassert(struct reset_ctl *rst)
 {
-   struct imx7_reset_priv *priv = dev_get_priv(rst->dev);
+   struct imx_reset_priv *priv = dev_get_priv(rst->dev);
const struct imx7_src_signal *sig = imx7_src_signals;
u32 val;
 
@@ -95,9 +95,9 @@ static int imx7_reset_deassert_imx7(struct reset_ctl *rst)
return 0;
 }
 
-static int imx7_reset_assert_imx7(struct reset_ctl *rst)
+static int imx7_reset_assert(struct reset_ctl *rst)
 {
-   struct imx7_reset_priv *priv = dev_get_priv(rst->dev);
+   struct imx_reset_priv *priv = dev_get_priv(rst->dev);
const struct imx7_src_signal *sig = imx7_src_signals;
u32 val;
 
@@ -185,9 +185,9 @@ static const struct imx7_src_signal 
imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
[IMX8MQ_RESET_DDRC2_PRST]   = { SRC_DDRC2_RCR, BIT(2) },
 };
 
-static int imx7_reset_deassert_imx8mq(struct reset_ctl *rst)
+static int imx8mq_reset_deassert(struct reset_ctl *rst)
 {
-   struct imx7_reset_priv *priv = dev_get_priv(rst->dev);
+   struct imx_reset_priv *priv = dev_get_priv(rst->dev);
const struct imx7_src_signal *sig = imx8mq_src_signals;
u32 val;
 
@@ -223,9 +223,9 @@ static int imx7_reset_deassert_imx8mq(struct reset_ctl *rst)
return 0;
 }
 
-static int imx7_reset_assert_imx8mq(struct reset_ctl *rst)
+static int imx8mq_reset_assert(struct reset_ctl *rst)
 {
-   struct imx7_reset_priv *priv = dev_get_priv(rst->dev);
+   struct imx_reset_priv *priv = dev_get_priv(rst->dev);
const struct imx7_src_signal *sig = imx8mq_src_signals;
u32 val;
 
@@ -252,21 +252,21 @@ static int imx7_reset_assert_imx8mq(struct reset_ctl *rst)
return 0;
 }
 
-static int imx7_reset_assert(struct reset_ctl *rst)
+static int imx_reset_assert(struct reset_ctl *rst)
 {
-   struct imx7_reset_priv *priv = dev_get_priv(rst->dev);
+   struct imx_reset_priv *priv = dev_get_priv(rst->dev);
return priv->ops.rst_assert(rst);
 }
 
-static int imx7_reset_deassert(struct reset_ctl *rst)
+static int imx_reset_deassert(struct reset_ctl *rst)
 {
-   struct imx7_reset_priv *priv = dev_get_priv(rst->dev);
+   struct imx_reset_priv *priv = dev_get_priv(rst->dev);
return priv->ops.rst_deassert(rst);
 }
 
 static const struct reset_ops imx7_reset_reset_ops = {
-   .rst_assert = imx7_reset_assert,
-   .rst_deassert = imx7_reset_deassert,
+   .rst_assert = imx_reset_assert,
+   .rst_deassert = imx_reset_deassert,
 };
 
 static const struct udevice_id imx7_reset_ids[] = {
@@ -277,18 +277,18 @@ static const struct udevice_id imx7_reset_ids[] = {
 
 static int imx7_reset_probe(struct udevice *dev)
 {
-   struct imx7_reset_priv *priv = dev_get_priv(dev);
+   struct imx_reset_priv *priv = dev_get_priv(dev);
 
priv->base = dev_remap_addr(dev);
if (!priv->base)
return -ENOMEM;
 
if (device_is_compatible(dev, "fsl,imx8mq-src")) {
-   priv->ops.rst_assert = imx7_reset_assert_imx8mq;
-   priv->ops.rst_deassert = imx7_reset_deassert_imx8mq;
+   priv->ops.rst_assert = imx8mq_reset_assert;
+   priv->ops.rst_deassert = imx8mq_reset_deassert;
} else if (device_is_compatible(dev, "fsl,imx7d-src")) {
-   priv->ops.rst_assert = imx7_reset_assert_imx7;
-   priv->ops.rst_deassert = imx7_reset_deassert_imx7;
+   priv->ops.rst_assert = imx7_reset_assert;
+   priv->ops.rst_deassert = imx7_reset_deassert;
}
 
return 0;
@@ -300,5 +300,5 @@ U_BOOT_DRIVER(imx7_reset) = {
.of_match = imx7_reset_ids,
.ops = _reset_reset_ops,
.probe = imx7_reset_probe,
-   .priv_auto  = sizeof(struct imx7_reset_priv),
+   .priv_auto = sizeof(struct imx_reset_priv),
 };
-- 
2.34.1

[PATCH v4 01/11] clk: imx8mp: Add support for PCIe clocks

2024-03-21 Thread Sumit Garg

Add support for PCIe clocks required to enable PCIe support on
iMX8MP SoC.

Tested-by: Tim Harvey  #imx8mp-venice*
Tested-by: Adam Ford  #imx8mp-beacon-kit
Reviewed-by: Marek Vasut 
Signed-off-by: Sumit Garg 
---
 drivers/clk/imx/clk-imx8mp.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index a21a3ce34bb..7dfc829df2c 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -62,6 +62,10 @@ static const char *imx8mp_dram_apb_sels[] = 
{"clock-osc-24m", "sys_pll2_200m", "
 "sys_pll1_160m", "sys_pll1_800m", 
"sys_pll3_out",
 "sys_pll2_250m", "audio_pll2_out", 
};
 
+static const char * const imx8mp_pcie_aux_sels[] = {"clock-osc-24m", 
"sys_pll2_200m", "sys_pll2_50m",
+   "sys_pll3_out", 
"sys_pll2_100m", "sys_pll1_80m",
+   "sys_pll1_160m", 
"sys_pll1_200m", };
+
 static const char *imx8mp_i2c5_sels[] = {"clock-osc-24m", "sys_pll1_160m", 
"sys_pll2_50m",
 "sys_pll3_out", "audio_pll1_out", 
"video_pll1_out",
 "audio_pll2_out", "sys_pll1_133m", };
@@ -272,6 +276,7 @@ static int imx8mp_clk_probe(struct udevice *dev)
 
clk_dm(IMX8MP_CLK_DRAM_ALT, imx8m_clk_composite("dram_alt", 
imx8mp_dram_alt_sels, base + 0xa000));
clk_dm(IMX8MP_CLK_DRAM_APB, imx8m_clk_composite_critical("dram_apb", 
imx8mp_dram_apb_sels, base + 0xa080));
+   clk_dm(IMX8MP_CLK_PCIE_AUX, imx8m_clk_composite("pcie_aux", 
imx8mp_pcie_aux_sels, base + 0xa400));
clk_dm(IMX8MP_CLK_I2C5, imx8m_clk_composite("i2c5", imx8mp_i2c5_sels, 
base + 0xa480));
clk_dm(IMX8MP_CLK_I2C6, imx8m_clk_composite("i2c6", imx8mp_i2c6_sels, 
base + 0xa500));
clk_dm(IMX8MP_CLK_ENET_QOS, imx8m_clk_composite("enet_qos", 
imx8mp_enet_qos_sels, base + 0xa880));
@@ -322,6 +327,7 @@ static int imx8mp_clk_probe(struct udevice *dev)
clk_dm(IMX8MP_CLK_I2C2_ROOT, imx_clk_gate4("i2c2_root_clk", "i2c2", 
base + 0x4180, 0));
clk_dm(IMX8MP_CLK_I2C3_ROOT, imx_clk_gate4("i2c3_root_clk", "i2c3", 
base + 0x4190, 0));
clk_dm(IMX8MP_CLK_I2C4_ROOT, imx_clk_gate4("i2c4_root_clk", "i2c4", 
base + 0x41a0, 0));
+   clk_dm(IMX8MP_CLK_PCIE_ROOT, imx_clk_gate4("pcie_root_clk", "pcie_aux", 
base + 0x4250, 0));
clk_dm(IMX8MP_CLK_PWM1_ROOT, imx_clk_gate4("pwm1_root_clk", "pwm1", 
base + 0x4280, 0));
clk_dm(IMX8MP_CLK_PWM2_ROOT, imx_clk_gate4("pwm2_root_clk", "pwm2", 
base + 0x4290, 0));
clk_dm(IMX8MP_CLK_PWM3_ROOT, imx_clk_gate4("pwm3_root_clk", "pwm3", 
base + 0x42a0, 0));
-- 
2.34.1

[PATCH v4 00/11] imx8mp: Enable PCIe/NVMe support

2024-03-21 Thread Sumit Garg

pcie_imx doesn't seem to share any useful code for iMX8MP SoC and it is
rather tied to quite old port of pcie_designware driver from Linux which
suffices only iMX6 specific needs.

But currently we have the common DWC specific bits which alligns pretty
well with DW PCIe controller on iMX8MP SoC. So lets reuse those common
bits instead as a new driver for iMX8 SoCs. It should be fairly easy to
add support for other iMX8 variants to this driver.

iMX8MP SoC also comes up with standalone PCIe PHY support, so hence we
can reuse the generic PHY infrastructure to power on PCIe PHY.

Testing with this patch-set included:

Verdin iMX8MP # pci enum
PCIE-0: Link up (Gen1-x1, Bus0)
Verdin iMX8MP # 
Verdin iMX8MP # nvme scan
Verdin iMX8MP # 
Verdin iMX8MP # nvme info
Device 0: Vendor: 0x126f Rev: T0828A0  Prod: AA000720
Type: Hard Disk
Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
Verdin iMX8MP # 
Verdin iMX8MP # load nvme 0 $loadaddr 

Changes in v4:
- Incorporated misc comments from Marek and added his review tag.
- Dropped patch #4 (imx8mp: power-domain: Don't power off pd_bus)
  since power domain off path is never excercised for DT based devices.
- Added patch#8 as suggested by Peter to describe older pcie_imx.c
  driver as legacy one.

Changes in v3:
- Rebased on top of U-Boot next.
- Incorporated misc. updates to commit messages.
- New patch#2 to refactor reset driver function names.
- Patch#3: Refactored further for better code reuse.
- New patch#4 to fix refcount issue with power domain bus.
- Patch#5: Refactored further for better code reuse.
- Patch#7 & #8: Added dependency on REGMAP and SYSCON. Also, added
  support for vpcie-supply regulator.
- Patch#7 & #8: Added error paths and .remove callback.
- New patch#10 to enable PCIe/NVMe for imx8mp_venice*.

Changes in v2:
- Renamed PCIe IMX driver pcie_dw_imx8.c -> pcie_dw_imx.c.
- Added myself as maintainer for PCIe DWC IMX driver support.
- Incorporated various code and commit message improvement suggestions
  from Marek, thanks.
- Patch#3: Gate PCIe and USB clocks behind corresponding power domain
  IDs.
- Patch#4: Expose HSIO PLL clocks as a regular clock driver instead
  similar to what Linux kernel does.
- Patch#7: Picked up tags.

Sumit Garg (10):
  clk: imx8mp: Add support for PCIe clocks
  reset: imx: Refactor driver to simplify function names
  reset: imx: Add support for i.MX8MP reset controller
  imx8mp: power-domain: Add PCIe support
  imx8mp: power-domain: Expose high performance PLL clock
  phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHY
  pci: Add DW PCIe controller support for iMX8MP SoC
  pcie_imx: Update header to describe it as a legacy driver
  verdin-imx8mp_defconfig: Enable PCIe/NVMe support
  MAINTAINERS: Add entry for PCIe DWC IMX driver

Tim Harvey (1):
  imx8mp_venice_defconfig: Enable PCIe/NVMe support

 MAINTAINERS   |   6 +
 configs/imx8mp_venice_defconfig   |   8 +
 configs/verdin-imx8mp_defconfig   |   6 +
 drivers/clk/imx/clk-imx8mp.c  |   6 +
 drivers/pci/Kconfig   |  11 +
 drivers/pci/Makefile  |   1 +
 drivers/pci/pcie_dw_imx.c | 338 ++
 drivers/pci/pcie_imx.c|   8 +
 drivers/phy/Kconfig   |  11 +
 drivers/phy/Makefile  |   1 +
 drivers/phy/phy-imx8m-pcie.c  | 283 +
 drivers/power/domain/imx8mp-hsiomix.c | 190 ---
 drivers/reset/reset-imx7.c| 143 +--
 13 files changed, 955 insertions(+), 57 deletions(-)
 create mode 100644 drivers/pci/pcie_dw_imx.c
 create mode 100644 drivers/phy/phy-imx8m-pcie.c

-- 
2.34.1

Re: [PATCH v4 0/5] Qualcomm DWC3 USB support

2024-03-21 Thread Mattijs Korpershoek

Hi Caleb,

It seems CI got broken with this series.

Baseline CI (passed):
https://source.denx.de/u-boot/u-boot/-/pipelines/20006

With series applied (failed):
https://source.denx.de/u-boot/custodians/u-boot-dfu/-/jobs/802278

It seems the change on UMS introduced some linking errors on arm32:

f_mass_storage.c:946:(.text.do_write.lto_priv.0+0x1de): undefined reference to 
`__aeabi_ldivmod'

Could you have a look, please?

Thank you.
Mattijs

On jeu., mars 21, 2024 at 10:23, Mattijs Korpershoek 
 wrote:

> Hi,
>
> On Wed, 20 Mar 2024 14:30:46 +, Caleb Connolly wrote:
>> This series enables support for Qualcomm platforms in the DWC3 driver,
>> adds support for arbitrary sector sizes to the USB mass storage gadget,
>> and fixes an issue with the CDC ACM driver where it wouldn't initialise
>> the USB device.
>> 
>> Additionally, it fixes a syntax bug in the Qualcomm SMMU driver, and
>> makes USB_DWC3_GADGET select DM_USB_GADGET to fix compilation with
>> gadget mode.
>> 
>> [...]
>
> Thanks, Applied to https://source.denx.de/u-boot/custodians/u-boot-dfu 
> (u-boot-dfu-next)
>
> [1/5] usb: dwc3-generic: implement Qualcomm wrapper
>   
> https://source.denx.de/u-boot/custodians/u-boot-dfu/-/commit/850b307789dca8dfff6d7cad57ba2ffbfbb5f6ed
> [2/5] usb: dwc3: select DM_USB_GADGET
>   
> https://source.denx.de/u-boot/custodians/u-boot-dfu/-/commit/97d629372c8c58da96f46aa6d2bec09f120cc62d
> [3/5] usb: gadget: CDC ACM: call usb_gadget_initialize
>   
> https://source.denx.de/u-boot/custodians/u-boot-dfu/-/commit/86327b4e3201a55aefee2f1bfbbea9a7896461f0
> [4/5] usb: gadget: UMS: support multiple sector sizes
>   
> https://source.denx.de/u-boot/custodians/u-boot-dfu/-/commit/7e71eeb39f4c5280b1ce677f4a14063feaedff95
> [5/5] iommu: qcom-smmu: fix debugging
>   
> https://source.denx.de/u-boot/custodians/u-boot-dfu/-/commit/c9959ce7b54145a83d3797bcfb3c3713cb4a97ea
>
> --
> Mattijs

Re: [PATCH 1/5] usb: dwc3-generic: implement Qualcomm wrapper

2024-03-21 Thread Mattijs Korpershoek

On jeu., mars 21, 2024 at 11:34, Caleb Connolly  
wrote:

> Hi,
>
> On 21/03/2024 09:25, Mattijs Korpershoek wrote:
>> Hi Caleb, Marek,
>> 
>> On jeu., mars 21, 2024 at 06:34, Marek Vasut  wrote:
>> 
>>> On 3/13/24 7:22 PM, Caleb Connolly wrote:
>>>
>>> [...]
>>>
>> +static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset,
>> u32 val)
>> +{
>> +    u32 reg;
>> +
>> +    reg = readl(base + offset);
>> +    reg |= val;
>> +    writel(reg, base + offset);
>
> Use setbits_le32() .
>
>> +    /* ensure that above write is through */
>> +    readl(base + offset);
>
> Is this needed ?

 I honestly don't know, this is copied from the Linux driver and it seems
 to be very defensively written. I doubt it's strictly necessary.
>>>
>>> Does git log indicate anything ?
>
> Nope :/ it's there from when the driver was first added.
>>>
>>> I suspect this is some sort of barrier .
>>>
>>> [...]
>>>
>> +/* For controllers running without superspeed PHYs */
>> +static void dwc3_qcom_select_utmi_clk(void __iomem *qscratch_base)
>> +{
>> +    /* Configure dwc3 to use UTMI clock as PIPE clock not present */
>> +    dwc3_qcom_setbits(qscratch_base, QSCRATCH_GENERAL_CFG,
>> +  PIPE_UTMI_CLK_DIS);
>> +
>> +    udelay(500);
>
> Isn't there some possibility to poll for completion instead of fixed
> delay ? If so, use wait_for_bit or some such .

 Not that I'm aware of, no. I think this hardware just has a blanket
 "writes take X bus cycles to complete" rule or something. It's totally
 possible that this code was originally written this way to work around
 some issues on an FPGA prototype or something. Everything seems to still
 work if I remove the delays so I'll drop them...
>>>
>>> Could you possibly ask someone ?
>
> Yeah I'll ask around, I'm not confident I'll find an answer though.
>>>
>>> [...]
>>>
>>    static int dwc3_rk_glue_get_ctrl_dev(struct udevice *dev, ofnode 
>> *node)
>>    {
>>    *node = dev_ofnode(dev);
>> @@ -506,6 +599,10 @@ static int dwc3_glue_reset_init(struct udevice *dev,
>>    else if (ret)
>>    return ret;
>>    +    if (device_is_compatible(dev, "qcom,dwc3")) {
>> +    reset_assert_bulk(>resets);
>> +    udelay(500);
>
> Why this delay here ?

 According to the docs, the reset should be asserted for at least 6 sleep
 clock cycles, that's ~200us on sdm845, but it can vary by platform.
>>>
>>> A comment in the code would be nice.
>>>
>>> Sorry for the abysmal delay in replies.
>>>
>>> btw. the new version of this series is still OK to go in, unless you 
>>> want to fill in the comments. They can also go in in separate follow up 
>>> patch.
>> 
>> I'm interested by the answers above as well. As I took in the series [1] (to
>> avoid delaying it too much), please consider a follow up patch to add a
>> comment.
>
> The v4 you picked up has a comment explaining this.

Right, sorry I missed that. Thanks for pointing it out to me!

>> 
>> [1] 
>> https://lore.kernel.org/r/all/171101299073.1017001.16411913317437946645.b4...@baylibre.com/
>> 
>
> -- 
> // Caleb (they/them)

Re: [PATCH v4 2/2] android_ab: Fix ANDROID_AB_BACKUP_OFFSET

2024-03-21 Thread Colin

Hi Mattijs,

Sorry, I did not realize there were outstanding issues for me to address. I
would be happy to send a v5, but if you doing the fixups gets this merged
quicker, that sounds better to me.

Happy to contribute,
*_*
*Colin McAllister*


On Thu, Mar 21, 2024 at 4:29 AM Mattijs Korpershoek <
mkorpersh...@baylibre.com> wrote:

> Hi Colin,
>
> Since both below remarks are minor nitpicks, I can also do them when
> applying (to avoid delaying this series too much).
>
> Please le me know what you prefer:
> 1. You send a v5 at your convience
> 2. I do the minor fixups and I merge right away.
>
> Again, thank you for doing your first U-Boot contributions!
>
> Mattijs
>
> On mer., mars 13, 2024 at 18:22, Igor Opaniuk 
> wrote:
>
> > Hi Colin,
> >
> > On Tue, Mar 12, 2024 at 4:19 PM Mattijs Korpershoek <
> > mkorpersh...@baylibre.com> wrote:
> >
> >> Hi Colin,
> >>
> >> Thank you for the patch.
> >>
> >> On mar., mars 12, 2024 at 07:57, Colin McAllister <
> colinmca...@gmail.com>
> >> wrote:
> >>
> >> Sam also gave his review here:
> >>
> >>
> https://lore.kernel.org/all/CAPLW+4kHmPtfACyND4Vc2p0ZrsyGY=+bRU=fdub4k1ux5p3...@mail.gmail.com/
> >>
> >> Please include his review tag in the next submission.
> >>
> >> I will add it at the appropriate place below:
> >>
> >>
> >> > From: Colin McAllister 
> >> >
> >> > Currently, setting CONFIG_AB_BACKUP_OFFSET in a target's defconfig
> will
> >> > not actually enable the #if protected code in android_ab.c. This is
> >> > because "CONFIG_" should have been prepended to the config macro, or
> the
> >> > macros defined in kconfig.h could have been used.
> >> >
> >> > The code included by ANDROID_AB_BACKUP_OFFSET has been refactored to
> no
> >> > longer be conditionally compiled by preprocessor conditionals and
> >> > instead use C conditionals. This better aligns with the Linux kernel
> >> > style guide.
> >> >
> >> > Fixes: 3430f24bc6 ("android_ab: Try backup booloader_message")
> >> > Signed-off-by: Colin McAllister 
> >> > Cc: Joshua Watt 
> >> > Cc: Simon Glass 
> >> > Signed-off-by: Colin McAllister 
> >> Reviewed-by: Sam Protsenko 
> >>
> >> > ---
> >> > v2:
> >> >   - Replaced #if conditionals with C if conditionals
> >> >   - Opted to use CONFIG_ANDROID_AB_BACKUP_OFFSET directly instead of
> >> > macros in kconfig.h as CONFIG_ANDROID_AB_BACKUP_OFFSET is not a
> >> >   boolean or tristate value and doesn't have different values when
> >> >   building SPL or TPL.
> >> > v3:
> >> >   - Added "Fixes:" tag
> >> > v4:
> >> >   - No changes
> >> >
> >> >  boot/android_ab.c | 97
> ++-
> >> >  1 file changed, 45 insertions(+), 52 deletions(-)
> >> >
> >> > diff --git a/boot/android_ab.c b/boot/android_ab.c
> >> > index 9a3d15ec60..f547aa64e4 100644
> >> > --- a/boot/android_ab.c
> >> > +++ b/boot/android_ab.c
> >> > @@ -187,13 +187,12 @@ int ab_select_slot(struct blk_desc *dev_desc,
> >> struct disk_partition *part_info,
> >> >  bool dec_tries)
> >> >  {
> >> >   struct bootloader_control *abc = NULL;
> >> > + struct bootloader_control *backup_abc = NULL;
> >> >   u32 crc32_le;
> >> >   int slot, i, ret;
> >> >   bool store_needed = false;
> >> > + bool valid_backup = false;
> >> >   char slot_suffix[4];
> >> > -#if ANDROID_AB_BACKUP_OFFSET
> >> > - struct bootloader_control *backup_abc = NULL;
> >> > -#endif
> >> >
> >> >   ret = ab_control_create_from_disk(dev_desc, part_info, , 0);
> >> >   if (ret < 0) {
> >> > @@ -205,53 +204,49 @@ int ab_select_slot(struct blk_desc *dev_desc,
> >> struct disk_partition *part_info,
> >> >   return ret;
> >> >   }
> >> >
> >> > -#if ANDROID_AB_BACKUP_OFFSET
> >> > - ret = ab_control_create_from_disk(dev_desc, part_info,
> _abc,
> >> > -   ANDROID_AB_BACKUP_OFFSET);
> >> > - if (ret < 0) {
> >> > - free(abc);
> >> > - return ret;
> >> > + if (CONFIG_ANDROID_AB_BACKUP_OFFSET) {
> >> > + ret = ab_control_create_from_disk(dev_desc, part_info,
> >> _abc,
> >> > +
> >>  CONFIG_ANDROID_AB_BACKUP_OFFSET);
> >> > + if (ret < 0) {
> >> > + free(abc);
> >> > + return ret;
> >> > + }
> >> >   }
> >> > -#endif
> >> >
> >> >   crc32_le = ab_control_compute_crc(abc);
> >> >   if (abc->crc32_le != crc32_le) {
> >> >   log_err("ANDROID: Invalid CRC-32 (expected %.8x, found
> >> %.8x),",
> >> >   crc32_le, abc->crc32_le);
> >> > -#if ANDROID_AB_BACKUP_OFFSET
> >> > - crc32_le = ab_control_compute_crc(backup_abc);
> >> > - if (backup_abc->crc32_le != crc32_le) {
> >> > - log_err("ANDROID: Invalid backup CRC-32 ");
> >> > - log_err("expected %.8x, found %.8x),",
> >> > - crc32_le, backup_abc->crc32_le);
> >> > -#endif
> >> > -
>

Re: [PATCH v3 07/11] phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHY

2024-03-21 Thread Sumit Garg

On Thu, 14 Mar 2024 at 09:46, Marek Vasut  wrote:
>
> On 3/12/24 8:03 AM, Sumit Garg wrote:
> > Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
> > PHY initialization moved to this standalone PHY driver.
> >
> > Inspired from counterpart Linux kernel v6.8-rc3 driver:
> > drivers/phy/freescale/phy-fsl-imx8m-pcie.c. Use last Linux kernel driver
> > reference commit 7559e7572c03 ("phy: Explicitly include correct DT
> > includes").
>
> [...]
>
> > +static int imx8_pcie_phy_probe(struct udevice *dev)
> > +{
> > + struct imx8_pcie_phy *imx8_phy = dev_get_priv(dev);
> > + ofnode gpr;
> > + int ret = 0;
> > +
> > + imx8_phy->drvdata = (void *)dev_get_driver_data(dev);
> > + imx8_phy->base = dev_read_addr(dev);
> > + if (!imx8_phy->base)
> > + return -EINVAL;
> > +
> > + /* get PHY refclk pad mode */
> > + dev_read_u32(dev, "fsl,refclk-pad-mode", _phy->refclk_pad_mode);
> > +
> > + imx8_phy->tx_deemph_gen1 = dev_read_u32_default(dev,
> > + "fsl,tx-deemph-gen1",
> > + 0);
> > + imx8_phy->tx_deemph_gen2 = dev_read_u32_default(dev,
> > + "fsl,tx-deemph-gen2",
> > + 0);
> > + imx8_phy->clkreq_unused = dev_read_bool(dev, 
> > "fsl,clkreq-unsupported");
> > +
> > + /* Grab GPR config register range */
> > + gpr = ofnode_by_compatible(ofnode_null(), imx8_phy->drvdata->gpr);
> > + if (ofnode_equal(gpr, ofnode_null())) {
> > + dev_err(dev, "unable to find GPR node\n");
> > + return -ENODEV;
> > + }
> > +
> > + imx8_phy->iomuxc_gpr = syscon_node_to_regmap(gpr);
> > + if (IS_ERR(imx8_phy->iomuxc_gpr)) {
> > + dev_err(dev, "unable to find iomuxc registers\n");
> > + return PTR_ERR(imx8_phy->iomuxc_gpr);
> > + }
>
> syscon_regmap_lookup_by_compatible() should simplify these two steps ^ .
>

After a close look, that API isn't supported by U-Boot yet. So I will
keep the existing implementation with your review tag. I hope that's
fine with you.

-Sumit

> With that fixed:
>
> Reviewed-by: Marek Vasut 
>
> [...]

Re: [PATCH v3] test: dm: add button_cmd test

2024-03-21 Thread Tom Rini

On Tue, 19 Mar 2024 13:24:42 +, Caleb Connolly wrote:

> Add a test for the button_cmd feature. This validates that commands can
> be mapped to two buttons, that the correct command runs based on which
> button is pressed, that only 1 command is run, and that no command runs
> if button_cmd_0_name is wrong or unset.
> 
> Additionally, fix a potential uninitialised variable use caught by these
> tests, the btn variable in get_button_cmd() is assumed to be null if
> button_get_by_label() fails, but it's actually used uninitialised in
> that case.
> 
> [...]

Applied to u-boot/next, thanks!

-- 
Tom

Re: [PATCH] Makefile: Add missing OF_UPSTREAM Makefile for 32bit ARM

2024-03-21 Thread Tom Rini

On Mon, 18 Mar 2024 16:03:14 +0100, Marek Vasut wrote:

> Copy dts/upstream/src/arm64/Makefile into dts/upstream/src/arm/Makefile
> and create a commit. This makes 32bit ARM buildable with OF_UPSTREAM .
> 
> 

Applied to u-boot/next, thanks!

-- 
Tom

Re: [PATCH next v1 0/1] Add new bmc dts for ASUS X4TF server

2024-03-21 Thread Tom Rini

On Wed, 13 Mar 2024 18:27:24 +0800, Kelly Hung wrote:

> Add bmc dts to ASUS X4TF server, we also submitted dts to linux place.
> Please refer to here, https://lore.kernel.org/lkml/?q=x4tf.
> 
> Kelly Hung (1):
>   arm: dts: ast2600-x4tf: Add new dts for ASUS X4TF
> 
> arch/arm/dts/Makefile |   4 +-
>  arch/arm/dts/ast2600-x4tf.dts | 161 ++
>  2 files changed, 164 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/ast2600-x4tf.dts
> 
> [...]

Applied to u-boot/next, thanks!

-- 
Tom

Re: [PATCH] gpio: mcp230xx: Add support for models with SPI interface.

2024-03-21 Thread Tom Rini

On Wed, 13 Mar 2024 12:54:56 +0100, Piotr Wojtaszczyk wrote:

> 


Applied to u-boot/next, thanks!

-- 
Tom

Re: [PATCH 1/1] spl: Improve error message for SPL memory allocation

2024-03-21 Thread Tom Rini

On Wed, 13 Mar 2024 14:53:15 +0800, Leo Yu-Chi Liang wrote:

> There could be two memory allocation scheme in SPL phase.
> Explicitly print the corresponding error message.
> 
> 

Applied to u-boot/next, thanks!

-- 
Tom

Re: [PATCH v2 0/3] imx93-phyboard-segin: Add USB support.

2024-03-21 Thread Fabio Estevam

Hi Mathieu,

On Thu, Mar 21, 2024 at 3:57 AM Mathieu Othacehe  wrote:

> Mathieu Othacehe (3):
>   arm: dts: imx93-phyboard-segin: Add USB support
>   configs: imx93-phyboard-segin: Add USB support
>   configs: imx93-phyboard-segin: Add fastboot support
>
>  arch/arm/dts/imx93-phyboard-segin.dts  | 13 +

The addition of the i.MX93 USB support in the kernel devicetree is
taking longer than expected:

https://lore.kernel.org/linux-arm-kernel/20240321081439.541799-8-xu.yan...@nxp.com/T/#u

To avoid getting out of sync with the upstream dts, please add the USB
nodes inside imx93-phyboard-segin-u-boot.dtsi
for now.

Thanks

Re: [PATCH 1/5] usb: dwc3-generic: implement Qualcomm wrapper

2024-03-21 Thread Caleb Connolly

Hi,

On 21/03/2024 09:25, Mattijs Korpershoek wrote:
> Hi Caleb, Marek,
> 
> On jeu., mars 21, 2024 at 06:34, Marek Vasut  wrote:
> 
>> On 3/13/24 7:22 PM, Caleb Connolly wrote:
>>
>> [...]
>>
> +static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset,
> u32 val)
> +{
> +    u32 reg;
> +
> +    reg = readl(base + offset);
> +    reg |= val;
> +    writel(reg, base + offset);

 Use setbits_le32() .

> +    /* ensure that above write is through */
> +    readl(base + offset);

 Is this needed ?
>>>
>>> I honestly don't know, this is copied from the Linux driver and it seems
>>> to be very defensively written. I doubt it's strictly necessary.
>>
>> Does git log indicate anything ?

Nope :/ it's there from when the driver was first added.
>>
>> I suspect this is some sort of barrier .
>>
>> [...]
>>
> +/* For controllers running without superspeed PHYs */
> +static void dwc3_qcom_select_utmi_clk(void __iomem *qscratch_base)
> +{
> +    /* Configure dwc3 to use UTMI clock as PIPE clock not present */
> +    dwc3_qcom_setbits(qscratch_base, QSCRATCH_GENERAL_CFG,
> +  PIPE_UTMI_CLK_DIS);
> +
> +    udelay(500);

 Isn't there some possibility to poll for completion instead of fixed
 delay ? If so, use wait_for_bit or some such .
>>>
>>> Not that I'm aware of, no. I think this hardware just has a blanket
>>> "writes take X bus cycles to complete" rule or something. It's totally
>>> possible that this code was originally written this way to work around
>>> some issues on an FPGA prototype or something. Everything seems to still
>>> work if I remove the delays so I'll drop them...
>>
>> Could you possibly ask someone ?

Yeah I'll ask around, I'm not confident I'll find an answer though.
>>
>> [...]
>>
>    static int dwc3_rk_glue_get_ctrl_dev(struct udevice *dev, ofnode *node)
>    {
>    *node = dev_ofnode(dev);
> @@ -506,6 +599,10 @@ static int dwc3_glue_reset_init(struct udevice *dev,
>    else if (ret)
>    return ret;
>    +    if (device_is_compatible(dev, "qcom,dwc3")) {
> +    reset_assert_bulk(>resets);
> +    udelay(500);

 Why this delay here ?
>>>
>>> According to the docs, the reset should be asserted for at least 6 sleep
>>> clock cycles, that's ~200us on sdm845, but it can vary by platform.
>>
>> A comment in the code would be nice.
>>
>> Sorry for the abysmal delay in replies.
>>
>> btw. the new version of this series is still OK to go in, unless you 
>> want to fill in the comments. They can also go in in separate follow up 
>> patch.
> 
> I'm interested by the answers above as well. As I took in the series [1] (to
> avoid delaying it too much), please consider a follow up patch to add a
> comment.

The v4 you picked up has a comment explaining this.
> 
> [1] 
> https://lore.kernel.org/r/all/171101299073.1017001.16411913317437946645.b4...@baylibre.com/
> 

-- 
// Caleb (they/them)

[PATCH] imx: ele_ahab: Add ahab_commit command support

2024-03-21 Thread Mathieu Othacehe

This message is used to commit into the fuses any new SRK revocation and
FW version information that have been found into the NXP (ELE FW) and
OEM containers.

Signed-off-by: Mathieu Othacehe 
---
 arch/arm/include/asm/mach-imx/ele_api.h |  2 ++
 arch/arm/mach-imx/ele_ahab.c| 29 ++
 drivers/misc/imx_ele/ele_api.c  | 32 +
 3 files changed, 63 insertions(+)

diff --git a/arch/arm/include/asm/mach-imx/ele_api.h 
b/arch/arm/include/asm/mach-imx/ele_api.h
index cfd4ecebb62..a29b849d903 100644
--- a/arch/arm/include/asm/mach-imx/ele_api.h
+++ b/arch/arm/include/asm/mach-imx/ele_api.h
@@ -24,6 +24,7 @@
 #define ELE_GET_FW_VERSION_REQ (0x9D)
 #define ELE_RET_LIFECYCLE_UP_REQ (0xA0)
 #define ELE_GET_EVENTS_REQ (0xA2)
+#define ELE_COMMIT_REQ (0xA8)
 #define ELE_START_RNG (0xA3)
 #define ELE_GENERATE_DEK_BLOB (0xAF)
 #define ELE_ENABLE_PATCH_REQ (0xC3)
@@ -142,6 +143,7 @@ int ele_read_common_fuse(u16 fuse_id, u32 *fuse_words, u32 
fuse_num, u32 *respon
 int ele_release_caam(u32 core_did, u32 *response);
 int ele_get_fw_version(u32 *fw_version, u32 *sha1, u32 *response);
 int ele_get_events(u32 *events, u32 *events_cnt, u32 *response);
+int ele_commit(u16 fuse_id, u32 *response, u32 *info_type);
 int ele_generate_dek_blob(u32 key_id, u32 src_paddr, u32 dst_paddr, u32 
max_output_size);
 int ele_dump_buffer(u32 *buffer, u32 buffer_length);
 int ele_get_info(struct ele_get_info_data *info, u32 *response);
diff --git a/arch/arm/mach-imx/ele_ahab.c b/arch/arm/mach-imx/ele_ahab.c
index 295c055ad0a..d02316ed6cb 100644
--- a/arch/arm/mach-imx/ele_ahab.c
+++ b/arch/arm/mach-imx/ele_ahab.c
@@ -625,6 +625,29 @@ static int do_ahab_return_lifecycle(struct cmd_tbl *cmdtp, 
int flag, int argc, c
return CMD_RET_SUCCESS;
 }
 
+static int do_ahab_commit(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+   u32 index;
+   u32 resp;
+   u32 info_type;
+
+   if (argc < 2)
+   return CMD_RET_USAGE;
+
+   index = simple_strtoul(argv[1], NULL, 16);
+   printf("Commit index is 0x%x\n", index);
+
+   if (ele_commit(index, , _type)) {
+   printf("Error in AHAB commit\n");
+   return -EIO;
+   }
+
+   printf("Ahab commit succeeded. Information type is 0x%x\n", info_type);
+
+   return 0;
+}
+
 U_BOOT_CMD(auth_cntr, CONFIG_SYS_MAXARGS, 1, do_authenticate,
   "autenticate OS container via AHAB",
   "addr\n"
@@ -657,3 +680,9 @@ U_BOOT_CMD(ahab_return_lifecycle, CONFIG_SYS_MAXARGS, 1, 
do_ahab_return_lifecycl
   "addr\n"
   "addr - Return lifecycle message block signed by OEM SRK\n"
 );
+
+U_BOOT_CMD(ahab_commit, CONFIG_SYS_MAXARGS, 1, do_ahab_commit,
+  "commit into the fuses any new SRK revocation and FW version 
information\n"
+  "that have been found into the NXP (ELE FW) and OEM containers",
+  ""
+);
diff --git a/drivers/misc/imx_ele/ele_api.c b/drivers/misc/imx_ele/ele_api.c
index 0c017734a49..e0ec22c7abf 100644
--- a/drivers/misc/imx_ele/ele_api.c
+++ b/drivers/misc/imx_ele/ele_api.c
@@ -528,6 +528,38 @@ int ele_start_rng(void)
return ret;
 }
 
+int ele_commit(u16 fuse_id, u32 *response, u32 *info_type)
+{
+   struct udevice *dev = gd->arch.ele_dev;
+   int size = sizeof(struct ele_msg);
+   struct ele_msg msg;
+   int ret = 0;
+
+   if (!dev) {
+   printf("ele dev is not initialized\n");
+   return -ENODEV;
+   }
+
+   msg.version = ELE_VERSION;
+   msg.tag = ELE_CMD_TAG;
+   msg.size = 2;
+   msg.command = ELE_COMMIT_REQ;
+   msg.data[0] = fuse_id;
+
+   ret = misc_call(dev, false, , size, , size);
+   if (ret)
+   printf("Error: %s: ret %d, fuse_id 0x%x, response 0x%x\n",
+  __func__, ret, fuse_id, msg.data[0]);
+
+   if (response)
+   *response = msg.data[0];
+
+   if (info_type)
+   *info_type = msg.data[1];
+
+   return ret;
+}
+
 int ele_write_secure_fuse(ulong signed_msg_blk, u32 *response)
 {
struct udevice *dev = gd->arch.ele_dev;
-- 
2.41.0

[PATCH v2 3/3] configs: imx93-phyboard-segin: Add fastboot support

2024-03-21 Thread Mathieu Othacehe

Enable the `fastboot` command.

Reviewed-by: Marek Vasut 
Signed-off-by: Mathieu Othacehe 
---
 configs/imx93-phyboard-segin_defconfig | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/configs/imx93-phyboard-segin_defconfig 
b/configs/imx93-phyboard-segin_defconfig
index 0345e7deeab..54215c51c08 100644
--- a/configs/imx93-phyboard-segin_defconfig
+++ b/configs/imx93-phyboard-segin_defconfig
@@ -94,6 +94,12 @@ CONFIG_SPL_CLK_IMX93=y
 CONFIG_CLK_IMX93=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x8280
+CONFIG_FASTBOOT_BUF_SIZE=0x2000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_UUU_SUPPORT=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_GPIO_HOG=y
 CONFIG_IMX_RGPIO2P=y
 CONFIG_DM_I2C=y
-- 
2.41.0

[PATCH v2 2/3] configs: imx93-phyboard-segin: Add USB support

2024-03-21 Thread Mathieu Othacehe

Add USB support by enabling `usb` command and required USB drivers.

Signed-off-by: Mathieu Othacehe 
---
 configs/imx93-phyboard-segin_defconfig | 8 
 1 file changed, 8 insertions(+)

diff --git a/configs/imx93-phyboard-segin_defconfig 
b/configs/imx93-phyboard-segin_defconfig
index 24f9bd553aa..0345e7deeab 100644
--- a/configs/imx93-phyboard-segin_defconfig
+++ b/configs/imx93-phyboard-segin_defconfig
@@ -67,6 +67,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_USB=y
 CONFIG_CMD_SNTP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EFIDEBUG=y
@@ -132,6 +133,13 @@ CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_THERMAL=y
 CONFIG_IMX_TMU=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
+CONFIG_USB_GADGET_VENDOR_NUM=0x1fc9
+CONFIG_USB_GADGET_PRODUCT_NUM=0x0152
+CONFIG_CI_UDC=y
 CONFIG_ULP_WATCHDOG=y
 CONFIG_LZO=y
 CONFIG_BZIP2=y
-- 
2.41.0

[PATCH v2 1/3] arm: dts: imx93-phyboard-segin: Add USB support

2024-03-21 Thread Mathieu Othacehe

Enable both usbotg1 and usbotg2 ports. Disable over-current as OC pins are
not connected to the SoC.

Signed-off-by: Mathieu Othacehe 
---
 arch/arm/dts/imx93-phyboard-segin.dts | 13 +
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/dts/imx93-phyboard-segin.dts 
b/arch/arm/dts/imx93-phyboard-segin.dts
index 85fb188b057..acf307a3192 100644
--- a/arch/arm/dts/imx93-phyboard-segin.dts
+++ b/arch/arm/dts/imx93-phyboard-segin.dts
@@ -40,6 +40,19 @@
status = "okay";
 };
 
+/* USB  */
+ {
+   disable-over-current;
+   dr_mode = "otg";
+   status = "okay";
+};
+
+ {
+   disable-over-current;
+   dr_mode = "host";
+   status = "okay";
+};
+
 /* eMMC */
  {
no-1-8-v;
-- 
2.41.0

[PATCH v2 0/3] imx93-phyboard-segin: Add USB support.

2024-03-21 Thread Mathieu Othacehe

Hello,

This series adds USB support to imx93-phyboard-segin, in the same way as it
has been done for imx93_var_som here:

https://lists.denx.de/pipermail/u-boot/2024-February/546301.html

Thanks,

Mathieu

Changelog:

v1: https://lists.denx.de/pipermail/u-boot/2024-March/548613.html

Mathieu Othacehe (3):
  arm: dts: imx93-phyboard-segin: Add USB support
  configs: imx93-phyboard-segin: Add USB support
  configs: imx93-phyboard-segin: Add fastboot support

 arch/arm/dts/imx93-phyboard-segin.dts  | 13 +
 configs/imx93-phyboard-segin_defconfig | 14 ++
 2 files changed, 27 insertions(+)

-- 
2.41.0

[PATCH] image-host: Fix error value paths and emit error messages to stderr.

2024-03-21 Thread Hugo Cornelis

A recent refactoring in image-host.c messed up the return values of
the function that reads the encryptiong keys.  This patch fixes this
and also makes sure that error output goes to stderr instead of to
stdout.

Signed-off-by: Hugo Cornelis 
---
 tools/image-host.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/tools/image-host.c b/tools/image-host.c
index b2a0f2e6d1..7bfc0cb6b1 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -346,17 +346,17 @@ static int fit_image_read_key_iv_data(const char *keydir, 
const char *key_iv_nam
  unsigned char *key_iv_data, int 
expected_size)
 {
char filename[PATH_MAX];
-   int ret = -1;
+   int ret;
 
ret = snprintf(filename, sizeof(filename), "%s/%s%s",
   keydir, key_iv_name, ".bin");
if (ret >= sizeof(filename)) {
-   printf("Can't format the key or IV filename when setting up the 
cipher: insufficient buffer space\n");
-   ret = -1;
+   fprintf(stderr, "Can't format the key or IV filename when 
setting up the cipher: insufficient buffer space\n");
+   return -1;
}
if (ret < 0) {
-   printf("Can't format the key or IV filename when setting up the 
cipher: snprintf error\n");
-   ret = -1;
+   fprintf(stderr, "Can't format the key or IV filename when 
setting up the cipher: snprintf error\n");
+   return -1;
}
 
ret = fit_image_read_data(filename, key_iv_data, expected_size);
-- 
2.34.1

Re: [PATCH v6] remoteproc: uclass: Add methods to load firmware to rproc and boot rproc

2024-03-21 Thread MD Danish Anwar




On 20/03/24 6:08 pm, Tom Rini wrote:
> On Wed, Mar 20, 2024 at 11:19:01AM +0530, MD Danish Anwar wrote:
>> Hi Tom,
>>
>> On 20/03/24 4:10 am, Tom Rini wrote:
>>> On Wed, Feb 28, 2024 at 05:36:45PM +0530, MD Danish Anwar wrote:
>>>
 Add APIs to set a firmware_name to a rproc and boot the rproc with the
 same firmware.

 Clients can call rproc_set_firmware() API to set firmware_name for a rproc
 whereas rproc_boot() will load the firmware set by rproc_set_firmware() to
 a buffer by calling request_firmware_into_buf(). rproc_boot() will then
 load the firmware file to the remote processor and start the remote
 processor.

 Also include "fs-loader.h" and make remoteproc driver select FS_LOADER in
 Kconfig so that we can call request_firmware_into_buf() from remoteproc
 driver.

 Signed-off-by: MD Danish Anwar 
 Acked-by: Ravi Gunasekaran 
 Reviewed-by: Roger Quadros 
 ---
 Changes from v5 to v6:
 *) Collected Acked-by tag from Ravi Gunasekaran 
 *) Fixed few typos as pointed out by Roger Quadros 
 *) Added if condition to check if uc_pdata->fw_name exists and free it
before the strndup as suggested by Roger Quadros 

 Changes from v4 to v5:
 *) Added Kconfig option REMOTEPROC_MAX_FW_SIZE to set max firmware size
that can be loaded to a rproc.
 *) Added freeing of address in rproc_boot() as pointed out by Ravi.
 *) Allocating the address at a later point in rproc_boot()
 *) Rebased on latest u-boot/master [commit 
9e00b6993f724da9699ef12573307afea8c19284]

 Changes from v3 to v4:
 *) No functional change. Splitted the patch out of the series as suggested
by Nishant.
 *) Droppped the RFC tag.

 v5: 
 https://lore.kernel.org/all/20240217122602.3402774-1-danishan...@ti.com/
 v4: 
 https://lore.kernel.org/all/20240130063322.2345057-1-danishan...@ti.com/
 v3: 
 https://lore.kernel.org/all/20240124064930.1787929-4-danishan...@ti.com/

  drivers/remoteproc/Kconfig|   8 +++
  drivers/remoteproc/rproc-uclass.c | 102 ++
  include/remoteproc.h  |  34 ++
  3 files changed, 144 insertions(+)

 diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
 index 781de530af..9f9877931c 100644
 --- a/drivers/remoteproc/Kconfig
 +++ b/drivers/remoteproc/Kconfig
 @@ -10,6 +10,7 @@ menu "Remote Processor drivers"
  # All users should depend on DM
  config REMOTEPROC
bool
 +  select FS_LOADER
depends on DM
  
  # Please keep the configuration alphabetically sorted.
>>>
>>> Can we not make the FS_LOADER portion optional? I didn't realize how
>>> many non-TI platforms this impacted. And even then it's possible I
>>> assume that custom designs will load the firmwares in other manners.
>>>
>>
>> Yes we can. We can wrap the remoteproc APIs using FS_LOADER in #ifdef
>> CONFIG_FS_LOADER. And instead of REMOTEPROC driver selecting FS_LOADER,
>> the clinet driver (ICSSG in this case) who is calling those remoteproc
>> APIs will select FS_LOADER and enable it.
>>
>> This will make sure that other platforms (ti or non-ti) that doesn't
>> support ICSSG but enables Remoteproc, will not enable FS_LOADER. This
>> way we are not forcing other platforms using remoteproc to enable
>> FS_LOADER. In this case the APIs will not get built.
>>
>> Now FS_LOADER will only be enabled when there is a client driver that
>> uses rproc_boot() APIs. It's upto the client driver to enable FS_LOADER
>>
>> below is the diff,
>>
>> diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
>> index 9f9877931c..a49802c132 100644
>> --- a/drivers/remoteproc/Kconfig
>> +++ b/drivers/remoteproc/Kconfig
>> @@ -10,7 +10,6 @@ menu "Remote Processor drivers"
>>  # All users should depend on DM
>>  config REMOTEPROC
>> bool
>> -   select FS_LOADER
>> depends on DM
>>
>>  # Please keep the configuration alphabetically sorted.
>> diff --git a/drivers/remoteproc/rproc-uclass.c
>> b/drivers/remoteproc/rproc-uclass.c
>> index f4f22a3851..a6a8be5009 100644
>> --- a/drivers/remoteproc/rproc-uclass.c
>> +++ b/drivers/remoteproc/rproc-uclass.c
>> @@ -994,6 +994,7 @@ int rproc_set_firmware(struct udevice *rproc_dev,
>> const char *fw_name)
>> return 0;
>>  }
>>
>> +#ifdef CONFIG_FS_LOADER
>>  int rproc_boot(struct udevice *rproc_dev)
>>  {
>> struct dm_rproc_uclass_pdata *uc_pdata;
>> @@ -1063,3 +1064,4 @@ free_buffer:
>> free(addr);
>> return ret;
>>  }
>> +#endif
>>
>> Let me know if this looks ok. If it's ok I will post v7 with this change.
> 
> Yes please, thanks.
> 

Posted v7 with the above changes
https://lore.kernel.org/all/20240321102819.1011011-1-danishan...@ti.com/

Please check.

-- 
Thanks and Regards,
Danish

[PATCH v7] remoteproc: uclass: Add methods to load firmware to rproc and boot rproc

2024-03-21 Thread MD Danish Anwar

Add APIs to set a firmware_name to a rproc and boot the rproc with the
same firmware.

Clients can call rproc_set_firmware() API to set firmware_name for a rproc
whereas rproc_boot() will load the firmware set by rproc_set_firmware() to
a buffer by calling request_firmware_into_buf(). rproc_boot() will then
load the firmware file to the remote processor and start the remote
processor.

Signed-off-by: MD Danish Anwar 
Acked-by: Ravi Gunasekaran 
Reviewed-by: Roger Quadros 
---
Changes from v6 to v7:
*) Removed selecting FS_LOADER by default in remoteproc Kconfig.
*) Wrapped the rproc APIs using FS_LOADER inside #ifdef CONFIG_FS_LOADER.
*) Added Reviewed-by tag from Roger Quadros 

Changes from v5 to v6:
*) Collected Acked-by tag from Ravi Gunasekaran 
*) Fixed few typos as pointed out by Roger Quadros 
*) Added if condition to check if uc_pdata->fw_name exists and free it
   before the strndup as suggested by Roger Quadros 

Changes from v4 to v5:
*) Added Kconfig option REMOTEPROC_MAX_FW_SIZE to set max firmware size
   that can be loaded to a rproc.
*) Added freeing of address in rproc_boot() as pointed out by Ravi.
*) Allocating the address at a later point in rproc_boot()
*) Rebased on latest u-boot/master [commit 
   9e00b6993f724da9699ef12573307afea8c19284]

Changes from v3 to v4:
*) No functional change. Splitted the patch out of the series as suggested
   by Nishant.
*) Droppped the RFC tag.

v6: https://lore.kernel.org/all/20240228120645.958316-1-danishan...@ti.com/
v5: https://lore.kernel.org/all/20240217122602.3402774-1-danishan...@ti.com/
v4: https://lore.kernel.org/all/20240130063322.2345057-1-danishan...@ti.com/
v3: https://lore.kernel.org/all/20240124064930.1787929-4-danishan...@ti.com/

 drivers/remoteproc/Kconfig|   7 ++
 drivers/remoteproc/rproc-uclass.c | 104 ++
 include/remoteproc.h  |  34 ++
 3 files changed, 145 insertions(+)

diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
index 781de530af..a49802c132 100644
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
@@ -102,4 +102,11 @@ config REMOTEPROC_TI_IPU
help
  Say 'y' here to add support for TI' K3 remoteproc driver.
 
+config REMOTEPROC_MAX_FW_SIZE
+   hex "Maximum size of firmware file that needs to be loaded to the 
remote processor"
+   default 0x1
+   help
+ Maximum size of the firmware file (elf, binary) that needs to be
+ loaded to the remote processor.
+
 endmenu
diff --git a/drivers/remoteproc/rproc-uclass.c 
b/drivers/remoteproc/rproc-uclass.c
index 28b362c887..aa7f7586a8 100644
--- a/drivers/remoteproc/rproc-uclass.c
+++ b/drivers/remoteproc/rproc-uclass.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -961,3 +962,106 @@ unsigned long rproc_parse_resource_table(struct udevice 
*dev, struct rproc *cfg)
 
return 1;
 }
+
+int rproc_set_firmware(struct udevice *rproc_dev, const char *fw_name)
+{
+   struct dm_rproc_uclass_pdata *uc_pdata;
+   int len;
+   char *p;
+
+   if (!rproc_dev || !fw_name)
+   return -EINVAL;
+
+   uc_pdata = dev_get_uclass_plat(rproc_dev);
+   if (!uc_pdata)
+   return -EINVAL;
+
+   len = strcspn(fw_name, "\n");
+   if (!len) {
+   debug("invalid firmware name\n");
+   return -EINVAL;
+   }
+
+   if (uc_pdata->fw_name)
+   free(uc_pdata->fw_name);
+
+   p = strndup(fw_name, len);
+   if (!p)
+   return -ENOMEM;
+
+   uc_pdata->fw_name = p;
+
+   return 0;
+}
+
+#if CONFIG_IS_ENABLED(FS_LOADER)
+int rproc_boot(struct udevice *rproc_dev)
+{
+   struct dm_rproc_uclass_pdata *uc_pdata;
+   struct udevice *fs_loader;
+   int core_id, ret = 0;
+   char *firmware;
+   void *addr;
+
+   if (!rproc_dev)
+   return -EINVAL;
+
+   uc_pdata = dev_get_uclass_plat(rproc_dev);
+   if (!uc_pdata)
+   return -EINVAL;
+
+   core_id = dev_seq(rproc_dev);
+   firmware = uc_pdata->fw_name;
+   if (!firmware) {
+   debug("No firmware name set for rproc core %d\n", core_id);
+   return -EINVAL;
+   }
+
+   /* Initialize all rproc cores */
+   if (!rproc_is_initialized()) {
+   ret = rproc_init();
+   if (ret) {
+   debug("rproc_init() failed: %d\n", ret);
+   return ret;
+   }
+   }
+
+   /* Loading firmware to a given address */
+   ret = get_fs_loader(_loader);
+   if (ret) {
+   debug("could not get fs loader: %d\n", ret);
+   return ret;
+   }
+
+   if (CONFIG_REMOTEPROC_MAX_FW_SIZE) {
+   addr = malloc(CONFIG_REMOTEPROC_MAX_FW_SIZE);
+   if (!addr)
+   return -ENOMEM;
+   } else {
+

Re: [PATCH v3] test: dm: add button_cmd test

2024-03-21 Thread Mattijs Korpershoek

Hi Caleb,

Thank you for the patch.

On mar., mars 19, 2024 at 13:24, Caleb Connolly  
wrote:

> Add a test for the button_cmd feature. This validates that commands can
> be mapped to two buttons, that the correct command runs based on which
> button is pressed, that only 1 command is run, and that no command runs
> if button_cmd_0_name is wrong or unset.
>
> Additionally, fix a potential uninitialised variable use caught by these
> tests, the btn variable in get_button_cmd() is assumed to be null if
> button_get_by_label() fails, but it's actually used uninitialised in
> that case.
>
> CONFIG_BUTTON is now enabled automatically and was removed when running
> save_defconfig.
>
> Fixes: e761035b6423 ("boot: add support for button commands")
> Signed-off-by: Caleb Connolly 

Reviewed-by: Mattijs Korpershoek 

> ---
> Pipeline: 
> https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/19995
> Changes in v3:
> - Enable CONFIG_BUTTON_CMD for sandbox_flattree as well.
> - Link to v2: 
> https://lore.kernel.org/u-boot/20240305145111.1391645-1-caleb.conno...@linaro.org
>
> Changes in v2:
> - Explicitly assign btn as NULL in get_button_cmd(). This fixes a
>   bug where if the undefined variable is non-zero the
>   button_get_by_label() check would fail and result in invalid memory
>   being accessed.
> - Enable CONFIG_BUTTON_CMD for sandbox64 as well as sandbox.
> - Link to v1: 
> https://lore.kernel.org/u-boot/20240214170357.4091708-1-caleb.conno...@linaro.org/
> ---
>  common/button_cmd.c|  2 +-
>  configs/sandbox64_defconfig|  1 +
>  configs/sandbox_defconfig  |  1 +
>  configs/sandbox_flattree_defconfig |  1 +
>  test/dm/button.c   | 96 ++
>  5 files changed, 100 insertions(+), 1 deletion(-)
>
> diff --git a/common/button_cmd.c b/common/button_cmd.c
> index b6a8434d6f29..8642c26735cc 100644
> --- a/common/button_cmd.c
> +++ b/common/button_cmd.c
> @@ -32,9 +32,9 @@ struct button_cmd {
>   */
>  static int get_button_cmd(int n, struct button_cmd *cmd)
>  {
>   const char *cmd_str;
> - struct udevice *btn;
> + struct udevice *btn = NULL;
>   char buf[24];
>  
>   snprintf(buf, sizeof(buf), "button_cmd_%d_name", n);
>   cmd->btn_name = env_get(buf);
> diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
> index 3be9a00a8575..a62faf772482 100644
> --- a/configs/sandbox64_defconfig
> +++ b/configs/sandbox64_defconfig
> @@ -10,8 +10,9 @@ CONFIG_PCI=y
>  CONFIG_SANDBOX64=y
>  CONFIG_DEBUG_UART=y
>  CONFIG_SYS_MEMTEST_START=0x0010
>  CONFIG_SYS_MEMTEST_END=0x00101000
> +CONFIG_BUTTON_CMD=y
>  CONFIG_FIT=y
>  CONFIG_FIT_SIGNATURE=y
>  CONFIG_FIT_VERBOSE=y
>  CONFIG_LEGACY_IMAGE_FORMAT=y
> diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
> index 4ad10363e91b..93b52f2de5cf 100644
> --- a/configs/sandbox_defconfig
> +++ b/configs/sandbox_defconfig
> @@ -9,8 +9,9 @@ CONFIG_SYS_LOAD_ADDR=0x0
>  CONFIG_PCI=y
>  CONFIG_DEBUG_UART=y
>  CONFIG_SYS_MEMTEST_START=0x0010
>  CONFIG_SYS_MEMTEST_END=0x00101000
> +CONFIG_BUTTON_CMD=y
>  CONFIG_FIT=y
>  CONFIG_FIT_RSASSA_PSS=y
>  CONFIG_FIT_CIPHER=y
>  CONFIG_FIT_VERBOSE=y
> diff --git a/configs/sandbox_flattree_defconfig 
> b/configs/sandbox_flattree_defconfig
> index 039018627527..6bf8874e722e 100644
> --- a/configs/sandbox_flattree_defconfig
> +++ b/configs/sandbox_flattree_defconfig
> @@ -7,8 +7,9 @@ CONFIG_SYS_LOAD_ADDR=0x0
>  CONFIG_PCI=y
>  CONFIG_DEBUG_UART=y
>  CONFIG_SYS_MEMTEST_START=0x0010
>  CONFIG_SYS_MEMTEST_END=0x00101000
> +CONFIG_BUTTON_CMD=y
>  CONFIG_FIT=y
>  CONFIG_FIT_SIGNATURE=y
>  CONFIG_FIT_VERBOSE=y
>  CONFIG_LEGACY_IMAGE_FORMAT=y
> diff --git a/test/dm/button.c b/test/dm/button.c
> index 3318668df25a..830d96fbef34 100644
> --- a/test/dm/button.c
> +++ b/test/dm/button.c
> @@ -130,4 +130,100 @@ static int dm_test_button_keys_adc(struct 
> unit_test_state *uts)
>  
>   return 0;
>  }
>  DM_TEST(dm_test_button_keys_adc, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
> +
> +/* Test of the button uclass using the button_gpio driver */
> +static int dm_test_button_cmd(struct unit_test_state *uts)
> +{
> + struct udevice *btn1_dev, *btn2_dev, *gpio;
> + const char *envstr;
> +
> +#define BTN1_GPIO 3
> +#define BTN2_GPIO 4
> +#define BTN1_PASS_VAR "test_button_cmds_0"
> +#define BTN2_PASS_VAR "test_button_cmds_1"
> +
> + /*
> +  * Buttons 1 and 2 are connected to gpio_a gpios 3 and 4 respectively.
> +  * set the GPIOs to known values and then check that the appropriate
> +  * commands are run when invoking process_button_cmds().
> +  */
> + ut_assertok(uclass_get_device(UCLASS_BUTTON, 1, _dev));
> + ut_assertok(uclass_get_device(UCLASS_BUTTON, 2, _dev));
> + ut_assertok(uclass_get_device(UCLASS_GPIO, 1, ));
> +
> + /*
> +  * Map a command to button 1 and check that it process_button_cmds()
> +  * runs it if called with button 1 pressed.
> +  */
> +

Re: [PATCH 2/2] usb: udc: dwc3: Fold dwc3_uboot_handle_interrupt into dm_usb_gadget_handle_interrupts

2024-03-21 Thread Mattijs Korpershoek

Hi Marek,

Thank you for the patch.

On dim., mars 17, 2024 at 05:42, Marek Vasut  
wrote:

> The only call site of dwc3_uboot_handle_interrupt() is the
> dm_usb_gadget_handle_interrupts(), fold the former into the
> later. This makes dwc3_uboot_handle_interrupt() unavailable
> to be called from board code as well.
>
> Signed-off-by: Marek Vasut 
> ---
> Cc: Angus Ainslie 
> Cc: Caleb Connolly 
> Cc: Eugen Hristev 
> Cc: Igor Prusov 
> Cc: Mattijs Korpershoek 
> Cc: Nishanth Menon 
> Cc: Patrice Chotard 
> Cc: Simon Glass 
> Cc: Stefan Bosch 
> Cc: Svyatoslav Ryhel 
> Cc: Tom Rini 
> Cc: ker...@puri.sm

Reviewed-by: Mattijs Korpershoek 

Tested that I could scan for usb mass storage and that I can use
fastboot:

=> fastboot usb 0
crq->brequest:0x0
=> usb start
starting USB...
Bus usb@ff50: Register 3000140 NbrPorts 3
Starting the controller
USB XHCI 1.10
scanning bus usb@ff50 for devices... 3 USB Device(s) found
   scanning usb for storage devices... 1 Storage Device(s) found

=> usb storage
  Device 0: Vendor: SanDisk Rev: 1.00 Prod: Ultra
Type: Removable Hard Disk
Capacity: 29328.0 MB = 28.6 GB (60063744 x 512)

Tested-by: Mattijs Korpershoek  # vim3

> ---
>  drivers/usb/dwc3/core.c | 27 +++
>  include/dwc3-uboot.h|  1 -
>  2 files changed, 11 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 09737be9a9c..96e850b7170 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -988,18 +988,27 @@ MODULE_AUTHOR("Felipe Balbi ");
>  MODULE_LICENSE("GPL v2");
>  MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
>  
> +#if !CONFIG_IS_ENABLED(DM_USB_GADGET)
> +__weak int dwc3_uboot_interrupt_status(struct udevice *dev)
> +{
> + return 1;
> +}
> +
>  /**
> - * dwc3_uboot_handle_interrupt - handle dwc3 core interrupt
> + * dm_usb_gadget_handle_interrupts - handle dwc3 core interrupt
>   * @dev: device of this controller
>   *
>   * Invokes dwc3 gadget interrupts.
>   *
>   * Generally called from board file.
>   */
> -void dwc3_uboot_handle_interrupt(struct udevice *dev)
> +int dm_usb_gadget_handle_interrupts(struct udevice *dev)
>  {
>   struct dwc3 *dwc = NULL;
>  
> + if (!dwc3_uboot_interrupt_status(dev))
> + return 0;
> +
>   list_for_each_entry(dwc, _list, list) {
>   if (dwc->dev != dev)
>   continue;
> @@ -1007,20 +1016,6 @@ void dwc3_uboot_handle_interrupt(struct udevice *dev)
>   dwc3_gadget_uboot_handle_interrupt(dwc);
>   break;
>   }
> -}
> -
> -#if !CONFIG_IS_ENABLED(DM_USB_GADGET)
> -__weak int dwc3_uboot_interrupt_status(struct udevice *dev)
> -{
> - return 1;
> -}
> -
> -int dm_usb_gadget_handle_interrupts(struct udevice *dev)
> -{
> - if (!dwc3_uboot_interrupt_status(dev))
> - return 0;
> -
> - dwc3_uboot_handle_interrupt(dev);
>  
>   return 0;
>  }
> diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h
> index 5f13f5bcf40..3689d60ae7f 100644
> --- a/include/dwc3-uboot.h
> +++ b/include/dwc3-uboot.h
> @@ -45,7 +45,6 @@ struct dwc3_device {
>  int dwc3_uboot_init(struct dwc3_device *dev);
>  void dwc3_uboot_exit(int index);
>  int dwc3_uboot_interrupt_status(struct udevice *dev);
> -void dwc3_uboot_handle_interrupt(struct udevice *dev);
>  
>  struct phy;
>  #if CONFIG_IS_ENABLED(PHY) && CONFIG_IS_ENABLED(DM_USB)
> -- 
> 2.43.0

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