On Thursday 23 February 2012 08:29 PM, Mike Frysinger wrote:
On Thursday 23 February 2012 09:06:01 Aneesh V wrote:
--- /dev/null
+++ b/arch/arm/include/asm/linkage.h
@@ -0,0 +1,11 @@
+#ifndef __ASM_LINKAGE_H
+#define __ASM_LINKAGE_H
needs copyright/license comment header
As Tom mentioned, I
On Thursday 23 February 2012 11:04 PM, Tom Rini wrote:
On Thu, Feb 23, 2012 at 10:58:36PM +0530, Aneesh V wrote:
On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote:
On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
-# Explicitly
On Thursday 23 February 2012 08:35 PM, Mike Frysinger wrote:
On Thursday 23 February 2012 09:06:04 Aneesh V wrote:
--- a/arch/arm/cpu/armv7/config.mk
+++ b/arch/arm/cpu/armv7/config.mk
-# Make ARMv5 to allow more compilers to work, even though its v7a.
-PLATFORM_CPPFLAGS += -march=armv5
On Thursday 23 February 2012 11:21 PM, Tom Rini wrote:
On Thu, Feb 23, 2012 at 11:19:59PM +0530, Aneesh V wrote:
On Thursday 23 February 2012 11:04 PM, Tom Rini wrote:
On Thu, Feb 23, 2012 at 10:58:36PM +0530, Aneesh V wrote:
On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote
On Thursday 23 February 2012 11:34 PM, Mike Frysinger wrote:
On Thursday 23 February 2012 12:28:36 Aneesh V wrote:
On Thursday 23 February 2012 08:27 PM, Mike Frysinger wrote:
On Thursday 23 February 2012 08:39:43 Aneesh V wrote:
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
On Thursday 23 February 2012 11:39 PM, Aneesh V wrote:
On Thursday 23 February 2012 11:21 PM, Tom Rini wrote:
On Thu, Feb 23, 2012 at 11:19:59PM +0530, Aneesh V wrote:
On Thursday 23 February 2012 11:04 PM, Tom Rini wrote:
On Thu, Feb 23, 2012 at 10:58:36PM +0530, Aneesh V wrote:
On Thursday
On Friday 24 February 2012 05:22 AM, Mike Frysinger wrote:
On Thursday 23 February 2012 12:40:54 Aneesh V wrote:
On Thursday 23 February 2012 08:29 PM, Mike Frysinger wrote:
On Thursday 23 February 2012 09:06:01 Aneesh V wrote:
--- /dev/null
+++ b/arch/arm/include/asm/linkage.h
@@ -0,0 +1,11
Hi Charles,
On Thursday 08 March 2012 04:48 PM, charlesKAO wrote:
Hi i am charles.
I am building the panda uboot image, but something wrong.
make[1]: Leaving directory
`/home/charles/Work_100G/PandaBoard/U_boot/u-boot/arch/arm/cpu/armv7'
make -C tools all
make[1]: Entering directory
This will add ARM specific over-rides for the defines
from linux/linkage.h
Signed-off-by: Aneesh V ane...@ti.com
---
Not adding the defines for __ALIGN and __ALIGN_STR
because it's not clear why alignment is set to 0
(single byte alignment).
Creates a checkpatch error that can not be avoided
Use ENTRY and ENDPROC with assembly functions to ensure
necessary assembler directives for all functions.
Signed-off-by: Aneesh V ane...@ti.com
---
Changes in v4:
- None
Changes in v3:
- None
Changes in V2:
- Newly added
---
arch/arm/cpu/armv7/mx5/lowlevel_init.S |5 ++-
arch/arm
Enable -march=armv7-a for armv7 platforms if the tool-chain
supports it. This in turn results in Thumb-2 code generated
for these platforms if CONFIG_SYS_THUMB_BUILD is enabled.
Signed-off-by: Aneesh V ane...@ti.com
---
I believe armv7-a is fine for all the SoCs except Tegra2
and I see
Enable Thumb build and ARM-Thumb interworking based on the new
config flag CONFIG_SYS_THUMB_BUILD
Signed-off-by: Aneesh V ane...@ti.com
---
Changes in v4:
- Use ':=' instead of '+=' when computed make variables
are involved
Changes in v3:
- None
Changes from V1 to V2:
- None
Changes from RFC
build.
Signed-off-by: Aneesh V ane...@ti.com
---
Changes in v4:
- None
Changes in v3:
- Newly added
---
arch/arm/include/asm/arch-omap4/mux_omap4.h |2 +-
arch/arm/include/asm/arch-omap5/mux_omap5.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm
Signed-off-by: Aneesh V ane...@ti.com
---
Changes in v4:
- None
Changes in v3:
- None
Changes from V1 to V2:
- None
Changes from RFC to V1:
- None
---
include/configs/omap4_common.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/omap4_common.h b
Missed adding 'v4' in the subject. Please ignore this series. Will
re-send correcting the subject.
On Thursday 08 March 2012 10:40 PM, Aneesh V wrote:
This will add ARM specific over-rides for the defines
from linux/linkage.h
Signed-off-by: Aneesh Vane...@ti.com
---
Not adding the defines
improved marginally for the Thumb
build, maybe because of the reduced image sizes.
Aneesh V (6):
arm: adapt asm/linkage.h from Linux
armv7: add appropriate headers for assembly functions
ARM: enable Thumb build
armv7: Use -march=armv7-a and thereby enable Thumb-2
omap4+: Avoid using
This will add ARM specific over-rides for the defines
from linux/linkage.h
Signed-off-by: Aneesh V ane...@ti.com
---
Not adding the defines for __ALIGN and __ALIGN_STR
because it's not clear why alignment is set to 0
(single byte alignment).
Creates a checkpatch error that can not be avoided
Use ENTRY and ENDPROC with assembly functions to ensure
necessary assembler directives for all functions.
Signed-off-by: Aneesh V ane...@ti.com
---
Changes in v4:
- None
Changes in v3:
- None
Changes in V2:
- Newly added
---
arch/arm/cpu/armv7/mx5/lowlevel_init.S |5 ++-
arch/arm
Enable Thumb build and ARM-Thumb interworking based on the new
config flag CONFIG_SYS_THUMB_BUILD
Signed-off-by: Aneesh V ane...@ti.com
---
Changes in v4:
- Use ':=' instead of '+=' when computed make variables
are involved
Changes in v3:
- None
Changes from V1 to V2:
- None
Changes from RFC
Enable -march=armv7-a for armv7 platforms if the tool-chain
supports it. This in turn results in Thumb-2 code generated
for these platforms if CONFIG_SYS_THUMB_BUILD is enabled.
Signed-off-by: Aneesh V ane...@ti.com
---
I believe armv7-a is fine for all the SoCs except Tegra2
and I see
build.
Signed-off-by: Aneesh V ane...@ti.com
---
Changes in v4:
- None
Changes in v3:
- Newly added
---
arch/arm/include/asm/arch-omap4/mux_omap4.h |2 +-
arch/arm/include/asm/arch-omap5/mux_omap5.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm
Signed-off-by: Aneesh V ane...@ti.com
---
Changes in v4:
- None
Changes in v3:
- None
Changes from V1 to V2:
- None
Changes from RFC to V1:
- None
---
include/configs/omap4_common.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/omap4_common.h b
On Sunday 11 March 2012 07:31 AM, Mike Frysinger wrote:
On Thursday 08 March 2012 12:20:17 Aneesh V wrote:
This will add ARM specific over-rides for the defines
from linux/linkage.h
Tested-by: Mike Frysingervap...@gentoo.org
-mike
Thanks Mike
On Sunday 11 March 2012 07:32 AM, Mike Frysinger wrote:
Acked-by: Mike Frysingervap...@gentoo.org
-mike
Thanks Mike.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Tom, Albert,
Does this series look good?
On Thursday 08 March 2012 10:50 PM, Aneesh V wrote:
Thumb is an alternate instruction set available in many
ARM processors. Below is a detailed description from ARM
specs:
The Thumb instruction set is a re-encoded subset of the
ARM instruction set
On 03/17/2012 03:05 PM, Wolfgang Denk wrote:
Dear Aneesh V,
In message4f153c83.20...@ti.com you wrote:
What is your final call on this? The above arguments sound convincing
to me, but I have to admit that I am no legal expert. Either way, it
will be great to have a closure on this. Lack
Hi Mike,
On Friday 09 September 2011 05:55 AM, Mike Frysinger wrote:
On Thursday, September 08, 2011 18:20:16 Simon Glass wrote:
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -307,3 +307,11 @@ int board_mmc_getcd(u8 *cd, struct mmc *mmc)
return 0;
}
#endif
Hi Simon,
On Friday 16 September 2011 09:02 PM, Simon Schwarz wrote:
save_boot_params in start.S got called for all armv7 based cpus. Since the
function relys on the OMAP specific bootloader this broke some boards
(or to be specific added more errors to already broken ones). This patch
wraps
next
series.
regards,
Aneesh
Regards
Simon
On 09/16/2011 06:13 PM, Aneesh V wrote:
Hi Simon,
On Friday 16 September 2011 09:02 PM, Simon Schwarz wrote:
save_boot_params in start.S got called for all armv7 based cpus.
Since the
function relys on the OMAP specific bootloader this broke
20, 2011 at 11:56 PM, Aneesh V ane...@ti.com wrote:
Hi Simon, Wolfgang,
On Thursday 21 April 2011 12:04 AM, Simon Glass wrote:
On Fri, Mar 25, 2011 at 11:35 AM, Albert ARIBAUDalbert.arib...@free.fr
wrote:
Le 25/03/2011 17:12, Aneesh V a écrit :
Another problem I have with relocation
Hi Ricardo,
On Thursday 22 September 2011 01:47 AM, Ricardo Salveti de Araujo wrote:
Not all padconfs are the same between 4430 and 4460, so instead of
working around this with an if, we should have an specific padconf
structure for both chips (like handling the differences between the LEDs
Hi Sandeep,
On Thursday 22 September 2011 02:47 PM, Sandeep Kumar wrote:
Hi,
I am adding support for a MPcore SoC in Uboot. For that secondary cores
need to execute WFI (wait for interrupt) instruction.
But while building the source I am getting the following error:
Steve wants to transfer maintainership of OMAP4 boards
to me as he is not working on these boards lately.
CC: Steve Sakoman st...@sakoman.com
CC: Sandeep Paulraj s-paul...@ti.com
CC: Albert Aribaud albert.u.b...@aribaud.net
CC: Wolfgang Denk w...@denx.de
Signed-off-by: Aneesh V ane...@ti.com
Hi Steve,
On Thursday 22 September 2011 08:36 PM, Steve Sakoman wrote:
On Thu, Sep 22, 2011 at 7:13 AM, Aneesh Vane...@ti.com wrote:
Steve wants to transfer maintainership of OMAP4 boards
to me as he is not working on these boards lately.
CC: Steve Sakomanst...@sakoman.com
CC: Sandeep
Steve wants to transfer maintainership of OMAP4 boards
to me as he is not working on these boards lately.
CC: Steve Sakoman st...@sakoman.com
CC: Sandeep Paulraj s-paul...@ti.com
CC: Albert Aribaud albert.u.b...@aribaud.net
CC: Wolfgang Denk w...@denx.de
Signed-off-by: Aneesh V ane...@ti.com
John,
My primary suspect would be cache. But the fact that
CONFIG_SYS_DCACHE_OFF is not helping is strange. Could you double-check
this and also make sure that CONFIG_SYS_L2CACHE_OFF is enabled too.
regards,
Aneesh
On Thursday 29 September 2011 11:50 AM, John Rigby wrote:
Aneesh, Dirk, Jason:
John,
On Thursday 29 September 2011 09:00 PM, John Rigby wrote:
On Thu, Sep 29, 2011 at 3:09 AM, Aneesh Vane...@ti.com wrote:
John,
My primary suspect would be cache. But the fact that
CONFIG_SYS_DCACHE_OFF is not helping is strange. Could you double-check
this and also make sure that
Hi Sergio,
On Tuesday 04 October 2011 12:20 AM, Aguirre, Sergio wrote:
Hi all,
I'm trying to build this commit:
http://git.denx.de/?p=u-boot.git;a=commit;h=7b8ffea2ac44097ed1c99ba70b8c6a4cf12ba0b4
with:
make omap4_panda_config
make
But it fails for spl build, while trying to link
bring back footprint under control
CC: Sandeep Paulraj s-paul...@ti.com
CC: Wolfgang Denk w...@denx.de
Signed-off-by: Aneesh V ane...@ti.com
---
---
arch/arm/cpu/armv7/omap-common/spl.c |4
common/Makefile |2 +-
include/configs/omap4_common.h | 19
Dear Wolfgang,
On Tuesday 04 October 2011 08:21 PM, Wolfgang Denk wrote:
Dear Aneesh V,
In message4e8b1508.7020...@ti.com you wrote:
Yes, I tried this just now and I am also facing this issue. I can fix
the build issue using the following change. But that doesn't solve the
problem. We do
Dear Wolfgang,
On Tuesday 04 October 2011 09:08 PM, Wolfgang Denk wrote:
Dear Aneesh V,
In message1317741066-31121-1-git-send-email-ane...@ti.com you wrote:
From: a0393566local (none)a0393566local@ula0393566
FAT library now uses malloc() and free(). But SPL doesn't
have heap until now
Dear Wolfgang,
On Tuesday 04 October 2011 11:35 PM, Wolfgang Denk wrote:
Dear Aneesh V,
In message4e8b282a.8040...@ti.com you wrote:
All file system code has been designed and implemented to run AFTER
relocation. Access to a FAT file system is not supposed to happen
from SPL code
Hi Steve, John,
Sorry for the late reply.
On Thursday 13 October 2011 05:12 AM, Steve Sakoman wrote:
On Wed, Oct 12, 2011 at 3:23 PM, John Rigbyjohn.ri...@linaro.org wrote:
My tree has a bunch of extra patches on top and is based on rc2. I
know it works:
Add support for the SDRAM controller (EMIF).
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
* Minor corrections in do_lpddr2_init()
* Minor corrections to read_idle interval calculation
* Sanity test of memory after doing the initialization
* Fixed warnings reported with with latest GCC compilers
- Allow SPL to have .bss disjoint from rest of the image
- Allow for .bss setup in CONFIG_SPL_BUILD case too.
- Take care of the special case where relocation offset = 0.
- Compile out exception handling code and install a simpler
vector
Signed-off-by: Aneesh V ane...@ti.com
---
V3:
* Taken
Provide appropriate '-O u-boot' while doing mkimage
for u-boot.img
Signed-off-by: Aneesh V ane...@ti.com
---
Makefile |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/Makefile b/Makefile
index 0707036..f8ae883 100644
--- a/Makefile
+++ b/Makefile
@@ -375,7 +375,7
- Provide alternate implementations of board_init_f()
board_init_r() for OMAP spl.
- Provide linker script
- Initialize global data
- Add serial console support
- Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move
it to board config header from config.mk
Signed-off-by: Aneesh V ane
. Gets the
payload size and load address from this header. If the
header is not detected assume u-boot.bin as payload
Signed-off-by: Aneesh V ane...@ti.com
---
V3:
* Squashed the patches that provided MMC support, FAT support,
start.S hook for saving parameters, and OMAP4 patch for saving
From: John Rigby john.ri...@linaro.org
- Add mkimage support for OMAP boot image
- Add support for OMAP boot image(MLO) generation in the new
SPL framework
Signed-off-by: John Rigby john.ri...@linaro.org
Signed-off-by: Aneesh V ane...@ti.com
---
V3:
* Fixed minor issue with casting away
depending on library
support are only compiled if the respective library is included.
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
Signed-off-by: Simon
Hi Scott,
On Thursday 28 July 2011 03:31 AM, Scott Wood wrote:
On Wed, 27 Jul 2011 20:25:44 +0530
V, Aneeshane...@ti.com wrote:
Hi Simon, Scott,
On Wed, Jul 27, 2011 at 2:52 PM, Simon Schwarz
simonschwarz...@googlemail.com wrote:
Dear Scott Wood,
On 07/26/2011 08:04 PM, Scott Wood
fails/passes
CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
V3 changes:
nothing
V4 changes:
nothing
V5 changes:
nothing
V6 changes:
nothing
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4
to nand_spl_load_image
CHG offs paramter of nand_spl_load_image is of type loff_t now
V6 changes:
ADD call to nand_deselect after loading the images
ADD nand_deselect to nand.h
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel
Hi Simon,
On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
[snip ..]
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ debug(resetting cpu...);
+ reset_cpu(0);
+
+ return 0;
+}
Can you explain the need of this do_reset()? I couldn't figure
on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of [U-Boot,5/5] devkit8000 nand_spl: add nand_spl
support
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
---
board/timll/devkit8000/devkit8000
On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
Insert some NAND driver sources into NAND SPL library.
Signed-off-by: Simon Schwarzsimonschwarz...@gmail.com
[snip ..]
+
+int nand_curr_device = -1;
Is nand_curr_device used anywhere?
+static int nand_ecc_pos[] =
to nand_spl_load_image
CHG offs paramter of nand_spl_load_image is of type loff_t now
V6 changes:
ADD call to nand_deselect after loading the images
ADD nand_deselect to nand.h
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel
On Thursday 28 July 2011 06:14 PM, Simon Schwarz wrote:
[snip ..]
+#endif /* CONFIG_SPL_MMC_SUPPORT */
and here..
You start the same the #ifdef again immediately after the #endif. Why
don't you club them together into just one #ifdef block.
IMHO #ifdef each function makes it more readable
On Thursday 28 July 2011 07:34 PM, Simon Schwarz wrote:
Hi Aneesh,
On 07/28/2011 01:54 PM, Aneesh V wrote:
On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
Insert some NAND driver sources into NAND SPL library.
Signed-off-by: Simon Schwarzsimonschwarz...@gmail.com
[snip
Hi Scott, Simon,
On Friday 29 July 2011 12:20 AM, Scott Wood wrote:
On Thu, 28 Jul 2011 19:46:25 +0530
Aneesh Vane...@ti.com wrote:
On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
+#ifdef CONFIG_SPL_NAND_SUPPORT
+static void nand_load_image(void)
+{
+ gpmc_init();
+
Dear Wolfgang,
On Friday 29 July 2011 12:56 AM, Wolfgang Denk wrote:
Dear Aneesh V,
In message1311233298-17265-3-git-send-email-ane...@ti.com you wrote:
- separate mux settings into essential and non essential parts
- essential part is board independent as of now(so move it
to SoC
Hi Linus,
On Friday 29 July 2011 04:04 AM, Linus Walleij wrote:
On Thu, Jul 28, 2011 at 7:04 AM, Minkyu Kangproms...@gmail.com wrote:
Dear Linus Walleij,
On 18 July 2011 19:35, Linus Walleijlinus.wall...@linaro.org wrote:
On Mon, Jul 18, 2011 at 9:23 AM, Lukasz
Dear Wolfgang,
On Friday 29 July 2011 02:26 PM, Wolfgang Denk wrote:
Dear Aneesh V,
In message4e32722c.6020...@ti.com you wrote:
Dear Wolfgang,
On Friday 29 July 2011 12:56 AM, Wolfgang Denk wrote:
Dear Aneesh V,
In message1311233298-17265-3-git-send-email-ane...@ti.com you wrote
Hi Chander,
On Friday 29 July 2011 04:01 PM, Chander Kashyap wrote:
Hi Aneesh,
On 29 July 2011 15:43, Aneesh Vane...@ti.com wrote:
Hi Linus,
On Friday 29 July 2011 04:04 AM, Linus Walleij wrote:
On Thu, Jul 28, 2011 at 7:04 AM, Minkyu Kangproms...@gmail.comwrote:
Dear Linus Walleij,
Dear Wolfgang,
On Friday 29 July 2011 06:03 PM, Wolfgang Denk wrote:
Dear Aneesh,
In message4e3161ed.5030...@keymile.com Holger Brunck wrote:
today I did a rebase of my development branch to current u-boot master. And I
saw on our km_kirkwood board that our egiga0 interface isn't working
Hi Jason,
On Friday 29 July 2011 06:21 PM, Jason Liu wrote:
Hi, All,
2011/7/29 Wolfgang Denkw...@denx.de:
Dear Aneesh,
In message4e3161ed.5030...@keymile.com Holger Brunck wrote:
today I did a rebase of my development branch to current u-boot master. And
I
saw on our km_kirkwood board
Hi All,
On Wednesday 20 July 2011 04:25 PM, Aneesh V wrote:
Signed-off-by: Aneesh Vane...@ti.com
---
V2:
* Added a new file that was accidentally missing in v1
---
[snip ..]
.../include/asm/{arch-omap3/gpio.h = omap_gpio.h} | 27 +---
I just realized that this change
Hi Sandeep, Albert, Wolfgang,
On Monday 01 August 2011 12:00 PM, Aneesh V wrote:
Signed-off-by: Aneesh Vane...@ti.com
---
Hi Sandeep,
This is an incremental patch to fix the build issues created
by [PATCH 3/5] omap: reuse omap3 gpio support in omap4
in the omap4460 series.
You will need
Hi Hong, Albert,
On Friday 05 August 2011 12:16 PM, Albert ARIBAUD wrote:
Le 05/08/2011 08:38, Hong Xu a écrit :
Hi Albert,
I've tried to deal with the case that the (start, stop) is not aligned.
If mis-align happens, the adjacent lines will be cleaned before
invalidating. And from my view
=page size
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
---
arch/arm/cpu/armv7/omap-common/spl.c | 46
+-
arch/arm/include
Hi Simon,
On Tuesday 02 August 2011 09:29 PM, Simon Schwarz wrote:
Implements the saving of boot params passed by OMAP3 ROM code.
Signed-off-by: Simon Schwarzsimonschwarz...@gmail.com
---
Didn't exist before V8
---
arch/arm/cpu/armv7/omap-common/spl.c |6 +-
Hi Albert,
On Friday 05 August 2011 02:50 PM, Albert ARIBAUD wrote:
Hi Aneesh,
On 05/08/2011 09:10, Aneesh V wrote:
Hi Hong, Albert,
On Friday 05 August 2011 12:16 PM, Albert ARIBAUD wrote:
Le 05/08/2011 08:38, Hong Xu a écrit :
Hi Albert,
I've tried to deal with the case
Hi Albert, Wolfgang,
On Monday 01 August 2011 04:48 PM, Aneesh V wrote:
- Avoid enabling caches for all ARM boards
- Enable caches for omap3/4
- Stronger barrier for armv7 cache-maintenance operations.
Do you have any more comments on this series. I tend to agree with
Jason's views about code
Hi Eric,
On Friday 05 August 2011 04:03 PM, Hong Xu wrote:
Hi Aneesh,
[snip ..]
IMHO, Hong's approach is correct. If the buffer that is invalidated is
not aligned to cache-line, one cache-line at the respective boundary
may have to be flushed to make sure the invalidation doesn't affect
Hi Albert,
On Friday 05 August 2011 04:33 PM, Albert ARIBAUD wrote:
Hi Aneesh,
On 05/08/2011 12:47, Aneesh V wrote:
Hi Eric,
On Friday 05 August 2011 04:03 PM, Hong Xu wrote:
Hi Aneesh,
[snip ..]
IMHO, Hong's approach is correct. If the buffer that is invalidated is
not aligned
Hi Albert,
On Friday 05 August 2011 06:47 PM, Albert ARIBAUD wrote:
(BTW: responders to this thread please stop using my @free.fr address. I
just noticed the big pile of U-Boot related messages that went to an
account which I do not use for U-Boot any more)
On 05/08/2011 13:51, Aneesh V
Hi Albert,
On Monday 01 August 2011 04:48 PM, Aneesh V wrote:
c2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()
to board_init_r(). This enables d-cache for all ARM boards.
As a result some of the arm boards that are not cache-ready
are broken. Revert this change and allow
Hi Dirk,
I can fix it. We have more SRAM available in 4430. I can increase the
SRAM budget. I will send a patch shortly.
br,
Aneesh
On Saturday 06 August 2011 12:24 AM, Dirk Behme wrote:
Building the SPL for omap4_sdp4430 and omap4_panda in recent mainline is
broken due to a resulting image
Hi Dirk,
On Saturday 06 August 2011 12:01 AM, Dirk Behme wrote:
From: Dirk Behmedirk.be...@googlemail.com
The patch omap: reuse omap3 gpio support in omap4 moves
arch/arm/include/asm/arch-omap3/gpio.h to
arch/arm/include/asm/omap_gpio.h but misses to touch all
users of arch-omap3/gpio.h.
Signed-off-by: Aneesh V ane...@ti.com
Cc: Dirk Behme dirk.be...@googlemail.com
Cc: Sandeep Paulraj s-paul...@ti.com
---
include/configs/omap4_panda.h |2 +-
include/configs/omap4_sdp4430.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs
Hi Albert,
On Sunday 07 August 2011 12:25 PM, Albert ARIBAUD wrote:
Hi Aneesh,
(cutting quotation for readability)
Le 05/08/2011 16:59, Aneesh V a écrit :
Hi Albert,
I don't dispute that having buffers aligned is the ideal scenario. The
question is about error-handling the situation when
Hi Simon,
On Monday 08 August 2011 01:33 PM, Simon Schwarz wrote:
Hi Aneesh,
On 08/05/2011 09:41 AM, Aneesh V wrote:
Hi Simon,
On Tuesday 02 August 2011 09:29 PM, Simon Schwarz wrote:
Implements the saving of boot params passed by OMAP3 ROM code.
Signed-off-by: Simon Schwarzsimonschwarz
Hi Simon,
On Monday 08 August 2011 01:20 PM, Simon Schwarz wrote:
Hi Aneesh,
On 08/05/2011 09:30 AM, Aneesh V wrote:
Hi Simon,
Sorry if my response is late. I was not in office for couple of days.
First day in office since vacation - so no you are not late ;)
On Tuesday 02 August 2011
Hi Albert,
On Monday 08 August 2011 03:09 PM, Albert ARIBAUD wrote:
Le 08/08/2011 10:24, Aneesh V a écrit :
Hi Albert,
On Sunday 07 August 2011 12:25 PM, Albert ARIBAUD wrote:
Hi Aneesh,
(cutting quotation for readability)
Le 05/08/2011 16:59, Aneesh V a écrit :
Hi Albert,
I don't
Hi Reinhard,
On Monday 08 August 2011 03:29 PM, Reinhard Meyer wrote:
Dear Albert, Aneesh, Hong,
There seem to be functions of type
xxx(start, end) and xxx(start, size).
Can't it be somehow decided to use only one variant
in all cases (flush, invalidate)?
The u-boot standard seems to be
Hi Reinhard,
On Monday 08 August 2011 03:55 PM, Reinhard Meyer wrote:
Hi Aneesh,
On Monday 08 August 2011 03:29 PM, Reinhard Meyer wrote:
Dear Albert, Aneesh, Hong,
There seem to be functions of type
xxx(start, end) and xxx(start, size).
Can't it be somehow decided to use only one
successfully.
This does come from the patch mkimage: Add OMAP boot image support.
Reordering the init_xx_image_type() sequence does make this
message go away.
This solves the problem for me too.
Tested-by: Aneesh V ane...@ti.com
best regards,
Aneesh
Hi Marek Vasut,
On Monday 08 August 2011 11:04 PM, Marek Vasut wrote:
On Monday, August 08, 2011 10:01:19 AM Albert ARIBAUD wrote:
Hi Hong Xu,
Le 08/08/2011 05:20, Hong Xu a écrit :
After DMA operation, we need to maintain D-Cache coherency.
So that the DCache must be invalidated (hence CPU
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap3/board.c |8
arch/arm/cpu/armv7/omap4/board.c |8
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..2c3d7f3
set-way operations need a DSB after them to ensure the
operation is complete. DMB may not be enough. Use DSB
after all operations instead of DMB.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/cache_v7.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff
.
Aneesh V (4):
arm: do not force d-cache enable on all boards
omap: enable caches at system start-up
armv7: stronger barrier for cache-maintenance operations
armv7: cache: remove flush on un-aligned invalidate
arch/arm/cpu/armv7/cache_v7.c| 26 ++-
arch/arm/cpu/armv7
documentation for cache usage in ARM.
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
Updated with additional guidelines in the README.
---
arch/arm/lib/board.c |8 ++
arch/arm/lib/cache.c | 12 +++
doc/README.arm-caches | 51
Remove the flush of boundary cache-lines done as part
of invalidate on a non cache-line boundary aligned
buffer
Also, print a warning when this situation is recognized.
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
New in V2
---
arch/arm/cpu/armv7/cache_v7.c | 14 --
arch/arm/lib
Hi Wolfgang, Albert,
On Tuesday 09 August 2011 04:40 PM, Aneesh V wrote:
- Avoid enabling caches for all ARM boards
- Enable caches for omap3/4
- Stronger barrier for armv7 cache-maintenance operations.
V2:
* Rebased to latest HEAD of u-boot/master
* Improved the README
* Added a patch
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/omap3/board.c |8
arch/arm/cpu/armv7/omap4/board.c |8
2 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..2c3d7f3
.
Aneesh V (4):
arm: do not force d-cache enable on all boards
omap: enable caches at system start-up
armv7: stronger barrier for cache-maintenance operations
armv7: cache: remove flush on un-aligned invalidate
arch/arm/cpu/armv7/cache_v7.c| 26 ++-
arch/arm/cpu/armv7
set-way operations need a DSB after them to ensure the
operation is complete. DMB may not be enough. Use DSB
after all operations instead of DMB.
Signed-off-by: Aneesh V ane...@ti.com
---
arch/arm/cpu/armv7/cache_v7.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff
Remove the flush of boundary cache-lines done as part
of invalidate on a non cache-line boundary aligned
buffer
Also, print a warning when this situation is recognized.
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
New in V2
---
arch/arm/cpu/armv7/cache_v7.c | 14 --
arch/arm/lib
documentation for cache usage in ARM.
Signed-off-by: Aneesh V ane...@ti.com
---
V2:
Updated with additional guidelines in the README.
---
arch/arm/lib/board.c |8 ++
arch/arm/lib/cache.c | 12 +++
doc/README.arm-caches | 51
Aneesh V (3):
omap4: factor out common part from board config headers
omap4: make SDRAM init work for ES1.0 silicon
omap4: IO settings
arch/arm/cpu/armv7/omap4/board.c| 57 +++
arch/arm/cpu/armv7/omap4/emif.c | 72 +---
arch/arm/cpu/armv7/omap4/sdram_elpida.c
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