[U-Boot] [PATCH] Improve Power Management in SMC911X driver.

2011-11-15 Thread Bertrand Cachet
styling by grouping two narrow comments. Signed-off-by: Bertrand Cachet bertrand.cac...@heig-vd.ch --- drivers/net/smc911x.h |7 +-- 1 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h index 8ce08a9..7f4156e 100644 --- a/drivers/net

[U-Boot] [PATCH v3] Improve Power Management in SMC911X driver.

2011-11-15 Thread Bertrand Cachet
-by: Bertrand Cachet bertrand.cac...@heig-vd.ch --- v2: Improve code styling by grouping two narrow comments. v3: Place versions information under scissors line. drivers/net/smc911x.h |7 +-- 1 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/smc911x.h b/drivers/net

[U-Boot] [PATCH v4] Improve Power Management in SMC911X driver.

2011-11-15 Thread Bertrand Cachet
-by: Bertrand Cachet bertrand.cac...@heig-vd.ch --- v2: Improve code styling by grouping two narrow comments. v3: Place versions information under scissors line. v4: Use tabs instead of spaces (vimrc problem) drivers/net/smc911x.h |7 +-- 1 files changed, 5 insertions(+), 2 deletions(-) diff

[U-Boot] Patch: Power Mangement with smc911x driver

2011-11-14 Thread bertrand . cachet
Hello, In a previous email I sent a patch without following u-boot gitflow. So I send my patch again following informations provided by Mike Frysinger. I hope that I have done everything correctly now. Sincerely Bertrand Cachet ___ U-Boot mailing

[U-Boot] [PATCH] Improve Power Management in SMC911X driver.

2011-11-14 Thread bertrand . cachet
From: Bertrand Cachet bertrand.cac...@heig-vd.ch From datasheet, when READY bit is set inside PM_CTRL register, it means that device is already in *normal* (D0) mode = it doesn't need to be wake-up. With this patch, we only wake-up (writing on TEST_BYTE register) if PM_MODE bits of PM_CTRL

[U-Boot] [PATCH] Improve Power Management in SMC911X driver.

2011-11-14 Thread Bertrand Cachet
From datasheet, when READY bit is set inside PM_CTRL register, it means that device is already in *normal* (D0) mode = it doesn't need to be wake-up. With this patch, we only wake-up (writing on TEST_BYTE register) if PM_MODE bits of PM_CTRL register is in D1/D2 mode. Signed-off-by: Bertrand

[U-Boot] [PATCH] Improve Power Management in SMC911X driver.

2011-11-14 Thread Bertrand Cachet
From datasheet, when READY bit is set inside PM_CTRL register, it means that device is already in *normal* (D0) mode = it doesn't need to be wake-up. With this patch, we only wake-up (writing on TEST_BYTE register) if PM_MODE bits of PM_CTRL register is in D1/D2 mode. Signed-off-by: Bertrand