On Thu, Jul 24, 2014 at 11:12 AM, Siarhei Siamashka
siarhei.siamas...@gmail.com wrote:
On Thu, 5 Jun 2014 19:00:14 +0100
Ian Campbell i...@hellion.org.uk wrote:
This is a sun7i (A20) based followup to the sun4i (A10)
Cubieboard. It has GMAC using MII mode.
Signed-off-by: Ian Campbell
On Mon, Jul 28, 2014 at 3:48 PM, Ian Campbell i...@hellion.org.uk wrote:
On Sun, 2014-07-27 at 23:25 +0200, Hans de Goede wrote:
On some boards the phy needs to be powered up through a gpio, add support for
this.
I assume from the context that this is the Ethernet PHY?
I'm a bit surprised
On Tue, Aug 5, 2014 at 5:26 AM, Ian Campbell i...@hellion.org.uk wrote:
On Fri, 2014-08-01 at 09:46 +0200, Hans de Goede wrote:
SYS_CPU, SYS_BOARD and SYS_SOC are identical for all sunxi boards, move
them to a shared code block.
Signed-off-by: Hans de Goede hdego...@redhat.com
This is an
On Mon, Sep 22, 2014 at 10:11 AM, Chen-Yu Tsai w...@csie.org wrote:
On Mon, Sep 22, 2014 at 2:44 AM, Ian Campbell i...@hellion.org.uk wrote:
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
From: Hans de Goede hdego...@redhat.com
Signed-off-by: Hans de Goede hdego...@redhat.com
[w
On Tue, Sep 23, 2014 at 7:54 PM, Ian Campbell i...@hellion.org.uk wrote:
On Tue, 2014-09-23 at 19:50 +0800, Chen-Yu Tsai wrote:
Ian, include/configs/sun?i.h and sunxi-common.h only have config
related #defines. Are we sure this is the place for something
like register offsets?
I guess
BOOT_TARGET_DEVICES includes USB unconditionally. This breaks when
CONFIG_CMD_USB is not defined. Use a secondary macro to conditionally
include it when CONFIG_EHCI is enabled, as we do for CONFIG_AHCI.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
)
- Rewrite patch 9 commit message to reflect what is supported
- Split out Colombus board defconfig into separate patch (patch 10)
Cheers
ChenYu
Chen-Yu Tsai (5):
ARM: sunxi: Use macro values for setting UART GPIO pull-ups
ARM: sunxi: Fix build break when CONFIG_USB_EHCI is not defined
ARM
setbits helper in PRCM init function]
[w...@csie.org: rephrase commit message to explain what the hardware
supports and what we actually enable]
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/prcm.c| 33
From: Oliver Schinagl oli...@schinagl.nl
A31 has several new and changed memory address. This patch adds them.
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
We have already defined macros for pull-up/down values in the
GPIO header. Use them instead of magic numbers when configuring
the UART pins.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/cpu/armv7/sunxi/board.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
around mmc and smp code, drop MACH_TYPE]
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/Kconfig| 3 +++
arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++
board/sunxi/Kconfig | 10 +-
include/configs/sun6i.h | 26
The Colombus board is an A31 evaluation board from WITS Technology.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
configs/Colombus_defconfig | 4
1 file changed, 4 insertions(+)
create mode 100644 configs/Colombus_defconfig
diff --git a/configs/Colombus_defconfig b/configs
hdego...@redhat.com
[w...@csie.org: styling fixes reported by checkpatch.pl]
[w...@csie.org: drop unsupported SPL code block and unused gpio.h header]
Signed-off-by: Chen-Yu Tsai w...@csie.org
Cc: Tom Cubie mr.hip...@gmail.com
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu
UART0 is the default debug/console UART on the A31.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/include/asm/arch-sunxi/gpio.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index f7f3d8c..ba7e69b
,
rewrite different FIFO address handling, add commit message]
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/include/asm/arch-sunxi/mmc.h | 5 -
drivers/mmc/sunxi_mmc.c | 11 +++
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch
: replace magic numbers with GPIO definitions]
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/cpu/armv7/sunxi/board.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 95a74c5..b6d63db 100644
--- a/arch/arm/cpu/armv7
On Sun, Sep 28, 2014 at 11:33 PM, Ian Campbell i...@hellion.org.uk wrote:
On Thu, 2014-09-25 at 20:09 +0100, Ian Campbell wrote:
On Wed, 2014-09-24 at 16:01 +0800, Chen-Yu Tsai wrote:
The Colombus board is an A31 evaluation board from WITS Technology.
Signed-off-by: Chen-Yu Tsai w
BOOT_TARGET_DEVICES includes USB unconditionally. This breaks when
CONFIG_CMD_USB is not defined. Use a secondary macro to conditionally
include it when CONFIG_EHCI is enabled, as we do for CONFIG_AHCI.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
From: Oliver Schinagl oli...@schinagl.nl
A31 has several new and changed memory address. This patch adds them.
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
UART0 is the default debug/console UART on the A31.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-sunxi/gpio.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include
We have already defined macros for pull-up/down values in the
GPIO header. Use them instead of magic numbers when configuring
the UART pins.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/board.c | 6 +++---
1 file changed, 3
reserved area to adjust for sun6i's different fifo address
(patch 6)
- Rewrite patch 9 commit message to reflect what is supported
- Split out Colombus board defconfig into separate patch (patch 10)
Cheers
ChenYu
Chen-Yu Tsai (5):
ARM: sunxi: Use macro values for setting UART GPIO pull
: replace magic numbers with GPIO definitions]
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/board.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index
around mmc and smp code, drop MACH_TYPE]
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/Kconfig| 3 +++
arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++
board/sunxi/Kconfig | 10 +-
include/configs
The Colombus board is an A31 evaluation board from WITS Technology.
Maxime has kindly agreed to maintain this board.
[1] http://lists.denx.de/pipermail/u-boot/2014-September/190043.html
Signed-off-by: Chen-Yu Tsai w...@csie.org
Cc: Maxime Ripard maxime.rip...@free-electrons.com
---
board/sunxi
setbits helper in PRCM init function]
[w...@csie.org: rephrase commit message to explain what the hardware
supports and what we actually enable]
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch
,
rewrite different FIFO address handling, add commit message]
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-sunxi/mmc.h | 5 -
drivers/mmc/sunxi_mmc.c | 11 +++
2 files changed, 11
hdego...@redhat.com
[w...@csie.org: styling fixes reported by checkpatch.pl]
[w...@csie.org: drop unsupported SPL code block and unused gpio.h header]
Signed-off-by: Chen-Yu Tsai w...@csie.org
Cc: Tom Cubie mr.hip...@gmail.com
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi
On Fri, Oct 3, 2014 at 8:47 PM, Ian Campbell i...@hellion.org.uk wrote:
On Fri, 2014-10-03 at 14:37 +0200, Maxime Ripard wrote:
On Fri, Oct 03, 2014 at 08:16:30PM +0800, Chen-Yu Tsai wrote:
The Colombus board is an A31 evaluation board from WITS Technology.
Maxime has kindly agreed
On later Allwinner SoCs, the watchdog hardware is by all means a
separate hardware block, with its own address range and interrupt
line.
Move the register definitions to a separate file to facilitate
supporting newer SoCs.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/include/asm/arch
the basic sun8i series.
It just so happens that I forgot to leave my A23 tablet on at the
office, hence I won't be able to test that series until next week.
Since this series has no dependencies nor conflicts, I decided to
send this one first.
Cheers
ChenYu
Chen-Yu Tsai (3):
ARM: sunxi: Move
The watchdog on sun6i/sun8i has a different layout.
Add the new layout and fix up the setup functions so that reset works.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/cpu/armv7/sunxi/board.c | 15 +++
arch/arm/include/asm/arch-sunxi/watchdog.h | 20
The RTC hardware has been moved out of the timer block on sun6i/sun8i.
In addition, there are more watchdogs available.
Also note that the timer block definition is not completely accurate
for sun5i/sun7i. Various blocks are missing or have been moved out.
Signed-off-by: Chen-Yu Tsai w
Hi,
On Sat, Oct 4, 2014 at 11:02 PM, Julian Calaby julian.cal...@gmail.com wrote:
Hi,
On Sat, Oct 4, 2014 at 10:37 PM, Chen-Yu Tsai w...@csie.org wrote:
Hi,
This series fixes support for the reset command on sun6i/sun8i.
The watchdog hardware has changed in sun6i, both the register
Hi,
On Sun, Oct 5, 2014 at 1:29 AM, Simon Glass s...@chromium.org wrote:
This adds driver model support to the sunxi GPIO driver, using the device
tree to trigger binding of the driver. The driver will still operate
without driver model too.
Signed-off-by: Simon Glass s...@chromium.org
---
On Sat, Oct 4, 2014 at 4:48 PM, Ian Campbell i...@hellion.org.uk wrote:
And make TARGET_SUN[457]I a choice variable under this.
configs updated with:
sed -i -e 's/^\+S:CONFIG_TARGET_SUN.I=y/+S:CONFIG_TARGET_SUNXI=y\n/g'
configs/*
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
Hi,
On Sun, Oct 5, 2014 at 1:29 AM, Simon Glass s...@chromium.org wrote:
Add a driver for the designware serial UART used on sunxi. This just
redirects to the normal ns16550 driver.
Add a stdout-path to the device tree so that the correct UART is chosen.
Signed-off-by: Simon Glass
The Allwinner A23 SoC has reset controls like the A31 (sun6i).
The FIFO address is also the same as sun6i.
Re-use code added for sun6i.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/include/asm/arch-sunxi/mmc.h | 2 +-
drivers/mmc/sunxi_mmc.c | 2 +-
2 files changed, 2
(with CONS_INDEX=5).
Patch 9 adds a defconfig for the Ippo Q8H A23 tablet board.
Cheers
ChenYu
Chen-Yu Tsai (8):
ARM: sunxi: Fix build break when CONFIG_MMC is not defined
ARM: sunxi: Add sun8i (A23) UART0 pin mux support
ARM: sunxi: Add support for uart0 on port F (mmc0)
mmc: sunxi: Add support
comments]
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/include/asm/arch-sunxi/gpio.h | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index b94ec4d..bbe815a 100644
UART0 pin muxes on the A23 have a different function value.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/include/asm/arch-sunxi/gpio.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index
Allwinner SoCs provide uart0 muxed with mmc0, which can then be used
with a micro SD breakout board. On the A23, this is the only way to
use uart0.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/cpu/armv7/sunxi/board.c | 11 ++-
include/configs/sunxi-common.h | 2 ++
2 files
-by: Chen-Yu Tsai w...@csie.org
---
include/configs/sunxi-common.h | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index a31656e..7571e0e 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi
The A23 only has UART0 muxed with MMC0. Some of the boards we
encountered expose R_UART as a set of pads.
Add support for R_UART so we can have a console while using mmc.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/cpu/armv7/sunxi/board.c | 4
arch/arm/cpu/armv7/sunxi
Ippo q8h is a series of A23 tablet boards. This defconfig
is for v5 of these boards, though for u-boot purposes they
are mostly the same.
See: http://linux-sunxi.org/Ippo_q8h
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
board/sunxi/MAINTAINERS| 5 +
configs/Ippo_q8h_defconfig | 4
The prcm apb0 controls multiple modules. Allow specifying which
modules to enable clocks and de-assert resets so the function
can be reused.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/cpu/armv7/sunxi/prcm.c| 12 +++-
arch/arm/include/asm/arch-sunxi/prcm.h | 2 +-
2
The basic blocks of the A23 are similar to the A31 (sun6i). Re-use
sun6i code for initial clock, gpio, and uart setup.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/Kconfig| 3 +++
arch/arm/cpu/armv7/sunxi/Makefile | 2 ++
arch/arm/cpu/armv7/sunxi/board.c
On Sat, Oct 11, 2014 at 11:33 PM, Ian Campbell i...@hellion.org.uk wrote:
On Sat, 2014-10-04 at 20:37 +0800, Chen-Yu Tsai wrote:
+#else /* CONFIG_SUN6I || CONFIG_SUN8I || .. */
+ static const struct sunxi_wdog *wdog =
+ ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)-wdog
On Sat, Oct 11, 2014 at 11:58 PM, Ian Campbell i...@hellion.org.uk wrote:
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
The basic blocks of the A23 are similar to the A31 (sun6i). Re-use
sun6i code for initial clock, gpio, and uart setup.
Do I take it that sun8i is also in the same
On Sun, Oct 12, 2014 at 12:17 AM, Ian Campbell i...@hellion.org.uk wrote:
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
Ippo q8h is a series of A23 tablet boards. This defconfig
is for v5 of these boards, though for u-boot purposes they
are mostly the same.
Any differences worth
On Sun, Oct 12, 2014 at 12:13 AM, Ian Campbell i...@hellion.org.uk wrote:
On Sat, 2014-10-11 at 17:11 +0100, Ian Campbell wrote:
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
The prcm apb0 controls multiple modules. Allow specifying which
modules to enable clocks and de-assert
On Sun, Oct 12, 2014 at 12:05 AM, Ian Campbell i...@hellion.org.uk wrote:
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
From: Hans de Goede hdego...@redhat.com
The A31, A23 and later SoCs have an extra pin controller, called CPUs_PIO
or R_PIO, which handles pin banks L and beyond
Hi Ian,
On Mon, Oct 13, 2014 at 8:57 PM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
On Sun, Oct 12, 2014 at 04:23:05PM +0800, Chen-Yu Tsai wrote:
On Sun, Oct 12, 2014 at 12:05 AM, Ian Campbell i...@hellion.org.uk wrote:
On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
From
Allwinner SoCs provide uart0 muxed with mmc0, which can then be used
with a micro SD breakout board. On the A23, this is the only way to
use uart0.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/board.c | 11 ++-
include
.
Signed-off-by: Hans de Goede hdego...@redhat.com
[w...@csie.org: expanded commit message]
[w...@csie.org: add pin bank M and expand comments]
[w...@csie.org: add comment on SUNXI_GPIO_BANKS macro]
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/include/asm/arch-sunxi/gpio.h | 31
:
- Dropped ARM: sunxi: Fix build break when CONFIG_MMC is not defined
(already merged)
- Add clarifying comment about SUNXI_GPIO_BANKS macro
- Correct R_PIO L pin bank starting offset
- Check for R_PIO pins by matching against L pin bank start pin number
Cheers
ChenYu
Chen-Yu Tsai (7
The Allwinner A23 SoC has reset controls like the A31 (sun6i).
The FIFO address is also the same as sun6i.
Re-use code added for sun6i.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-sunxi/mmc.h | 2 +-
drivers/mmc/sunxi_mmc.c
UART0 pin muxes on the A23 have a different function value.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/include/asm/arch-sunxi/gpio.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm
The basic blocks of the A23 are similar to the A31 (sun6i). Re-use
sun6i code for initial clock, gpio, and uart setup.
There is no SPL support for A23, as we do not have any documentation
or sample code for DRAM initialization.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i
The A23 only has UART0 muxed with MMC0. Some of the boards we
encountered expose R_UART as a set of pads.
Add support for R_UART so we can have a console while using mmc.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/board.c
Ippo q8h is a series of A23 tablet boards. This defconfig
is for v5 of these boards, though for u-boot purposes they
are mostly the same.
See: http://linux-sunxi.org/Ippo_q8h
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
board/sunxi/MAINTAINERS| 5
The prcm apb0 controls multiple modules. Allow specifying which
modules to enable clocks and de-assert resets so the function
can be reused.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/prcm.c| 12 +++-
arch/arm
The defconfig for Ippo-q8h-v5 was incorrectly committed as
Ippo_q8h. This patch renames it correctly, as well as
correct a typo in my name in the maintainers listing.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
Feel free to squash this into
7b48d8c ARM: sunxi: Add Ippo-q8h-v5 A23 tablet
Hi,
On Tue, Oct 28, 2014 at 8:05 AM, Simon Glass s...@chromium.org wrote:
Hi Hans,
On 24 October 2014 03:08, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 10/23/2014 06:02 AM, Simon Glass wrote:
This adds driver model support to the sunxi GPIO driver, using the device
tree to trigger
Hi,
On Tue, Oct 28, 2014 at 11:29 AM, Simon Glass s...@chromium.org wrote:
Hi Chen-Yu,
On 27 October 2014 20:53, Chen-Yu Tsai w...@csie.org wrote:
Hi,
On Tue, Oct 28, 2014 at 8:05 AM, Simon Glass s...@chromium.org wrote:
Hi Hans,
On 24 October 2014 03:08, Hans de Goede hdego
on sun6i.
Patch 6 adds uart0 muxing on sun6i.
Patch 7 enables sun6i support and adds defconfig for the Colombus board.
Cheers
ChenYu
Chen-Yu Tsai (2):
ARM: sunxi: Fix build break when CONFIG_USB_EHCI is not defined
ARM: sun6i: Add clock support
Hans de Goede (1):
ARM: sunxi-mmc: Add mmc
BOOT_TARGET_DEVICES includes USB unconditionally. This breaks when
CONFIG_CMD_USB is not defined. Use a secondary macro to conditionally
include it when CONFIG_EHCI is enabled, as we do for CONFIG_AHCI.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
include/configs/sunxi-common.h | 8 +++-
1
From: Maxime Ripard maxime.rip...@free-electrons.com
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Signed-off-by: Hans de Goede hdego...@redhat.com
[w...@csie.org: commit message was ARM: sunxi: Setup the A31 UART0 muxing]
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm
From: Oliver Schinagl oli...@schinagl.nl
A31 has several new and changed memory address. This patch adds them.
Signed-off-by: Oliver Schinagl oli...@schinagl.nl
Signed-off-by: Hans de Goede hdego...@redhat.com
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/include/asm/arch-sunxi/cpu.h
around mmc and smp code, drop MACH_TYPE]
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/Kconfig| 3 +++
arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++
board/sunxi/Kconfig | 10 +-
configs/Colombus_defconfig | 4
include
Goede hdego...@redhat.com
[w...@csie.org: spacing fixes reported by checkpatch.pl]
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/prcm.c| 37 +
arch/arm/include/asm/arch-sunxi/prcm.h | 238
From: Hans de Goede hdego...@redhat.com
Signed-off-by: Hans de Goede hdego...@redhat.com
[w...@csie.org: use setbits_le32 for reset control, drop obsolete changes,
squash sunxi-mmc: sun6i has its fifo at a different address]
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm
hdego...@redhat.com
[w...@csie.org: styling fixes reported by checkpatch.pl]
Signed-off-by: Chen-Yu Tsai w...@csie.org
Cc: Tom Cubie mr.hip...@gmail.com
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/clock_sun6i.c| 107 ++
arch/arm/include/asm
On Fri, Sep 12, 2014 at 2:57 AM, Ian Campbell i...@hellion.org.uk wrote:
On Thu, 2014-09-11 at 19:19 +0200, Hans de Goede wrote:
Hi Chen,
On 09/11/2014 07:07 PM, Chen-Yu Tsai wrote:
Hi Ian, Hans,
On Mon, Sep 8, 2014 at 9:28 PM, Chen-Yu Tsai w...@csie.org wrote:
BOOT_TARGET_DEVICES
Hi,
On Thu, Sep 18, 2014 at 4:31 PM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 09/18/2014 06:27 AM, Siarhei Siamashka wrote:
On Tue, 09 Sep 2014 09:00:57 +0200
Hans de Goede hdego...@redhat.com wrote:
Hi,
On 09/08/2014 03:28 PM, Chen-Yu Tsai wrote:
Hi everyone,
This series add
Hi,
On Mon, Sep 22, 2014 at 1:05 AM, Ian Campbell i...@hellion.org.uk wrote:
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
From: Oliver Schinagl oli...@schinagl.nl
To setup clocks and control voltages.
perhaps add ... For P2WI and PIO, since that is apparently what it is
doing
On Mon, Sep 22, 2014 at 2:44 AM, Ian Campbell i...@hellion.org.uk wrote:
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
From: Hans de Goede hdego...@redhat.com
Signed-off-by: Hans de Goede hdego...@redhat.com
[w...@csie.org: use setbits_le32 for reset control, drop obsolete changes
On Mon, Sep 22, 2014 at 2:35 AM, Ian Campbell i...@hellion.org.uk wrote:
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
+#ifdef CONFIG_SPL_BUILD
Since there is no SPL support this is dead code right now, correct?
This was part of Hans' attempt to support SPL. It was not finished
On Mon, Sep 22, 2014 at 9:15 PM, Ian Campbell i...@hellion.org.uk wrote:
On Mon, 2014-09-22 at 20:47 +0800, Chen-Yu Tsai wrote:
On Mon, Sep 22, 2014 at 2:35 AM, Ian Campbell i...@hellion.org.uk wrote:
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
+ /* Set PLL ldo voltage without
On Mon, Sep 22, 2014 at 2:10 PM, Michael Trimarchi
mich...@amarulasolutions.com wrote:
Hi
Il 08/set/2014 15:36 Chen-Yu Tsai w...@csie.org ha scritto:
From: Maxime Ripard maxime.rip...@free-electrons.com
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
Signed-off-by: Hans de
On Mon, Sep 22, 2014 at 3:01 AM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi Ian,
On Sun, Sep 21, 2014 at 07:51:17PM +0100, Ian Campbell wrote:
On Mon, 2014-09-08 at 21:28 +0800, Chen-Yu Tsai wrote:
From: Maxime Ripard maxime.rip...@free-electrons.com
Add a new sun6i machine
On Fri, Mar 14, 2014 at 6:33 PM, Ian Campbell i...@hellion.org.uk wrote:
Based linux-sunxi#sunxi commit d854c4de2f57 arm: Handle .gnu.hash section in
ldscripts vs v2014.01.
Signed-off-by: Chen-Yu Tsai w...@csie.org
Signed-off-by: Jens Kuske jensku...@gmail.com
Signed-off-by: Ian Campbell i
On Mon, Mar 17, 2014 at 4:38 AM, Ian Campbell i...@hellion.org.uk wrote:
On Fri, 2014-03-14 at 17:36 +0200, Pantelis Antoniou wrote:
[...]
Thanks for your review. It seems there are still quite a few issues
dating back to the original allwinner dumps here.
@linux-sunxi: if anyone wants to
On Sun, Apr 27, 2014 at 11:25 PM, Ian Campbell i...@hellion.org.uk wrote:
On Sat, 2014-04-26 at 20:28 +0200, Marek Vasut wrote:
On Friday, April 18, 2014 at 08:05:50 PM, Ian Campbell wrote:
From: Jens Kuske jensku...@gmail.com
The GMAC module in Allwinner sunxi SoCs seems to have problems
On Mon, Apr 28, 2014 at 2:08 AM, Marek Vasut ma...@denx.de wrote:
On Sunday, April 27, 2014 at 05:29:29 PM, Chen-Yu Tsai wrote:
On Sun, Apr 27, 2014 at 11:25 PM, Ian Campbell i...@hellion.org.uk wrote:
On Sat, 2014-04-26 at 20:28 +0200, Marek Vasut wrote:
On Friday, April 18, 2014 at 08:05
Hi,
On Mon, Nov 3, 2014 at 11:34 PM, Hans de Goede hdego...@redhat.com wrote:
From: Oliver Schinagl oli...@schinagl.nl
The A31 uses a new push-pull two wire interface, which features higher
transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8
bytes each time, this driver
On Mon, Nov 3, 2014 at 11:34 PM, Hans de Goede hdego...@redhat.com wrote:
In preparation for adding sun6i dram support.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/cpu/armv7/sunxi/Makefile| 6 +-
arch/arm/cpu/armv7/sunxi/dram.c | 750
Hi,
On Mon, Nov 3, 2014 at 11:34 PM, Hans de Goede hdego...@redhat.com wrote:
Not used atm, for future use (e.g. PSCI).
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/include/asm/arch-sunxi/cpu.h| 5 +++
arch/arm/include/asm/arch-sunxi/cpucfg.h | 67
request framing. Also P2WI does not have
the concept of device addresses.
Olliver
On 03-11-14 16:59, Chen-Yu Tsai wrote:
Hi,
On Mon, Nov 3, 2014 at 11:34 PM, Hans de Goede hdego...@redhat.com
wrote:
From: Oliver Schinagl oli...@schinagl.nl
The A31 uses a new push-pull two wire interface
On Mon, Dec 8, 2014 at 4:27 AM, Hans de Goede hdego...@redhat.com wrote:
Hi,
This is still a bit rough around the edges, I'll clean it up as
time permits and then post it upstream.
In the mean time people interested can find $subject here:
The Merrii Hummingbird A31 is a A31 based development board with 1G
RAM, 8G NAND, AP6210 WiFi+BT, gigabit ethernet, USB OTG, 2 USB 2.0
ports connected to a USB hub chip, HDMI, VGA, TV and stereo in/out.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
board/sunxi/Kconfig | 4
Hi,
On Tue, Dec 9, 2014 at 5:10 PM, Hans de Goede hdego...@redhat.com wrote:
p.s.
On 09-12-14 09:56, Chen-Yu Tsai wrote:
The Merrii Hummingbird A31 is a A31 based development board with 1G
RAM, 8G NAND, AP6210 WiFi+BT, gigabit ethernet, USB OTG, 2 USB 2.0
ports connected to a USB hub chip
Hi,
On Tue, Dec 9, 2014 at 2:53 AM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 08-12-14 15:28, Chen-Yu Tsai wrote:
On Mon, Dec 8, 2014 at 4:27 AM, Hans de Goede hdego...@redhat.com wrote:
Hi,
This is still a bit rough around the edges, I'll clean it up as
time permits and then post
On Tue, Dec 9, 2014 at 6:25 PM, Hans de Goede hdego...@redhat.com wrote:
On 09-12-14 11:17, Chen-Yu Tsai wrote:
On Tue, Dec 9, 2014 at 2:53 AM, Hans de Goede hdego...@redhat.com wrote:
On 08-12-14 15:28, Chen-Yu Tsai wrote:
On Mon, Dec 8, 2014 at 4:27 AM, Hans de Goede hdego...@redhat.com
Hi,
On Sat, Dec 13, 2014 at 9:58 PM, Hans de Goede hdego...@redhat.com wrote:
Hi,
On 09-12-14 13:31, Chen-Yu Tsai wrote:
snip
Also I have a schematic file for A23 that someone provided me.
I don't remember who...
It lists:
- ALDO2 connected to VCC-DLL @ 2.5V
- ALDO3 to VCC-PLL
The Hummingbird A31 board was added in:
eb03ebe sun6i: Add new board Merrii Hummingbird A31
During the development of the patch, the Kconfig target option name
was changed, but the defconfig was not updated.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
configs/Hummingbird_A31_defconfig
I own this board and will maintain and test new versions.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
Does anyone else have this board?
---
board/sunxi/MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index ca03002..0b3e6a8
Hi,
On Wed, Dec 17, 2014 at 4:31 AM, Hans de Goede hdego...@redhat.com wrote:
sun8i (A23) introduces a new bus for communicating with the pmic, the rsb,
the rsb is also used to communicate with the pmic on the A80, and is
documented in the A80 user manual.
This commit adds support for this
On Wed, Dec 17, 2014 at 4:31 AM, Hans de Goede hdego...@redhat.com wrote:
The axp223 appears to be the same as the axp221, except that it uses the
rsb to communicate rather then the p2wi. At least all the registers we use
are 100% the same.
Signed-off-by: Hans de Goede hdego...@redhat.com
On Wed, Dec 17, 2014 at 4:31 AM, Hans de Goede hdego...@redhat.com wrote:
Based on the register / dram_para headers from the Allwinner u-boot / linux
sources + the init sequences from boot0.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/cpu/armv7/sunxi/Makefile |
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