<9fb232e9911f> (" arm64: dts: rockchip: Add base DT for rk3588
SoC")
commit ("arm64: dts: rockchip: Add rk3588 pinctrl data")
Signed-off-by: Jianqun Xu
Signed-off-by: Kever Yang
Signed-off-by: Jagan Teki
---
arch/arm/dts/rk3588-pinctrl.dtsi | 516 +
arch/arm/dts/r
a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.
Add support for Edgeble Neu6 Model A IO Board.
Signed-off-by: Jagan Teki
---
.../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 23 +++
arch/arm/mach-rockchip/rk3588/Kconfig | 15
board/edgeble/neural-compute-module-6/Kconfig
, UART, SPI, GPIO and PWM.
Add arch core support for it.
Signed-off-by: Jagan Teki
---
arch/arm/include/asm/arch-rk3588/boot0.h | 11 ++
arch/arm/include/asm/arch-rk3588/gpio.h | 11 ++
arch/arm/mach-rockchip/Kconfig| 20 +++
arch/arm/mach-rockchip/Makefile
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RK3588 SoC.
Signed-off-by: Jagan Teki
---
arch/arm/dts/rk3588-u-boot.dtsi | 101
1 file changed, 101 insertions(+)
create mode 100644 arch/arm/dts/rk3588-u-boot.dtsi
diff --git a/arch
board in order to create a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.
commit ("arm64: dts: rockchip: rk3588: Add Edgeble Neu6
Model A IO")
Add support for Edgeble Neu6 Model A IO Board.
Signed-off-by: Jagan Teki
---
arch/arm/dts/Makefile| 3 +++
of associated Edgeble IO boards for
creating complete platform solutions.
Enable eMMC for now to boot Linux successfully.
commit <3d9a2f7e7c5e> ("arm64: dts: rockchip: rk3588: Add Edgeble Neu6
Model A SoM")
Add support for Edgeble Neu6 Model A SoM.
Signed-off-by: Jagan Teki
-
Add reset ID defines for rk3588.
commit <0a8eb7dae617> ("dt-bindings: reset: add rk3588 reset
definitions")
Signed-off-by: Sebastian Reichel
Signed-off-by: Jagan Teki
---
.../dt-bindings/reset/rockchip,rk3588-cru.h | 754 ++
1 file changed, 754 insertions
Add IOC unit header include for rk3588.
Signed-off-by: Steven Liu
Signed-off-by: Joseph Chen
Signed-off-by: Jagan Teki
---
.../include/asm/arch-rockchip/ioc_rk3588.h| 102 ++
1 file changed, 102 insertions(+)
create mode 100644 arch/arm/include/asm/arch-rockchip
Add power-domain header for RK3588 SoC from description in TRM.
commit <67944950c2d0> ("dt-bindings: power: add power-domain header for
rk3588")
Signed-off-by: Finley Xiao
Signed-off-by: Jagan Teki
---
include/dt-bindings/power/rk3588-power.h | 69
1
Add clock driver support for Rockchip RK3588 SoC.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
---
drivers/clk/rockchip/Makefile |1 +
drivers/clk/rockchip/clk_rk3588.c | 2019 +
2 files changed, 2020 insertions(+)
create mode 100644 drivers/clk
Add ddr driver for rk3588 to get the ram capacity.
Signed-off-by: Jagan Teki
---
drivers/ram/rockchip/Makefile | 1 +
drivers/ram/rockchip/sdram_rk3588.c | 56 +
2 files changed, 57 insertions(+)
create mode 100644 drivers/ram/rockchip/sdram_rk3588.c
diff
Add RK3588 pll set and get rate clock support.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
---
arch/arm/include/asm/arch-rockchip/clock.h | 24 ++
drivers/clk/rockchip/clk_pll.c | 267 -
2 files changed, 288 insertions(+), 3 deletions(-)
diff --git
Add the dt-bindings header for the Rockchip RK3588, that gets
shared between the clock controller and the clock references
in the dts.
commit ("dt-bindings: clock: add rk3588 clock
definitions")
Signed-off-by: Jagan Teki
---
.../dt-bindings/clock/rockchip,rk3588-cru
Add GRF header for Rockchip RK3588.
Signed-off-by: Jagan Teki
---
.../include/asm/arch-rockchip/grf_rk3588.h| 35 +++
1 file changed, 35 insertions(+)
create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3588.h
diff --git a/arch/arm/include/asm/arch-rockchip
Add clock and reset unit header include for rk3588.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
---
.../include/asm/arch-rockchip/cru_rk3588.h| 451 ++
1 file changed, 451 insertions(+)
create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3588.h
diff
Add support for rk3588 package header in mkimage tool.
Signed-off-by: Jagan Teki
---
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 1f1eaa1675..2e22a1bf8a 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -135,6 +135,7
information on BL31 for RK3588 please share.
Any inputs?
Jagan.
Jagan Teki (16):
rockchip: mkimage: Add rk3588 support
arm: rockchip: Add cru header for rk3588
arm: rockchip: Add grf header for rk3588
dt-bindings: clk: Add dt-binding header for RK3588
clk: rockchip: Add rk3588 clk s
On Wed, 25 Jan 2023 at 21:14, "瘦橘猫" <19983723...@189.cn> wrote:
>
> Hi
>
> The board configuration file for the rk3588 evb does not contain atf, or even
> tpl and spl. What I am going to do now is add some configuration items for
> rk3588s based on rk3588, if successful, to verify that the ATF
The board should be RV1126-NEU2 instead RV1126-ECM0.
Fix the wrong name.
Fixes: b8f1ca954013 ("board: rockchip: Add Edgeble Neu2 IO Board")
Signed-off-by: Jagan Teki
---
board/edgeble/neural-compute-module-2/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
On Wed, 25 Jan 2023 at 00:47, wrote:
>
> From: Joseph Chen
>
> Add support for rk3588 evaluation board.
>
> Signed-off-by: Joseph Chen
> ---
Does it boot with BL31 (bin/rk35/rk3588_bl31_v1.27.elf) from rkbin
master branch? I have tried with some information provided to Kever
the BL31 seems not
Reviewed-by: Kever Yang
Signed-off-by: Jagan Teki
---
Changes for v2:
- collect Kever RB
arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 18 ++
board/rockchip/evb_rk3568/MAINTAINERS| 5 ++
configs/radxa-cm3-io-rk3566_defconfig| 68
3 files changed, 91
M3 IO Board.
Co-developed-by: FUKAUMI Naoki
Signed-off-by: FUKAUMI Naoki
Co-developed-by: Manoj Sai
Signed-off-by: Manoj Sai
Signed-off-by: Jagan Teki
---
Changes for v2:
- add linux-next commit
arch/arm/dts/Makefile| 1 +
arch/arm/dts/rk3566-radxa-
y: FUKAUMI Naoki
Signed-off-by: Jagan Teki
---
Changes for v2:
- collect Kever RB
- add linux-next commit
arch/arm/dts/rk3566-radxa-cm3.dtsi | 345 +
1 file changed, 345 insertions(+)
create mode 100644 arch/arm/dts/rk3566-radxa-cm3.dtsi
diff --git a/arch/arm/dts/rk356
Sync rockchip,vop2.h from linux-next, and the last commit is
commit <604be85547ce> ("drm/rockchip: Add VOP2 driver")
Reviewed-by: Kever Yang
Signed-off-by: Jagan Teki
---
Changes for v2:
- collect Kever RB
include/dt-bindings/soc/rockchip,vop2.h | 14 ++
1
-off-by: Jagan Teki
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/rk3566-radxa-cm3-io.dts | 179 +++
2 files changed, 180 insertions(+)
create mode 100644 arch/arm/dts/rk3566-radxa-cm3-io.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
Signed-off-by: Jagan Teki
---
arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 18 ++
board/rockchip/evb_rk3568/MAINTAINERS| 5 ++
configs/radxa-cm3-io-rk3566_defconfig| 68
3 files changed, 91 insertions(+)
create mode 100644 arch/arm/dts/rk3566-radxa-cm3-io
to mount Radxa CM3 on top of the Rasberry Pi CM4 IO board.
Add support for Radxa CM3.
Co-developed-by: FUKAUMI Naoki
Signed-off-by: FUKAUMI Naoki
Signed-off-by: Jagan Teki
---
arch/arm/dts/rk3566-radxa-cm3.dtsi | 345 +
1 file changed, 345 insertions(+)
create mode
Sync rockchip,vop2.h from linux-next, and the last commit is
commit <604be85547ce> ("drm/rockchip: Add VOP2 driver")
Signed-off-by: Jagan Teki
---
include/dt-bindings/soc/rockchip,vop2.h | 14 ++
1 file changed, 14 insertions(+)
create mode 100644 include/dt-bindi
for now as we are at the
end of the release cycle.
Fixes: 05713d570762 ("rockchip: generate u-boot-rockchip.bin with binman
for ARM64 boards")
Cc: Quentin Schulz
Signed-off-by: Jagan Teki
---
Changes for v2:
- disable BINMAN_FDT in defconfig instead disabling BINMAN in
ARCH_ROCKCHIP
c
Hi Quentin,
On Thu, Jan 5, 2023 at 2:58 PM Quentin Schulz
wrote:
>
> Hi Jagan,
>
> On 1/4/23 20:18, Jagan Teki wrote:
> > For some newer SoCs like RK3568, the Rockchip has not released
> > any DDR drivers yet so idbloader needs to create manually using
> >
Hi Kever,
On Thu, 5 Jan 2023 at 14:32, Kever Yang wrote:
>
> Hi Tom,
>
> Please pull the updates for rockchip platform for next:
> - Add support for rv1126 soc and rv1126 neu2 io board;
Can this go to the coming release?
Jagan.
of the release
cycle.
Fixes: 05713d570762 ("rockchip: generate u-boot-rockchip.bin with binman
for ARM64 boards")
Cc: Quentin Schulz
Signed-off-by: Jagan Teki
---
arch/arm/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index
clock driver")
>
> Signed-off-by: Peter Geis
> ---
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki # radxa-cm3
On Sat, Jul 23, 2022 at 10:31 PM Nicolas Frattaroli
wrote:
>
> The default priority for the quality of service for the video
> output results in unsightly glitches on the output whenever there
> is memory pressure on the system, which happens a lot.
>
> This sets the VOP QoS to high priority,
On Tue, 3 Jan 2023 at 18:24, Peter Robinson wrote:
>
> Hi Quentin,
>
> > On 10/25/22 09:52, Peter Robinson wrote:
> > > Sync rk3399.dtsi and associated bindings includes. Fix up building
> > > of clk/rockchip/clk_rk3399.c for the changes as well as adjusting
> > > the rk3399-u-boot.dtsi for the
)
Fixes: <9749d2ea29e1> ("rockchip: video: vop: Add reset support")
Reported-by: Manoj Sai
Signed-off-by: Jagan Teki
---
configs/evb-rk3288_defconfig| 1 +
configs/firefly-rk3288_defconfig| 1 +
configs/miqi-rk3288_defconfig | 1 +
configs/rock-pi-n8-rk32
On Mon, 26 Dec 2022 at 16:14, Kever Yang wrote:
>
> Hi Jagan,
>
> I have fix all the CFG/CONFIG_ related change, so no need to rebase
> from your side.
>
> But I still get build error, seems because bl31 support on imx8
> platform?
>
>
On Mon, 26 Dec 2022 at 10:23, Kever Yang wrote:
>
> Hi Jagan,
>
>
> Could you help to rebase on top of next?
is it u-boot/next or u-boot-rockchip/for-next?
Jagan.
Hi Kever,
On Tue, 20 Dec 2022 at 12:47, Jagan Teki wrote:
>
> Hi Kever,
>
> On Tue, 20 Dec 2022 at 12:37, Kever Yang wrote:
> >
> > Hi Jagan,
> >
> > On 2022/12/20 14:41, Jagan Teki wrote:
> > > On Mon, 19 Dec 2022 at 19:16, Tom Rini wro
Hi Kever,
On Tue, 20 Dec 2022 at 12:37, Kever Yang wrote:
>
> Hi Jagan,
>
> On 2022/12/20 14:41, Jagan Teki wrote:
> > On Mon, 19 Dec 2022 at 19:16, Tom Rini wrote:
> >> Hey all,
> >>
> >> Here's -rc4, on schedule. I believe this should resolve th
On Mon, 19 Dec 2022 at 19:16, Tom Rini wrote:
>
> Hey all,
>
> Here's -rc4, on schedule. I believe this should resolve the case Fedora
> showed where some binaries are allowed to be missing, IF a flag is also
> passed to make. We've got one more patch to make external optional
> binaries be more
Hi Kever,
On Sun, 18 Dec 2022 at 16:11, Kever Yang wrote:
>
>
> On 2022/12/15 01:51, Jagan Teki wrote:
> > Neural Compute Module 2(Neu2) IO board is an industrial form factor
> > IO board from Edgeble AI.
> >
> > General features:
> > - microSD slot
>
Add DDR driver for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../asm/arch-rockchip/dram_spec_timing.h | 452 +++
.../include/asm/arch-rockchip
expansion
Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v4:
- add MONITOR_LEN config
Changes for v3:
- updated the board names
Changes for v2:
- none
.../dts
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RV1126 SoC.
Both eMMC and SD boot are tested in Edgeble Neu2 SoM.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
arch/arm/dts
expansion
Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v4:
- pick changes from linux
Changes for v3:
- rebase on linux
Changes for v2:
- none
arch/arm
of module
called Neu2k powered with Rockchip RV1126K.
Neu2 needs to mount on top of Edgeble IO boards for creating complete
platform solutions.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v4:
- pick changes from linux
Changes for v3:
- rebase on linux
Changes for v2:
- none
Rockchip RV1126 is a high-performance vision processor SoC
for IPC/CVR, especially for AI related application.
Add arch core support for it.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- drop MONITOR_LEN config
Changes for v3:
- collect Kever r-b
Changes for v2
Add support for rv1126 package header in mkimage tool.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools
Unsecure the dram area so that MMC, USB, and SFC controllers
can able to read data from dram.
Signed-off-by: Jason Zhu
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
arch/arm/mach-rockchip/rv1126/rv1126
INT8/INT16
hybrid operation and computing power is up to 2.0TOPs.
This patch add basic core dtsi support.
Signed-off-by: Jon Lin
Signed-off-by: Sugar Zhang
Signed-off-by: Jagan Teki
---
Changes for v4:
- pick changes from linux
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
arch
Add clock driver support for Rockchip RV1126 SoC.
Signed-off-by: Joseph Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
drivers/clk/rockchip/Makefile |1 +
drivers/clk/rockchip/clk_rv1126.c
Add GRF header for Rockchip RV1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../include/asm/arch-rockchip/grf_rv1126.h| 251 ++
1 file changed, 251 insertions(+)
create mode
Add pinctrl definitions for Rockchip RV1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- pick changes from linux
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
arch/arm/dts/rv1126-pinctrl.dtsi | 211 +++
1 file changed, 211
Add power-domain header for RV1126 SoC from description in TRM.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- sync changes from linux
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../dt-bindings/power/rockchip,rv1126-power.h
Add the dt-bindings header for the Rockchip RV1126, that gets shared
between the clock controller and the clock references in the dts.
Signed-off-by: Finley Xiao
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- sync changes from linux
Changes for v3:
- collect Kever r-b
Add pinctrl driver for Rockchip RV1126.
Signed-off-by: Jianqun Xu
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/pinctrl/rockchip/pinctrl-rv1126
Add clock and reset unit header include for rv1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../include/asm/arch-rockchip/cru_rv1126.h| 459 ++
1 file changed, 459 insertions
Some pins in rockchip are routed via Top GRF and PMU GRF
instead of direct regmap.
Add support to handle all these routing paths so that the
SoC pinctrl drivers will use them accordingly.
Signed-off-by: Jianqun Xu
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Add LPDDR4 detection timings and support for RV1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../sdram-rv1126-lpddr4-detect-1056.inc | 78 +++
.../sdram-rv1126-lpddr4-detect
Control the ddr init print messages via RAM_ROCKCHIP_DEBUG
instead of printing by default.
This gives an option to configs to enable these prints or
not.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
Add DDR loader parameters for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../rockchip/sdram-rv1126-loader_params.inc | 197 ++
1 file
Add DDR3 detection timings for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../sdram-rv1126-ddr3-detect-1056.inc | 72
Add full ddr pctl registers and bit masks for px30.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../asm/arch-rockchip/sdram_pctl_px30.h | 100
DDR chip capacity is computed based on GRF split in some
Rockchip SoC's like PX30 and RV1126.
Add split argument in ddr print info so-that the respective
ddr driver will pass the grf split.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
ram-uclass is building irrespective of whether TPL_DM
or SPL_DM is enabled. So control the ram uclass build
based on TPL/SPL_DM.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v4:
- none
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
drivers/ram/Makefile | 2
From: Jagan Teki
We have common ddr types in rockchip or in general. So use
the common ddr type names instead of per Rockchip SoC to
avoid confusion.
The respective ddr type names will use on the associated
ddr SoC driver as these drivers are built per SoC at a time.
Signed-off-by: Jagan Teki
- updated changes based on master
Changes for v3:
- dropped px30 SPL size change patch
- rebased on linux-next
- collect Kever r-b
Any inputs?
Jagan.
Jagan Teki (25):
ram: Mark ram-uclass depend on TPL_DM or SPL_DM
ram: rockchip: Add common ddr type configs
ram: rockchip: Compute ddr capacity based
On Thu, 3 Nov 2022 at 11:50, Jagan Teki wrote:
>
> fdt_addr will build as part of SPL_LOAD_FIT or SPL_LOAD_FIT_FULL
> which is indeed required to build optee image support in SPL.
>
> common/spl/spl.c: In function ‘jump_to_image_optee’:
> common/spl/spl.c:220:46: error: ‘str
On Fri, Dec 9, 2022 at 8:34 AM Pengfei Fan
wrote:
>
> Use log_warning() instead of printf() to print out driver information
>
> Signed-off-by: Pengfei Fan
> Reviewed-by: Simon Glass
> ---
Applied both to u-boot-spi/master
On Tue, Nov 29, 2022 at 7:47 AM Kunihiko Hayashi
wrote:
>
> Introduce Socionext F_OSPI controller driver. This controller is used to
> communicate with slave devices such as SPI flash memories. It supports
> 4 slave devices and up to 8-bit wide bus, but supports master mode only.
>
> This driver
Please submit the patch using git send-email.
On Thu, Nov 10, 2022 at 4:44 PM Peter Robinson wrote:
>
> Add the Gigadevice GD25LQ128E identifers so it can be properly
> used.
>
> Datasheet: https://www.gigadevice.com/datasheet/gd25lq128e/
>
> Signed-off-by: Peter Robinson
> ---
> drivers/mtd/spi/spi-nor-ids.c | 5 +
> 1 file changed, 5
Hi Quentin,
On Thu, 3 Nov 2022 at 18:51, Quentin Schulz
wrote:
>
> Hi Jagan,
>
> On 11/3/22 13:37, Jagan Teki wrote:
> > On Thu, 3 Nov 2022 at 15:32, Quentin Schulz
> > wrote:
> >>
> >> Hi Jagan,
> >>
> >> On 11/3/22 07:19, Ja
On Thu, 3 Nov 2022 at 15:32, Quentin Schulz
wrote:
>
> Hi Jagan,
>
> On 11/3/22 07:19, Jagan Teki wrote:
> > rockchip-u-boot.dtsi has the FIT image for the final stage of
> > binman image creation.
> >
> > If the actual binman node is part of this dtsi then the
Add DDR driver for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../asm/arch-rockchip/dram_spec_timing.h | 452 +++
.../include/asm/arch-rockchip/sdram_common.h | 212
expansion
Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v3:
- updated the board names
Changes for v2:
- none
.../dts/rv1126-edgeble-neu2-io-u-boot.dtsi| 10
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RV1126 SoC.
Both eMMC and SD boot are tested in Edgeble Neu2 SoM.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
arch/arm/dts/rv1126-u-boot.dtsi | 63
expansion
Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v3:
- rebased on linux
Changes for v2:
- none
arch/arm/dts/Makefile | 3
of module
called Neu2k powered with Rockchip RV1126K.
Neu2 needs to mount on top of Edgeble IO boards for creating complete
platform solutions.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v3:
- rebase on linux
Changes for v2:
- none
arch/arm/dts/rv1126-edgeble-neu2.dtsi | 353
Add support for rv1126 package header in mkimage tool.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 0db45c2d41
Unsecure the dram area so that MMC, USB, and SFC controllers
can able to read data from dram.
Signed-off-by: Jason Zhu
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
arch/arm/mach-rockchip/rv1126/rv1126.c | 12
1
Rockchip RV1126 is a high-performance vision processor SoC
for IPC/CVR, especially for AI related application.
Add arch core support for it.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
arch/arm/include/asm/arch-rv1126/boot0
INT8/INT16
hybrid operation and computing power is up to 2.0TOPs.
This patch add basic core dtsi support.
Signed-off-by: Jon Lin
Signed-off-by: Sugar Zhang
Signed-off-by: Jagan Teki
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
arch/arm/dts/rv1126.dtsi | 439
Add pinctrl definitions for Rockchip RV1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
arch/arm/dts/rv1126-pinctrl.dtsi | 212 +++
1 file changed, 212 insertions(+)
create mode 100644 arch/arm
Add GRF header for Rockchip RV1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../include/asm/arch-rockchip/grf_rv1126.h| 251 ++
1 file changed, 251 insertions(+)
create mode 100644 arch/arm/include
Add clock driver support for Rockchip RV1126 SoC.
Signed-off-by: Joseph Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
drivers/clk/rockchip/Makefile |1 +
drivers/clk/rockchip/clk_rv1126.c | 1889
Add power-domain header for RV1126 SoC from description in TRM.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../dt-bindings/power/rockchip,rv1126-power.h | 35 +++
1 file changed
Add the dt-bindings header for the Rockchip RV1126, that gets shared
between the clock controller and the clock references in the dts.
Signed-off-by: Finley Xiao
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../dt-bindings
Add clock and reset unit header include for rv1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../include/asm/arch-rockchip/cru_rv1126.h| 459 ++
1 file changed, 459 insertions(+)
create mode 100644
Add pinctrl driver for Rockchip RV1126.
Signed-off-by: Jianqun Xu
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/pinctrl/rockchip/pinctrl-rv1126.c | 416
Some pins in rockchip are routed via Top GRF and PMU GRF
instead of direct regmap.
Add support to handle all these routing paths so that the
SoC pinctrl drivers will use them accordingly.
Signed-off-by: Jianqun Xu
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect
Add LPDDR4 detection timings and support for RV1126.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../sdram-rv1126-lpddr4-detect-1056.inc | 78 +++
.../sdram-rv1126-lpddr4-detect-328.inc| 78
Control the ddr init print messages via RAM_ROCKCHIP_DEBUG
instead of printing by default.
This gives an option to configs to enable these prints or
not.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
drivers/ram/rockchip
Add DDR loader parameters for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../rockchip/sdram-rv1126-loader_params.inc | 198 ++
1 file changed, 198
Add DDR3 detection timings for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../sdram-rv1126-ddr3-detect-1056.inc | 72 +++
.../rockchip/sdram-rv1126
Add full ddr pctl registers and bit masks for px30.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
.../asm/arch-rockchip/sdram_pctl_px30.h | 100 +-
drivers/ram/rockchip
DDR chip capacity is computed based on GRF split in some
Rockchip SoC's like PX30 and RV1126.
Add split argument in ddr print info so-that the respective
ddr driver will pass the grf split.
Signed-off-by: YouMin Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3
From: Jagan Teki
We have common ddr types in rockchip or in general. So use
the common ddr type names instead of per Rockchip SoC to
avoid confusion.
The respective ddr type names will use on the associated
ddr SoC driver as these drivers are built per SoC at a time.
Signed-off-by: Jagan Teki
ram-uclass is building irrespective of whether TPL_DM
or SPL_DM is enabled. So control the ram uclass build
based on TPL/SPL_DM.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
---
Changes for v3:
- collect Kever r-b
Changes for v2:
- none
drivers/ram/Makefile | 2 +-
1 file changed, 1
301 - 400 of 8612 matches
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