On Fri, Jul 15, 2022 at 9:39 AM Samuel Holland wrote:
>
> This option is used only by the phy-sun4i-usb driver, which does not
> inherently depend on the ARM architecture.
>
> Signed-off-by: Samuel Holland
> ---
Reviewed-by: Jagan Teki
On Mon, Jul 4, 2022 at 11:43 AM JaimeLiao wrote:
>
> Adding Macronix Octal flash for Octal DTR support.
>
> The octaflash series can be divided into the following types:
>
> MX25 series : Serial NOR Flash.
> MX66 series : Serial NOR Flash with stacked die.(Size larger than 1Gb)
> LM/UM series :
On Sun, Jul 10, 2022 at 8:05 PM Jae Hyun Yoo wrote:
>
> Hello Jagan,
>
> On 7/9/2022 10:20 PM, Jagan Teki wrote:
> > On Sat, Jul 9, 2022 at 12:10 AM Jae Hyun Yoo
> > wrote:
> >>
> >> Add Winbond w25q512nwiq/in and w25q512nwim support.
> >>
&g
On Fri, Jun 3, 2022 at 12:31 PM Vaishnav Achath wrote:
>
> During SFDP header parse and BFPT parse, structures in stack are used
> to perform spi_nor_read_sfdp() which expects a dma-safe buffer.
>
> This commit introduces spi_nor_read_sfdp_dma_unsafe() to wrap
> spi_nor_read_sfdp() using a
On Sat, Jul 9, 2022 at 12:10 AM Jae Hyun Yoo wrote:
>
> Add Winbond w25q512nwiq/in and w25q512nwim support.
>
> datasheet:
> https://www.winbond.com/resource-files/W25Q512NW%20RevB%2007192021.pdf
>
> Signed-off-by: Jae Hyun Yoo
> ---
Applied to u-boot-spi/master
On Mon, Jul 4, 2022 at 11:42 AM JaimeLiao wrote:
>
> Power-on-Reset is a method to restore flash back to 1S-1S-1S mode from
> 8D-8D-8D
> in the begging of probe.
>
> Command extension type is not standardized across flash vendors in DTR mode.
>
> For suiting different vendor flash devices,
On Thu, Mar 3, 2022 at 11:58 AM JaimeLiao wrote:
>
> Adding Macronix Octal flash for Octal DTR support.
>
> The octaflash series can be divided into the following types:
>
> MX25 series : Serial NOR Flash.
> MX66 series : Serial NOR Flash with stacked die.(Size larger than 1Gb)
> LM/UM series :
On Tue, May 31, 2022 at 3:44 PM Jim Liu wrote:
>
> Add Nuvoton NPCM BMC Peripheral SPI controller driver.
> NPCM750 include two general-purpose SPI interface.
>
> Signed-off-by: Jim Liu
> ---
Reviewed-by: Jagan Teki
On Tue, May 24, 2022 at 11:28 AM Chin-Ting Kuo
wrote:
>
> This adds the dirmap API originally introduced in Linux commit aa167f3
> ("spi: spi-mem: Add a new API to support direct mapping"). This also
> includes several follow-up patches and fixes.
>
> Changes from Linux include:
> * Added Kconfig
On Tue, May 24, 2022 at 11:27 AM Chin-Ting Kuo
wrote:
>
> This patch series aims to porting ASPEED FMC/SPI memory controller
> driver with spi-mem interface. spi-mem dirmap framework is also
> synchronized from Linux. These patches have been verified on both
> AST2600 and AST2500 EVBs.
>
>
On Tue, May 24, 2022 at 11:28 AM Chin-Ting Kuo
wrote:
>
> Add spi-aspeed.c file for ARM ASPEED.
>
> Signed-off-by: Chin-Ting Kuo
> ---
> MAINTAINERS | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 56be0bfad0..f2cd707eda 100644
> ---
gt; Signed-off-by: Marek Vasut
> >> Cc: Horatiu Vultur
> >> Cc: Jagan Teki
> >> Cc: Simon Goldschmidt
> >> Cc: Stefan Roese
> >> Cc: Vignesh R
> >
> > Reviewed-by: Stefan Roese
>
> Can this be applied soon ?
This is already merged.
https://patchwork.ozlabs.org/project/uboot/patch/20220504061108.4949-1-ja...@amarulasolutions.com/
Hi Tom,
Please pull this PR.
Summary:
- NPCM7xx FIU SPI driver (Jim Liu)
- AT45DB641E dataflash (Luca Ellero)
CI:
https://source.denx.de/u-boot/custodians/u-boot-spi/-/pipelines/11912
thanks,
Jagan.
The following changes since commit c70c0102af5413cadde6bf90044cb75aefef0584:
Merge tag
On Tue, May 3, 2022 at 5:51 PM Jagan Teki wrote:
>
> From: Jim Liu
>
> Add Nuvoton NPCM BMC Flash Interface Unit(FIU) SPI master
> controller driver using SPI-MEM interface.
>
> The FIU supports single, dual or quad communication interface.
> The FIU controller driv
On Tue, May 3, 2022 at 6:44 PM Chin-Ting Kuo
wrote:
>
> Hi Jagan,
>
> Thanks for the review.
>
> > -Original Message-
> > From: Jagan Teki
> > Sent: Tuesday, May 3, 2022 8:32 PM
> > To: Chin-Ting Kuo
> > Subject: Re: [PATCH 3/8]
On Thu, Apr 14, 2022 at 4:54 PM Chin-Ting Kuo
wrote:
>
> Add ASPEED BMC FMC/SPI memory controller driver with
> spi-mem interface for AST2500 and AST2600 platform.
>
> There are three SPI memory controllers embedded in an ASPEED SoC.
> - FMC: Named as Firmware Memory Controller. After AC on, MCU
On Tue, Apr 26, 2022 at 1:54 PM Luca Ellero
wrote:
>
> Since AT45DB641E uses "extended device information" for reading JEDEC ID
> we must first introduce support for this feature.
> All code is borrowed from Linux kernel source code:
> drivers/mtd/devices/mtd_dataflash.c
> commit
mechanism.
the dts node is followed upstream kernel dts name.
Signed-off-by: Jim Liu
Signed-off-by: Stanley Chu
Reviewed-by: Jagan Teki
[Jagan: fixed the Kconfig, Makefile order]
Signed-off-by: Jagan Teki
---
Changes for v2:
- fixed author e-mail
- fixed Makefile and Kconfig order
drivers/spi
On Wed, Apr 27, 2022 at 9:27 AM wrote:
>
> From: Tien Fong Chee
>
> Add Macronix mx25u51245g flash entry, so this can be used on
> SoCFPGA devices.
>
> Signed-off-by: Tien Fong Chee
> ---
Applied to u-boot-spi/master
On Tue, Apr 26, 2022 at 12:11 PM Michael Nazzareno Trimarchi
wrote:
>
> Hi Tom
>
> On Tue, Apr 26, 2022 at 1:27 AM Tom Rini wrote:
> >
> > Hey all,
> >
> > It's release day and so here's v2022.07-rc1. There's a lot in here, and
> > there's a few more things yet to come, hopefully this week, in
On Tue, Mar 22, 2022 at 4:26 PM Luca Ellero
wrote:
>
> From: Luca Ellero
>
> Take as reference Linux kernel code:
> drivers/mtd/devices/mtd_dataflash.c
Linux commit id?
On Tue, Mar 15, 2022 at 3:03 PM wrote:
>
> From: "Lokanathan, Raaj"
>
> Add support for reading data/images from this ISSI QSPI flash.
Look like the patch is doing quad enable for ISSI but the commit head
and body seem misleading or confusing. Can you elaborate on the same?
Jagan.
On Tue, Feb 22, 2022 at 7:02 AM Peter Geis wrote:
>
> to: Simon Glass
> to: Philipp Tomsich
> to: Kever Yang
> to: Lukasz Majewski
> to: Sean Anderson
> to: Peng Fan
> to: Jaehoon Chung
> to: Heiko Stübner
> cc: u-boot@lists.denx.de
>
> Good Evening,
>
> The following is a few patches for
On Wed, Feb 23, 2022 at 6:37 PM Johan Jonker wrote:
>
> From: Paweł Jarosz
>
> dw_mmc supports two transfer modes in u-boot: IDMA and FIFO.
> This patch adds auto detection of transfer mode and
> eliminates the need to set this in host config struct.
> Allow handling for a u-boot,spl-fifo-mode
nker
> ---
Reviewed-by: Jagan Teki
On Sat, Jan 8, 2022 at 12:04 AM Johan Jonker wrote:
>
> The Rockchip SoCs rk3066/rk3188 have mmc DT nodes
> with as compatible string "rockchip,rk2928-dw-mshc".
> Add support to the existing driver with help of
> a DM_DRIVER_ALIAS.
>
> This type needs a permanent enabled fifo.
> The other
On Sun, Jan 9, 2022 at 8:56 PM Johan Jonker wrote:
>
> The Rockchip serial driver depends on an enabled NS16550 driver,
> so add select SYS_NS16550 to config ROCKCHIP_SERIAL.
>
> Signed-off-by: Johan Jonker
> ---
> drivers/serial/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On Thu, Dec 30, 2021 at 10:18 PM Johan Jonker wrote:
>
> Move ROCKCHIP_STIMER_BASE to Kconfig.
>
> Signed-off-by: Johan Jonker
> ---
>
> Changed V3:
> add ROCKCHIP_STIMER
> ---
> arch/arm/mach-rockchip/Kconfig| 22 ++
> arch/arm/mach-rockchip/px30/Kconfig | 3
Hi Tom,
Please pull this PR.
Summary:
- sunXi SPI fixups (Andre)
- bcm iproc qspi (Rayagonda)
CI:
https://source.denx.de/u-boot/custodians/u-boot-spi/-/pipelines/11239
thanks,
Jagan.
The following changes since commit 90de95f7443cb06f014824976251f126ac6f71c0:
Merge
otten cases, so that the maintainers
> receive all Rockchip related patches.
>
> Signed-off-by: Johan Jonker
> ---
Reviewed-by: Jagan Teki
vin.dtb \
> rk3399-khadas-edge.dtb \
> rk3399-khadas-edge-captain.dtb \
> rk3399-khadas-edge-v.dtb \
> diff --git a/arch/arm/dts/rk3399-gru-kevin-u-boot.dtsi
> b/arch/arm/dts/rk3399-gru-kevin-u-boot.dtsi
> new file mode 100644
> index
On Fri, Dec 24, 2021 at 7:14 PM Alper Nebi Yasak
wrote:
>
> This patch enables some configs that should be working on the Bob board,
> based on what is observed to work on the Kevin board.
>
> The Bob board uses an Embedded DisplayPort panel compatible with the
> simple panel and Rockchip eDP
On Fri, Dec 24, 2021 at 7:14 PM Alper Nebi Yasak
wrote:
>
> The RK3399 SoC needs to know the voltage value provided by some
> regulators, which is done by setting relevant register bits. Configure
> these the way other RK3399 boards do, but with the same values as are
> set in the equivalent code
from DT.
>
> - update test/dm/spi.c: when spi_get_bus_and_cs() was used wihtout
> driver and device name, no change.
> When spi_get_bus_and_cs() was used with driver and device name,
> use the legacy by calling _spi_get_bus_and_cs().
>
> Cc: Marek Behun
> Cc: Jagan Teki
&g
On Tue, Oct 26, 2021 at 8:13 AM Nico Cheng wrote:
>
> Enable SPL support in Kconfig and add some related option in
> rk3568_common.h
>
> Signed-off-by: Nico Cheng
> Signed-off-by: Jason Zhu
> ---
Reviewed-by: Jagan Teki
On Thu, Mar 10, 2022 at 8:57 PM Chris Morgan wrote:
>
> On Thu, Mar 10, 2022 at 05:30:17PM +0530, Jagan Teki wrote:
> > Hi Chris,
> >
> > On Thu, Jan 20, 2022 at 6:44 PM Jagan Teki
> > wrote:
> > >
> > > On Fri, Dec 17, 2021 at 12:14 AM Chris M
On Thu, Jul 1, 2021 at 12:20 AM Johan Jonker wrote:
>
> This commit adds the default configuration file and relevant description
> for A95X Z2 board
>
> Signed-off-by: Johan Jonker
> ---
> board/rockchip/evb_rk3328/MAINTAINERS | 6 ++
> configs/a95x-z2-rk3318_defconfig | 102
>
On Thu, Jul 1, 2021 at 12:19 AM Johan Jonker wrote:
>
> In the Linux DT the file rk3328.dtsi has recently had
> some updates. Update this for U-boot as well.
> The rk3328 usb3 port has now support in the Linux DT.
> Rename node names ending on 'gpio' to 'pin' or 'pins'.
>
> Signed-off-by: Johan
On Fri, Mar 4, 2022 at 5:22 AM Johan Jonker wrote:
>
> In order to update the DT for rk3228
> sync the power domain dt-binding header.
> This is the state as of v5.17 in Linux.
>
> Signed-off-by: Johan Jonker
> Reviewed-by: Simon Glass
> ---
Look like this entire series syncing for rk3288 dts
On Wed, Feb 16, 2022 at 1:24 AM Nikita Yushchenko
wrote:
>
> This is a version of reset_get_bulk() that does not treat no resets
> definition as an error.
>
> Signed-off-by: Nikita Yushchenko
> ---
> drivers/reset/reset-uclass.c | 10 ++
> include/reset.h | 21
On Tue, Jan 11, 2022 at 6:16 PM Andre Przywara wrote:
>
> Hi,
>
> despite U-Boot supporting SPI on Allwinner chips and SPI flash in
> general for a while, it wasn't really working well for many sunxi boards.
> Booting from SPI is handled by separate SPL code, which works fine, but
> the "sf"
Hi Chris,
On Thu, Jan 20, 2022 at 6:44 PM Jagan Teki wrote:
>
> On Fri, Dec 17, 2021 at 12:14 AM Chris Morgan wrote:
> >
> > From: Chris Morgan
> >
> > Add support for slc-mode implemented in Linux for the Toshiba
> > TC58TEG5DCLTA00 NAND and Hynix H27U
On Thu, Feb 10, 2022 at 3:46 AM Roman Bacik wrote:
>
> From: Rayagonda Kokatanur
>
> IPROC qspi driver supports both BSPI and MSPI modes.
>
> Signed-off-by: Rayagonda Kokatanur
> Signed-off-by: Bharat Gooty
> Acked-by: Rayagonda Kokatanur
>
> Signed-off-by: Roman Bacik
> ---
Applied to
On Wed, Feb 9, 2022 at 4:22 AM Niklas Cassel wrote:
>
> From: Niklas Cassel
>
> The driver is currently using sizeof(op->cmd.opcode) in the op_len
> calculation. Commit d15de623013c ("spi: spi-mem: allow specifying a
> command's extension") changed op->cmd.opcode from one byte to two.
>
>
On Tue, Feb 22, 2022 at 9:53 PM Christian Gmeiner
wrote:
>
> In the TI am65 device tree files there is no reset defined. Also
> the Linux kernel driver uses devm_reset_control_get_optional_exclusive(..)
> to get the reset.
>
> Lets do the same as the kernel does and make thr reset optinal.
>
>
Hi Andre,
On Thu, Jan 20, 2022 at 8:06 PM Jagan Teki wrote:
>
> On Thu, Jan 20, 2022 at 7:36 PM Andre Przywara wrote:
> >
> > On Thu, 20 Jan 2022 19:08:57 +0530
> > Jagan Teki wrote:
> >
> > Hi,
> >
> > > On Tue, J
On Thu, Feb 24, 2022 at 12:56 PM Jagan Teki wrote:
>
> On Tue, Jan 11, 2022 at 6:16 PM Andre Przywara wrote:
> >
> > Commit 7945caf22c44 ("arm: sunxi: Enable SPI/SPI-FLASH support for A64")
> > selected CONFIG_SPI by default on all Allwinner A64 boards, even t
On Tue, Jan 11, 2022 at 6:16 PM Andre Przywara wrote:
>
> Commit 7945caf22c44 ("arm: sunxi: Enable SPI/SPI-FLASH support for A64")
> selected CONFIG_SPI by default on all Allwinner A64 boards, even though
> only 4 out of the 14 A64 boards have a SPI flash chip. All other SoCs
> had to manually
On Thu, Jan 20, 2022 at 7:53 PM wrote:
>
> On 1/20/22 3:20 PM, Michael Walle wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> > content is safe
> >
> >>> + {
> >>> + INFO("w25q16jvm", 0xef7015, 0, 64 * 1024, 32,
> >>
> >> Can this name
On Thu, Jan 20, 2022 at 7:36 PM Andre Przywara wrote:
>
> On Thu, 20 Jan 2022 19:08:57 +0530
> Jagan Teki wrote:
>
> Hi,
>
> > On Tue, Jan 11, 2022 at 6:16 PM Andre Przywara
> > wrote:
> > >
> > > On the Allwinner H6 SoC both the SPI0 and the eM
On Tue, Jan 11, 2022 at 6:16 PM Andre Przywara wrote:
>
> On the Allwinner H6 SoC both the SPI0 and the eMMC device share one pin,
> so cannot be used simultaneously. On Linux this is a showstopper, since
> only one of them would be able to claim the pin, and the probe order is
> somewhat random.
On Fri, Dec 17, 2021 at 12:14 AM Chris Morgan wrote:
>
> From: Chris Morgan
>
> Add support for slc-mode implemented in Linux for the Toshiba
> TC58TEG5DCLTA00 NAND and Hynix H27UCG8T2ETR NAND flash found on the NTC
> CHIP. This requires the addition of a paired-pages scheme, a new
> parameter
On Sat, Dec 18, 2021 at 1:52 AM Roman Bacik wrote:
>
> From: Rayagonda Kokatanur
>
> IPROC qspi driver supports both BSPI and MSPI modes.
>
> Signed-off-by: Rayagonda Kokatanur
> Signed-off-by: Bharat Gooty
> Acked-by: Rayagonda Kokatanur
>
> Signed-off-by: Roman Bacik
> ---
>
> Changes in
On Mon, Jan 17, 2022 at 7:27 PM Angus Ainslie wrote:
>
> Add a JEDEC id for the Winbond W25Q16JV 16M-BIT serial flash memory with
> DUAL/QUAD SPI
>
> Changes since v2:
>
> Chagned the name to follow "DTR" parts
>
> Changes since v1:
>
> Updated the name for more suffixes
>
> Signed-off-by: Angus
Hi Tom,
Please pull this PR.
thanks,
Jagan.
The following changes since commit 4a14bfffd42f968ed9d72a780a8d44a9053c5b95:
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell (2021-11-30
08:59:22 -0500)
are available in the Git repository at:
On Wed, Dec 8, 2021 at 10:50 AM Jagan Teki wrote:
>
> Hi Kever,
>
> On Mon, Nov 15, 2021 at 11:08 PM Jagan Teki
> wrote:
> >
> > dmc node is specific to U-Boot, it is always better practice
> > to maintain U-Boot specific nodes into -u-boot.dtsi files
> &
On Wed, Dec 1, 2021 at 11:40 PM Roman Bacik wrote:
>
> IPROC qspi driver supports both BSPI and MSPI modes.
>
> Signed-off-by: Rayagonda Kokatanur
> Signed-off-by: Bharat Gooty
> Acked-by: Rayagonda Kokatanur
>
> Signed-off-by: Roman Bacik
> ---
>
> Changes in v9:
> - merge
Hi Kever,
On Mon, Nov 15, 2021 at 11:08 PM Jagan Teki wrote:
>
> dmc node is specific to U-Boot, it is always better practice
> to maintain U-Boot specific nodes into -u-boot.dtsi files
> in order to maintain Linux dts file sync compatibility.
>
> Move the dmc into px30-u-boot.
On Thu, Oct 28, 2021 at 3:27 PM Manuel Dipolt wrote:
>
> This patch enables clock for the r_pio gpios for the h3
> r_pio is required to access gpios from port L
>
> readout or setting of gpio PL10 (for example to control a led):
>
> => gpio input PL10
> gpio: pin PL10 (gpio 298) value is 0
> =>
o the OTG
>
> ===
>
> Remove the message for the gadget cable detection call, and just return
> the status of the VBUS detection, as this is what the callers are after.
>
> Signed-off-by: Andre Przywara
> ---
Reviewed-by: Jagan Teki
nt __maybe_unused r;
>
> /*
> -* Call setup_environment again in case the boot fdt has
> -* ethernet aliases the u-boot copy does not have.
> +* Call setup_environment and fdt_fixup_ethernet again
> +* in case the boot fdt has ethernet aliase
On Wed, Jun 30, 2021 at 1:09 PM wrote:
>
> From: qianfan Zhao
>
> bpi-m2u has a hardware usb_otg, let's enable it in dts.
>
> Signed-off-by: qianfan Zhao
> ---
Better Sync dts from linux instead of intermediate changes.
Jagan.
On Wed, Jun 30, 2021 at 1:09 PM wrote:
>
> From: qianfan Zhao
>
> the r40 has the same configurations with a33, disable enable_pmu_unk1 and
> phy0_dual_route feature.
>
> Signed-off-by: qianfan Zhao
> ---
Reviewed-by: Jagan Teki
On Sun, May 23, 2021 at 4:52 AM Andreas Rehn wrote:
>
> Add variant V3S_EMAC.
> Handle pinmux compile time error by skipping goio setup, because
> V3s uses internal phy and don't expose pins.
>
> Signed-off-by: Andreas Rehn
> ---
> Changes in v2:
> - skip pinmux and add proper
On Sat, May 22, 2021 at 1:36 AM Andreas Rehn wrote:
>
> Enable emac for licheepi-zero-dock as it provides a ethernet port
>
> Signed-off-by: Andreas Rehn
> ---
> arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git
On Mon, Dec 6, 2021 at 10:21 PM wrote:
>
> Hello Jagan,
>
> Do you wish to review this patch before I take it through the at91 tree ?
> I am skimming through the patches for the next cycle merge window.
Yes, please take it.
Jagan.
en QSPI0 and QSPI1 with has_octal.
>
> Signed-off-by: Tudor Ambarus
> ---
Reviewed-by: Jagan Teki
On Tue, Nov 30, 2021 at 6:17 PM Michal Simek wrote:
>
> This symbol is not used anywhere in the code. Just enable in couple of
> defconfigs but it does nothing that's why remove it.
>
> Signed-off-by: Michal Simek
> ---
Applied to u-boot-spi/master
On Tue, Nov 30, 2021 at 7:04 PM Ram Narayanan
wrote:
>
> Adds support for Winbond's new 128MB spi nor flash.
>
> datasheet:
> https://www.winbond.com/resource-files/W25Q01JV%20SPI%20RevC%2005032021%20Plus%20dummy.pdf
>
> Signed-off-by: Ram Narayanan
> Cc: Jagan Teki
On Sun, Nov 28, 2021 at 8:39 PM Angus Ainslie wrote:
>
> Add a JEDEC id for the Winbond W25Q16JV 16M-BIT serial flash memory with
> DUAL/QUAD SPI
>
> Signed-off-by: Angus Ainslie
> ---
> drivers/mtd/spi/spi-nor-ids.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git
On Thu, Dec 2, 2021 at 11:19 AM Marek Vasut wrote:
>
> On 12/2/21 06:47, Jagan Teki wrote:
> > On Tue, Sep 14, 2021 at 8:59 AM Marek Vasut wrote:
> >>
> >> Set the SF page size, erase block size and total size as an environment
> >> variable after
On Thu, Dec 2, 2021 at 11:20 AM Marek Vasut wrote:
>
> On 12/2/21 06:48, Jagan Teki wrote:
> > Hi Marek,
> >
> > On Tue, Sep 14, 2021 at 8:52 AM Marek Vasut wrote:
> >>
> >> Wait for the read/write transfer finish bit get actually cleared,
> &g
Hi Marek,
On Tue, Sep 14, 2021 at 8:52 AM Marek Vasut wrote:
>
> Wait for the read/write transfer finish bit get actually cleared,
> this does not happen immediately on at least SoCFPGA Gen5.
>
> Signed-off-by: Marek Vasut
> Cc: Jagan Teki
> Cc: Vignesh R
; Signed-off-by: Marek Vasut
> Cc: Jagan Teki
> Cc: Vignesh R
> ---
> drivers/mtd/spi/spi-nor-core.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
> index d5d905fa5a1..448653b9931 100644
> -
On Wed, Nov 17, 2021 at 1:33 PM Michael Walle wrote:
>
> Hi,
>
> Am 2021-11-17 03:48, schrieb chaochao2021...@163.com:
> > From: chao zeng
> >
> > When operating the write-protection flash,spi_flash_std_write() and
> > spi_flash_std_erase() would return wrong result.The flash is protected,
> >
luged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.
Add support for it.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm/dts/Makefile | 1 +
arch/arm/mach-rockchip/px30/Kconfig | 8 ++
board/engicam/px30_core/MAINTAI
Sync the px30 devicetree files from linux-next tree.
commit <14ce8069f48b> ("lib/stackdepot: allow optional init and
stack_table allocation by kvmalloc() - fixup3")
Note, this path even sync rk3326 files as it depends on px30.
Signed-off-by: Jagan Teki
---
Changes for v2:
- a
.dts.
Signed-off-by: Jagan Teki
---
Changes for v2:
- none
arch/arm/dts/px30-u-boot.dtsi | 10 ++
arch/arm/dts/px30.dtsi | 5 -
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 10 ++
3 files changed, 12 insertions(+), 13 deletions(-)
diff --git
On Mon, Nov 15, 2021 at 7:48 PM Tom Rini wrote:
>
> On Mon, Nov 15, 2021 at 07:32:29PM +0530, Jagan Teki wrote:
> > On Mon, Nov 15, 2021 at 6:51 PM chaochao2021...@163.com
> > wrote:
> > >
> > > On 2021/11/15 13:57, tudor.amba...@microchip.com wrote:
&
On Mon, Nov 15, 2021 at 6:51 PM chaochao2021...@163.com
wrote:
>
> On 2021/11/15 13:57, tudor.amba...@microchip.com wrote:
>
> Hi,
>
> + Michael
>
> On 11/15/21 4:37 AM, chaochao2021...@163.com wrote:
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is
On Thu, Nov 4, 2021 at 5:20 AM Tudor Ambarus
wrote:
>
> mx66lm1g45g supports just 1-1-1, 8-8-8 and 8d-8d-8d modes.
> Tested in 1-1-1 and 8d-8d-8d modes using microchip's Octal SPI IP.
>
> Signed-off-by: Tudor Ambarus
> ---
> drivers/mtd/spi/Kconfig| 8
>
On Wed, Nov 3, 2021 at 4:11 PM liao jaime wrote:
>
> Hi Jagan
>
>
> >
> > On Mon, Oct 18, 2021 at 11:54 AM JaimeLiao wrote:
> > >
> > > Follow patch "f6adec1af4b2f5d3012480c6cdce7743b74a6156" for adding
> > > Macronix flash in Octal DTR mode.
> > >
> > > Enable Octal DTR mode with 20 dummy
On Fri, Nov 5, 2021 at 10:47 PM wrote:
>
> Hi,
>
> On 6/22/21 8:21 AM, chao zeng wrote:
> > From: Chao Zeng
> >
> > When operating the write-protection flash,spi_flash_std_write() and
> > spi_flash_std_erase() would return wrong result.The flash is protected,
> > but write or erase the flash
On Tue, Nov 2, 2021 at 4:57 AM Roman Bacik wrote:
>
> Hi Jagan,
>
> On Mon, Nov 1, 2021 at 12:12 AM Jagan Teki wrote:
> >
> > On Tue, Oct 26, 2021 at 1:07 AM Roman Bacik
> > wrote:
> > >
> > > From: Rayagonda Kokatanur
> > >
On Tue, Oct 26, 2021 at 1:07 AM Roman Bacik wrote:
>
> From: Rayagonda Kokatanur
>
> IPROC qspi driver supports both BSPI and MSPI modes.
>
> Signed-off-by: Rayagonda Kokatanur
> Signed-off-by: Bharat Gooty
> Acked-by: Rayagonda Kokatanur
>
> Signed-off-by: Roman Bacik
> ---
>
> Changes in
Hi Pratyush,
On Tue, Oct 26, 2021 at 1:23 AM Pratyush Yadav wrote:
>
> On 08/10/21 06:06PM, Jagan Teki wrote:
> > On Wed, Sep 15, 2021 at 2:05 PM Marek Vasut wrote:
> > >
> > > On 9/15/21 10:28 AM, Pratyush Yadav wrote:
> > > > On 14/09/21 08:22PM, Mare
On Mon, Oct 18, 2021 at 11:54 AM JaimeLiao wrote:
>
> Power-on-Reset is a method to restore flash back to 1S-1S-1S mode from
> 8D-8D-8D
> in the begging of probe.
>
> Command extension type is not standardized across flash vendors in DTR mode.
>
> For suiting different vendor flash devices,
On Mon, Oct 18, 2021 at 11:54 AM JaimeLiao wrote:
>
> Follow patch "f6adec1af4b2f5d3012480c6cdce7743b74a6156" for adding
> Macronix flash in Octal DTR mode.
>
> Enable Octal DTR mode with 20 dummy cycles to allow running at the
> maximum supported frequency.
>
>
On Thu, Oct 21, 2021 at 4:01 AM Roman Bacik wrote:
>
> From: Rayagonda Kokatanur
>
> IPROC qspi driver supports both BSPI and MSPI modes.
>
> Signed-off-by: Rayagonda Kokatanur
> Signed-off-by: Bharat Gooty
> Acked-by: Rayagonda Kokatanur
>
> Signed-off-by: Roman Bacik
> ---
>
> Changes in
Hi Tom,
Please pull the PR.
Summary:
- Fix mtd erase with mtdpart (Marek Behún)
- NXP fspi driver fixes (Kuldeep Singh)
CI:
https://source.denx.de/u-boot/custodians/u-boot-spi/-/pipelines/9582
thanks,
Jagan.
The following changes since commit 7a508a7245592ca44b3dc51c0293656dce60d658:
Merge
Hi Bin,
On Fri, Oct 8, 2021 at 8:43 PM Bin Meng wrote:
>
> HI Jagan,
>
> On Fri, Oct 8, 2021 at 8:58 PM Jagan Teki wrote:
> >
> > On Thu, Sep 30, 2021 at 4:24 PM wrote:
> > >
> > > From: "yanhong.wang"
> > >
> > > Signe
Hi Kever,
Can you push these changes?
Jagan.
On Thu, Sep 30, 2021 at 11:02 AM wrote:
>
> From: Takahiro Kuwano
>
> The current S25FS512S support has following issues that need to be fixed.
>
> - Non-uniform sectors by factory default. The setting needs to be
> checked and assign erase hook as needed.
> - Page size is wrongly
On Thu, Sep 30, 2021 at 7:53 AM wrote:
>
> From: Takahiro Kuwano
>
> The S25FL256L is a part of the S25FL-L family and has the same feature set
> as S25FL128L except the density.
>
> The datasheet can be found in the following link.
> https://www.cypress.com/file/316171/download
>
> The
On Thu, Sep 30, 2021 at 4:24 PM wrote:
>
> From: "yanhong.wang"
>
> Signed-off-by: yanhong.wang
> ---
Applied to u-boot-spi/master
> Signed-off-by: Marek Vasut
> Cc: Horatiu Vultur
> Cc: Jagan Teki
> Cc: Simon Goldschmidt
> Cc: Stefan Roese
> Cc: Vignesh R
> ---
> V2: Enable 4B opcodes which are supported by this chip
> ---
Applied to u-boot-spi/master
On Mon, Sep 20, 2021 at 3:19 AM Simon Glass wrote:
>
> Add a new 'sf mmap' function to show the address of a SPI offset, if the
> hardware supports it. This is useful on x86 systems.
I'm not quite sure about growing sf for limited use cases, maybe
support it in existing arguments might be a good
Acked-by: Pratyush Yadav
> ---
Reviewed-by: Jagan Teki
On Mon, Sep 20, 2021 at 3:19 AM Simon Glass wrote:
>
> Update this code to use IS_ENABLED() instead.
>
> Signed-off-by: Simon Glass
>
> Reviewed-by: Pratyush Yadav
> ---
>
Reviewed-by: Jagan Teki
On Mon, Sep 20, 2021 at 3:19 AM Simon Glass wrote:
>
> This is not updated at runtime so should be marked const. Update the code
> accordingly.
>
> Signed-off-by: Simon Glass
> ---
>
Reviewed-by: Jagan Teki
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