On Sat, 2017-01-14 at 10:06 -0700, Simon Glass wrote:
> Hi Joakim,
>
> On 14 January 2017 at 04:51, Bin Meng <bmeng...@gmail.com> wrote:
> > +Simon,
> >
> > On Fri, Jan 13, 2017 at 4:12 AM, Joakim Tjernlund
> > <joakim.tjernl...@infinera.com> wrot
On Thu, 2017-02-09 at 13:17 +, Ricardo Martins wrote:
> In some Linux distributions (e.g., Arch Linux) the Python binary points to
> Python 3.x instead of Python 2.x. This is an issue when building the libfdt
> SWIG extension, as the generated extension file will be called something
> like
only set the SP
> once after all computations are done.
>
> Signed-off-by: Mario Six <mario....@gdsys.cc>
Reviewed-by: Joakim Tjernlund <joakim.tjernl...@infinera.com>
> ---
>
> Changes in v2:
>
> Patch added (following a suggestion by Joakim Tjernlund
On Sat, 2017-01-14 at 10:06 -0700, Simon Glass wrote:
> Hi Joakim,
>
> On 14 January 2017 at 04:51, Bin Meng <bmeng...@gmail.com> wrote:
> > +Simon,
> >
> > On Fri, Jan 13, 2017 at 4:12 AM, Joakim Tjernlund
> > <joakim.tjernl...@infinera.com> wrot
On Sat, 2017-01-14 at 19:51 +0800, Bin Meng wrote:
> +Simon,
>
> On Fri, Jan 13, 2017 at 4:12 AM, Joakim Tjernlund
> <joakim.tjernl...@infinera.com> wrote:
> > I found two repos w.r.t x86_64 for u-boot, which one should I use?
> >
>
> U-Boot x86_64 support is
I found two repos w.r.t x86_64 for u-boot, which one should I use?
I am ATM only looking at USING the qemu-x86 target for now.
BTW, I found tools/binman/binman.py only worked with python 2.7, maybe you can
change
the shebang to python2.7 as my default python is 3.4
Jocke
On Fri, 2017-01-06 at 14:56 +0100, Mario Six wrote:
> To enable DM on MPC83xx, we need pre-relocation malloc, which is
> implemented in this patch.
>
Would be nice if you could avoid using r1, each time you modify r1 gdb will be
upset/confused if you ever try to debug start.S with gdb.
I guess
ft_cpu_setup() already calls fdt_fixup_ethernet(), calling it
in image_setup_libfdt() is both redundant and breaks any modifications
done by ft_board_setup(). Restore the old behavior by removing
the call in image_setup_libfdt()
Signed-off-by: Joakim Tjernlund <joakim.tjernl...@infinera.
On Thu, 2017-03-23 at 18:02 +0100, Joakim Tjernlund wrote:
> ft_cpu_setup() already calls fdt_fixup_ethernet(), calling it
> in image_setup_libfdt() is both redundant and breaks any modifications
> done by ft_board_setup(). Restore the old behavior by removing
> the call in image_
On Mon, 2017-04-03 at 22:17 +0200, Wolfgang Denk wrote:
> Dear Joakim,
Dear Wolfgang,
>
> In message <1491221969.4177.81.ca...@infinera.com> you wrote:
> > I am looking at adding support for runtime sizing of CONFIG_ENV_ADDR as
> > we need to replace out flash but we don't want to create a new
I am looking at adding support for runtime sizing of CONFIG_ENV_ADDR as
we need to replace out flash but we don't want to create a new u-boot binairy
just for this simple change.
While converting env_flash.c I noted the global variable
env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR;
which cannot be
On Tue, 2017-04-04 at 10:55 +0200, Lukasz Majewski wrote:
> Hi Joakim,
>
> > I am looking at adding support for runtime sizing of CONFIG_ENV_ADDR
> > as we need to replace out flash but we don't want to create a new
> > u-boot binairy just for this simple change.
>
> Please correct me if I did
On Tue, 2017-04-04 at 12:31 +0200, Wolfgang Denk wrote:
> Dear Joakim,
>
> In message <1491301459.28343.1.ca...@infinera.com> you wrote:
> >
> > Use case is when CONFIG_ENV_SECT_SIZE and/or CONFIG_ENV_ADDR are non
> > constants.
>
> That is my exact question - when would this happen? Flash
On Tue, 2017-04-04 at 13:27 +0200, Wolfgang Denk wrote:
> Dear Joakim,
>
> In message <1491302640.30240.1.ca...@infinera.com> you wrote:
> >
> > > That is my exact question - when would this happen? Flash sectors
> > > do now wander around in memory or change size :-)
> >
> > No, but they
On Fri, 2017-03-31 at 22:21 -0600, Simon Glass wrote:
> Hi Joakim,
>
> On 23 March 2017 at 11:02, Joakim Tjernlund
> <joakim.tjernl...@infinera.com> wrote:
> > ft_cpu_setup() already calls fdt_fixup_ethernet(), calling it
> > in image_setup_libfdt() is both redundan
On Fri, 2017-04-28 at 11:05 +0200, Maxime Ripard wrote:
> On Fri, Apr 28, 2017 at 03:33:53PM +0800, Chen-Yu Tsai wrote:
> > The sunxi platform relies on the core boot sequence to load and process
> > device tree blobs, including writing back any MAC addresses we generate
> > by an implicit call to
On Wed, 2017-05-17 at 13:25 -0400, Tom Rini wrote:
> On Wed, May 17, 2017 at 04:57:57PM +, york sun wrote:
> > On 05/09/2017 08:52 AM, York Sun wrote:
> > > On 05/09/2017 08:49 AM, Tom Rini wrote:
> > > > On Tue, May 09, 2017 at 08:46:46AM -0700, York Sun wrote:
> > > > > On 05/09/2017 05:36
On Tue, 2017-08-29 at 15:43 +, York Sun wrote:
> On 08/29/2017 06:21 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-08-29 at 12:47 +0200, Joakim Tjernlund wrote:
> > > As we are looking at PCI stuff ATM I would like to ask
> > > about PEX_GCLK_RATIO in E500 CPUs.
On Wed, 2017-08-30 at 15:25 +, York Sun wrote:
> On 08/30/2017 06:05 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-08-29 at 17:33 +, York Sun wrote:
> > > +Roy Zang to comment on PCIe clock source
> > >
> > > On 08/29/2017 10:06 AM, Joakim Tjernlund wro
On Wed, 2017-09-06 at 09:36 +, Mingkai Hu wrote:
> > -Original Message-
> > From: Joakim Tjernlund [mailto:joakim.tjernl...@infinera.com]
> > Sent: Tuesday, September 05, 2017 8:45 PM
> > To: Mingkai Hu <mingkai...@nxp.com>; Roy Zang <roy.z...@nxp.com
Most FSL PCIe controllers expects 333 MHz PCI reference clock.
This clock is derived from the CCB but in many cases the ref.
clock is not 333 MHz and a divisor needs to be configured.
This adds PEX_CCB_DIV #define which can be defined for each
type of CPU/platform.
Signed-off-by: Joakim
On Thu, 2017-09-07 at 06:45 +, Mingkai Hu wrote:
> > -Original Message-
> > From: Mingkai Hu
> > Sent: Wednesday, September 06, 2017 5:37 PM
> > To: 'Joakim Tjernlund' <joakim.tjernl...@infinera.com>; Roy Zang
> > <roy.z...@nxp.com>;
FSL PCIe controller drivers before REV 3 has this test for link up:
enabled = ltssm >= PCI_LTSSM_L0;
We have a PCIe dev. that stays in LTSSM=0x51 (Polling Compliance) when non ready
for PCI transaktions. When FSL PCIe controller tries to access this device, it
hangs forever.
Is LTSSM=0x51
On Mon, 2017-08-28 at 16:55 +, York Sun wrote:
> On 08/28/2017 09:48 AM, Joakim Tjernlund wrote:
> > FSL PCIe controller drivers before REV 3 has this test for link up:
> >enabled = ltssm >= PCI_LTSSM_L0;
> >
> > We have a PCIe dev. that stays in LTSSM=0x51
FSL u-boot/linux
users.
> Thanks
>
>
> -Original Message-
> From: Joakim Tjernlund [mailto:joakim.tjernl...@infinera.com]
> Sent: Tuesday, August 29, 2017 2:45 PM
> To: Xiaowei Bao <xiaowei@nxp.com>; York Sun <york@nxp.com>
> Cc: u-boot@lists.
-
> From: York Sun
> Sent: Tuesday, August 29, 2017 1:15 AM
> To: Xiaowei Bao <xiaowei@nxp.com>
> Cc: Joakim Tjernlund <joakim.tjernl...@infinera.com>; u-boot@lists.denx.de
> Subject: Re: FSL PCIe LTSSM >= PCI_LTSSM_L0 equals link up
>
> +Xiaowei
>
>
in uboot or kernel, this solution is used for layerscape platform.
>
I am not asking about the layerscape platform, I want to know what to do with
FSL.
Please read the whole thread.
> Thanks
>
> -Original Message-
> From: Joakim Tjernlund [mailto:joakim.tjernl...@infinera
As we are looking at PCI stuff ATM I would like to ask
about PEX_GCLK_RATIO in E500 CPUs. I cannot find this is setup
at all for E500 but I THINK this is required.
In 83xx one do:
get_clocks();
/* Configure the PCIE controller core clock ratio */
out_le32(hose_cfg_base + PEX_GCLK_RATIO,
(((bus ?
On Tue, 2017-08-29 at 17:33 +, York Sun wrote:
> +Roy Zang to comment on PCIe clock source
>
> On 08/29/2017 10:06 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-08-29 at 15:43 +, York Sun wrote:
> > > On 08/29/2017 06:21 AM, Joakim Tjernlund wrote:
> > > &g
On Mon, 2017-08-28 at 17:14 +, York Sun wrote:
> +Xiaowei
>
> On 08/28/2017 10:09 AM, Joakim Tjernlund wrote:
> > On Mon, 2017-08-28 at 16:55 +, York Sun wrote:
> > > On 08/28/2017 09:48 AM, Joakim Tjernlund wrote:
> > > > FSL PCIe controller drivers be
On Wed, 2017-08-30 at 15:25 +, York Sun wrote:
> On 08/30/2017 06:05 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-08-29 at 17:33 +, York Sun wrote:
> > > +Roy Zang to comment on PCIe clock source
> > >
> > > On 08/29/2017 10:06 AM, Joakim Tjernlund wro
On Tue, 2017-08-29 at 12:47 +0200, Joakim Tjernlund wrote:
> As we are looking at PCI stuff ATM I would like to ask
> about PEX_GCLK_RATIO in E500 CPUs. I cannot find this is setup
> at all for E500 but I THINK this is required.
>
> In 83xx one do:
> get_clocks();
>
On Wed, 2017-11-29 at 19:11 +0900, Masahiro Yamada wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> Hi Simon,
>
>
> 2017-11-28 2:13 GMT+09:00 Simon Glass
On Tue, 2017-11-21 at 17:23 +, York Sun wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 11/21/2017 09:18 AM, Joakim Tjernlund wrote
On Tue, 2017-09-12 at 19:56 +0200, Joakim Tjernlund wrote:
> Most FSL PCIe controllers expects 333 MHz PCI reference clock.
> This clock is derived from the CCB but in many cases the ref.
> clock is not 333 MHz and a divisor needs to be configured.
>
> This adds PEX_CCB_DIV #d
On Tue, 2017-11-21 at 18:35 +, York Sun wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 11/21/2017 10:20 AM, Joakim Tjernlund wrote
On Tue, 2017-11-21 at 17:45 +, York Sun wrote:
>
> On 11/21/2017 09:41 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-11-21 at 17:32 +, York Sun wrote:
> > > CAUTION: This email originated from outside of the organization. Do not
> > > click links or open at
On Tue, 2017-11-21 at 17:32 +, York Sun wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 11/21/2017 09:29 AM, Joakim Tjernlund wrote
On Tue, 2017-11-21 at 18:04 +, York Sun wrote:
>
>
> On 11/21/2017 09:52 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-11-21 at 17:45 +, York Sun wrote:
> > >
> > > On 11/21/2017 09:41 AM, Joakim Tjernlund wrote:
> > > > On T
>
> > -Original Message-----
> > From: Joakim Tjernlund [mailto:joakim.tjernl...@infinera.com]
> > Sent: Friday, October 20, 2017 9:13 PM
> > To: w...@denx.de; Mingkai Hu <mingkai...@nxp.com>;
> > tony.obr...@alliedtelesis.co.nz; u-boot@lists.d
On Fri, 2018-05-04 at 12:33 +0200, Christophe LEROY wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> Hi Mario,
>
> Le 04/05/2018 à 11:56, Mario Six a écrit :
On Tue, 2018-06-19 at 23:57 -0400, Tom Rini wrote:
>
>
> With the move to using at least gcc-6 for many targets we now have C
> code that requires the GNU11 C standard to be used in all cases.
Requiring gcc-6 is a bit much I think, there are lots of cross gcc's out there
that is older. I don't
On Thu, 2018-04-26 at 11:35 +0530, Jagan Teki wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On Thu, Apr 26, 2018 at 11:24 AM, Mario Six
On Fri, 2017-10-20 at 18:16 +0800, Bao Xiaowei wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> For some special reset times for longer pcie devices, the pcie
On Thu, 1970-01-01 at 00:00 +, Wolfgang Denk wrote:
>
> Hello,
>
> In message <2018000422.7957c7f3@jawa> you wrote:
> >
> > > I am using U-Boot 2015.04, and the new root file system for my
> > > platform includes u-boot-fw-utils 2017.09. I have noticed that
> > > fw_{print,set}env
ntributed to that code for their explicit
> > permission. Legally it is a huge difference between actively
> > confirming approval and not reacting at all.
> >
>
> All people (except Freescale and NXP employees) contributed to this code
> are in
On Thu, 1970-01-01 at 00:00 +, Simon Goldschmidt wrote:
.
> > Reviewed-by: Andre Przywara
> > Reviewed-by: Simon Glass
> > Signed-off-by: Maxime Ripard
> > ---
> > env/env.c | 80
On Thu, 1970-01-01 at 00:00 +, Simon Goldschmidt wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 06.02.2018 09:20, Joakim Tjernlund
On Thu, 1970-01-01 at 00:00 +, Maxime Ripard wrote:
> Hi,
>
> On Tue, Feb 06, 2018 at 08:20:49AM +0000, Joakim Tjernlund wrote:
> > On Thu, 1970-01-01 at 00:00 +, Simon Goldschmidt wrote:
> >
> > .
> > > > Reviewed-by: Andre Przywara &l
On Thu, 2018-01-04 at 15:23 +0100, Jean-Jacques Hiblot wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> This series applies on u-boot/next
>
> It aims at
York, did this go anywhere?
Jocke
On Tue, 2018-02-27 at 19:54 +, York Sun wrote:
>
> On 02/27/2018 11:52 AM, Joakim Tjernlund wrote:
> > On Tue, 2018-02-27 at 19:30 +, York Sun wrote:
> > >
> > > On 11/21/2017 10:20 AM, Joakim Tjernlund wrote:
> > &
On Tue, 2018-09-04 at 17:43 -0400, Tom Rini wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On Tue, Sep 04, 2018 at 09:05:55PM +0300, Andy Shevchenko wrote:
On Wed, 2018-07-04 at 19:10 +0200, Marek Behún wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> The comparison
> logical > item->logical + item->length
> in
On Tue, 2018-02-27 at 19:30 +, York Sun wrote:
>
> On 11/21/2017 10:20 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-11-21 at 18:04 +, York Sun wrote:
> > >
> > >
> > > On 11/21/2017 09:52 AM, Joakim Tjernlund wrote:
> > > >
Okt. 2018 um 07:42 Uhr schrieb Heiko Schocher :
> >
> > Hello Joakim,
> >
> > Am 10.10.2018 um 19:34 schrieb Joakim Tjernlund:
> > > This commit broke our pca953x usage(on ppc).
> > >
> > > I wonder why gpio pins here has an endia
This commit broke our pca953x usage(on ppc).
I wonder why gpio pins here has an endian, its not a number.
If there must be an endian connected with this, should it not
be a cpu_to_be16 instead, which will retain compatibility ?
___
U-Boot mailing list
On Mon, 2018-09-24 at 08:42 +0100, Alex Kiernan wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On Wed, Sep 5, 2018 at 8:23 PM Rasmus Villemoes
> wrote:
> >
-msingle-pic-base is a new gcc(from 4.6) option for ppc and
it reduces the size of my u-boot with about 4 KB.
While at it, add -fno-jump-tables too to save a
few more bytes.
Signed-off-by: Joakim Tjernlund
---
I think all PowerPC's can use this but I have only tested
83xx so just enable
hex filename
288002 17868 24968 330838 50c56 u-boot.aft
Signed-off-by: Joakim Tjernlund
---
arch/powerpc/cpu/mpc85xx/config.mk | 1 +
arch/powerpc/cpu/mpc85xx/start.S | 3 +++
2 files changed, 4 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/config.mk
b/arch/powerpc/cpu
On Wed, 2018-11-21 at 08:51 +, Christophe Leroy wrote:
>
> Reported-by: Joakim Tjernlund
> Signed-off-by: Christophe Leroy
Reviewed-by: Joakim Tjernlund
Leroy, if you need space, you may want to revive:
https://github.com/u-boot/u-boot/commit/39768f7715ed637ef02f49fc7de664c
On Wed, 2019-01-09 at 17:39 -0500, Tom Rini wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On Wed, Jan 09, 2019 at 05:01:37PM +0100, Stefano Babic wrote:
>
Trying to figure out if it will be possible to boot u-boot from an eMMC boot
partition using an
eMMC 4.2 controller(eMMC boot part. was introduced in 4.3) ?
I know this might not be the best list to ask this but I have been unable to
find this out using Google
and I hope there is someone here
On Wed, 2019-05-15 at 07:02 +0200, Mario Six wrote:
> On Tue, May 14, 2019 at 3:53 PM Jagan Teki wrote:
> > On Thu, May 2, 2019 at 2:37 PM Joakim Tjernlund
> > wrote:
> > > On Thu, 2019-05-02 at 07:31 +0200, Mario Six wrote:
> > > > CAUTION: This email origina
On Mon, 2019-04-29 at 01:58 +0530, Jagan Teki wrote:
>
> From: Mario Six
>
> We do nothing in the loop if the "not empty" event was not detected. To
> simplify the logic, check if this is the case, and skip the execution of
> the loop early to reduce the nesting level and flag checking.
Looked
m vacation, so here's my answer:
>
> On Mon, Apr 29, 2019 at 12:41 PM Jagan Teki
> wrote:
> > + Mario
> >
> > On Mon, Apr 29, 2019 at 2:48 PM Joakim Tjernlund
> > wrote:
> > > On Mon, 2019-04-29 at 01:58 +0530, Jagan Teki wrote:
> > > > From:
On Tue, 2019-08-20 at 06:59 +, Xiaowei Bao wrote:
>
> From: Chuanhua Han
>
> Modify the Freescale ESPI driver to support the driver model.
> Also resolved the following problems:
>
> = WARNING ==
> This board does not use CONFIG_DM_SPI. Please update
On Wed, 2019-08-21 at 01:19 +, Xiaowei Bao wrote:
>
> > -Original Message-
> > From: Joakim Tjernlund
> > Sent: 2019年8月20日 19:04
> > To: Prabhakar Kushwaha ; Ruchika Gupta
> > ; Xiaowei Bao ;
> > Shengzhou Liu ; w...@denx.de;
> &
On Wed, 2019-08-21 at 09:46 +, Xiaowei Bao wrote:
> > -Original Message-
> > From: Joakim Tjernlund
> > Sent: 2019年8月21日 15:52
> > To: Prabhakar Kushwaha ; Ruchika Gupta
> > ; Xiaowei Bao ;
> > Shengzhou Liu ; w...@denx.de;
> > ja...@amarula
On Tue, 2019-12-17 at 08:55 +, Priyanka Jain wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> > -Original Message-----
>
On Tue, 2019-12-03 at 14:04 +0200, Igor Opaniuk wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> From: Igor Opaniuk
>
> Add support for setting
Impl. erratum as descibed in errata doc.
Enable A008109 for T1040 and T1024
Signed-off-by: Joakim Tjernlund
---
arch/powerpc/cpu/mpc85xx/Kconfig | 2 ++
drivers/ddr/fsl/Kconfig | 3 +++
drivers/ddr/fsl/ctrl_regs.c | 6 ++
3 files changed, 11 insertions(+)
diff --git a/arch
On Wed, 2019-11-20 at 17:07 +0100, Joakim Tjernlund wrote:
> Impl. erratum as descibed in errata doc.
> Enable A008109 for T1040 and T1024
>
> Signed-off-by: Joakim Tjernlund
> ---
> arch/powerpc/cpu/mpc85xx/Kconfig | 2 ++
> drivers/ddr/fsl/Kconfig | 3 +
unconditionally made all our boards
stable again, regardless of Cold/Warm boot.
Signed-off-by: Joakim Tjernlund
---
drivers/ddr/fsl/mpc85xx_ddr_gen3.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
b/drivers/ddr/fsl
On Fri, 2020-04-10 at 11:40 +, Priyanka Jain wrote:
>
> > -Original Message-
> > From: Joakim Tjernlund
> > Sent: Thursday, April 9, 2020 6:24 PM
> > To: Priyanka Jain ; Biwen Li (OSS)
> >
> > Cc: u-boot@lists.denx.de; Biwen Li ; Jiafei P
On Thu, 2020-04-09 at 20:44 +0800, Biwen Li wrote:
This revert will bring back another bug, can you try finding out why it does
work?
May there are some minor tweaks needed ?
Jocke
>
> From: Biwen Li
>
> This reverts commit 2a5d5d27edfbdb0e02a7fcf05569f92c02ae44ee.
> After applied
I decided to check out USB gadget ethernet in u-boot and selected
USB_ETHER/USB_ETH_RNDIS and tried
to build it but that fails due to missing __constant_cpu_to_leXX() definitions.
These are nowhere to find in u-boot so I wonder what shape above code is?
Jocke
On Wed, 2020-05-06 at 10:47 +0200, Rasmus Villemoes wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> This is roughly the U-Boot side equivalent to commit
>
On Wed, 2020-05-06 at 11:11 +0200, Rasmus Villemoes wrote:
>
> On 06/05/2020 10.59, Joakim Tjernlund wrote:
> > On Wed, 2020-05-06 at 10:47 +0200, Rasmus Villemoes wrote:
> > > At first, I wanted to allow setting CONFIG_ENV_SECT_SIZE to 0 to mean
> > > "
On Wed, 2020-05-06 at 11:37 +0200, Rasmus Villemoes wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 06/05/2020 11.21, Joakim Tjernlund w
On Wed, 2020-05-06 at 12:00 +0200, Joakim Tjernlund wrote:
> On Wed, 2020-05-06 at 11:37 +0200, Rasmus Villemoes wrote:
> > CAUTION: This email originated from outside of the organization. Do not
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> >
On Wed, 2020-05-06 at 12:15 +0200, Rasmus Villemoes wrote:
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>
> On 06/05/2020 12.00, Joakim Tjernlund
On Wed, 2020-05-06 at 12:47 +0200, Rasmus Villemoes wrote:
> On 06/05/2020 12.18, Joakim Tjernlund wrote:
> > On Wed, 2020-05-06 at 12:00 +0200, Joakim Tjernlund wrote:
> > > On Wed, 2020-05-06 at 11:37 +0200, Rasmus Villemoes wrote:
> > > > CAUTION: This
On Wed, 2020-05-06 at 13:06 +0200, Joakim Tjernlund wrote:
> On Wed, 2020-05-06 at 12:47 +0200, Rasmus Villemoes wrote:
> > On 06/05/2020 12.18, Joakim Tjernlund wrote:
> > > On Wed, 2020-05-06 at 12:00 +0200, Joakim Tjernlund wrote:
> > > > On Wed, 2020-05-06 at
On Mon, 2020-09-07 at 22:24 +0300, Yusuf Altıparmak wrote:
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> links or open attachments unless you recognize the sender and know the
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>
> Hello,
>
> I want to modify U-boot to relocate itself to
On Wed, 2020-09-16 at 13:14 +0200, Heinrich Schuchardt wrote:
> CAUTION: This email originated from outside of the organization. Do not click
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>
> On 16.09.20 10:13, AKASHI Takahiro wrote:
> > On Wed,
On Sun, 2020-04-12 at 04:22 +, Priyanka Jain wrote:
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>
> > -Original Message-----
>
On Wed, 2020-05-27 at 22:16 +0530, Jagan Teki wrote:
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>
> I believe some boards can directly enable DM_SPI if it has
>
On Wed, 2020-09-16 at 13:55 +0200, Heinrich Schuchardt wrote:
> On 16.09.20 13:40, Joakim Tjernlund wrote:
> > On Wed, 2020-09-16 at 13:14 +0200, Heinrich Schuchardt wrote:
> > > CAUTION: This email originated from outside of the organization. Do not
> > > click links
Lock dcache before clearing INIT_RAM.
More importantly, invalidate dcache contents before using it as RAM.
Signed-off-by: Joakim Tjernlund
---
Something odd happend, on a stable mpc8321 board, small unrelated code
changes made the board unbootable. Debugging with an emulator
it looked like
wrong with the CPUs cache and the CPU just
RESET itself
Jocke
On Wed, 2020-11-11 at 13:54 +0100, Joakim Tjernlund wrote:
> Lock dcache before clearing INIT_RAM.
> More importantly, invalidate dcache contents before using it as RAM.
>
> Signed-off-by: Joakim Tjernlund
> ---
>
On Thu, 2021-04-15 at 07:25 +0200, Stefan Roese wrote:
> On 11.04.21 20:47, Marek Vasut wrote:
> > According to S26KL512S datasheet [1] and S29GL01GS datasheet [2],
> > the procedure to read out PPB lock bits is to send the PPB Entry,
> > PPB Read, Reset/ASO Exit. Currently, the code does send
On Sun, 2021-12-19 at 14:20 +, Ivan Mikhaylov wrote:
> On Sat, 2021-12-18 at 18:23 +0000, Joakim Tjernlund wrote:
> > Ping?
> > Maybe just revert commit 8a726b852502 ("fw_setenv: lock the flash
> > only if it was locked before") ?
> >
> > __
Ping?
Maybe just revert commit 8a726b852502 ("fw_setenv: lock the flash only if it
was locked before") ?
____
From: Joakim Tjernlund
Sent: 13 December 2021 18:22
To: u-boot@lists.denx.de; joe.hershber...@ni.com; fr0st6...@gmail.com
Subject:
Commit "fw_setenv: lock the flash only if it was locked before"
checks for Locked status with uninitialized erase data.
Address by moving the test for MEMISLOCKED.
Fixes: 8a726b852502 ("fw_setenv: lock the flash only if it was locked before")
Signed-off-by: Joakim Tjern
Just had the same and you are probably missing to map that mem area to the MMU.
grep for PTE_BLOCK_MEMTYPE in board
and you will see how to.
That said, I think the error msg in u-boot can be a bit better, some SEGV msg
perhaps.
Jocke
From: U-Boot on
+Joe Hershberger
Jocke
On Wed, 2021-12-08 at 15:33 +0100, Joakim Tjernlund wrote:
> Commit "fw_setenv: lock the flash only if it was locked before"
> checks for Locked status with uninitialized erase data.
> Address by moving the test for MEMISLOCKED.
>
> Fixes: 8a726
On Fri, 2022-02-11 at 15:00 +0100, Joakim Tjernlund wrote:
> On Fri, 2022-02-11 at 01:26 +, Andre Przywara wrote:
> > On Fri, 11 Feb 2022 00:22:25 +
> > Joakim Tjernlund wrote:
> >
> > > On Thu, 2022-02-10 at 22:43 +, Andre Przywara wrote:
> > &g
32 bit user space with musl libc.
Since I boot/reset directly into u-boot I guess I have forgotten to configure
something.
Any ideas?
Jocke
On Thu, 2022-02-17 at 15:13 +, Andre Przywara wrote:
> On Fri, 11 Feb 2022 17:00:48 +
> Joakim Tjernlund wrote:
>
> Hi,
>
>
I can see CNTVCT_EL0 counting in u-boot and I can see the relative timestamp in
dmesg cont
but timeofday is not moving, very odd.
COUNTER_FREQUENCY is also there and correct.
Jocke
From: Andre Przywara
Sent: 17 March 2022 01:32
To: Joakim Tjernlund
Cc
On Thu, 2022-02-17 at 15:13 +, Andre Przywara wrote:
> On Fri, 11 Feb 2022 17:00:48 +
> Joakim Tjernlund wrote:
>
> Hi,
>
> > On Fri, 2022-02-11 at 15:00 +0100, Joakim Tjernlund wrote:
> > > On Fri, 2022-02-11 at 01:26 +, Andre Przywara wrote:
> &
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