With the boot0-hook inserting the additional padding to receive our
SPL magic, the SPL_TEXT_BASE can be aligned again.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
include/c
ed)
Kever Yang (3):
rockchip: boot0: align to 0x20 for armv7 '_start'
rockchip: mkimage: use spl_boot0 for all Rockchip SoCs
rockchip: rk3288: use aligned address for SPL_TEXT_BASE
Philipp Tomsich (15):
arm: boot0 hook: move boot0 hook before '_start'
rockchip: enable boot0-hook for al
gt; include/configs/rk3368_common.h | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
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> dchp should be dhcp. fixed copy-paste versions too.
>
> Signed-off-by: Klaus Goger <klaus.go...@theobroma-systems.com>
> ---
>
> include/configs/rockchip-common.h | 4 ++--
> include/configs/tinker_rk3288.h | 2 +-
> 2 files changed, 3 insertions(+), 3 deletio
gt; include/configs/rk3368_common.h | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
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> dchp should be dhcp. fixed copy-paste versions too.
>
> Signed-off-by: Klaus Goger <klaus.go...@theobroma-systems.com>
> ---
>
> include/configs/rockchip-common.h | 4 ++--
> include/configs/tinker_rk3288.h | 2 +-
> 2 files changed, 3 insertions(+), 3 dele
> dchp should be dhcp. fixed copy-paste versions too.
>
> Signed-off-by: Klaus Goger <klaus.go...@theobroma-systems.com>
> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
>
On Tue, 3 Oct 2017, Marty E. Plummer wrote:
From: "Marty E. Plummer"
I realize this patch is not up to standards for the sake of mainlining
right now, but I'm mostly interested in getting some feedback on how
to make it work before getting into the nicities of
> Assuming mac_clk is fed by an external clock, set clk_rmii_src
> clock select control register from IO for rgmii interface.
>
> Signed-off-by: David Wu <david...@rock-chips.com>
> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> ---
>
>
> If the mac clock if from the external IO, set clock rate with 0;
> If the mac clock if from the internal divider pll, set 50M for
> rmii mode and set 125M for rgmii.
>
> Signed-off-by: David Wu <david...@rock-chips.com>
> Acked-by: Philipp Tomsich <philipp.to
> Give the mac controller the correct tx-delay and rx-delay value
> for the rgmii mode transmission. If they are not matched, there
> would be Ethernet packets lost, the net feature may not work.
>
> Signed-off-by: David Wu <david...@rock-chips.com>
> Acked-by: Phili
> If the Ethernet address is not set, the network can't work,
> enable the random address config for default use.
>
> Signed-off-by: David Wu <david...@rock-chips.com>
> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> ---
>
> configs/
-by: David Wu <david...@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
drivers/net/gmac_rockchip.c | 144 +++-
1 file changed, 116 insertions(+), 28 deletions(-)
diff --git a/drivers/net/gmac_rockchip.c b
request the speed we expect from the external clk and not
just pass 0...
More below.
Signed-off-by: David Wu <david...@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
drivers/net/gmac_rockchip.c | 23 +++
1 file changed, 19 inse
On Wed, 27 Sep 2017, Kever Yang wrote:
RK3128 is a SoC from Rockchip with quad-core Cortex-A7 CPU
and mali400 GPU. Support Nand flash, eMMC, SD card, USB 2.0 host
and device, HDMI/LVDS/MIPI display.
Signed-off-by: Kever Yang
Requested changes below.
---
On Thu, 21 Sep 2017, David Wu wrote:
The rv1108 mac only support rmii interface, so need to add the
set_rmii() ops. Use the phy current interface to set rmii or
rgmii ops.
Signed-off-by: David Wu <david...@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-sy
On Wed, 27 Sep 2017, Kever Yang wrote:
RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width.
This patch is only used for U-Boot, but not for SPL which will
comes later, maybe after we merge all the common code into a common
file.
Signed-off-by: Kever Yang
; 1 file changed, 1 insertion(+)
>
Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
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; 1 file changed, 1 insertion(+)
>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
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> After the patch below, we need to add SPL_SYSRESET for do_reset()
> in SPL:
> 87c16d4 drivers: spl: consistently use the $(SPL_TPL_) macro
>
> Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
> ---
>
> arch/arm/Kconfig | 1 +
> 1 file changed, 1 insertion
> syscon id table need a dummy member as NULL ending, or else system
> will panic while try to match a compatible in this table as a list.
>
> Signed-off-by: Kever Yang
> ---
>
> arch/arm/mach-rockchip/rk3328/syscon_rk3328.c | 1 +
> 1 file changed, 1 insertion(+)
>
> After the patch below, we need to add SPL_SYSRESET for do_reset()
> in SPL:
> 87c16d4 drivers: spl: consistently use the $(SPL_TPL_) macro
>
> Signed-off-by: Kever Yang
> ---
>
> arch/arm/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
Applied to
> After the patch below, we need to add SPL_SYSRESET for do_reset()
> in SPL:
> 87c16d4 drivers: spl: consistently use the $(SPL_TPL_) macro
>
> Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
> ---
>
> arch/arm/Kconfig | 1 +
> 1 file changed, 1 inse
plan to keep the RK3399 changes
as a separate series (to be applied on top of this one).
Changes in v2:
- implements the dev_read_addr_ptr() function
- use the new dev_read_addr_ptr() function
- improve error handling, in case dev_read_addr_ptr returns NULL
Philipp Tomsich (19):
bootstage
-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
Changes in v2: None
common/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common
Remove a comment claiming that this driver only supports the RK3288,
as we also use it on the RK3368, RK3399 and (most likely) on other
variants.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Phi
Update the Rockchip GPIO-bank driver to support a live tree.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Version-changes: 2
- use the
To support bootstage recording, we want to mark our DM timer as the
tick-timer; this triggers the support for 'trying harder' to read the
timer in the Rockchip DM timer driver, even if the device model isn't
ready yet.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.
Update the Rockchip SPI driver to support a live device tree.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
Changes in v2: None
driver
of the grf header from within a function)
- all #include statements for unused headers are removed
- the remaining #include statements are sorted (while keeping common.h
included in front)
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
arch/arm/mach-rockchip/rk3399
From: Klaus Goger <klaus.go...@theobroma-systems.com>
Add a section to the README on how to flash the on-board eMMC
with the rkdeveloptool.
Signed-off-by: Klaus Goger <klaus.go...@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
;
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
board/theobroma-systems/puma_rk3399/README | 51 +-
1 file changed, 43 insertions(+), 8 deletions(-)
diff --git a/board/theobroma-systems/puma_rk3399/README
b/board/theobroma-systems/puma_r
This updates dm_timer_init to support a live tree and deals with
some fallout (i.e. the need to restructure the code such, that we
don't need multiple discontinuous #if CONFIG_IS_ENABLED blocks).
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Gl
Update the Micrel KSZ90x1 driver for a live tree.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
Changes in v2: None
drivers/net/phy/micrel_ksz90x1.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/net/phy/micrel_ksz90x1.c b/d
-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
Changes in v2: None
drivers/timer/timer-uclass.c | 7 +++
1 file changed, 7 insertions(+)
di
Update the Designware Ethernet MAC driver to support a live device
tree.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
Changes in v2: None
drivers/net/designware.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drive
through the full U-Boot.
- This adds support for reading the timer even before the
device-model is ready: we find the timer via /chosen/tick-timer,
then read its address and clock-frequency, and finally read the
timeval directly).
Signed-off-by: Philipp Tomsich <philipp.toms...@theobr
Update the Rockchip-specific wrapper for the Designware driver to
support a live device tree.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Remove header file includes that have been left over after the
conversion to livetree-support.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Update the clock driver for the RK3368 to support a live device tree.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Versio
Update the Rockchip I2C driver to support livetree.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Version-changes: 2
- use the dev_read
Update the pinctrl driver for the RK3368 to support a live device tree.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
Changes in v2: None
Instead of directly calling into the back-to-bootrom code, the RK3399
common SPL implementation now uses BOOT_DEVICE_BOOTROM to trigger a
transfer back into the bootrom.
With this factored out, the spl_board_init function can not be
customised for each RK3399 board.
Signed-off-by: Philipp
Update the Rockchip timer driver to support a live device tree.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
Changes in
The dev_read_addr_ptr() mimics the behaviour of the devfdt_get_addr_ptr(),
retrieving the first address of the node's reg-property and returning
it as a pointer (or NULL on failure).
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Acked-by: Philipp Tomsich <phi
This adds OF_LIVE and BOOTSTAGE support for the RK3368-uQ7 and
regenerates the defconfig (picking up a few changes/reorderings) from
upstream Kconfig changes.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked
Update the Rockchip SDHCI wrapper to support a live device tree.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Reviewed-by: Simon Glass <s...@chromium.org>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
Version-changes: 2
- use the
a hook to the
spl_board_init() to ensure that the regulator gets probed and enabled.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
arch/arm/dts/rk3399-puma.dtsi | 23 +++
board/theobroma-systems/puma_rk3399/puma-rk3399.
The RK3399-Q7 requires DM regulator support in SPL, so we can use the
regulator framework to reenable the eMMC and SPI, if these had been
turned of by the BIOS_DISABLE signal.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
configs/puma-rk3399_defconfig | 7
the 'same-as-spl' specifier and calling
into the per-SoC/per-board support code.
This also updates the documentation for the 'u-boot,spl-boot-order'
property.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
arch/arm/mach-rockchip/spl-boot-order.
In the expectation that the spl-boot-order code will eventually
gain use outside of mach-rockchip: let's add documentation on the
spl_node_to_boot_device() function, which is likely to become a
publicly exported function.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.
The Rockchip BROM allows reading where it booted from from SRAM.
This adds the necessary definitions (as received from Kever) for
the location of this information in the RK3399's SRAM and naming
for the constants used.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.
.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
board/theobroma-systems/puma_rk3399/puma-rk3399.c | 36 +++
1 file changed, 4 insertions(+), 32 deletions(-)
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
b/board/theobroma-s
To support the new "same-as-spl" specifier in the boot-order on the
RK3399, this implements the chip-specific mapping from the information
obtainable from the BROM to a OF path name.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
arch/arm/mach-rockc
The Makefile already tests for SPL_DM_REGULATOR_FIXED, but Kconfig
does not provide it. This adds SPL_DM_REGULATOR_FIXED to Kconfig.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
drivers/power/regulator/Kconfig | 7 +++
1 file changed, 7 insertions(+)
for powering up the eMMC and SPI flashes
* adds support for the 'same-as-spl' specifier for the boot order (incl.
updating the documentation for this
Philipp Tomsich (10):
rockchip: rk3399: make spl_board_init board-specific
rockchip: bootrom: add definitions to retrieve BROM boot-source
these files, we also sort the #include directives
and drop the inclusion of unneeded files.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
arch/arm/mach-rockchip/rk3399-board-spl.c | 27 ---
board/rockchip/evb_rk3399/evb-rk3399.c
In the general case, we want to continue booting the full U-Boot
(contained in a discoverable FIT image) from the same device the SPL
stage was loaded from. This prepends the 'same-as-spl' specifier to
our configurable boot-order to make this the default behaviour.
Signed-off-by: Philipp Tomsich
Kever,
What is the status on this patch (and the encapsulating series)?
This seems to be stuck in 'changes requested' for about a year now...
Thanks,
Philipp.
On Thu, 1 Sep 2016, Kever Yang wrote:
The dwc3 controller is using 8 bit UTMI+ interface for USB2.0 PHY,
add one variable in
clk_enable for the RK3399 and supports the
clocks mandatory for the EHCI controllers; as these are enabled by
default we simply return success.
Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
drivers/clk/rockchip/clk_rk3399.c | 15 +++
1 file changed, 15 inse
Kever,
On Thu, 27 Jul 2017, Kever Yang wrote:
The emmc number is 0, correct it for fastboot parameter.
Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
---
include/configs/rk3288_common.h | 2 +-
1 fil
> The hw can read up to 32 bytes at a time. If we need
> more than one chunk, we have to enter the plain RX mode.
>
> Signed-off-by: Wadim Egorov <w.ego...@phytec.de>
> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Philipp Toms
> enable the ATF option and SDCard in defconfig.
>
> Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> ---
>
OT_DRIVER name to read 'rockchip_rk3368_timer'
> (as originally intended).
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reported-by: Artturi Alm <artturi@gmail.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> ---
>
> drivers/ti
> The hw can read up to 32 bytes at a time. If we need
> more than one chunk, we have to enter the plain RX mode.
>
> Signed-off-by: Wadim Egorov <w.ego...@phytec.de>
> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> ---
> drivers/i2c/rk_i2
8 +
> drivers/usb/gadget/Makefile| 1 +
> drivers/usb/gadget/f_rockusb.c | 691
> +
> 4 files changed, 832 insertions(+)
> create mode 100644 arch/arm/include/asm/arch-rockchip/f_rockusb.h
> create mode 100644 drivers/usb/gadget/f_rockusb
> From: Jagan Teki <ja...@amarulasolutions.com>
>
> Add Falcon mode support in vyasa rk3288 board.
>
> Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> ---
> boar
drivers/ram/rockchip/Makefile | 1 +
> {arch/arm/mach-rockchip/rk3399 => drivers/ram/rockchip}/sdram_rk3399.c | 0
> 3 files changed, 1 insertion(+), 1 deletion(-)
> rename {arch/arm/mach-rockchip/rk3399 =>
> drivers/ram/rockchip}/sdram_rk3399.c (100%)
>
Revi
> From: Jagan Teki <ja...@amarulasolutions.com>
>
> Falcon mode, is updating DDR dt node configuration through
> spl_fixup_fdt() so add appropriate DDR base and size through
> dram_init_banksize.
>
> Signed-off-by: Jagan Teki <ja...@amarulasolutions.com&g
drivers/ram/rockchip/Makefile | 1 +
> {arch/arm/mach-rockchip/rk3188 => drivers/ram/rockchip}/sdram_rk3188.c | 0
> 3 files changed, 1 insertion(+), 1 deletion(-)
> rename {arch/arm/mach-rockchip/rk3188 =>
> drivers/ram/rockchip}/sdram_rk3188.c (100%)
>
A
drivers/ram/rockchip/Makefile | 1 +
> {arch/arm/mach-rockchip/rk3188 => drivers/ram/rockchip}/sdram_rk3188.c | 0
> 3 files changed, 1 insertion(+), 1 deletion(-)
> rename {arch/arm/mach-rockchip/rk3188 =>
> drivers/ram/rockchip}/sdram_rk3188.c (100%)
>
Revi
drivers/ram/rockchip/Makefile | 1 +
> {arch/arm/mach-rockchip/rk3288 => drivers/ram/rockchip}/sdram_rk3288.c | 0
> 3 files changed, 1 insertion(+), 1 deletion(-)
> rename {arch/arm/mach-rockchip/rk3288 =>
> drivers/ram/rockchip}/sdram_rk3288.c (100%)
>
A
Err: serial@ff69
> Model: Amarula Vyasa-RK3288
> Net: Net Initialization Skipped
> No ethernet found.
> Hit any key to stop autoboot: 0
> =>
>
> Reviewed-by: Simon Glass <s...@chromium.org>
> Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
drivers/ram/rockchip/Makefile | 1 +
> {arch/arm/mach-rockchip/rk3399 => drivers/ram/rockchip}/sdram_rk3399.c | 0
> 3 files changed, 1 insertion(+), 1 deletion(-)
> rename {arch/arm/mach-rockchip/rk3399 =>
> drivers/ram/rockchip}/sdram_rk3399.c (100%)
>
A
drivers/ram/rockchip/Makefile | 1 +
> {arch/arm/mach-rockchip/rk3328 => drivers/ram/rockchip}/sdram_rk3328.c | 0
> 3 files changed, 1 insertion(+), 1 deletion(-)
> rename {arch/arm/mach-rockchip/rk3328 =>
> drivers/ram/rockchip}/sdram_rk3328.c (100%)
>
Revi
drivers/ram/rockchip/Makefile | 1 +
> {arch/arm/mach-rockchip/rk3328 => drivers/ram/rockchip}/sdram_rk3328.c | 0
> 3 files changed, 1 insertion(+), 1 deletion(-)
> rename {arch/arm/mach-rockchip/rk3328 =>
> drivers/ram/rockchip}/sdram_rk3328.c (100%)
>
A
drivers/ram/rockchip/Makefile | 1 +
> {arch/arm/mach-rockchip/rk3288 => drivers/ram/rockchip}/sdram_rk3288.c | 0
> 3 files changed, 1 insertion(+), 1 deletion(-)
> rename {arch/arm/mach-rockchip/rk3288 =>
> drivers/ram/rockchip}/sdram_rk3288.c (100%)
>
Revi
> With the critical drivers ready for switching to a live tree, we can
> not enable it in the defconfig for the RK3399-Q7.
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> ---
>
> conf
> With the dev_read_addr_ptr function available, we can change the
> efuse driver to use it (and eliminate the explicit type-cast).
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> ---
>
t; This implements a minimal clk_enable for the RK3399 and supports the
> clocks mandatory for the EHCI controllers; as these are enabled by
> default we simply return success.
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <
;
> References: 26a8b80 "usb: host: xhci-rockchip: use fixed regulator to control
> vbus"
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> ---
>
> arch/arm/dts/rk3399-puma.dts
> Update the clock driver for the RK3399 to support a live device tree.
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> ---
>
> drivers/clk/rockchip/clk_rk3399.c | 4 ++--
> 1 file c
> Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS
>
> Signed-off-by: Andy Yan <andy@rock-chips.com>
> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> ---
>
> include/configs/rk3368_common.h | 1 +
> 1 file changed,
Err: serial@ff69
> Model: Amarula Vyasa-RK3288
> Net: Net Initialization Skipped
> No ethernet found.
> Hit any key to stop autoboot: 0
> =>
>
> Reviewed-by: Simon Glass <s...@chromium.org>
> Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
> Re
> Remove a comment claiming that this driver only supports the RK3288,
> as we also use it on the RK3368, RK3399 and (most likely) on other
> variants.
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromi
> Update the Rockchip SPI driver to support a live device tree.
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> Reviewed-by: Jagan Teki <ja...@openedev.com>
> Acked-by: Philip
> This adds OF_LIVE and BOOTSTAGE support for the RK3368-uQ7 and
> regenerates the defconfig (picking up a few changes/reorderings) from
> upstream Kconfig changes.
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <
> Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS
>
> Signed-off-by: Andy Yan <andy@rock-chips.com>
> ---
>
> include/configs/rk3368_common.h | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Philipp Tomsich <phil
> This updates dm_timer_init to support a live tree and deals with
> some fallout (i.e. the need to restructure the code such, that we
> don't need multiple discontinuous #if CONFIG_IS_ENABLED blocks).
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> To support bootstage recording, we want to mark our DM timer as the
> tick-timer; this triggers the support for 'trying harder' to read the
> timer in the Rockchip DM timer driver, even if the device model isn't
> ready yet.
>
> Signed-off-by: Philipp Tomsich <phil
> Add the missing target and pinctrl config for rk3368 sheep board
>
> Signed-off-by: Andy Yan <andy@rock-chips.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> ---
>
> configs/sheep-rk3368_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> Update the Rockchip SDHCI wrapper to support a live device tree.
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Update the Rockchip I2C driver to support livetree.
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Ac
> Update the Rockchip-specific wrapper for the Designware driver to
> support a live device tree.
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> Acked-by: Philipp Tomsich <phil
le for bootstage.o
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> ---
>
> Changes in v3: None
> Changes in v2: None
> Add a section to the README on how to flash the on-board eMMC
> with the rkdeveloptool.
>
> Signed-off-by: Klaus Goger <klaus.go...@theobroma-systems.com>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Philipp Toms
> Update the clock driver for the RK3368 to support a live device tree.
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Puma supports other boot sources then SD-Card. Update README to include
> the required steps.
>
> * how to package a SPI-NOR SPL
> * how to flash eMMC with rkdeveloptool
>
> Signed-off-by: Klaus Goger <klaus.go...@theobroma-systems.com>
> Signed-off-by:
> The dev_read_addr_ptr() mimics the behaviour of the devfdt_get_addr_ptr(),
> retrieving the first address of the node's reg-property and returning
> it as a pointer (or NULL on failure).
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> A
> Remove header file includes that have been left over after the
> conversion to livetree-support.
>
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> Reviewed-by: Simon Glass <s...@chromium.org>
> Acked-by: Philipp Tomsich <phil
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