Hi Alex,
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Saturday, October 15, 2016 3:33 PM
> To: u-boot@lists.denx.de
> Cc: york sun <york@nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushw...@nxp.com>
> Subject: [PATCH v5
a.masah...@socionext.com; Ruchika Gupta <ruchika.gu...@nxp.com>;
> eddy.petri...@gmail.com; s.temerkha...@gmail.com; Prabhakar Kushwaha
> <prabhakar.kushw...@nxp.com>; s...@denx.de; van.free...@gmail.com;
> fgret...@spaceteq.co.za; rpj...@crashcourse.ca; tr...@konsulko.com; Min
> -Original Message-
> From: Z.Q. Hou
> Sent: Saturday, October 08, 2016 8:23 AM
> To: york sun <york@nxp.com>; u-boot@lists.denx.de;
> albert.u.b...@aribaud.net; Mingkai Hu <mingkai...@nxp.com>; Prabhakar
> Kushwaha <prabhakar.kushw...@nxp.co
lbc_clk is used to fixup dts as "bus frequency".
It is not being used by Linux IFC and eLBC driver.
So remove unused "bus frqeuency" fix-up of devicre tree.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
arch/powerpc/cpu/mpc85xx/fdt.c | 4
arch
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of York Sun
> Sent: Thursday, September 22, 2016 4:21 AM
> To: tr...@konsulko.com
> Cc: u-boot@lists.denx.de
> Subject: [U-Boot] [RFC Patch 2/5] driver: ddr: fsl_mmdc: Pass board parameters
> through data
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of York Sun
> Sent: Thursday, September 22, 2016 4:21 AM
> To: tr...@konsulko.com
> Cc: u-boot@lists.denx.de
> Subject: [U-Boot] [RFC Patch 0/5] Resolve conflict for merging
>
> Tom,
>
> I made these
Hi Scott,
Sorry for late reply on this thread
> -Original Message-
> From: Scott Wood
> Sent: Friday, September 09, 2016 7:30 AM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; york sun
> <york@nxp.com>; u-boot@lists.denx.de
> Subject: Re: [PATCH
> -Original Message-
> From: Z.Q. Hou
> Sent: Wednesday, September 14, 2016 8:16 AM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
> b...@lists.denx.de; albert.u.b...@aribaud.net; york sun <york@nxp.com>;
> Vincent Hu <mingkai...@nxp.
> -Original Message-
> From: Zhiqiang Hou [mailto:zhiqiang@nxp.com]
> Sent: Monday, September 12, 2016 9:39 AM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; york sun
> <york@nxp.com>; Vincent Hu <mingkai...@nxp.com>; Prabhakar
> Kushwa
> -Original Message-
> From: Z.Q. Hou
> Sent: Tuesday, September 13, 2016 2:39 PM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
> b...@lists.denx.de; albert.u.b...@aribaud.net; york sun <york@nxp.com>;
> Vincent Hu <mingkai...@nxp.
> -Original Message-
> From: Zhiqiang Hou [mailto:zhiqiang@nxp.com]
> Sent: Monday, September 12, 2016 9:39 AM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; york sun
> <york@nxp.com>; Vincent Hu <mingkai...@nxp.com>; Prabhakar
> Kushwa
> -Original Message-
> From: Scott Wood
> Sent: Friday, September 09, 2016 7:30 AM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; york sun
> <york@nxp.com>; u-boot@lists.denx.de
> Subject: Re: [PATCH] arch: ifc: update the IFC IP input clo
> -Original Message-
> From: Scott Wood
> Sent: Friday, September 09, 2016 6:05 AM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; york sun
> <york@nxp.com>; u-boot@lists.denx.de
> Subject: Re: [PATCH] arch: ifc: update the IFC IP input clo
Hi York,
> -Original Message-
> From: york sun
> Sent: Thursday, September 08, 2016 10:51 PM
> To: Q.Y. Gong <qianyu.g...@nxp.com>; u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; Vincent Hu
> <mingkai...@nxp.com>; S.H.
> -Original Message-
> From: york sun
> Sent: Thursday, September 08, 2016 9:22 PM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
> b...@lists.denx.de; Scott Wood <scott.w...@nxp.com>
> Subject: Re: [PATCH] arch: ifc: update the IFC IP input clo
> -Original Message-
> From: york sun
> Sent: Thursday, September 08, 2016 7:33 AM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
> b...@lists.denx.de
> Subject: Re: [PATCH] arch: ifc: update the IFC IP input clock
>
> On 09/07/2016 06:3
> -Original Message-
> From: york sun
> Sent: Wednesday, September 07, 2016 9:17 PM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
> b...@lists.denx.de
> Subject: Re: [PATCH] arch: ifc: update the IFC IP input clock
>
> On 09/06/2016 07:4
tember 08, 2016 8:04 AM
> To: york sun <york@nxp.com>; u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; Vincent Hu
> <mingkai...@nxp.com>
> Subject: RE: [PATCH] armv8: ls1043a: Extend the size for SPL
>
> Hi York,
>
> >
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Matt Weber
> Sent: Wednesday, September 07, 2016 9:12 PM
> To: u-boot@lists.denx.de
> Cc: scottw...@freescale.com; york...@freescale.com; Ronak Desai
>
> Subject:
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.
So update IFC IP clock to be defined as per predefined clock
divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha
eLBC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock ratio register (LCRR) used in
current implementation governs eLBC IP output clock.
So update eLBC IP clock to be defined as per predefined clock
divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.
So update IFC IP clock to be defined as per predefined clock
divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Zhao Qiang
> Sent: Wednesday, September 07, 2016 7:05 AM
> To: york sun
> Cc: u-boot@lists.denx.de; X.B. Xie
> Subject: [U-Boot] [PATCH v3 1/2] Txxx/RCW: Split
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Zhao Qiang
> Sent: Wednesday, September 07, 2016 7:05 AM
> To: york sun
> Cc: u-boot@lists.denx.de; X.B. Xie
> Subject: [U-Boot] [PATCH v3 2/2] pbl: use "wait"
> -Original Message-
> From: york sun
> Sent: Tuesday, September 06, 2016 9:10 PM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
> b...@lists.denx.de
> Subject: Re: [PATCH] arch: ifc: update the IFC IP input clock
>
> On 09/06/2016 04:15 AM, Pra
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock Control register (CCR) used in
current implementation governs IFC IP output clock.
So update IFC IP clock to be defined as per predefined clock
divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha
> -Original Message-
> From: Gong Qianyu [mailto:qianyu.g...@nxp.com]
> Sent: Friday, August 26, 2016 6:29 AM
> To: u-boot@lists.denx.de; york sun <york@nxp.com>
> Cc: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; Mingkai Hu
> <mingkai...@nxp.com&g
> -Original Message-
> From: Gong Qianyu [mailto:qianyu.g...@nxp.com]
> Sent: Friday, August 26, 2016 6:29 AM
> To: u-boot@lists.denx.de; york sun <york@nxp.com>
> Cc: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; Mingkai Hu
> <mingkai...@nxp.com&g
ly 21, 2016 2:45 AM
> To: Zhiqiang Hou <zhiqiang@nxp.com>; u-boot@lists.denx.de;
> albert.u.b...@aribaud.net; w...@denx.de; Prabhakar Kushwaha
> <prabhakar.kushw...@nxp.com>; alison.w...@freescale.com;
> mingkai...@freescale.com
> Cc: yao.y...@freescale.com; qianyu.g...@free
> -Original Message-
> From: Zhiqiang Hou [mailto:zhiqiang@nxp.com]
> Sent: Monday, July 04, 2016 11:58 AM
> To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; york sun
> <york@nxp.com>; w...@denx.de; Prabhakar Kushwaha
> <prabhakar.kushw...@nxp.com&
ed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
include/fsl_mmdc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/fsl_mmdc.h b/include/fsl_mmdc.h
index 833696b..a939d89 100644
--- a/include/fsl_mmdc.h
+++ b/include/fsl_mmdc.h
@@ -43,7 +43,7 @
Enable DDR row-bank-column decoding to decode DDR address as
row-bank-column instead of bank-row-column for improving
performance of serial data transfers.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
qixis_reset altbank usagge ~QIXIS_LBMAP_MASK in code. So define
inverse value QIXIS_LBMAP_MASK.
Also, update QIXIS_RST_CTL_RESET value to keep RST_CTL[REQ_MOD]
as 0b11 i.e. PORESET during qixis_reset
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
include/configs/ls1012
LS1012AFRDM has 512MB of DDR.
So update Kernel load address as 0x9600 instead of default
0xa000.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
include/configs/ls1012afrdm.h | 16
1 file changed, 16 insertions(+)
diff --git a/include/c
hengzhou Liu <shengzhou@nxp.com>
> Cc: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
> b...@lists.denx.de
> Subject: Please investigate T2080QDS U-Boot
>
> Shengzhou,
>
> Can you investigate this message on T2080QDS (see log below)? Looks like
> some issu
Dear Sumit,
> -Original Message-
> From: Sumit Garg [mailto:sumit.g...@nxp.com]
> Sent: Thursday, July 14, 2016 9:58 PM
> To: u-boot@lists.denx.de
> Cc: york sun <york@nxp.com>; Ruchika Gupta <ruchika.gu...@nxp.com>;
> Prabhakar Kushwaha <prabhakar.k
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Yunhui Cui
> Sent: Tuesday, July 12, 2016 8:20 AM
> To: york sun
> Cc: Yunhui Cui ; u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH v3] driver: spi: fsl-qspi:
> -Original Message-
> From: Edward L Swarthout
> Sent: Saturday, July 02, 2016 3:14 AM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; york sun
> <york@nxp.com>; Qianyu Gong <qianyu.g...@nxp.com>;
> albert.u.b...@aribaud.net; u-boot@list
> -Original Message-
> From: Gong Qianyu [mailto:qianyu.g...@nxp.com]
> Sent: Friday, July 01, 2016 4:19 PM
> To: york sun <york@nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushw...@nxp.com>; u-boot@lists.denx.de
> Cc: Mingkai Hu <mingkai...@n
Hi York,
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of york sun
> Sent: Thursday, June 30, 2016 10:32 PM
> To: Qianyu Gong ; albert.u.b...@aribaud.net; u-
> b...@lists.denx.de; s.temerkha...@gmail.com;
>
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Gong
> Qianyu
> Sent: Thursday, June 30, 2016 3:31 PM
> To: york sun ; u-boot@lists.denx.de
> Cc: Zhiqiang Hou ; Huan Wang
> ; Wenbin Song
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Gong
> Qianyu
> Sent: Thursday, June 30, 2016 3:31 PM
> To: york sun ; u-boot@lists.denx.de
> Cc: Zhiqiang Hou ; Wenbin Song
> ; Mingkai Hu
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Gong
> Qianyu
> Sent: Thursday, June 30, 2016 3:31 PM
> To: york sun ; u-boot@lists.denx.de
> Cc: Mihai Bantea ; Zhiqiang Hou
> ;
Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs.
like LS2080A, LS1043A, LS1012A.
So append "A" at the last of SoCs.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com
From: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Freescale ARMv8 SoC name ends with "a" to represent ARM SoCs.
like LS2080A, LS1043A, LS1012A.
So append "a" at the last of SoCs.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.
From: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs.
like LS2080A, LS1043A, LS1012A.
So Add append "A" at the last of SoCs.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Thursday, June 23, 2016 6:10 PM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
> Cc: u-boot@lists.denx.de; york sun <york@nxp.com>
> Subject: Re: [PATCH v4 0/9] LS208
Hi Alex,
Please find logs attached.
Regards,
Prabhakar
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Thursday, June 23, 2016 1:04 PM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
> Cc: u-boot@lists.denx.de; york sun <york...
Hi Alex,
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Tuesday, June 21, 2016 4:37 AM
> To: u-boot@lists.denx.de
> Cc: york sun <york@nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushw...@nxp.com>
> Subject: [PATCH v4 0/9] LS
Hi Alex
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Tuesday, June 21, 2016 4:37 AM
> To: u-boot@lists.denx.de
> Cc: york sun <york@nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushw...@nxp.com>
> Subject: [PATCH v4 4/9] l
Hi Alex,
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Tuesday, June 21, 2016 4:37 AM
> To: u-boot@lists.denx.de
> Cc: york sun <york@nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushw...@nxp.com>
> Subject: [PATCH v4 5/9] ar
Hi Alex
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Tuesday, June 21, 2016 4:37 AM
> To: u-boot@lists.denx.de
> Cc: york sun <york@nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushw...@nxp.com>
> Subject: [PATCH v4 2/9] efi_
Hi Alex,
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Tuesday, June 21, 2016 4:37 AM
> To: u-boot@lists.denx.de
> Cc: york sun <york@nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushw...@nxp.com>
> Subject: [PATCH v4 3/
Hi Alex,
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Friday, May 27, 2016 7:58 PM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
> b...@lists.denx.de
> Cc: york sun <york@nxp.com>
> Subject: Re: [U-Boot] [
ports.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Incorporated York's comme
-off-by: Shengzhou Liu <shengzhou@nxp.com>
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v4: New patch in this
.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2:
- Add
From: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Check if qixis supports memory-mapped read/write
before compiling IFC based qixis read/write functions.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Signed
SoC overviews are getting repeated across board folders.
So, Organize SoC overview at common location i.e. fsl-layerscape/doc
Also move README.lsch2 and README.lsch3 in same folder.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v3: New patch in the list
C
gt;
Signed-off-by: Makarand Pawagi <makarand.paw...@mindspeed.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Incorporated York's comments
- Placed SoC overview in README.soc
Changes for v4
-
nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Chages for v2: New patch in this patch-set
Chages for v3: Sending as it is
Chages for v4: Sending as it is
Chages for v5: Sending as it is
board/freescale/common/qixis.c | 11 +--
1 file changed, 9 in
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c: In function
‘get_sys_info’:
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c:29:6: warning:
unused variable ‘rcw_tmp’ [-Wunused-variable]
u32 rcw_tmp;
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes
Hu <mingkai...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
Changes for v4: Sending as it is
Changes for v5: Sending as it is
drivers/mtd/spi/sf_params.c | 1 +
drivers/mtd/spi/spi_flash.c | 5 +
Other than LS1043A, LS1012A also Chassis Gen2 Architecture compliant.
So Avoid LS1043A specific defines in arch/arm
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
Changes for v4: Sending as it is
Changes
from Edward L Swarthou, Alex
- Removed DDR init magic numbers
Changes for v5: Updated DDR init defines as macro
Abhimanyu Saini (2):
board: freescale: common: Conditionally compile IFC QXIS func
board: freescale: common: Add flag for LBMAP brdcfg reg offset
Prabhakar Kushwaha (9
It is not mandatory for Layerscape SoCs to have SMMU. SoCs like
LS1012A are layerscape SoC without SMMU IP.
So put SMMU configuration code under SMMU_BASE.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
C
From: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Check if qixis supports memory-mapped read/write
before compiling IFC based qixis read/write functions.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Signed
ports.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Incorporated York's comme
nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Chages for v2: New patch in this patch-set
Chages for v3: Sending as it is
Chages for v4: Sending as it is
board/freescale/common/qixis.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff
-off-by: Shengzhou Liu <shengzhou@nxp.com>
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v4: New patch in t
.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2:
- Add
SoC overviews are getting repeated across board folders.
So, Organize SoC overview at common location i.e. fsl-layerscape/doc
Also move README.lsch2 and README.lsch3 in same folder.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v3: New patch in the list
C
gt;
Signed-off-by: Makarand Pawagi <makarand.paw...@mindspeed.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Incorporated York's comments
- Placed SoC overview in README.soc
Changes for v4
-
Hu <mingkai...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
Changes for v4: Sending as it is
drivers/mtd/spi/sf_params.c | 1 +
drivers/mtd/spi/spi_flash.c | 5 +++--
2 files changed, 4 in
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c: In function
‘get_sys_info’:
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c:29:6: warning:
unused variable ‘rcw_tmp’ [-Wunused-variable]
u32 rcw_tmp;
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes
It is not mandatory for Layerscape SoCs to have SMMU. SoCs like
LS1012A are layerscape SoC without SMMU IP.
So put SMMU configuration code under SMMU_BASE.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
C
from Edward L Swarthou, Alex
- Removed DDR init magic numbers
Abhimanyu Saini (2):
board: freescale: common: Conditionally compile IFC QXIS func
board: freescale: common: Add flag for LBMAP brdcfg reg offset
Prabhakar Kushwaha (9):
armv8: fsl-layerscape: Put SMMU config code
Other than LS1043A, LS1012A also Chassis Gen2 Architecture compliant.
So Avoid LS1043A specific defines in arch/arm
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
Changes for v4: Sending as it is
arch/a
Hi Robert,
I was trying Linux boot on LS2080ARDB platform(ls2080ardb_defconfig) with top
commit i.e. "e4a94ce4ac77396b181663c0493c50bc2d5b9143 ".
I am seeing below crash while trying to mount root file system.
[2.844331] NET: Registered protocol family 17
[2.848787] NET: Registered
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Saturday, May 14, 2016 11:44 PM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
> b...@lists.denx.de
> Cc: Pratiyush Srivastava <pratiyush.srivast...@nxp.com>
> Subje
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Friday, May 27, 2016 9:33 PM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
> b...@lists.denx.de
> Cc: Calvin Johnson <calvin.john...@nxp.com>; Pratiyush Srivastava
&
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of
> Alexander Graf
> Sent: Friday, May 13, 2016 5:52 PM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH 1/5] ls2080: Exit dpaa only right before exiting U-
> Boot
>
> On ls2080 we have a separate
Hi Alex,
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of
> Alexander Graf
> Sent: Friday, May 13, 2016 5:52 PM
> To: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH 2/5] ls2080: Disable dcache during ddr init
>
> While trying something completely
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Wednesday, May 18, 2016 2:03 AM
> To: Edward L Swarthout <ed.swarth...@nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushw...@nxp.com>
> Cc: u-boot@lists.denx.de
> Subject: Re: [u-boot
From: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Check if qixis supports memory-mapped read/write
before compiling IFC based qixis read/write functions.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Signed
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c: In function
‘get_sys_info’:
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c:29:6: warning:
unused variable ‘rcw_tmp’ [-Wunused-variable]
u32 rcw_tmp;
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes
ports.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Incorporated York's comments
nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Chages for v2: New patch in this patch-set
Chages for v3: Sending as it is
board/freescale/common/qixis.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/board/freescale/common/q
.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2:
- Add
gt;
Signed-off-by: Makarand Pawagi <makarand.paw...@mindspeed.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Incorporated York's comments
- Placed SoC overview in README.soc
arch/arm/cpu/armv8/fsl-layerscape
It is not mandatory for Layerscape SoCs to have SMMU. SoCs like
LS1012A are layerscape SoC without SMMU IP.
So put SMMU configuration code under SMMU_BASE.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
Hu <mingkai...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
drivers/mtd/spi/sf_params.c | 1 +
drivers/mtd/spi/spi_flash.c | 5 +++--
2 files changed, 4 insertions(+), 2 deletions(-)
diff
SoC overviews are getting repeated across board folders.
So, Organize SoC overview at common location i.e. fsl-layerscape/doc
Also move README.lsch2 and README.lsch3 in same folder.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v3: New patch in th
Other than LS1043A, LS1012A also Chassis Gen2 Architecture compliant.
So Avoid LS1043A specific defines in arch/arm
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2: Sending as it is
Changes for v3: Sending as it is
arch/arm/cpu/armv8/fsl-layerscape
: Conditionally compile IFC QXIS func
board: freescale: common: Add flag for LBMAP brdcfg reg offset
Prabhakar Kushwaha (8):
armv8: fsl-layerscape: Put SMMU config code in SMMU_BASE
armv8: fsl-layerscape: Avoid LS1043A specifc defines
driver: mtd: spi: Adding support for QSPI flash
armv8: fsl
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Wednesday, May 11, 2016 9:30 PM
> To: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>; u-
> b...@lists.denx.de
> Cc: Calvin Johnson <calvin.john...@nxp.com>; Pratiyush Srivastava
&
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Thursday, May 12, 2016 3:37 AM
> To: york sun; Prabhakar Kushwaha; u-boot@lists.denx.de
> Cc: Pratiyush Srivastava; Abhimanyu Saini
> Subject: Re: [U-Boot] [PATCH 8/9][v2] armv8: ls1012a: Add suppo
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c: In function
‘get_sys_info’:
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c:29:6: warning:
unused variable ‘rcw_tmp’ [-Wunused-variable]
u32 rcw_tmp;
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes
.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivast...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2:
- Add
From: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Check if qixis supports memory-mapped read/write
before compiling IFC based qixis read/write functions.
Signed-off-by: Calvin Johnson <calvin.john...@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.sa...@nxp.com>
Signed
401 - 500 of 1123 matches
Mail list logo