064000 {
> compatible = "snps,dw-apb-uart";
> reg = <0x20064000 0x400>;
> interrupts = ;
> reg-shift = <2>;
> reg-io-width = <1>;
> clock-names = "baudclk", &q
ra
> ---
> board/sunxi/board.c | 4
> 1 file changed, 4 deletions(-)
Reviewed-by: Samuel Holland
Tested-by: Samuel Holland
rtions(+), 12 deletions(-)
Reviewed-by: Samuel Holland
Tested-by: Samuel Holland
able CONFIG_SYS_ARCH_TIMER on sunxi SoCs where it is available. And
making this generic could eventually remove the need for the version in
arch/arm/cpu/armv7/nonsec_virt.S. But this patch is still an improvement
as-is.
Tested-by: Samuel Holland
> +obj-y+= arch_timer.o
> +endif
>
Hi Andre,
On 12/5/22 18:45, Andre Przywara wrote:
> The CONFIG_SATAPWR Kconfig symbol was used to point to a GPIO that
> enables the power for a SATA harddisk.
> In the DT this is described with the target-supply property in the AHCI
> DT node, pointing to a (GPIO controlled) regulator. Since we
Hi Andre,
Thanks for this cleanup! With the two issues below addressed, it looks
good to me.
On 12/5/22 18:45, Andre Przywara wrote:
> The CONFIG_MACPWR Kconfig symbol is used to point to a GPIO that enables
> the power for the Ethernet "MAC" (mostly PHY, really).
> In the DT this is described
Hi Simon,
On 11/7/22 17:35, Simon Glass wrote:
> Hi Samuel,
>
> On Mon, 31 Oct 2022 at 13:27, Simon Glass wrote:
>>
>> On Sun, 30 Oct 2022 at 21:41, Samuel Holland wrote:
>>>
>>> reg must contain enough cells for the entire next address/size pair
>>
P2WI and RSB are used to communicate with a PMIC. Most SoCs have only
one possible pinmux. F1C100s has two possibilities, with different mux
values, so omit it until some board needs one of them.
Signed-off-by: Samuel Holland
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 7 +++
1 file
P2WI and RSB are used to communicate with a PMIC. Most SoCs have only
one possible pinmux. F1C100s has two possibilities, with different mux
values, so omit it until some board needs one of them.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Fix pin list comment for A80 entry
drivers
in the legacy clock/reset bindings is the register bit
offset, so the drivers are trivial. Only the outer PRCM node has a reg
property, so the clock/reset drivers use the parent device's MMIO base.
Signed-off-by: Samuel Holland
---
I didn't reuse the sunxi gate/reset ops, because the driver
If the UART bus or baud clock has a gate, it must be enabled before the
UART can be used.
Signed-off-by: Samuel Holland
---
drivers/serial/ns16550.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 7592979cab5..785fb520062
The HDMI PHY depends on the HVCC supply being enabled. So far we have
relied on it being enabled by an earlier firmware stage (SPL or TF-A).
Attempt to enable the regulator here, so we can remove that dependency.
Signed-off-by: Samuel Holland
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 6
-by: Samuel Holland
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 26 --
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c
b/drivers/video/sunxi/sunxi_dw_hdmi.c
index 4f5d0989286..04588b570fd 100644
--- a/drivers/video/sunxi
This allows devm_reset_control_get(dev, NULL) to work and get the first
reset control, which is common in code ported from Linux.
Signed-off-by: Samuel Holland
---
drivers/reset/reset-uclass.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/reset/reset-uclass.c
This allows devm_clock_get(dev, NULL) to work and get the first clock,
which is common in code ported from Linux.
Signed-off-by: Samuel Holland
---
drivers/clk/clk-uclass.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk
Add clock/reset definitions for display-related peripherals, including
the display engine, TCONs, and DSI and HDMI encoders, so those drivers
can be converted to DM clock consumers instead of directly manipulating
the CCU registers.
Signed-off-by: Samuel Holland
---
drivers/clk/sunxi/clk_a64.c
From: Jernej Skrabec
Currently HDMI controller MMIO address is hardcoded. Change that so
address is read from DT node. That will make adding support for new
variants a bit easier.
Signed-off-by: Jernej Skrabec
Signed-off-by: Samuel Holland
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 39
):
video: sunxi: dw-hdmi: Probe driver by compatible
video: sunxi: dw-hdmi: Read address from DT node
Samuel Holland (3):
clk: sunxi: Add DE2 display-related clocks/resets
video: sunxi: dw-hdmi: Use DM for clock gates and resets
video: sunxi: dw-hdmi: Use DM for HVCC regulator
drivers
Skrabec
Signed-off-by: Samuel Holland
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c
b/drivers/video/sunxi/sunxi_dw_hdmi.c
index 19ed80b48a4..e7265af7d8f 100644
--- a/drivers/video
Subordinate regulator drivers can use this enumerated ID instead of
matching the compatible string again.
Signed-off-by: Samuel Holland
---
drivers/power/pmic/axp.c | 18 +-
include/axp_pmic.h | 12
2 files changed, 21 insertions(+), 9 deletions(-)
diff
- LDOs shared with GPIO pins => not supported.
Signed-off-by: Samuel Holland
---
drivers/power/regulator/Kconfig | 14 ++
drivers/power/regulator/Makefile| 1 +
drivers/power/regulator/axp_regulator.c | 308
3 files changed, 323 insertions(+)
create
it was convenient to initialize the PMIC at the time.
The main goal here is to replace the corresponding code in TF-A, both
because of TF-A size constraints, and because the TF-A code is too
simple/overzealous and breaks EPHY power sequencing on some boards.
Samuel Holland (3):
power: pmic: axp: Provide
Now that a regulator driver exists for this PMIC, hook it up to the
device tree "regulators" subnodes.
Signed-off-by: Samuel Holland
---
drivers/power/pmic/axp.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/power/pmic/axp.c b/drivers/power/pmic/a
On 10/13/22 22:05, Icenowy Zheng wrote:
> To support SPI NAND flashes, more commands than Read (03h) are needed.
>
> Extract the code for doing SPI transfer from the reading code for code
> reuse.
>
> Signed-off-by: Icenowy Zheng
One comment below.
Reviewed-by: Samu
real address. As the address is sent out
> in bit endian, this makes it not compatible with usual 3 byte address.
typo: big
> Signed-off-by: Icenowy Zheng
> ---
> arch/arm/mach-sunxi/spl_spi_sunxi.c | 20 +---
> 1 file changed, 13 insertions(+), 7 deletions(-)
onfig")
> Signed-off-by: Andre Przywara
> ---
> Hi,
>
> this is not critical (so nothing for 2023.01), reset works either way.
> But we should fix it anyway.
>
> Cheers,
> Andre
>
> configs/licheepi_nano_defconfig | 1 -
> 1 file changed, 1 deletion(-)
Reviewed-by: Samuel Holland
is the same for SPI NOR and NAND.
>
> Signed-off-by: Icenowy Zheng
> ---
> arch/arm/mach-sunxi/board.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
Reviewed-by: Samuel Holland
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> in
o allow booting without valid magic number when
> booting with SPI NOR.
So the issue is that when CONFIG_SPL_RAW_IMAGE_SUPPORT=y, then
spl_parse_image_header() will return 0 even when using the wrong NAND
parameters? I don't see a better solution, so:
Reviewed-by: Samuel Holland
Tested-by: Samuel
d that alias with a preprocessor macro.
>
> Now the F1C100s family has gained MMC nodes, so we don't need the
> special treatment anymore. Just remove this guard.
>
> Signed-off-by: Andre Przywara
> ---
> arch/arm/dts/sunxi-u-boot.dtsi | 2 --
> 1 file changed, 2 deletions(-)
Reviewed-by: Samuel Holland
ooks fine to me. I verified that NOR booting still works when
SPL_SPI_SUNXI_NAND is enabled, so:
Tested-by: Samuel Holland # Orange Pi Zero Plus
> Signed-off-by: Icenowy Zheng
> ---
> arch/arm/mach-sunxi/Kconfig | 16 +++
> arch/arm/mach-sunxi
Hi Andre,
On 1/4/23 19:58, Andre Przywara wrote:
> To determine whether we have been booted from an eMMC boot partition, we
> replay some of the checks that the BROM must have done to successfully
> load the SPL. This involves a checksum check, which currently relies on
> the SPL being wrapped in
Hi Simon,
On 1/23/23 12:42, Simon Glass wrote:
> HI Samuel,
>
> On Sun, 22 Jan 2023 at 14:16, Samuel Holland wrote:
>>
>> This is easier to read than the #ifdef staircase, provides better
>> visibility into the memory map (alongside the other Kconfig
>> definit
> boot enabled, like the Remix Mini PC.
>
> Signed-off-by: Andre Przywara
> ---
> Changelog v2 .. v1:
> - use struct members instead of indexing buffer array
>
> arch/arm/mach-sunxi/board.c | 11 +++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
Reviewed-by: Samuel Holland
This allows devm_clock_get(dev, NULL) to work and get the first clock,
which is common in code ported from Linux.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Move index error check inside if statement
- Update function comment
- Add unit test
drivers/clk/clk-uclass.c | 12
This allows devm_reset_control_get(dev, NULL) to work and get the first
reset control, which is common in code ported from Linux.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Move index error check inside if statement
- Update function comment
- Add unit test
drivers/reset/reset
If the UART bus or baud clock has a gate, it must be enabled before the
UART can be used.
Reviewed-by: Stefan Roese
Signed-off-by: Samuel Holland
---
Changes in v3:
- Switch back to the original patch, now that the phycore-rk3288 build
is fixed by enabling LTO in patch 1.
Changes in v2
From: Wadim Egorov
The phycore-rk3288 SPL binary is reaching the limits of 32KB very often.
Enable CONFIG_LTO to reduce the size of the SPL and make the board more
future proof for changes increasing the SPL size.
Signed-off-by: Wadim Egorov
Signed-off-by: Samuel Holland
---
Changes in v3
- LDOs shared with GPIO pins => not supported.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Dual-license the driver
- Add a comment about the requirements for the voltage table
- Fix AXP22x ALDO3 enable bit position
drivers/power/regulator/Kconfig | 14 ++
drivers/power/
Now that a regulator driver exists for this PMIC, hook it up to the
device tree "regulators" subnodes.
Signed-off-by: Samuel Holland
---
(no changes since v1)
drivers/power/pmic/axp.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/power/pmic/axp.c
Use a more accurate check for determining if the full format string will
be handled correctly, since SPL_USE_TINY_PRINTF can be disabled.
Signed-off-by: Samuel Holland
---
drivers/core/dump.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/core/dump.c b/drivers/core
a comment about the requirements for the voltage table
- Fix AXP22x ALDO3 enable bit position
Samuel Holland (3):
power: pmic: axp: Provide a variant ID in the driver data
power: regulator: Add a driver for AXP PMIC regulators
power: pmic: axp: Bind regulators from the DT
drivers/power/pmic
Subordinate regulator drivers can use this enumerated ID instead of
matching the compatible string again.
Reviewed-by: Andre Przywara
Signed-off-by: Samuel Holland
---
(no changes since v1)
drivers/power/pmic/axp.c | 18 +-
include/axp_pmic.h | 12
2 files
This property sets the minimum size of an entry, including padding but
not alignment. It can be used to reserve space for growth of an entry,
or to enforce a minimum offset for later entries in the section.
Signed-off-by: Samuel Holland
---
tools/binman/binman.rst | 8
his response to my original
series[1].
[0]: https://lore.kernel.org/u-boot/20211013023022.58829-1-sam...@sholland.org/
[1]:
https://lore.kernel.org/u-boot/capnjgz1_ee7uodlt36ls5gqa12a2zswrqxwtem5g-opitjn...@mail.gmail.com/
Samuel Holland (2):
binman: Add 'min-size' entry property
sunxi: binman
, SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, and SYS_SPI_U_BOOT_OFFS)
are guaranteed to be defined in all cases.
Fixes: cfa3db602caf ("sunxi: Convert 64-bit boards to use binman")
Signed-off-by: Samuel Holland
---
arch/arm/dts/sunxi-u-boot.dtsi | 6 +-
1 file changed, 5 insertions(+),
ARCH_SUNXI selects BINMAN, so the condition "!BINMAN && ARCH_SUNXI"
is impossible to satisfy.
Signed-off-by: Samuel Holland
---
Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Kconfig b/Kconfig
index a75cce7e28..f810646e8a 100644
--- a/Kco
on 32-bit SoCs. Instead, after loading the firmware,
U-Boot proper is executed directly.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Rely on binman min-size instead of using explicit offsets
- Use Kconfig for firmware addresses instead of an #ifdef staircase
arch/arm/dts/sunxi-u
This is easier to read than the #ifdef staircase, provides better
visibility into the memory map (alongside the other Kconfig
definitions), and allows these addresses to be reused from code.
Signed-off-by: Samuel Holland
---
Changes in v2:
- New patch for v2, split from the .dtsi changes
Now that 32-bit SoCs can load U-Boot proper (and possibly other
firmware) from a FIT, use this method by default. SPL_FIT_IMAGE_TINY is
required to stay within the 24 or 32 KiB SPL size limit on early SoCs;
for consistency, enable it everywhere.
Signed-off-by: Samuel Holland
---
Changes in v2
Each chip is required to have a unique CS number ("reg" property) in the
range 0-7, so there is no need to separately count the number of chips.
Reviewed-by: Michael Trimarchi
Signed-off-by: Samuel Holland
---
(no changes since v1)
drivers/mtd/nand/raw/sunxi_nand.c | 10
-by: Samuel Holland
---
(no changes since v1)
drivers/mtd/nand/raw/sunxi_nand.c | 73 +++
include/fdtdec.h | 1 -
lib/fdtdec.c | 1 -
3 files changed, 26 insertions(+), 49 deletions(-)
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c
b
y: Michael Trimarchi
Signed-off-by: Samuel Holland
---
(no changes since v1)
board/sunxi/board.c | 5 +-
drivers/mtd/nand/raw/sunxi_nand.c | 81 ++-
2 files changed, 49 insertions(+), 37 deletions(-)
diff --git a/board/sunxi/board.c b/board/sunxi/boa
This more closely matches the U-Boot driver to the Linux version.
Signed-off-by: Samuel Holland
---
(no changes since v1)
drivers/mtd/nand/raw/sunxi_nand.c | 39 ---
1 file changed, 20 insertions(+), 19 deletions(-)
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c
NAND is always at function 2 on port C.
Pin lists and mux values were taken from the Linux drivers.
Reviewed-by: Andre Przywara
Reviewed-by: Jagan Teki
Signed-off-by: Samuel Holland
---
(no changes since v1)
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 13 +
1 file changed, 13
Describe this feature instead of using the SoC ID.
Signed-off-by: Samuel Holland
---
Changes in v2:
- New patch for v2
drivers/net/sun8i_emac.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index f232b8f087
Currently, EMAC variants are distinguished by their identity, but this
gets unwieldy as more overlapping variants are added. Add a structure so
we can describe the individual feature differences between the variants.
Signed-off-by: Samuel Holland
---
Changes in v2:
- New patch for v2
drivers
beyond the simplification:
- R40 boards now respect the RX delays from the devicetree
- This resolves a warning on architectures where readl/writel
expect the address to have a pointer type, not phys_addr_t.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Add a structure for driver data
:
- Add a structure for driver data, and put the syscon offset there
Samuel Holland (5):
net: sun8i-emac: Add a structure for variant data
net: sun8i-emac: Add a flag for RMII support
net: sun8i-emac: Add a flag for the internal PHY switch
net: sun8i-emac: Use common syscon setup for R40
net
Describe this feature instead of using the SoC ID.
Signed-off-by: Samuel Holland
---
Changes in v2:
- New patch for v2
drivers/net/sun8i_emac.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index
Now that all differences in functionality are covered by individual
flags, remove the enumeration of SoC variants.
Signed-off-by: Samuel Holland
---
Changes in v2:
- New patch for v2
drivers/net/sun8i_emac.c | 14 --
1 file changed, 14 deletions(-)
diff --git a/drivers/net
On 1/22/23 17:37, Jesse Taube wrote:
>
>
> On 1/22/23 16:15, Samuel Holland wrote:
>> Some 32-bit SoCs can use SCP firmware to implement additional PSCI
>> functionality, such as system suspend. In order to load this firmware
>> from SPL, we need to generate and us
.
[1]: https://lore.kernel.org/u-boot/20230121232518.49723-1-sam...@sholland.org/
Changes in v2:
- Disable padding from SPL_PAD_TO
- Rely on binman min-size instead of using explicit offsets
- Use Kconfig for firmware addresses instead of an #ifdef staircase
Samuel Holland (4):
sunxi: spl
do not want to unnecessarily pad SPL out to these giant sizes,
we must set SPL_PAD_TO to zero. This causes no problems because binman
already takes care of appending the SPL payload at the right offset.
Signed-off-by: Samuel Holland
---
Changes in v2:
- New patch for v2
common/spl/Kconfig | 3
Signed-off-by: Samuel Holland
---
Changes in v2:
- Fix A80 bus clock/reset bit positions
drivers/clk/sunxi/clk_a10.c | 2 ++
drivers/clk/sunxi/clk_a10s.c | 2 ++
drivers/clk/sunxi/clk_a23.c | 3 +++
drivers/clk/sunxi/clk_a31.c | 6 ++
drivers/clk/sunxi/clk_a64.c | 3 +++
drivers/clk/sun
bus clock/reset bit positions
Samuel Holland (6):
clk: sunxi: Add NAND clocks and resets
pinctrl: sunxi: Add NAND pinmuxes
mtd: nand: sunxi: Remove an unnecessary check
mtd: nand: sunxi: Convert from fdtdec to ofnode
mtd: nand: sunxi: Convert to the driver model
mtd: nand: sunxi: Pass
ys enabled:
- Nintendo_NES_Classic_Edition_defconfig /
sun8i-r16-nintendo-nes-classic
The PHY driver already assumes VBUS is enabled when no detection method
is available, so again this will not cause any problems.
Signed-off-by: Samuel Holland
---
configs/A33-OLinuXino_defconfig| 2 +-
configs/Ainol_AW1
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove it.
Signed-off-by: Samuel Holland
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 -
drivers/gpio/axp_gpio.c| 21 -
drivers
this regulator device when present[2]. The net result is removing
some ugly hacks from a couple of GPIO drivers.
[1]: https://lore.kernel.org/u-boot/20230121231307.42628-1-sam...@sholland.org/
[2]: commit 6fa41cdd19b9 ("phy: sun4i-usb: Support VBUS detection via power
supply")
Samuel
This driver reports the presence/absence of voltage on the PMIC's USB
VBUS pin. This information is used by the USB PHY driver. The
corresponding Linux driver uses the power supply class, which does not
exist in U-Boot. UCLASS_REGULATOR seems to be the closest match.
Signed-off-by: Samuel Holland
t in Linux.
Signed-off-by: Samuel Holland
---
arch/arm/dts/sun6i-a31-mixtile-loftq.dts | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/dts/sun6i-a31-mixtile-loftq.dts
b/arch/arm/dts/sun6i-a31-mixtile-loftq.dts
index dde9bdf2f9..bd98fb3e6a 100644
--- a/arch/arm/dts
On 11/4/22 06:21, Yu Chien Peter Lin wrote:
> We should check the string until it hits underscore, in case it
> searches for the letters in the custom extension. For example,
> "rv64imac_xandes" will be treated as D extension support since
> there is a "d" in "andes", resulting illegal instruction
On 11/3/22 11:46, Andre Przywara wrote:
> On Tue, 1 Nov 2022 00:08:12 -0500
> Samuel Holland wrote:
>
> Hi Samuel,
>
>> sunxi is getting a new RISC-V platform, D1. We want to share as much of
>> the existing configuration as possible, to provide a familiar
We tried to enable USB_EHCI_GENERIC and USB_OHCI_GENERIC by default.
This did not work because those symbols depend on USB_EHCI_HCD and
USB_OHCI_HCD, which were not enabled. Fix this by implying all four.
Signed-off-by: Samuel Holland
---
arch/arm/Kconfig | 4
drivers/usb/host
it.
Samuel Holland (22):
sunxi: Fix default-enablement of USB host drivers
sunxi: Remove unnecessary Kconfig selections
sunxi: Add missing dependencies to Kconfig selections
sunxi: Hide image type selection if SPL is disabled
sunxi: Share the board Kconfig across architectures
sunxi: Move
Two of these selections are redundant and have no effect:
- DM_KEYBOARD is selected by USB_KEYBOARD
- DM_MMC is selected by MMC
This selection has no effect by default and is unnecessarily strong:
- USB_STORAGE is implied by DISTRO_DEFAULTS
Signed-off-by: Samuel Holland
---
arch/arm
Update this option to be based on SUNXI_MINIMUM_DRAM_MB. This corrects
the value used on V3s, which previously was the MACH_SUN8I default, and
so relied on addresses wrapping modulo the DRAM size.
Signed-off-by: Samuel Holland
---
board/sunxi/Kconfig | 9 ++---
1 file changed, 2 insertions
This keeps all of the defaults for sunxi platforms in one place. Most of
these only depend on architecture-independent features of the SoC (clock
tree or SRAM layout) anyway.
No functional change; just some minor help text cleanup.
Signed-off-by: Samuel Holland
---
arch/arm/mach-sunxi/Kconfig
This option affects the ABI between SPL/U-Boot and U-Boot/scripts, so it
should not normally be changed by the user.
Signed-off-by: Samuel Holland
---
board/sunxi/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index
While not especially likely, it is plausible that someone wants to build
U-Boot without GPIO or UART support. Don't force building these drivers.
Signed-off-by: Samuel Holland
---
board/sunxi/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/sunxi/Kconfig b
This is used by quite a large number of boards, for PMIC/regulator or
LCD panel control.
Signed-off-by: Samuel Holland
---
board/sunxi/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index b301ba998e..809cd17f54 100644
--- a/board/sunxi
This provides a default value for RISC-V when that is added, and it
makes sense to put this option next to the other DRAM layout options.
While at it, provide sensible values for platforms with less DRAM.
Signed-off-by: Samuel Holland
---
board/sunxi/Kconfig | 6 ++
common/spl/Kconfig
This provides a default value for RISC-V when that is added, and it
makes sense to put this option next to the other DRAM layout options.
While at it, provide sensible values for platforms with less DRAM.
Signed-off-by: Samuel Holland
---
board/sunxi/Kconfig | 6 ++
common/Kconfig
This will provide a default value for RISC-V when that is added, and it
makes sense to put this option next to the other DRAM layout options.
Signed-off-by: Samuel Holland
---
Kconfig | 3 ---
board/sunxi/Kconfig | 5 +
2 files changed, 5 insertions(+), 3 deletions(-)
diff
This is how the vast majority of platforms provided TEXT_BASE.
sunxi was the exception here.
Signed-off-by: Samuel Holland
---
board/sunxi/Kconfig | 6 ++
boot/Kconfig| 4
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
This provides a unified configuration across all sunxi boards,
regardless of CPU architecture.
Signed-off-by: Samuel Holland
---
drivers/clk/sunxi/Kconfig | 2 +-
drivers/fastboot/Kconfig | 13 ++---
drivers/gpio/Kconfig | 2 +-
drivers/mmc/Kconfig | 2
This excludes options that are inherently ARM-specific or are specific
to legacy non-DM drivers.
Some help text is cleaned up along the way.
Signed-off-by: Samuel Holland
---
arch/arm/mach-sunxi/Kconfig | 71
board/sunxi/Kconfig | 72
This provides a unified configuration across all sunxi boards,
regardless of CPU architecture.
Signed-off-by: Samuel Holland
---
common/spl/Kconfig | 12 ++--
scripts/Makefile.spl | 2 +-
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/common/spl/Kconfig b/common/spl
This provides a unified configuration across all sunxi boards,
regardless of CPU architecture.
Signed-off-by: Samuel Holland
---
disk/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/disk/Kconfig b/disk/Kconfig
index c9b9dbaf1a..b9d3625dc2 100644
--- a/disk
This ensures the same environment layout will be used across all sunxi
boards, regardless of CPU architecture.
Signed-off-by: Samuel Holland
---
env/Kconfig | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/env/Kconfig b/env/Kconfig
index 24111dfaf4..ae28e4e3e6
It makes sense to put this near the definition of SUNXI_SRAM_ADDRESS.
Signed-off-by: Samuel Holland
---
board/sunxi/Kconfig | 5 +
common/spl/Kconfig | 3 ---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 1abb3e1816
Some of the selected symbols have a user-visible dependency. Make the
selections conditional on that dependency to avoid creating invalid
configurations.
Signed-off-by: Samuel Holland
---
arch/arm/Kconfig | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch
the "if ARCH_SUNXI" block.
Introduce a new BOARD_SUNXI symbol that can be selected by both
ARCH_SUNXI now and the new RISC-V SoC symbols when they are added, and
use it to gate the architecture-independent board options.
Signed-off-by: Samuel Holland
---
arch/Kconfig| 1 +
This choice is meaningless when SPL is disabled. Hide it to avoid any
possible confusion.
Signed-off-by: Samuel Holland
---
board/sunxi/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 084a8b0c6c..42f61df5c5 100644
--- a/board/sunxi
This was already supported by every machine type. It is unlikely that
any new SoC support will be added without SPL support.
Signed-off-by: Samuel Holland
---
arch/arm/mach-sunxi/Kconfig | 14 --
board/sunxi/Kconfig | 2 ++
2 files changed, 2 insertions(+), 14 deletions
To maintain consistent behavior across architectures, most of the
options selected by ARCH_SUNXI should be selected for the D1 SoC as
well. To accomplish this, select them from BOARD_SUNXI instead.
No functional change here. Lines are only moved and alphabetized.
Signed-off-by: Samuel Holland
age, but it is not guaranteed to
work. Underscores are allowed even between single-letter extensions. See
section 29.5 ("Underscores") of the unprivileged spec. Still, this is an
improvement, so:
Reviewed-by: Samuel Holland
> + for (i = 4; i < sizeof(desc); i++
log_ret() cannot work with unsigned values, and the assignment to 'ret'
incorrectly truncates the rate from long to int.
Fixes: 5c5992cb90cf ("clk: Add debugging for return values")
Signed-off-by: Samuel Holland
---
drivers/clk/clk-uclass.c | 7 +--
1 file changed, 1 inser
clk_get_rate() can return an error value. Recompute the rate if the
cached value is an error value.
Fixes: 4aa78300a025 ("dm: clk: Define clk_get_parent_rate() for clk operations")
Signed-off-by: Samuel Holland
---
drivers/clk/clk-uclass.c | 3 ++-
1 file changed, 2 insertions(+),
it to implement PLL rate setting on sunxi.
Samuel Holland (6):
clk: Handle error pointers in clk_valid()
clk: Fix error handling in clk_get_rate()
clk: Fix error handling in clk_get_parent()
clk: Fix rate caching in clk_get_parent_rate()
clk: Remove an unneeded check from clk_get_parent_rate
Do not return both NULL and error pointers. The function is only
documented as returning error pointers.
Fixes: 8a1661f20e6c ("drivers: clk: Handle gracefully NULL pointers")
Signed-off-by: Samuel Holland
---
drivers/clk/clk-uclass.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
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