[PATCH] riscv: Add option to print registers on exception

When debugging, it can be helpful to see more information about an unhandled exception. This patch adds an option to view the registers at the time of the trap, similar to the linux output on a kernel panic. Signed-off-by: Sean Anderson --- arch/riscv/Kconfig | 3 +++ arch/riscv/cpu

[PATCH] Add dependencies for MALLOC_F and OF_LIBFDT

Some features implicitly depended on MALLOC_F and OF_LIBFDT and would fail at link-time if these features were not enabled. Signed-off-by: Sean Anderson --- drivers/serial/Kconfig | 3 +++ dts/Kconfig| 3 +++ 2 files changed, 6 insertions(+) diff --git a/drivers/serial/Kconfig b

[PATCH] riscv: Fix breakage caused by linker relaxation

gp pointer to fail. To fix this problem, we undefine the __global_pointer symbol. Signed-off-by: Sean Anderson --- arch/riscv/cpu/u-boot.lds | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/riscv/cpu/u-boot.lds b/arch/riscv/cpu/u-boot.lds index 838a844399..c00d17c736 100644 --- a/arch/riscv/cpu/u

[PATCH] Include missing headers for fdt_support.h

fdt_support.h is missing declarations for bd_t. Including asm/u-boot.h pulls in the definition. Signed-off-by: Sean Anderson --- include/fdt_support.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/fdt_support.h b/include/fdt_support.h index 2286ea7793..3f4bc643d4 100644

[PATCH] Include missing headers for asm-generic/sections.h

asm-generic/sections.h references ulong but does not include linux/types.h Signed-off-by: Sean Anderson --- include/asm-generic/sections.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h index 296c0cf9b8..17a31ec788 100644

[PATCH] Make the sandbox board_run_command the default

If CONFIG_CMDLINE=n, common/cli.c calls board_run_command. This fails to link on most architectures. However, the sandbox architecture has an implementation which we can use. Signed-off-by: Sean Anderson --- arch/sandbox/cpu/start.c | 7 --- common/cli.c | 7 +++ 2 files

Re: [PATCH] riscv: Fix breakage caused by linker relaxation

> But I wonder how U-Boot managed to work on RISC-V till today? Hm. I think that linker relaxations may also have been disabled by linking with -pie. When I discovered this bug, I had disabled the flag since I was having a hard time getting my compiler to build with --enable-shared. When

riscv: Sipeed Maix support

I've been working on adding support for the Sipeed Maix-series boards, specifically the Bit . The majority of the work has been going toward the Kendryte K210 CPU, and should be generalizable to all of the Maix boards. I've gotten u-boot to reach the

[PATCH v4 13/17] riscv: Add K210 clock support

to the naming convention, suggestions are welcome. Signed-off-by: Sean Anderson --- Changes in v4: - Reparent aclk before configuring pll0 - Update copyright - Lint Changes in v3: - Removed sysctl struct, replacing it with defines. This is to have the same interface to sysctl from C as from

[PATCH v4 11/17] riscv: Add K210 pll support

This pll code is primarily based on the code from the kendryte standalone sdk in lib/drivers/sysctl.c. k210_pll_calc_params is roughly analogous to the algorithm used to set the pll frequency, but it has been completely rewritten to be fixed-point based. Signed-off-by: Sean Anderson --- Changes

[PATCH v4 02/17] clk: Check that ops of composite clock components exist before calling

to exist, since clk_composite_get_parent was used to determine the parent for clk_register. Signed-off-by: Sean Anderson Acked-by: Lukasz Majewski --- Changes in v4: - Return ENOTSUPP not ENOSYS with no set_parent Changes in v3: - Don't return an error code where a no-op would be fine

[PATCH v4 06/17] spi: dw: Add device tree properties for fields in CTRL1

Some devices have different layouts for the fields in CTRL1 (e.g. the Kendryte K210). Allow this layout to be configurable from the device tree. The documentation has been taken from Linux. Signed-off-by: Sean Anderson --- Changes in v4: - New .../spi/snps,dw-apb-ssi.txt

[PATCH v4 03/17] clk: Unconditionally recursively en-/dis-able clocks

traverse up the tree when enabling. Previously, CCF clocks without id set would be skipped, stopping the traversal too early. Signed-off-by: Sean Anderson Acked-by: Lukasz Majewski --- Changes in v4: - Lint Changes in v3: - New drivers/clk/clk-uclass.c | 59

[PATCH v4 05/17] dm: Add support for simple-pm-bus

+= simple-bus.o +obj-$(CONFIG_SIMPLE_PM_BUS)+= simple-pm-bus.o obj-$(CONFIG_DM) += dump.o obj-$(CONFIG_$(SPL_TPL_)REGMAP)+= regmap.o obj-$(CONFIG_$(SPL_TPL_)SYSCON)+= syscon-uclass.o diff --git a/drivers/core/simple-pm-bus.c b/drivers/core/simple-pm-bus.c n

[PATCH v4 04/17] reset: Add generic reset driver

. Signed-off-by: Sean Anderson --- Changes in v4: - Added basic test - Fix incorrect usage of regmap_update_bits Changes in v3: - New arch/sandbox/dts/test.dts | 15 configs/sandbox_defconfig | 1 + .../reset/syscon-reset.txt| 36

[PATCH v4 01/17] clk: Always use the supplied struct clk

problem is to just always use the supplied struct clock. The composite clock now fills in the ->dev pointer of its child clocks. This allows child clocks to make calls like clk_get_parent() without issue. imx avoided the above problem by using a custom get_rate function with composite clocks.

[PATCH v4 00/17] riscv: Add Sipeed Maix support

for keeping internal PLL frequencies in-range - Fix several rebase-induced artifacts Sean Anderson (17): clk: Always use the supplied struct clk clk: Check that ops of composite clock components exist before calling clk: Unconditionally recursively en-/dis-able clocks reset: Add generic reset d

[PATCH v4 15/17] riscv: Enable cpu clock if it is present

The cpu clock is probably already enabled if we are executing code (though we could be executing from a different core). This patch prevents the cpu clock or its parents from being disabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- This patch was previously submitted on its own

[PATCH v4 17/17] riscv: Add Sipeed Maix support

/dl.sipeed.com/MAIX/HDK/>. Documentation for the Kendryte K210 is located at <https://kendryte.com/downloads/>. However, hardware details are rather lacking, so most technical reference has been taken from the standalone sdk located at <https://github.com/kendryte/kendryte-standalone-sdk>

[PATCH v4 07/17] spi: dw: Add mem_ops

to have a look!). Signed-off-by: Sean Anderson --- Changes in v4: - New drivers/spi/designware_spi.c | 123 +-- 1 file changed, 119 insertions(+), 4 deletions(-) diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 04cc873754..277eb19a0b

[PATCH v4 14/17] riscv: Try to get cpu frequency from device tree

Instead of always using the "clock-frequency" property to determine cpu frequency, try using a clock in "clocks" if it exists. This patch also fixes a bug where there could be spurious higher frequencies if sizeof(u32) != sizeof(ulong). Signed-off-by: Sean Anderson R

[PATCH v4 08/17] riscv: Add headers for asm/global_data.h

This header depended on bd_t and ulong, but did not include the appropriate headers. Signed-off-by: Sean Anderson --- Changes in v4: - Include compiler.h not linux/compiler.h arch/riscv/include/asm/global_data.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/include/asm

[PATCH v4 10/17] riscv: Allow use of reset drivers

Currently, one cannot use a reset driver on RISC-V. Follow the MIPS example, and disable the default reset handler when the sysreset driver is enabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v3: - New arch/riscv/lib/reset.c | 2 ++ 1 file changed, 2 insertions

[PATCH v4 09/17] riscv: Add option to support RISC-V privileged spec 1.9.1

instruction exception. This patch adds an option to use the old CSRs instead of the new one. Signed-off-by: Sean Anderson --- Changes in v4: - Fixed CSRs not being defined properly (thanks bmeng) - Added ifdefs for all changed CSRs (e.g. for VM) - Also properly disable VM on boot Changes in v3

[PATCH v4 16/17] riscv: Add device tree for K210

should be considered descriptive at best. I would appreciate if anyone could help identify possibly compatible devices, especially for the timers, watchdogs, and rtc. Signed-off-by: Sean Anderson --- Changes in v4: - Set regs sizes to full address range - Remove clock-frequency property from cpus

[PATCH v4 12/17] riscv: Add a bypass clock for K210

so that the CPU keeps on working. Signed-off-by: Sean Anderson --- Changes in v4: - New drivers/clk/kendryte/Makefile | 2 +- drivers/clk/kendryte/bypass.c | 268 ++ include/kendryte/bypass.h | 28 3 files changed, 297 insertions(+), 1 deletion

[PATCH v5 02/33] clk: Check that ops of composite clock components exist before calling

to exist, since clk_composite_get_parent was used to determine the parent for clk_register. Signed-off-by: Sean Anderson Acked-by: Lukasz Majewski --- Changes in v4: - Return ENOTSUPP not ENOSYS with no set_parent Changes in v3: - Don't return an error code where a no-op would be fine

[PATCH v5 08/33] doc: Fix typo in FIT documentation

u_boot should be u-boot Signed-off-by: Sean Anderson --- Changes in v5: - New doc/uImage.FIT/source_file_format.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt index 18d2aedcb7..00c4dc337c

[PATCH v5 04/33] clk: Add functions to register CCF clock structs

the clocks now no longer live on the heap). Signed-off-by: Sean Anderson --- Changes in v5: - New drivers/clk/clk-composite.c | 103 +++ drivers/clk/clk-divider.c| 56 +-- drivers/clk/clk-gate.c | 38 - include/linux/clk

[PATCH v5 09/33] dm: Add support for simple-pm-bus

ONFIG_$(SPL_)SIMPLE_BUS)+= simple-bus.o +obj-$(CONFIG_SIMPLE_PM_BUS)+= simple-pm-bus.o obj-$(CONFIG_DM) += dump.o obj-$(CONFIG_$(SPL_TPL_)REGMAP)+= regmap.o obj-$(CONFIG_$(SPL_TPL_)SYSCON)+= syscon-uclass.o diff --git a/drivers/core/simple-pm-bus.c b/drivers/core/simple-pm-bu

[PATCH v5 07/33] clk: Add K210 clock support

need, instead of the whole CCF struct. Signed-off-by: Sean Anderson --- Changes in v5: - Don't unmap priv->reg - Remove comment on APB clocks since it has been clarified by Kendryte - Add i2s mclks - Reorder clock ids to be continuous - Rewrite to statically allocate all clocks. This has hel

[PATCH v5 06/33] clk: Add a bypass clock for K210

so that the CPU keeps on working. Signed-off-by: Sean Anderson --- Changes in v5: - Add function to register from a struct bypass Changes in v4: - New drivers/clk/kendryte/Makefile | 2 +- drivers/clk/kendryte/bypass.c | 270 ++ include/kendryte/bypass.h

[PATCH v5 03/33] clk: Unconditionally recursively en-/dis-able clocks

traverse up the tree when enabling. Previously, CCF clocks without id set would be skipped, stopping the traversal too early. Signed-off-by: Sean Anderson Acked-by: Lukasz Majewski --- Changes in v5: - Clear enable_count on request Changes in v4: - Lint Changes in v3: - New drivers/clk/clk

[PATCH v5 18/33] led: gpio: Default to using node name if label is absent

This more closely mirrors Linux's behaviour, and will make it easier to transition to using function+color in the future. Signed-off-by: Sean Anderson --- Changes in v5: - New drivers/led/led_gpio.c | 7 ++- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/led

[PATCH v5 13/33] pinctrl: Add support for Kendryte K210 FPIOA

The Fully-Programmable Input/Output Array (FPIOA) device controls pin multiplexing on the K210. The FPIOA can remap any supported function to any multifunctional IO pin. It can also perform basic GPIO functions, such as reading the current value of a pin. Signed-off-by: Sean Anderson

[PATCH v5 12/33] lib: Always set errno in hcreate_r

This could give a confusing error message if it failed and didn't set errno. Signed-off-by: Sean Anderson --- Changes in v5: - New lib/hashtable.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/lib/hashtable.c b/lib/hashtable.c index 907e8a642f..e9ac7e252e 100644

[PATCH v5 10/33] dm: Fix error handling for dev_read_addr_ptr

have dev_remap_addr* for those semantics. Signed-off-by: Sean Anderson --- Changes in v5: - New drivers/clk/imx/clk-imx8mp.c | 2 +- drivers/core/read.c | 2 +- drivers/pinctrl/broadcom/pinctrl-bcm283x.c| 2 +- drivers/pinctrl/mediatek/pinctrl-mtk

[PATCH v5 05/33] clk: Add K210 pll support

This pll code is primarily based on the code from the kendryte standalone sdk in lib/drivers/sysctl.c. k210_pll_calc_params is roughly analogous to the algorithm used to set the pll frequency, but it has been completely rewritten to be fixed-point based. Signed-off-by: Sean Anderson --- Changes

[PATCH v5 15/33] gpio: dw: Fix warnings about casting int to pointer

Explicitly cast fdt_addr_t to a void pointer, since we pass it to readl. Signed-off-by: Sean Anderson --- Changes in v5: - New drivers/gpio/dwapb_gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c index

[PATCH v5 11/33] reset: Add generic reset driver

. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- Changes in v5: - Reorder includes - Include linux/err.h explicitly Changes in v4: - Added basic test - Fix incorrect usage of regmap_update_bits Changes in v3: - New arch/sandbox/dts/test.dts | 15 configs

[PATCH v5 14/33] gpio: sifive: Use generic reg read function

Using an fdt-specific function causes problems with a live tree. Signed-off-by: Sean Anderson --- Changes in v5: - New drivers/gpio/sifive-gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/sifive-gpio.c b/drivers/gpio/sifive-gpio.c index 76d5a1d34e

[PATCH v5 22/33] spi: dw: Speed up transfer loops

The transfer loops are very tight on some platforms (especially on higher speeds). If we don't read/write fast enough we can run into over-/under- flow problems. This patch removes several divisions and log statements, and simplifies the read logic. Signed-off-by: Sean Anderson --- Changes

[PATCH v5 20/33] spi: dw: Rename "cs-gpio" to "cs-gpios"

This property is named differently than other SPI drivers with the same property, as well as the property as used in Linux. Signed-off-by: Sean Anderson --- Changes in v5: - New arch/arc/dts/axs10x_mb.dtsi | 3 ++- arch/arc/dts/hsdk.dts| 3 ++- drivers/spi/designware_spi.c | 10

[PATCH v5 16/33] gpio: dw: Add a trailing underscore to generated name

Previously, if there was no bank-name property, it was easy to have confusing gpio names like "gpio1@08", instead of "gpio1@0_8". This patch follows the example of the sifive gpio driver. Signed-off-by: Sean Anderson --- Changes in v5: - New drivers/gpio/dwapb_gpio.c | 1

[PATCH v5 32/33] riscv: Add device tree for K210 and Sipeed Maix BitM

. Signed-off-by: Sean Anderson --- Changes in v5: - Add more compatible strings - Add cache line size - Document CPUs as rocket cores - Flesh out the gpio devices - Add ports for audio and video devices - Add fpioa pinctrl support - Configure pins for MMC on SPI1 - Enable MMC - Fix a couple uart

[PATCH v5 29/33] riscv: Allow use of reset drivers

Currently, one cannot use a reset driver on RISC-V. Follow the MIPS example, and disable the default reset handler when the sysreset driver is enabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v3: - New arch/riscv/lib/reset.c | 2 ++ 1 file changed, 2 insertions

[PATCH v5 33/33] riscv: Add Sipeed Maix support

/dl.sipeed.com/MAIX/HDK/>. Documentation for the Kendryte K210 is located at <https://kendryte.com/downloads/>. However, hardware details are rather lacking, so most technical reference has been taken from the standalone sdk located at <https://github.com/kendryte/kendryte-standalone-

[PATCH v5 30/33] riscv: Try to get cpu frequency from a "clocks" node if it exists

Instead of always using the "clock-frequency" property to determine cpu frequency, try using a clock in "clocks" if it exists. This patch also fixes a bug where there could be spurious higher frequencies if sizeof(u32) != sizeof(ulong). Signed-off-by: Sean Anderson R

[PATCH v5 31/33] riscv: Enable cpu clock if it is present

The cpu clock is probably already enabled if we are executing code (though we could be executing from a different core). This patch prevents the cpu clock or its parents from being disabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- This patch was previously submitted on its own

[PATCH v5 27/33] riscv: Fix race conditions when initializing IPI

o jump to address 0. To address these problems, a new function riscv_init_ipi is introduced. It is called once during arch_cpu_init_dm. Before this point, no riscv_*_ipi functions may be called. Access is synchronized by gd->arch->ipi_ready. Signed-off-by: Sean Anderson --- Changes in v5: - New ar

[PATCH v5 19/33] spi: dw: Add device tree properties for fields in CTRL1

Some devices have different layouts for the fields in CTRL1 (e.g. the Kendryte K210). Allow this layout to be configurable from the device tree. The documentation has been taken from Linux. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- Changes in v4: - New .../spi/snps,dw-apb

[PATCH v5 17/33] gpio: dw: Return output value when direction is out

dm_gpio_ops.get_value can be called when the gpio is either input or output. The current dw code always returns the input value, which is invalid if the direction is set to out. Signed-off-by: Sean Anderson --- Changes in v5: - New drivers/gpio/dwapb_gpio.c | 19 --- 1 file

[PATCH v5 23/33] spi: dw: Properly set rx_end when not recieving

The difference between rx and rx_end is used by tx_max when calculating how much to write. If we aren't reading anything, this could cause us to let the tx fifo bottom out. Signed-off-by: Sean Anderson --- Changes in v5: - New drivers/spi/designware_spi.c | 3 ++- 1 file changed, 2 insertions

[PATCH v5 28/33] riscv: Add option to support RISC-V privileged spec 1.9

instruction exception. This patch adds an option to use the old CSRs instead of the new one. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v5: - Rename to 1.9 to reflect the spec as implemented by the k210 Changes in v4: - Fixed CSRs not being defined properly (thanks bmeng

[PATCH v5 21/33] spi: dw: Use generic function to read reg address

Using an fdt-specific function causes problems when compiled with a live tree. Signed-off-by: Sean Anderson --- Changes in v5: - New drivers/spi/designware_spi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c

[PATCH v5 26/33] riscv: Add headers for asm/global_data.h

This header depended on bd_t and ulong, but did not include the appropriate headers. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v4: - Include compiler.h not linux/compiler.h arch/riscv/include/asm/global_data.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch

[PATCH v5 24/33] spi: dw: Add mem_ops

o work off is Kendryte's sdk, and I do not have access to the datasheet (if anyone does, I would love to have a look!). The MMC device is still not working, but I have been making progress. [1] https://lkml.org/lkml/2015/12/23/132 Signed-off-by: Sean Anderson --- Changes in v5: - Set rx and rx_end wh

[PATCH v5 25/33] wdt: Move asm/utils.h to log2.h

This header is needed outside of the arm architecture for the designware watchdog. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- This patch previously appeared as https://patchwork.ozlabs.org/patch/1232411/ Changes in v5: - New - Include linux/err.h explicitly arch/arm/cpu/armv7

[PATCH v5 01/33] clk: Always use the supplied struct clk

problem is to just always use the supplied struct clock. The composite clock now fills in the ->dev pointer of its child clocks. This allows child clocks to make calls like clk_get_parent() without issue. imx avoided the above problem by using a custom get_rate function with composite clocks.

[PATCH v5 00/33] riscv: Add Sipeed Maix support

keeping internal PLL frequencies in-range - Fix several rebase-induced artifacts Sean Anderson (33): clk: Always use the supplied struct clk clk: Check that ops of composite clock components exist before calling clk: Unconditionally recursively en-/dis-able clocks clk: Add functions to re

Re: [PATCH v5 25/33] wdt: Move asm/utils.h to log2.h

On 2/28/20 4:46 PM, Marek Vasut wrote: > On 2/28/20 10:05 PM, Sean Anderson wrote: >> This header is needed outside of the arm architecture for the designware >> watchdog. >> >> Signed-off-by: Sean Anderson >> Reviewed-by: Simon Glass >> --- >&g

Re: [PATCH v5 23/33] spi: dw: Properly set rx_end when not recieving

This patch should not be included. I meant to remove it (and it gets reverted in the next patch), but I made an error during rebasing. Sorry for any confustion. --Sean

Re: [PATCH v5 15/33] gpio: dw: Fix warnings about casting int to pointer

On 3/1/20 9:27 PM, Bin Meng wrote: > Hi Sean, > > On Sat, Feb 29, 2020 at 5:06 AM Sean Anderson wrote: >> >> Explicitly cast fdt_addr_t to a void pointer, since we pass it to readl. > > Explicitly cast => Change? > > As what the patch does The compi

Re: [PATCH v5 19/33] spi: dw: Add device tree properties for fields in CTRL1

and changed it again. Hopefully I can get this straight. --Sean > >> Kendryte K210). Allow this layout to be configurable from the device tree. >> The documentation has been taken from Linux. >> >> Signed-off-by: Sean Anderson >> Reviewed-by: Simon Glass >&

Re: [PATCH v5 13/33] pinctrl: Add support for Kendryte K210 FPIOA

ions, such as >> reading the current value of a pin. >> >> Signed-off-by: Sean Anderson >> --- >> >> Changes in v5: >> - New >> >> MAINTAINERS | 2 + >> .../pinctrl/kendryte,k210-fpioa.txt | 116 +++ &g

Re: [PATCH v5 33/33] riscv: Add Sipeed Maix support

On 3/4/20 2:47 AM, Rick Chen wrote: > Hi Sean > > This patch series become larger and larger from v1 with 11 patches to > v5 with 33 patches. I didn't intend for it to balloon so large. My original goal for this revision was just to get the SPI and MMC slots working. However, I discovered that I

Re: [PATCH v5 07/33] clk: Add K210 clock support

or more >> dense packing. A possible improvement could be to only store the >> parameters we need, instead of the whole CCF struct. >> >> Signed-off-by: Sean Anderson >> --- > > Please checkpatch and fix > total: 4 errors, 4 warnings, 18 checks, 662 lines

Re: [PATCH v5 27/33] riscv: Fix race conditions when initializing IPI

tions may be called. Access is synchronized by gd->arch->ipi_ready. >> >> Signed-off-by: Sean Anderson >> --- >> >> Changes in v5: >> - New >> >> arch/riscv/cpu/cpu.c | 9 >> arch/riscv/include/asm/globa

Re: [PATCH v5 25/33] wdt: Move asm/utils.h to log2.h

On 3/3/20 1:58 AM, Rick Chen wrote: > Hi Sean > >> This header is needed outside of the arm architecture for the designware >> watchdog. >> >> Signed-off-by: Sean Anderson >> Reviewed-by: Simon Glass >> --- >> This patch previously appeared

Re: [PATCH v5 27/33] riscv: Fix race conditions when initializing IPI

On 3/3/20 4:53 PM, Lukas Auer wrote: > On Mon, 2020-03-02 at 18:43 -0500, Sean Anderson wrote: >> On 3/2/20 6:17 PM, Lukas Auer wrote: >>> Don't move this. It is intended to be run before the IPI is cleared. >> >> Hm, ok. I think I moved it to after because of the

Re: [PATCH v5 27/33] riscv: Fix race conditions when initializing IPI

On 3/2/20 6:17 PM, Lukas Auer wrote: > On Fri, 2020-02-28 at 16:05 -0500, Sean Anderson wrote: > >> The IPI code could have race conditions in several places. >> * Several harts could race on the value of gd->arch->clint/plic >> * Non-boot harts could race with the

[PATCH v1 0/8] riscv: Add SPI support for Kendryte K210

/list/?series=162646 Known bugs: - The MMC cannot be accessed with the dw_spi driver Sean Anderson (8): doc: Fix typo in FIT documentation spi: dw: Add device tree properties for fields in CTRL0 spi: dw: Rename "cs-gpio" to "cs-gpios" spi: dw: Use generic function to re

[PATCH v1 1/8] doc: Fix typo in FIT documentation

u_boot should be u-boot Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- doc/uImage.FIT/source_file_format.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/uImage.FIT/source_file_format.txt b/doc/uImage.FIT/source_file_format.txt index 18d2aedcb7..00c4dc337c

[PATCH v1 5/8] spi: dw: Speed up transfer loops

The transfer loops are very tight on some platforms (especially on higher speeds). If we don't read/write fast enough we can run into over-/under- flow problems. This patch removes several divisions and log statements, and simplifies the read logic. Signed-off-by: Sean Anderson --- drivers/spi

[PATCH v1 2/8] spi: dw: Add device tree properties for fields in CTRL0

Some devices have different layouts for the fields in CTRL0 (e.g. the Kendryte K210). Allow this layout to be configurable from the device tree. The documentation has been taken from Linux. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- .../spi/snps,dw-apb-ssi.txt

[PATCH v1 3/8] spi: dw: Rename "cs-gpio" to "cs-gpios"

This property is named differently than other SPI drivers with the same property, as well as the property as used in Linux. Signed-off-by: Sean Anderson --- arch/arc/dts/axs10x_mb.dtsi | 3 ++- arch/arc/dts/hsdk.dts| 3 ++- drivers/spi/designware_spi.c | 10 +++--- 3 files

[PATCH v1 8/8] riscv: Add support for SPI on Kendryte K210

This patch enables configs necessary for usign SPI. It also adds some documentation. Signed-off-by: Sean Anderson --- board/sipeed/maix/Kconfig | 10 configs/sipeed_maix_bitm_defconfig | 8 +++ doc/board/sipeed/maix.rst | 94 +++--- 3 files

[PATCH v1 4/8] spi: dw: Use generic function to read reg address

Using an fdt-specific function causes problems when compiled with a live tree. Signed-off-by: Sean Anderson --- drivers/spi/designware_spi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 765fa2f582

[PATCH v1 7/8] riscv: Add device tree bindings for SPI

This patch adds bindings for the MMC slot and SPI flash on the Sipeed Maix Bit. Signed-off-by: Sean Anderson --- arch/riscv/dts/k210-maix-bit.dts | 90 arch/riscv/dts/k210.dtsi | 12 + 2 files changed, 102 insertions(+) diff --git a/arch/riscv/dts

[PATCH v1 6/8] spi: dw: Add mem_ops

o work off is Kendryte's sdk, and I do not have access to the datasheet (if anyone does, I would love to have a look!). The MMC device is still not working, but I have been making progress. [1] https://lkml.org/lkml/2015/12/23/132 Signed-off-by: Sean Anderson --- drivers/spi/designware_s

[PATCH v6 11/19] lib: Always set errno in hcreate_r

This could give a confusing error message if it failed and didn't set errno. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v5: - New lib/hashtable.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/lib/hashtable.c b/lib/hashtable.c index

[PATCH v6 12/19] riscv: Add headers for asm/global_data.h

This header depended on bd_t and ulong, but did not include the appropriate headers. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v4: - Include compiler.h not linux/compiler.h arch/riscv/include/asm/global_data.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch

[PATCH v6 05/19] clk: Add K210 pll support

This pll code is primarily based on the code from the kendryte standalone sdk in lib/drivers/sysctl.c. k210_pll_calc_params is roughly analogous to the algorithm used to set the pll frequency, but it has been completely rewritten to be fixed-point based. Signed-off-by: Sean Anderson --- Changes

[PATCH v6 15/19] riscv: Allow use of reset drivers

Currently, one cannot use a reset driver on RISC-V. Follow the MIPS example, and disable the default reset handler when the sysreset driver is enabled. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng --- Changes in v3: - New arch/riscv/lib/reset.c | 2 ++ 1 file changed, 2 insertions

[PATCH v6 13/19] riscv: Fix race conditions when initializing IPI

o jump to address 0. To address these problems, a new function riscv_init_ipi is introduced. It is called once during arch_cpu_init_dm. Before this point, no riscv_*_ipi functions may be called. Access is synchronized by gd->arch->ipi_ready. Signed-off-by: Sean Anderson --- Changes in v6: - Fix som

[PATCH v6 09/19] dm: Fix error handling for dev_read_addr_ptr

have dev_remap_addr* for those semantics. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng Reviewed-by: Simon Glass --- Changes in v5: - New drivers/clk/imx/clk-imx8mp.c | 2 +- drivers/core/read.c | 2 +- drivers/pinctrl/broadcom/pinctrl-bcm283x.c

[PATCH v6 10/19] reset: Add generic reset driver

. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- Changes in v5: - Reorder includes - Include linux/err.h explicitly Changes in v4: - Added basic test - Fix incorrect usage of regmap_update_bits Changes in v3: - New arch/sandbox/dts/test.dts | 15 configs

[PATCH v6 16/19] riscv: Try to get cpu frequency from a "clocks" node if it exists

Instead of always using the "clock-frequency" property to determine cpu frequency, try using a clock in "clocks" if it exists. This patch also fixes a bug where there could be spurious higher frequencies if sizeof(u32) != sizeof(ulong). Signed-off-by: Sean Anderson R

Re: [PATCH v1 6/8] spi: dw: Add mem_ops

On 3/5/20 5:15 PM, Eugeniy Paltsev wrote: > Hi Sean, > > do you have branch with this code (all dw spi changes) in some public repo? > I would like to test it with our board (which have DW SPI). > > --- > Eugeniy Paltsev A full tree is available at

Re: [PATCH v2 01/11] clk: Always use the supplied struct clk

om get_rate function >> with composite clocks. > > Do you refer to: > https://gitlab.denx.de/u-boot/u-boot/blob/master/drivers/clk/imx/clk-composite-8m.c#L30 > > There the clk is cast from (struct clk_composite *)clk->data > > (now in U-Boot we do have 4! different implementat

Re: [PATCH 1/2] clk: Move clk-gate2 to clock driver directory

On 1/26/20 3:55 PM, Lukasz Majewski wrote: > Hi Sean > >> Make clk-gate2 available for use outside of imx. >> >> Signed-off-by: Sean Anderson >> --- >> drivers/clk/Makefile | 1 + >> drivers/clk/{imx => }/clk-gate2.c | 20

Re: [PATCH v2 03/11] riscv: Add headers for asm/global_data.h

On 1/26/20 5:04 PM, Lukas Auer wrote: > asm/u-boot.h is usually included with common.h. ulong is defined in > linux/types.h (also included in common.h). It should be sufficient to > include common.h in your source files. > > Thanks, > Lukas So shouldn't asm/u-boot.h include common.h? Or is that

Re: [PATCH v2 05/11] riscv: Add option to disable writes to mcounteren

On 1/26/20 5:09 PM, Lukas Auer wrote: > + Bin, Anup, Atish > > > On Wed, 2020-01-15 at 17:53 -0500, Sean Anderson wrote: >> On the kendryte k210, writes to mcounteren result in an illegal instruction >> exception. >> >> Signed-off-by: Sean Anderson >>

Re: [PATCH v2 07/11] riscv: Add initial Sipeed Maix support

On 1/26/20 5:17 PM, Lukas Auer wrote: > Hi Sean, > > > On Wed, 2020-01-15 at 18:04 -0500, Sean Anderson wrote: >> The Sipeed Maix series is a collection of boards built around the RISC-V >> Kendryte K210 processor. This processor contains several peripherals to >

Re: [PATCH v2 01/11] clk: Always use the supplied struct clk

> [1] https://patchwork.ozlabs.org/patch/1215327/ > [2] https://patchwork.ozlabs.org/patch/1215328/ err, these references should be [1] https://patchwork.ozlabs.org/patch/1215335/ [2] https://patchwork.ozlabs.org/patch/1215337/

Re: [PATCH] riscv: Try to get cpu frequency from device tree

On 1/26/20 11:34 AM, Lukas Auer wrote: > Hi Sean, > Usually, ret is used as a variable name here. I think it would actually > make the code a bit nicer to read here, because the clock rate is not > read from variable err. Hm, I chose err instead of ret since that variable is never the return

[PATCH] riscv: Remove unnecessary instruction

The add instruction on risc-v can have any three sources and targets, so there is no need for an intermediate mov. Signed-off-by: Sean Anderson --- arch/riscv/cpu/start.S | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S

Re: [PATCH v2 01/11] clk: Always use the supplied struct clk

Hi Lukasz, On 1/29/20 7:29 PM, Lukasz Majewski wrote: >> Yes, but then clk_get_parent throws a fit, which gets called by > > Could you explain what "throw a fit" means here? I'm a bit confused. Ok, so imagine I have a clk_divider in a composite clock. When clk_get_rate gets called on the

Re: [PATCH v3 07/12] riscv: Add option to support RISC-V privileged spec 1.9.1

On 2/4/20 11:04 AM, Bin Meng wrote: > Hi Sean, > > On Tue, Feb 4, 2020 at 10:48 PM Sean Anderson wrote: >> In any case, the errors I get are >> >> arch/riscv/cpu/cpu.c: Assembler messages: >> arch/riscv/cpu/cpu.c:94: Error: unknown CSR `CSR_MSCOUNTEREN' >>

[PATCH v3] cmd: Add command to dump drivers and compatible strings

This adds a subcommand to dm to dump out what drivers are installed, and their compatible strings. I have found this useful in ensuring that I have the correct drivers compiled, and that I have put in the correct compatible strings. Signed-off-by: Sean Anderson Reviewed-by: Bin Meng Tested

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