[U-Boot] [PATCH 13/13] fdt: Build warning fixes for 64-bit

From: Thierry Reding tred...@nvidia.com Use the %lx printf specifier to print unsigned long variables to avoid a build warning on 64-bit. Cc: Simon Glass s...@chromium.org Signed-off-by: Thierry Reding tred...@nvidia.com --- lib/fdtdec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions

[U-Boot] [PATCH 07/13] pci: tegra: Build warning fixes for 64-bit

From: Thierry Reding tred...@nvidia.com Use the %pa specifier to print physical addresses rather than %x. The latter causes build warnings on 64-bit. Cc: Tom Warren twar...@nvidia.com Cc: Tom Rini tr...@konsulko.com Signed-off-by: Thierry Reding tred...@nvidia.com --- drivers/pci/pci_tegra.c

[U-Boot] [PATCH 10/13] usb: mass-storage: Build warning fixes for 64-bit

From: Thierry Reding tred...@nvidia.com Fix a printf format mismatch warning seen on 64-bit builds. Cc: Łukasz Majewski l.majew...@samsung.com Cc: Marek Vasut ma...@denx.de Signed-off-by: Thierry Reding tred...@nvidia.com --- drivers/usb/gadget/f_mass_storage.c | 2 +- 1 file changed, 1

[U-Boot] [PATCH 5/6] armv8/gic: Fix GIC v2 initialization

From: Thierry Reding tred...@nvidia.com Initialize all GICD_IGROUPRn registers and set up GICC_CTLR to enable interrupts to the primary CPU. This fixes issues seen after booting a Linux kernel from U-Boot. Suggested-by: Marc Zyngier marc.zyng...@arm.com Suggested-by: Mark Rutland mark.rutl

[U-Boot] [PATCH 6/6] armv8: Allow SoCs to override the generic timer

From: Thierry Reding tred...@nvidia.com Some SoCs come with a custom timer interface, so allow them to use that instead. Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Thierry Reding tred...@nvidia.com --- arch/arm/cpu/armv8/generic_timer.c | 2

[U-Boot] [PATCH 4/6] armv8/mmu: Set bits marked RES1 in TCR

From: Thierry Reding tred...@nvidia.com For EL3 and EL2, the documentation says that bits 31 and 23 are reserved but should be written as 1. For EL1, only bit 23 is not reserved, so only write bit 31 as 1. Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Marc Zyngier marc.zyng...@arm.com Signed

[U-Boot] [PATCH 2/6] ARM: tegra: Disable SPL and non-cached memory on 64-bit

From: Thierry Reding tred...@nvidia.com For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in AArch64 mode so that we don't need the SPL. Non-cached memory is not implemented (yet) for 64-bit ARM. Cc: Tom Warren twar...@nvidia.com Signed-off-by: Thierry Reding tred...@nvidia.com

[U-Boot] [PATCH 1/6] ARM: tegra: Prepare for 64-bit support

From: Thierry Reding tred...@nvidia.com Move various selects from the TEGRA symbol to the symbols for 32-bit Tegra boards. This is necessary because these settings do not extend to U-Boot for 64-bit Tegra SoCs. Also tie the private libgcc build to SPL, it isn't needed on 64-bit Tegra. Cc: Tom

[U-Boot] [PATCH 3/6] ARM: tegra: Use standard cache enable for 64-bit

From: Thierry Reding tred...@nvidia.com On 64-bit SoCs the I-cache isn't enabled in early code, so the default cache enable functions for 64-bit ARM can be used. Cc: Tom Warren twar...@nvidia.com Signed-off-by: Thierry Reding tred...@nvidia.com --- arch/arm/mach-tegra/board.c | 2 +- 1 file

[U-Boot] [PATCH 6/6] ARM: tegra: Make pinmux.h standalone includible

From: Thierry Reding tred...@nvidia.com This header file uses type definitions (u8, u32) from linux/types.h but doesn't include it. If includes aren't carefully ordered this can cause build failures. Cc: Tom Warren twar...@nvidia.com Signed-off-by: Thierry Reding tred...@nvidia.com --- arch/arm

[U-Boot] [PATCH 5/6] ARM: tegra: Skip FDT and initrd relocation on 64-bit

From: Thierry Reding tred...@nvidia.com U-Boot inspects the initrd_high and fdt_high environment variables and skips relocation of the initial ramdisk and FDT, respectively, if these variables are set to all-ones. The Tegra configuration sets these variables to in the default environment

[U-Boot] [PATCH 4/6] ARM: tegra: Restrict usable RAM to 32-bit on 64-bit SoCs

From: Thierry Reding tred...@nvidia.com Most peripherals on Tegra can do DMA only to the lower 32-bit address space, even on 64-bit SoCs. This limitation is typically overcome by the use of an IOMMU. Since the IOMMU is not entirely trivial to set up and serves no other purpose (I/O protection

Re: [U-Boot] 64Bit device tree compilation

On Thu, Mar 19, 2015 at 07:43:35AM -0600, Simon Glass wrote: Hi Hanna, On 18 March 2015 at 11:17, Hanna Hawa han...@marvell.com wrote: Hi Simon, My name is Hanna, I’m working in Software team in Marvell with Yehuda. I’m trying to run U-Boot with FDT in 64Bit. I’ve issue

Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix

| 5 ++ 20 files changed, 428 insertions(+), 98 deletions(-) create mode 100644 arch/arm/mach-tegra/psci.S create mode 100644 arch/arm/mach-tegra/tegra124/ap.c For the series: Reviewed-by: Thierry Reding tred...@nvidia.com Tested-by: Thierry Reding tred...@nvidia.com

[U-Boot] [PATCH 2/3] fdt: Fix fdtdec_get_addr_size() for 64-bit

From: Thierry Reding tred...@nvidia.com The current implementation of fdtdec_get_addr_size() assumes that the sizes of fdt_addr_t and fdt_size_t match the number of cells specified by the #address-cells and #size-cells properties. However, there is no reason why that needs to be the case, so

[U-Boot] [PATCH 1/3] fdt: Export fdtdec_get_number()

From: Thierry Reding tred...@nvidia.com Drivers that need to parse addresses from the device tree will want to reuse this function rather than duplicating it. Cc: Simon Glass s...@chromium.org Signed-off-by: Thierry Reding tred...@nvidia.com --- include/fdtdec.h | 8 lib/fdtdec.c

[U-Boot] [PATCH 3/3] fdt: Fix fdtdec_get_pci_addr() for 64-bit

From: Thierry Reding tred...@nvidia.com The fdtdec_get_pci_addr() implementation uses fdt_addr_to_cpu() to read cells from an FDT blob. That is wrong because cells are always 32 bits wide, irrespective of the architecture's address bus width, which does not apply to fdt_addr_t. Besides reading

[U-Boot] [PATCH] common: Fix source command on 64-bit architectures

From: Thierry Reding tred...@nvidia.com The source command uses an unsigned long to iterate over the 32-bit lengths array contained in the legacy image format. On architectures where unsigned long is 64-bit this fails to find the correct entry point of a script. Cc: Tom Rini tr...@konsulko.com

[U-Boot] [PATCH] config: Use booti instead of bootz on 64-bit ARM

From: Thierry Reding tred...@nvidia.com The bootz command doesn't work with Linux kernel images on 64-bit ARM. The replacement command with the same interface and functionality is booti. Cc: Dennis Gilmore den...@ausil.us Cc: Tom Rini tr...@konsulko.com Signed-off-by: Thierry Reding tred

[U-Boot] [PATCH] config: Define BOOTP client architecture and VCI for ARMv8

From: Thierry Reding tred...@nvidia.com Reuse the 32-bit ARM client architecture and identify ARMv8 specifically by setting the BOOTP VCI string. Cc: Dennis Gilmore den...@ausil.us Cc: Tom Rini tr...@konsulko.com Signed-off-by: Thierry Reding tred...@nvidia.com --- include

Re: [U-Boot] [PATCH v5 08/14] virt-dt: Allow reservation of secure region when in a RAM carveout

On Wed, Mar 11, 2015 at 11:12:25AM -0400, Tom Rini wrote: * PGP Signed by an unknown key On Mon, Mar 09, 2015 at 08:00:18AM +0100, Jan Kiszka wrote: In this case the secure code lives in RAM, and hence the memory node in the device tree needs to be adjusted. This avoids that the OS will

Re: [U-Boot] [PATCH] ehci-hcd: fix warnings on 64-bit builds

On Tue, Mar 24, 2015 at 04:42:04PM +0100, Marek Vasut wrote: On Tuesday, March 24, 2015 at 12:36:55 AM, Rob Herring wrote: On Fri, Mar 20, 2015 at 8:19 AM, Marek Vasut ma...@denx.de wrote: On Tuesday, March 17, 2015 at 09:46:37 PM, Rob Herring wrote: Change addresses to unsigned long to

Re: [U-Boot] [PATCH v2 09/12] tegra124: Add PSCI support for Tegra124

On Tue, Feb 24, 2015 at 08:23:55AM +0100, Jan Kiszka wrote: On 2015-02-20 10:36, Jan Kiszka wrote: On 2015-02-19 10:14, Thierry Reding wrote: On Wed, Feb 18, 2015 at 09:34:53AM -0700, Stephen Warren wrote: On 02/17/2015 11:13 PM, Jan Kiszka wrote: On 2015-02-17 22:03, Stephen Warren wrote

Re: [U-Boot] [PATCH v3 09/12] tegra124: Add PSCI support for Tegra124

On Wed, Feb 18, 2015 at 09:14:03AM +0100, Jan Kiszka wrote: [...] +ENTRY(psci_cpu_off) + bl psci_cpu_off_common + + mrc p15, 0, r1, c0, c0, 5 @ MPIDR + and r1, r1, #7 @ number of CPUs in cluster + + get_csr_reg r1, r2, r3 + + ldr

Re: [U-Boot] [PATCH v3 09/12] tegra124: Add PSCI support for Tegra124

On Wed, Feb 18, 2015 at 09:14:03AM +0100, Jan Kiszka wrote: [...] diff --git a/arch/arm/cpu/armv7/tegra124/ap.c b/arch/arm/cpu/armv7/tegra124/ap.c [...] +void ap_pm_init(void) +{ + struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; + struct pmc_ctlr *pmc = (struct

Re: [U-Boot] [PATCH v1 0/4] Jetson-TK1 support for PSCI

On Fri, Jan 23, 2015 at 12:37:20PM +, Mark Rutland wrote: On Fri, Jan 23, 2015 at 10:10:45AM +, Thierry Reding wrote: On Thu, Jan 22, 2015 at 07:20:15PM +, Mark Rutland wrote: On Fri, Jan 16, 2015 at 09:12:59AM +, Thierry Reding wrote: On Thu, Jan 15, 2015 at 07:19:37PM

Re: [U-Boot] [PATCH] pci: tegra: Fix port information parsing

On Sat, Jan 24, 2015 at 12:19:56PM +0800, Bin Meng wrote: Hi Thierry, On Fri, Jan 23, 2015 at 6:19 PM, Thierry Reding tred...@nvidia.com wrote: On Thu, Jan 22, 2015 at 12:04:06AM +0800, Bin Meng wrote: Hi Thierry, On Wed, Jan 21, 2015 at 5:40 PM, Thierry Reding tred...@nvidia.com wrote

Re: [U-Boot] [PATCH] net: Use u32 instead of ulong for transaction ID in bootp

-by: Michal Simek michal.si...@xilinx.com --- include/net.h | 14 +++--- net/bootp.c | 18 +- net/bootp.h | 2 +- 3 files changed, 17 insertions(+), 17 deletions(-) Looks reasonable to me: Reviewed-by: Thierry Reding tred...@nvidia.com pgpOQfwEm0gNi.pgp

Re: [U-Boot] [PATCH V2 2/2] ARM: tegra: Add p2371-0000 board

On Wed, Jul 29, 2015 at 02:16:33PM -0600, Stephen Warren wrote: From: Stephen Warren swar...@nvidia.com Signed-off-by: Stephen Warren swar...@nvidia.com --- v2: Use named constants for PMIC I2C and register addresses. --- arch/arm/dts/Makefile | 1 +

[U-Boot] [PATCH 4/6] e2220-1170: Remove hard-coded counter frequency

From: Thierry Reding tred...@nvidia.com The counter frequency is derived from clk_m on Tegra, but that clock can be configured by the primary bootloader to run at the same frequency as the oscillator (38.4 MHz on Tegra210) or a divided down frequency (most typically 19.2 MHz). Remove the hard

[U-Boot] [PATCH 5/6] p2371: Remove hard-coded counter frequency

From: Thierry Reding tred...@nvidia.com The counter frequency is derived from clk_m on Tegra, but that clock can be configured by the primary bootloader to run at the same frequency as the oscillator (38.4 MHz on Tegra210) or a divided down frequency (most typically 19.2 MHz). Remove the hard

[U-Boot] [PATCH 6/6] p2571: Remove hard-coded counter frequency

From: Thierry Reding tred...@nvidia.com The counter frequency is derived from clk_m on Tegra, but that clock can be configured by the primary bootloader to run at the same frequency as the oscillator (38.4 MHz on Tegra210) or a divided down frequency (most typically 19.2 MHz). Remove the hard

[U-Boot] [PATCH 3/6] ARM: tegra: clk_m is the architected timer source clock

From: Thierry Reding tred...@nvidia.com While clk_m and the oscillator run at the same frequencies on Tegra114 and Tegra124, clk_m is the proper source for the architected timer. On more recent Tegra generations, Tegra210 and later, both the oscillator and clk_m can run at different frequencies

[U-Boot] [PATCH 2/6] ARM: tegra: Implement clk_m

From: Thierry Reding tred...@nvidia.com On currently supported SoCs, clk_m always runs at the same frequency as the oscillator input. However newer SoC generations such as Tegra210 no longer have that restriction. Prepare for that by separating clk_m from the oscillator clock and allow SoC code

[U-Boot] [PATCH 1/6] armv8: Make COUNTER_FREQUENCY optional

From: Thierry Reding tred...@nvidia.com Some platforms have the means to determine the counter frequency at runtime, so give them an opportunity to do so. Signed-off-by: Thierry Reding tred...@nvidia.com --- arch/arm/cpu/armv8/start.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch

[U-Boot] [PATCH 3/3] armv8/gic: Fix GIC v2 initialization

From: Thierry Reding tred...@nvidia.com Initialize all GICD_IGROUPRn registers and set up GICC_CTLR to enable interrupts to the primary CPU. This fixes issues seen after booting a Linux kernel from U-Boot. Suggested-by: Marc Zyngier marc.zyng...@arm.com Suggested-by: Mark Rutland mark.rutl

[U-Boot] [PATCH 2/3] armv8/mmu: Set bits marked RES1 in TCR

From: Thierry Reding tred...@nvidia.com For EL3 and EL2, the documentation says that bits 31 and 23 are reserved but should be written as 1. For EL1, only bit 23 is not reserved, so only write bit 31 as 1. Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Marc Zyngier marc.zyng...@arm.com Signed

[U-Boot] [PATCH 1/3] armv8/mmu: Clean up TCR programming

From: Thierry Reding tred...@nvidia.com Use the inner shareable attribute for memory, which makes more sense considering that this code is called when caches are being enabled. Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Thierry Reding tred

Re: [U-Boot] [PATCH V2 2/2] ARM: tegra: Add p2371-0000 board

On Wed, Aug 19, 2015 at 11:41:09AM -0600, Stephen Warren wrote: On 08/19/2015 07:56 AM, Thierry Reding wrote: On Wed, Jul 29, 2015 at 02:16:33PM -0600, Stephen Warren wrote: From: Stephen Warren swar...@nvidia.com Signed-off-by: Stephen Warren swar...@nvidia.com --- v2: Use named constants

[U-Boot] [PATCH] image: Fix loop condition to avoid warning

From: Thierry Reding tred...@nvidia.com GCC 5.1 starts warning for comparisons such as !a 0, assuming that the negation was meant to apply to the whole expression rather than just the left operand. Indeed the comparison in the FIT loadable code is confusingly written, though it does end up

Re: [U-Boot] [PATCH 3/5] arm: tegra30: video: integrate display driver for t30

On Thu, Aug 20, 2015 at 11:46:41PM +, Marcel Ziswiler wrote: On 20 Aug 2015 22:09, Stephen Warren swar...@wwwdotorg.org wrote: Hopefully the process was to copy the Linux Tegra30 DT verbatim? No, the T20 one is far from verbatim neither. So I just did the adjustments analogous by

Re: [U-Boot] [PATCH 3/5] arm: tegra30: video: integrate display driver for t30

On Fri, Aug 21, 2015 at 06:37:37PM -0600, Simon Glass wrote: [...] I have serious doubts about the wisdom of requiring a contributor to completely re-architect the existing display system in U-Boot. It's a big job. Perhaps we can settle for following along the same lines and not making things

[U-Boot] [PATCH 2/2] ARM: tegra: Use architected timer on ARMv8

From: Thierry Reding tred...@nvidia.com ARMv8 requires an architected timer to be present, so it can be used instead of the Tegra US timer. This allows for better code reuse. Signed-off-by: Thierry Reding tred...@nvidia.com --- include/configs/tegra-common.h | 3 +++ 1 file changed, 3

[U-Boot] [PATCH 1/2] ARM: tegra: Initialize timer earlier

From: Thierry Reding tred...@nvidia.com A subsequent patch will enable the use of the architected timer on ARMv8. Doing so implies that udelay() will be backed by this timer implementation, and hence the architected timer must be ready when udelay() is first called. The first time udelay

Re: [U-Boot] [PATCH] armv8: Allow SoCs to override the generic timer

On Wed, Jul 22, 2015 at 04:56:10PM -0600, Stephen Warren wrote: From: Thierry Reding tred...@nvidia.com Some SoCs come with a custom timer interface, so allow them to use that instead. swarren notes: I did consider reworking this patch so the Makefile only compiles generic_timer.c ifndef

Re: [U-Boot] [PATCH] fdt: Fix fdtdec_get_addr_size() for 64-bit

On Sun, Aug 02, 2015 at 03:27:53PM -0600, Simon Glass wrote: Hi, On 27 July 2015 at 11:13, Simon Glass s...@chromium.org wrote: Hi, On 23 July 2015 at 10:51, Stephen Warren swar...@wwwdotorg.org wrote: From: Thierry Reding tred...@nvidia.com Signed-off-by: Thierry Reding tred

Re: [U-Boot] [PATCH] Revert fdt: Fix fdtdec_get_addr_size() for 64-bit

On Sun, Aug 02, 2015 at 06:13:50PM -0600, Simon Glass wrote: This reverts commit 5b34436035fc862b5e8d0d2c3eab74ba36f1a7f4. This function has a few problems. It calls fdt_parent_offset() which as mentioned in code review is very slow. https://patchwork.ozlabs.org/patch/499482/

Re: [U-Boot] [PATCH] fdt: Fix fdtdec_get_addr_size() for 64-bit

On Tue, Aug 04, 2015 at 09:23:27AM -0600, Stephen Warren wrote: On 08/04/2015 08:26 AM, Thierry Reding wrote: ... [ discussion of new fdtdec_get_addr_size() implementation] So what this does is really fix parsing of address and size cells in the general case, though it would still fail

Re: [U-Boot] [PATCH 1/2] ARM: tegra: Add e2220-1170 board

On Thu, Jul 30, 2015 at 12:13:06PM -0600, Stephen Warren wrote: On 07/29/2015 05:02 PM, Simon Glass wrote: Hi Stephen, On 29 July 2015 at 13:48, Stephen Warren swar...@wwwdotorg.org wrote: Commit message? I guess I can add one, but there really much useful additional information I

Re: [U-Boot] [PATCH V3 6/6] T210: Add support for 64-bit T210-based P2571 board

On Tue, Jul 28, 2015 at 01:27:07PM -0600, Stephen Warren wrote: On 07/24/2015 04:01 PM, Tom Warren wrote: Based on Venice2, incorporates Stephen Warren's latest P2571 pinmux table. With Thierry Reding's 64-bit build fixes, this will build and and boot in 64-bit on my P2571 (when used with

Re: [U-Boot] [PATCH V3 6/6] T210: Add support for 64-bit T210-based P2571 board

On Wed, Jul 29, 2015 at 10:09:57AM -0600, Stephen Warren wrote: On 07/29/2015 05:07 AM, Thierry Reding wrote: On Tue, Jul 28, 2015 at 01:27:07PM -0600, Stephen Warren wrote: On 07/24/2015 04:01 PM, Tom Warren wrote: Based on Venice2, incorporates Stephen Warren's latest P2571 pinmux table

Re: [U-Boot] [PATCH] ARM: tegra: restrict usable RAM size further

On Wed, Jul 29, 2015 at 01:47:58PM -0600, Stephen Warren wrote: From: Stephen Warren swar...@nvidia.com Additionally, ARM64 devices typically run a secure monitor in EL3 and U-Boot in EL2, and set up some secure RAM carve-outs to contain the EL3 code and data. These carve-outs are located at

Re: [U-Boot] [PATCH] Revert fdt: Fix fdtdec_get_addr_size() for 64-bit

On Fri, Aug 14, 2015 at 04:44:28PM +0800, Bin Meng wrote: Hi Thierry, On Fri, Aug 14, 2015 at 4:32 PM, Thierry Reding tred...@nvidia.com wrote: On Fri, Aug 14, 2015 at 04:10:32PM +0800, Bin Meng wrote: Hi, On Sun, Aug 9, 2015 at 11:08 PM, Simon Glass s...@chromium.org wrote: Hi

Re: [U-Boot] [PATCH] Revert fdt: Fix fdtdec_get_addr_size() for 64-bit

On Fri, Aug 14, 2015 at 04:10:32PM +0800, Bin Meng wrote: Hi, On Sun, Aug 9, 2015 at 11:08 PM, Simon Glass s...@chromium.org wrote: Hi Stephen, On 6 August 2015 at 13:03, Stephen Warren swar...@wwwdotorg.org wrote: On 08/05/2015 05:45 PM, Simon Glass wrote: Hi Stephen, On 5

Re: [U-Boot] [PATCH v2 04/40] fdt: Add functions to retrieve strings

On Wed, Jul 15, 2015 at 01:35:26PM +0200, Albert ARIBAUD wrote: Hello Thierry, On Wed, 15 Jul 2015 13:17:18 +0200, Thierry Reding thierry.red...@gmail.com wrote: On Tue, Jul 14, 2015 at 01:48:45PM -0600, Simon Glass wrote: +Scott, Masahiro Hi Thierry, On 25 March 2015 at 17

Re: [U-Boot] [PATCH 1/1] ARM: tegra: Add Tegra20 SPI device nodes

On Mon, Jul 20, 2015 at 01:41:00PM +0200, Mirza Krak wrote: From: Mirza Krak mirza.k...@hostmobility.com Add the device tree node for the SPI controllers found on Tegra20 SOCs. Signed-off-by: Mirza Krak mirza.k...@hostmobility.com --- arch/arm/dts/tegra20.dtsi | 44

Re: [U-Boot] [PATCH v2 04/40] fdt: Add functions to retrieve strings

On Tue, Jul 14, 2015 at 01:48:45PM -0600, Simon Glass wrote: +Scott, Masahiro Hi Thierry, On 25 March 2015 at 17:23, Simon Glass s...@chromium.org wrote: Hi Thierry, On 8 September 2014 at 09:02, Simon Glass s...@chromium.org wrote: Applied to u-boot-fdt/next, thanks! Did you

Re: [U-Boot] [PATCH 2/8] dm: pci: Avoid a driver model build error with CONFIG_CMD_PCI_ENUM

On Fri, Oct 23, 2015 at 11:30:04AM -0600, Stephen Warren wrote: > On 10/23/2015 09:47 AM, Simon Glass wrote: > >Hi Stephen, > > > >On 21 October 2015 at 14:16, Stephen Warren wrote: > >>On 10/17/2015 11:49 AM, Simon Glass wrote: > >>> > >>>This is not supported with driver

Re: [U-Boot] [PATCH 4/4] ARM: tegra210: gpu: configure WPR region

On Wed, Oct 28, 2015 at 11:59:04AM -0600, Stephen Warren wrote: > On 10/18/2015 10:57 PM, Alexandre Courbot wrote: > >T210's GPU secure firmware loading requires a write-protected region > >to be set up. > > > >This patch reserves the upper 256KB of RAM as the WPR region and locks > >it so the

Re: [U-Boot] [PATCH 4/4] ARM: tegra210: gpu: configure WPR region

On Mon, Nov 09, 2015 at 08:19:48AM -0700, Stephen Warren wrote: > On 11/09/2015 07:36 AM, Thierry Reding wrote: > >On Wed, Oct 28, 2015 at 11:59:04AM -0600, Stephen Warren wrote: > >>On 10/18/2015 10:57 PM, Alexandre Courbot wrote: > >>>T210's GPU secure firmware load

Re: [U-Boot] [PATCH] fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT

equivalent patch in my tree, but possibly never sent it out because I never managed to get PCIe to work. Anyway: Reviewed-by: Thierry Reding <tred...@nvidia.com> signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 2/6] ARM: tegra: create common XUSB padctl driver file

On Mon, Oct 05, 2015 at 04:59:17PM -0600, Stephen Warren wrote: [...] > It'd be nice if "git format-patch -C" recognized this as a copy, since > that's why I created a separate patch, but it doesn't seem to:-( Have you tried tuning the behaviour by passing the similarity index to -C? I've had

Re: [U-Boot] [PATCH 3/5] arm: tegra30: video: integrate display driver for t30

On Tue, Aug 25, 2015 at 10:03:13AM -0600, Simon Glass wrote: On 25 August 2015 at 05:02, Thierry Reding tred...@nvidia.com wrote: On Mon, Aug 24, 2015 at 10:58:48AM -0600, Simon Glass wrote: On 24 August 2015 at 04:12, Thierry Reding tred...@nvidia.com wrote: [...] SOR is an even worse

Re: [U-Boot] [PATCH 3/5] arm: tegra30: video: integrate display driver for t30

On Mon, Aug 24, 2015 at 10:03:35PM +, Marcel Ziswiler wrote: On 21 Aug 2015 11:29, Thierry Reding tred...@nvidia.com wrote: Perhaps a good idea would be to simply copy what we have in the kernel and see where (if at all) U-Boot breaks down and fix it to work properly with upstream DTBs

[U-Boot] [PATCH 1/2] ARM: tegra124: Clear IDDQ when enabling PLLC

From: Thierry Reding <tred...@nvidia.com> Enabling a PLL while IDDQ is high. The Linux kernel checks for this condition and warns about it verbosely, so while this seems to work fine, fix it up according to the programming guidelines provided in the Tegra K1 TRM (v02p), Section 5.3.8.1

[U-Boot] [PATCH 2/2] ARM: tegra114: Clear IDDQ when enabling PLLC

From: Thierry Reding <tred...@nvidia.com> Enabling a PLL while IDDQ is high. The Linux kernel checks for this condition and warns about it verbosely, so while this seems to work fine, fix it up according to the programming guidelines provided in the Tegra K1 TRM (v02p), Section 5.3.8.1

Re: [U-Boot] [PATCH 3/5] arm: tegra30: video: integrate display driver for t30

On Mon, Aug 24, 2015 at 10:58:48AM -0600, Simon Glass wrote: +Nikita Hi Thierry, On 24 August 2015 at 04:12, Thierry Reding tred...@nvidia.com wrote: On Fri, Aug 21, 2015 at 06:37:37PM -0600, Simon Glass wrote: [...] I have serious doubts about the wisdom of requiring a contributor

Re: [U-Boot] [PATCH 2/2] ARM: tegra114: Clear IDDQ when enabling PLLC

On Tue, Sep 08, 2015 at 03:58:38PM +, Tom Warren wrote: > Thierry, > > > -Original Message- > > From: Thierry Reding [mailto:thierry.red...@gmail.com] > > Sent: Tuesday, September 08, 2015 2:38 AM > > To: Tom Warren > > Cc: Nicolas Chauvet; u-boot@l

Re: [U-Boot] [PATCH 1/2] ARM: tegra124: Clear IDDQ when enabling PLLC

On Wed, Sep 09, 2015 at 08:37:34PM -0700, Stephen Warren wrote: > On 09/08/2015 02:38 AM, Thierry Reding wrote: > > From: Thierry Reding <tred...@nvidia.com> > > > > Enabling a PLL while IDDQ is high. The Linux kernel checks for this > > Is there some word mi

Re: [U-Boot] [PATCH 3/4] tegra: video: Always use write-through cache on LCD

On Mon, Jan 18, 2016 at 01:07:10PM -0700, Stephen Warren wrote: > On 01/14/2016 01:26 PM, Simon Glass wrote: > >This seems to give the best performance, so let's use it always. > > I thought we chose the current cache mode due to display corruption issues > with other modes, but I tested a change

Re: [U-Boot] [PATCH 0/4] tegra: Move tegra20 towards the 'new' display bindings

On Tue, Jan 19, 2016 at 09:47:11AM -0700, Stephen Warren wrote: > On 01/18/2016 06:58 PM, Simon Glass wrote: > >Hi Stephen, > > > >On 18 January 2016 at 12:52, Stephen Warren wrote: > >>On 01/14/2016 04:12 PM, Simon Glass wrote: > >>> > >>>Hi Lucas, > >>> > >>>On 14 January

Re: [U-Boot] [PATCH] ARM: tegra: rm Jetson TK1 PMIC GPIO programming

board/nvidia/jetson-tk1/jetson-tk1.c | 13 ----- > 1 file changed, 13 deletions(-) Looks reasonable to me: Acked-by: Thierry Reding <tred...@nvidia.com> signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] ARM: tegra: rm Jetson TK1 PMIC GPIO programming

igger a visual glitch in the serial output, though I'm not sure I had seen one like that back when I initially added this support. Either way, this patch: Tested-by: Thierry Reding <tred...@nvidia.com> signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] pci: restore initialization for DM_PCI

++ > 2 files changed, 15 insertions(+), 2 deletions(-) Either way, this change restores network support on Jetson TK1, so Tested-by: Thierry Reding <tred...@nvidia.com> signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 2/2] Add support the Avionic Design Meerkat COM and Kein Baseboard

On Mon, Feb 29, 2016 at 09:48:21AM -0700, Stephen Warren wrote: > On 02/29/2016 03:20 AM, Julian Scheel wrote: > >Hi Stephen, > > > >On 23.02.2016 19:03, Stephen Warren wrote: > >>On 02/23/2016 05:59 AM, Julian Scheel wrote: > >>>Add support for platforms based on the Meerkat COM module. Includes

Re: [U-Boot] [PATCH] ARM: tegra: enable GPU node by compatible value

; by name. > > Fix that function to enable nodes based on their compatible value rather > than their node name. This will work no matter what the node name is, i.e > for DTs both before and after any rename operation. > > Cc: Thierry Reding <tred...@nvidia.com> > Cc: Alex

Re: [U-Boot] [PATCH 2/2] video: tegra: refuse to bind to disabled dcs

ight thing, remove the workaround > for this issue from Seaboard's DT file. > > Cc: Thierry Reding <tred...@nvidia.com> > Signed-off-by: Stephen Warren <swar...@nvidia.com> > --- > Thierry, I assume this is how the DC nodes are intended to be interpreted? > It's cert

Re: [U-Boot] [PATCH] pci: tegra: fix DM conversion issues on Tegra20

; --- > drivers/pci/pci_tegra.c | 21 ++--- > 1 file changed, 10 insertions(+), 11 deletions(-) Neat: Reviewed-by: Thierry Reding <tred...@nvidia.com> signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] PCIe bridges on Jetson TK1

On Sun, Jul 17, 2016 at 02:27:25AM +0200, Andreas Färber wrote: > Hi, > > When I boot my Jetson TK1, by default I get this from lspci: > > 00:02.0 PCI bridge: NVIDIA Corporation TegraK1 PCIe x1 Bridge (rev a1) > 01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. > RTL8111/8168/8411 PCI

Re: [U-Boot] PCIe bridges on Jetson TK1

On Mon, Jul 18, 2016 at 08:27:18AM +0200, Thierry Reding wrote: > On Sun, Jul 17, 2016 at 02:27:25AM +0200, Andreas Färber wrote: > > Hi, > > > > When I boot my Jetson TK1, by default I get this from lspci: > > > > 00:02.0 PCI bridge: NVIDIA Corporation Tegra

Re: [U-Boot] [PATCH] serial: ns16550: Fix serial output on Tegra186

On Fri, Sep 30, 2016 at 10:47:38AM +0100, Paul Burton wrote: > On Friday, 30 September 2016 17:53:38 BST Alexandre Courbot wrote: > > On 09/30/2016 05:46 PM, Thierry Reding wrote: > > > From: Thierry Reding <tred...@nvidia.com> > > > > > > For Tegra186 t

[U-Boot] [PATCH] serial: ns16550: Fix serial output on Tegra186

From: Thierry Reding <tred...@nvidia.com> For Tegra186 there are currently no UART clocks wired up in device tree. This exposes a regression introduced in commit 50fce1d5d874 ("serial: ns16550: Support clocks via phandle"), which causes the p2771--500 board (and probably an

Re: [U-Boot] [PATCH] serial: ns16550: Handle -ENOENT when requesting clock

r...@nvidia.com> Agreed, this looks like the more correct fix in retrospect. Acked-by: Thierry Reding <tred...@nvidia.com> signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] tegra: mmc: Set the bus width correctly

On Wed, Jun 14, 2017 at 03:33:18PM +, Tom Warren wrote: > Thanks, Simon. I'll take it in to u-boot-tegra/master for the next PR. I assume this means it'll make v2017.07? Currently v2017.07-rc2 is broken, and this patch fixes the regression for me: Tested-by: Thierry Reding &l

Re: [U-Boot] [PATCH] fdt: Fixup only valid memory banks

On Tue, Jan 30, 2018 at 12:41:15PM +0100, Lothar Waßmann wrote: > Hi, > > On Tue, 30 Jan 2018 11:34:17 +0100 Thierry Reding wrote: > > From: Thierry Reding <tred...@nvidia.com> > > > > Memory banks with address 0 and size 0 are empty and should not be >

[U-Boot] [PATCH] fdt: Fixup only valid memory banks

From: Thierry Reding <tred...@nvidia.com> Memory banks with address 0 and size 0 are empty and should not be passed to the OS via device tree. Signed-off-by: Thierry Reding <tred...@nvidia.com> --- common/fdt_support.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-)

[U-Boot] [PATCH v2] fdt: Fixup only valid memory banks

From: Thierry Reding <tred...@nvidia.com> Memory banks with address 0 and size 0 are empty and should not be passed to the OS via device tree. Acked-by: Stephen Warren <swar...@nvidia.com> Signed-off-by: Thierry Reding <tred...@nvidia.com> --- Changes in v2: - check whether or

Re: [U-Boot] [PATCH v3 00/10] splash screen on the stm32f769 disco board

On Tue, Mar 13, 2018 at 04:23:10PM +0100, Daniel Vetter wrote: > On Tue, Mar 13, 2018 at 02:49:59PM +0100, yannick fertre wrote: > > Version 3: > > - Replace some pr_error, pr_warn or pr_info by dev_error, dev_warn & > > dev_info. > > - Refresh stm32f769-disco_defconfig with last modification

Re: [U-Boot] [PATCH v2 00/15] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support

are name: NVIDIA P2771--500 (DT) > [0.00] Call trace: > [0.00] dump_backtrace+0x0/0x128 > [0.00] show_stack+0x24/0x30 > [0.00] dump_stack+0xa8/0xcc > [0.00] panic+0x12c/0x2dc > [0.00] time_init+0x34/0x4c > [0.00] star

Re: [U-Boot] [PATCH v2 00/15] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support

R_CPUS=256 to nr_cpu_ids=1. > > > [0.00] Tasks RCU enabled. > > > [0.00] rcu: RCU calculated value of scheduler-enlistment delay > > > is 10 jiffies. > > > [0.00] rcu: Adjusting geometry for rcu_fanout_leaf=16, > > > nr_cpu_ids

Re: [U-Boot] [PATCH v3 01/13] libfdt: Add phandle generation helper

On Fri, Mar 22, 2019 at 03:52:59PM +0800, Simon Glass wrote: > On Fri, 22 Mar 2019 at 02:10, Thierry Reding wrote: > > > > From: Thierry Reding > > > > The new fdt_generate_phandle() function can be used to generate a new, > > unused phandle given a specific dev

[U-Boot] [PATCH v4 01/19] ARM: tegra: Use common header for PMU declarations

From: Thierry Reding There's no need to replicate the pmu.h header file for every Tegra SoC generation. Use a single header that is shared across generations. Signed-off-by: Thierry Reding --- .../include/asm/{arch-tegra20 => arch-tegra}/pmu.h | 6 +++--- arch/arm/include/asm/arch-tegra

[U-Boot] [PATCH v4 13/19] ARM: tegra: Implement cboot_save_boot_params() in C

From: Thierry Reding This is easier to deal with and works just as well for this simple function. Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/Makefile | 2 +- arch/arm/mach-tegra/cboot.c| 12 arch/arm/mach-tegra/cboot_ll.S | 20 3 files

[U-Boot] [PATCH v4 07/19] ARM: tegra: Fix save_boot_params() prototype

From: Thierry Reding The save_boot_params() function takes as its first four arguments the first four registers. On 32-bit ARM these are r0, r1, r2 and r3, all of which are 32 bits wide. However, on 64-bit ARM thene registers are x0, x1, x2 and x3, all of which are 64 bits wide. In order

[U-Boot] [PATCH v4 05/19] ARM: tegra: Guard pin controller code with a Kconfig symbol

From: Thierry Reding Pin controller code is not relevant on all Tegra SoC generations, so guard it with a Kconfig symbol that can be selected by the generations that need it. This is in preparation for unifying Tegra186 code with the code used on older generations. Signed-off-by: Thierry

[U-Boot] [PATCH v4 08/19] ARM: tegra: Allow boards to override boot target devices

From: Thierry Reding Boards may not support all the boot target devices in the default list for Tegra devices. Allow a board to override the list and default to the standard list only if the board hasn't specified one itself. Signed-off-by: Thierry Reding --- include/configs/tegra-common

[U-Boot] [PATCH v4 02/19] ARM: tegra: Guard clock code with a Kconfig symbol

From: Thierry Reding Clock code is not relevant on all Tegra SoC generations, so guard it with a Kconfig symbol that can be selected by the generations that need it. This is in preparation for unifying Tegra186 code with the code used on older generations. Signed-off-by: Thierry Reding

[U-Boot] [PATCH v4 04/19] ARM: tegra: Guard memory controller code with a Kconfig symbol

From: Thierry Reding Memory controller code is not relevant on all Tegra SoC generations, so guard it with a Kconfig symbol that can be selected by the generations that need it. This is in preparation for unifying Tegra186 code with the code used on older generations. Signed-off-by: Thierry

[U-Boot] [PATCH v4 03/19] ARM: tegra: Guard GP pad control code with a Kconfig symbol

From: Thierry Reding The GP pad control code is not relevant on all Tegra SoC generations, so guard it with a Kconfig symbol that can be selected by the generations that need it. This is in preparation for unifying Tegra186 code with the code used on older generations. Signed-off-by: Thierry

[U-Boot] [PATCH v4 00/19] ARM: tegra: Miscellaneous improvements

From: Thierry Reding The bulk of these changes are an effort to unify Tegra186 builds with builds of prior 64-bit Tegra generations. On top of that there are various improvements that allow data (such as the MAC address and boot arguments) to be passed through from early firmware to the kernel

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