From: Tudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash,
and on sama5d27_som1_ek with sst26vf064b spi-nor flash.
V5: drop struct platform_device *pdev; linux leftover, add 2 new
blank lines
v4: Update
From: Tudor Ambarus
Describe the DT bindings for the driver of the Atmel QSPI
controller. Taken form linux v5.1-rc5.
Signed-off-by: Tudor Ambarus
---
v5: no change
v4: no change
v3: no change
v2: no change
doc/device-tree-bindings/spi/atmel-quadspi.txt | 37 ++
1 file
From: Tudor Ambarus
We have a macronix spi-nor flash on sama5d2_xplained RevB and
a sst spi-nor flash on RevC. Select the rest for testing purposes.
Signed-off-by: Tudor Ambarus
---
v5: no change
v4: no change
v3: no change
v2: new patch
configs/sama5d2_xplained_emmc_defconfig | 5 +
From: Tudor Ambarus
Use the qspi memory layout defined in at91-sama5_common - it aligns
with the 8 Mbyte flash (sst26vf064b-104i/sn) available in sama5d27_som1_ek.
Signed-off-by: Tudor Ambarus
---
v5: no change
v4: no change
v3: no change
v2: new patch
include/configs/sama5d27_som1_ek.h | 7
From: Cyrille Pitchen
Fix the following:
- use "jedec,spi-nor" binding, we use jedec compatible flashes
- set bus width to 4, we use quad capable flashes
- differentiate bewteen data and clk and cs pins
- drop partions as we don't use them in u-boot.
Signed-off-by: Cyrille Pitchen
From: Tudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
Signed-off-by: Tudor Ambarus
---
v5: drop struct platform_device *pdev; linux leftover, 2 new blank lines
v4: update Kconfig description
v3: no
From: Tudor Ambarus
Add the default config file of QSPI media. The config is based on
sama5d2_xplained_mmc_defconfig.
Signed-off-by: Tudor Ambarus
---
v5: no change
v4: no change
v3: fix the following:
./tools/genboardscfg.py
WARNING: no status info for 'sama5d2_xplained_qspiflash'
WARNING: no
From: Cyrille Pitchen
Use the same memory layout as we use for the NAND boot on the other boards.
QSPI flashes are present on the following boards:
sama5d2_xplained RevB: 32 Mbyte flash (mx25l3273fm2i-08g)
sama5d2_xplained RevC: 8 Mbyte flash (sst26vf064b-104i/sn)
sama5d27_som1_ek:8
From: Eugen Hristev
The spi-nor flash resides on spi bus 1. Update the CONFIG_ENV_SPI_CS
and CONFIG_BOOTCOMMAND accordingly.
Based on original work by Wenyou Yang.
Signed-off-by: Eugen Hristev
[tudor.amba...@microchip.com: amend the commit message.]
Signed-off-by: Tudor Ambarus
---
v5: no
From: Tudor Ambarus
We use a sst spi-nor flash memory on sama5d27_som1_ek. Select
the others for testing purposes.
Signed-off-by: Tudor Ambarus
---
v5: no change
v4: no change
v3: no change
v2: new patch
configs/sama5d27_som1_ek_mmc1_defconfig | 2 ++
configs/sama5d27_som1_ek_mmc_defconfig
From: Tudor Ambarus
Add the default config file of QSPI media. The config is based on
sama5d27_som1_ek_mmc_defconfig.
Signed-off-by: Tudor Ambarus
---
v5: no change
v4: no change
v3: fix the following:
./tools/genboardscfg.py
WARNING: no status info for 'sama5d27_som1_ek_qspiflash'
WARNING: no
Hi, Jagan,
On 06/12/2019 11:02 AM, Jagan Teki wrote:
> External E-Mail
>
>
> On Wed, May 15, 2019 at 12:33 PM wrote:
>>
>> From: Tudor Ambarus
>>
>> Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
>> Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
>>
>>
On 05/14/2019 01:26 PM, Tudor Ambarus - M18064 wrote:
> From: Tudor Ambarus
>
> Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
> Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
>
> Signed-off-by: Tudor Ambarus
> ---
> v3: no change
> v2: no change
>
>
From: Tudor Ambarus
CONFIG_PMECC_CAP has a higher priority than its ONFI detected
parameter and will overwrite it when defined. As per commit
49ad40298cc5, CONFIG_PMECC_CAP has a default value of 2 if not
otherwise stated. This results in the overwriting of the ONFI ECC
bits value. The following
From: Tudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
Signed-off-by: Tudor Ambarus
---
v4: update Kconfig description
v3: no change
v2: no change
drivers/spi/Kconfig | 8 +
From: Tudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: no change
drivers/spi/Kconfig | 7 +
drivers/spi/Makefile| 1 +
From: Tudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash,
and on sama5d27_som1_ek with sst26vf064b spi-nor flash.
v3: fix following config warnings reported by travis:
./tools/genboardscfg.py
WARNING: no
From: Tudor Ambarus
Describe the DT bindings for the driver of the Atmel QSPI
controller. Taken form linux v5.1-rc5.
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: no change
doc/device-tree-bindings/spi/atmel-quadspi.txt | 37 ++
1 file changed, 37 insertions(+)
From: Tudor Ambarus
Add the default config file of QSPI media. The config is based on
sama5d27_som1_ek_mmc_defconfig.
Signed-off-by: Tudor Ambarus
---
v3: fix the following:
./tools/genboardscfg.py
WARNING: no status info for 'sama5d27_som1_ek_qspiflash'
WARNING: no maintainers for
From: Tudor Ambarus
We use a sst spi-nor flash memory on sama5d27_som1_ek. Select
the others for testing purposes.
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: new patch
configs/sama5d27_som1_ek_mmc1_defconfig | 2 ++
configs/sama5d27_som1_ek_mmc_defconfig | 2 ++
2 files changed, 4
From: Cyrille Pitchen
Use the same memory layout as we use for the NAND boot on the other boards.
QSPI flashes are present on the following boards:
sama5d2_xplained RevB: 32 Mbyte flash (mx25l3273fm2i-08g)
sama5d2_xplained RevC: 8 Mbyte flash (sst26vf064b-104i/sn)
sama5d27_som1_ek:8
From: Tudor Ambarus
Add the default config file of QSPI media. The config is based on
sama5d2_xplained_mmc_defconfig.
Signed-off-by: Tudor Ambarus
---
v3: fix the following:
./tools/genboardscfg.py
WARNING: no status info for 'sama5d2_xplained_qspiflash'
WARNING: no maintainers for
From: Cyrille Pitchen
Fix the following:
- use "jedec,spi-nor" binding, we use jedec compatible flashes
- set bus width to 4, we use quad capable flashes
- differentiate bewteen data and clk and cs pins
- drop partions as we don't use them in u-boot.
Signed-off-by: Cyrille Pitchen
From: Tudor Ambarus
We have a macronix spi-nor flash on sama5d2_xplained RevB and
a sst spi-nor flash on RevC. Select the rest for testing purposes.
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: new patch
configs/sama5d2_xplained_emmc_defconfig | 5 +
From: Eugen Hristev
The spi-nor flash resides on spi bus 1. Update the CONFIG_ENV_SPI_CS
and CONFIG_BOOTCOMMAND accordingly.
Based on original work by Wenyou Yang.
Signed-off-by: Eugen Hristev
[tudor.amba...@microchip.com: amend the commit message.]
Signed-off-by: Tudor Ambarus
---
v3: no
From: Tudor Ambarus
Use the qspi memory layout defined in at91-sama5_common - it aligns
with the 8 Mbyte flash (sst26vf064b-104i/sn) available in sama5d27_som1_ek.
Signed-off-by: Tudor Ambarus
---
v3: no change
v2: new patch
include/configs/sama5d27_som1_ek.h | 7 ---
1 file changed, 7
From: Tudor Ambarus
Add the default config file of QSPI media. The config is based on
sama5d2_xplained_mmc_defconfig.
Signed-off-by: Tudor Ambarus
---
v2: new patch
configs/sama5d2_xplained_qspiflash_defconfig | 101 +++
1 file changed, 101 insertions(+)
create mode
From: Tudor Ambarus
We have a macronix spi-nor flash on sama5d2_xplained RevB and
a sst spi-nor flash on RevC. Select the rest for testing purposes.
Signed-off-by: Tudor Ambarus
---
v2: new patch
configs/sama5d2_xplained_emmc_defconfig | 5 +
configs/sama5d2_xplained_mmc_defconfig
From: Tudor Ambarus
Use the qspi memory layout defined in at91-sama5_common - it aligns
with the 8 Mbyte flash (sst26vf064b-104i/sn) available in sama5d27_som1_ek.
Signed-off-by: Tudor Ambarus
---
v2: new patch
include/configs/sama5d27_som1_ek.h | 7 ---
1 file changed, 7 deletions(-)
From: Cyrille Pitchen
Use the same memory layout as we use for the NAND boot on the other boards.
QSPI flashes are present on the following boards:
sama5d2_xplained RevB: 32 Mbyte flash (mx25l3273fm2i-08g)
sama5d2_xplained RevC: 8 Mbyte flash (sst26vf064b-104i/sn)
sama5d27_som1_ek:8
From: Cyrille Pitchen
Fix the following:
- use "jedec,spi-nor" binding, we use jedec compatible flashes
- set bus width to 4, we use quad capable flashes
- differentiate bewteen data and clk and cs pins
- drop partions as we don't use them in u-boot.
Signed-off-by: Cyrille Pitchen
From: Tudor Ambarus
Add the default config file of QSPI media. The config is based on
sama5d27_som1_ek_mmc_defconfig.
Signed-off-by: Tudor Ambarus
---
v2: new patch
configs/sama5d27_som1_ek_qspiflash_defconfig | 101 +++
1 file changed, 101 insertions(+)
create mode
From: Tudor Ambarus
We use a sst spi-nor flash memory on sama5d27_som1_ek. Select
the others for testing purposes.
Signed-off-by: Tudor Ambarus
---
v2: new patch
configs/sama5d27_som1_ek_mmc1_defconfig | 2 ++
configs/sama5d27_som1_ek_mmc_defconfig | 2 ++
2 files changed, 4 insertions(+)
From: Tudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
Signed-off-by: Tudor Ambarus
---
v2: no change
drivers/spi/Kconfig | 7 +
drivers/spi/Makefile| 1 +
From: Tudor Ambarus
Describe the DT bindings for the driver of the Atmel QSPI
controller. Taken form linux v5.1-rc5.
Signed-off-by: Tudor Ambarus
---
v2: no change
doc/device-tree-bindings/spi/atmel-quadspi.txt | 37 ++
1 file changed, 37 insertions(+)
create mode
From: Tudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash,
and on sama5d27_som1_ek with sst26vf064b spi-nor flash.
v2: update/add configs and update sama5d2_xplained dts
Cyrille Pitchen (2):
ARM: dts:
From: Eugen Hristev
The spi-nor flash resides on spi bus 1. Update the CONFIG_ENV_SPI_CS
and CONFIG_BOOTCOMMAND accordingly.
Based on original work by Wenyou Yang.
Signed-off-by: Eugen Hristev
[tudor.amba...@microchip.com: amend the commit message.]
Signed-off-by: Tudor Ambarus
---
v2: new
From: Tudor Ambarus
Describe the DT bindings for the driver of the Atmel QSPI
controller. Taken form linux v5.1-rc5.
Signed-off-by: Tudor Ambarus
---
doc/device-tree-bindings/spi/atmel-quadspi.txt | 37 ++
1 file changed, 37 insertions(+)
create mode 100644
From: Tudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
=> sf probe 1:0
SF: Detected mx25l25635e with page size 256 Bytes, erase size 64 KiB, total 32
MiB
=> sf erase 0 10
SF: 1048576 bytes @ 0x0
From: Tudor Ambarus
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
Signed-off-by: Tudor Ambarus
---
drivers/spi/Kconfig | 7 +
drivers/spi/Makefile| 1 +
drivers/spi/atmel-quadspi.c | 535
From: Tudor Ambarus
sama5d2_xplained advertises quad capable flashes.
Set bus with to 4.
Signed-off-by: Tudor Ambarus
---
arch/arm/dts/at91-sama5d2_xplained.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/at91-sama5d2_xplained.dts
From: Tudor Ambarus
We have a macronix spi-nor flash on sama5d2_xplained RevB and
a sst spi-nor flash on RevC.
Signed-off-by: Tudor Ambarus
---
configs/sama5d2_xplained_mmc_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/sama5d2_xplained_mmc_defconfig
From: Tudor Ambarus
The flashes present on sama5d2_xplained, mx25l25635e and sst26vf064b,
are jedec compatible. Use "jedec,spi-nor" binding.
Signed-off-by: Tudor Ambarus
---
arch/arm/dts/at91-sama5d2_xplained.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Tudor Ambarus
'commit a9221f3ebd6d ("at91, omap2plus: configs: migrate CONFIG_ENV_ to
defconfigs")'
migrated CONFIG_ENV_ macros to defconfigs but did not remove the
identical redefinition of these macros in include/configs/.
Since the duplicated macros have the same value as the ones in
From: Tudor Ambarus
Parse manufacturer specific SFDP table. The Microchip SFDP table
contains pre-programmed globally unique MAC addresses. Retrieve
the MAC address from the SPI NOR flash and set it in ethaddr in env.
This can go through Eugen's tree if no obiections. Otherwise Eugen
should
From: Tudor Ambarus
JESD216 allow vendors to define their own SFDP tables.
Add Microchip SFDP parser. The vendor table is allocated using
resource-managed kmalloc - the table will be freed on driver detach.
It will be accessible by getting the UCLASS_SPI_FLASH's private data.
The Michrochip's
From: Tudor Ambarus
CONFIG_SPI_FLASH_SFDP_SUPPORT enables the SFDP Vendor parser,
and for the Microchip case, the retrieval of the ethaddr from
the SPI NOR flash.
Signed-off-by: Tudor Ambarus
---
configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1
From: Tudor Ambarus
The SST26VF064BEUI spi-nor flash is programmed at the factory with a
globally unique address stored in the SFDP vendor parameter table and
it is permanently writeprotected. Retrieve the EUI-48 address and set it
as ethaddr env.
Signed-off-by: Tudor Ambarus
---
From: Tudor Ambarus
Enable the SPI NOR SFDP support and the Microchip QSPI driver.
CONFIG_SPI_FLASH_SFDP_SUPPORT enables the SFDP Vendor parser,
and for the Microchip case, the retrieval of the ethaddr from
the SPI NOR flash.
While touching the SPI NOR logic, sync with the
On 09/27/2019 07:43 AM, Vignesh Raghavendra wrote:
> External E-Mail
>
>
> Newer variants of mt25q* flashes support 4 Byte addressing opcodes. Add
nit: "drop newer variants of"
> entries for the same. These flashes have bit 6 set in 5th byte of READ ID
> response.
>
> Signed-off-by: Vignesh
On 09/27/2019 07:43 AM, Vignesh Raghavendra wrote:
> External E-Mail
>
>
> mt25qu512a flash has Flag status register that indicates various errors
> that may be encountered during erase/write operations. Therefore add
> USE_FSR flag to the entry
>
n25q256 & 512 support flag status register
On 09/27/2019 07:43 AM, Vignesh Raghavendra wrote:
> External E-Mail
>
>
> Older variants of n25q256* and n25q512* do not support 4 Byte stateless
nit: drop "older variants of". Looks like the latest datasheet still require
ENTER and EXIT 4-byte address mode commands.
> addressing opcodes.
From: Tudor Ambarus
sama5's SFR has at offset 0x04 the DDR Configuration Register,
while sam9x60's SFR contains the EBI Chip Select Register. Add
a union to reconcile both boards.
Signed-off-by: Tudor Ambarus
---
arch/arm/mach-at91/include/mach/at91_sfr.h | 48 --
From: Sandeep Sheriker Mallikarjun
add sam9x60ek_mmc_defconfig and for now only supports booting from
sdcard.
Signed-off-by: Sandeep Sheriker Mallikarjun
Signed-off-by: Nicolas Ferre
[nicolas.fe...@microchip.com: split patch, add Ethernet controller,
phy and tools]
From: Sandeep Sheriker Mallikarjun
Add new compatibility string for matching sam9x60 product.
Signed-off-by: Sandeep Sheriker Mallikarjun
---
drivers/mmc/atmel_sdhci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c
index
From: Tudor Ambarus
Cope with the offsets defined at:
https://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections/demo_nandflash_map_lnx4sam6x.png
The environment starts at 0x14 and it's of size 0x2.
The device tree starts at 0x18 and it's of size 0x8.
The zImage starts at
From: Tudor Ambarus
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory.
Enable the qspi node together with the SST26VF064B qspi nor flash
memory. Booting from the QSPI NOR flash is now possible.
From: Nicolas Ferre
Add Ethernet controller to dtsi file and enable it on sam9x60ek
platform connected with rmii.
Signed-off-by: Nicolas Ferre
---
arch/arm/dts/sam9x60.dtsi | 31 +++
arch/arm/dts/sam9x60ek.dts | 5 +
2 files changed, 36 insertions(+)
diff
From: Tudor Ambarus
The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.
Signed-off-by: Tudor Ambarus
---
arch/arm/mach-at91/armv7/sama5d4_devices.c | 2 +-
arch/arm/mach-at91/atmel_sfr.c | 2
From: Sandeep Sheriker Mallikarjun
add device tree files for sam9x60ek board with below changes.
- Add initial device nodes (pmc, pinctrl, sdhc, dbgu & pit)
- Add the reg property for the pinctrl node.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the
From: Tudor Ambarus
Boot from QSPI nor flash.
The at91bootstrap, u-boot, u-boot env redundant, u-boot env,
device tree and kernel will reside in the QSPI nor flash.
The rootfs will reside in the NAND flash.
Signed-off-by: Tudor Ambarus
---
board/atmel/sam9x60ek/MAINTAINERS | 1 +
From: Tudor Ambarus
Boot from nand flash.
Signed-off-by: Tudor Ambarus
---
board/atmel/sam9x60ek/MAINTAINERS | 1 +
configs/sam9x60ek_nandflash_defconfig | 53 +++
2 files changed, 54 insertions(+)
create mode 100644 configs/sam9x60ek_nandflash_defconfig
From: Sandeep Sheriker Mallikarjun
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.
Signed-off-by: Sandeep Sheriker Mallikarjun
[tudor.amba...@microchip.com:
- fix number of DRAM banks:
One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest
From: Tudor Ambarus
Add support for sam9x60 SOC, sam9x60ek board, dts, NAND and QSPI.
Add defconfigs for MMC, NAND and QSPI.
v3:
- Enable MII utility commands and phy in qspi & nand defconfigs
- Add sam9x60-sdhci and sam9x60-macb compatibility strings
- nandflash_defconfig: Fix rootfs partition
From: Sandeep Sheriker Mallikarjun
Add new Microchip sam9x60 SoC based on an ARM926.
Signed-off-by: Sandeep Sheriker Mallikarjun
[tudor.amba...@microchip.com: fix SFR definition]
Signed-off-by: Tudor Ambarus
---
arch/arm/mach-at91/Kconfig | 4 +
From: Tudor Ambarus
- EBI Chip Select Register is now in SFR,
- the pins are set to default values,
- timings are matching MT29F4G08BABWP's nand flash requirements.
Signed-off-by: Tudor Ambarus
---
board/atmel/sam9x60ek/sam9x60ek.c | 61 +++
From: Nicolas Ferre
Add this new compatibility string for matching sam9x60 product
macb.
Signed-off-by: Nicolas Ferre
---
drivers/net/macb.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index c99cf663a416..e0f7b2350b20 100644
---
Hi, Simon,
On 09/24/2019 10:02 AM, Simon Goldschmidt wrote:
> External E-Mail
>
>
> Hi Vignesh,
>
> On Tue, Sep 24, 2019 at 7:55 AM Vignesh Raghavendra wrote:
>>
>> This series removes SPI_NOR_4B_OPCODES flags from legacy variants of
>> n25q256* and n25q512* and adds entries for newer
From: Sandeep Sheriker Mallikarjun
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.
Signed-off-by: Sandeep Sheriker Mallikarjun
[tudor.amba...@microchip.com:
- fix number of DRAM banks:
One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest
Hi, Simon,
On 09/23/2019 12:30 PM, Simon Goldschmidt wrote:
> How would I dump the SFDP tables?
this should do it. Make sure SPI_FLASH_SFDP_SUPPORT is selected in menuconfig.
Cheers,
ta
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index
From: Tudor Ambarus
The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.
Signed-off-by: Tudor Ambarus
---
arch/arm/mach-at91/armv7/sama5d4_devices.c | 2 +-
arch/arm/mach-at91/atmel_sfr.c | 2
From: Tudor Ambarus
- EBI Chip Select Register is now in SFR,
- the pins are set to default values,
- timings are matching MT29F4G08BABWP's nand flash requirements.
Signed-off-by: Tudor Ambarus
---
board/atmel/sam9x60ek/sam9x60ek.c | 61 +++
From: Sandeep Sheriker Mallikarjun
add device tree files for sam9x60ek board with below changes.
- Add initial device nodes (pmc, pinctrl, sdhc, dbgu & pit)
- Add the reg property for the pinctrl node.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the
From: Tudor Ambarus
Cope with the offsets defined at:
https://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections/demo_nandflash_map_lnx4sam6x.png
The environment starts at 0x14 and it's of size 0x2.
The device tree starts at 0x18 and it's of size 0x8.
The zImage starts at
From: Tudor Ambarus
sama5's SFR has at offset 0x04 the DDR Configuration Register,
while sam9x60's SFR contains the EBI Chip Select Register. Add
a union to reconcile both boards.
Signed-off-by: Tudor Ambarus
---
arch/arm/mach-at91/include/mach/at91_sfr.h | 48 --
From: Tudor Ambarus
Boot from QSPI nor flash.
The at91bootstrap, u-boot, u-boot env redundant, u-boot env,
device tree and kernel will reside in the QSPI nor flash.
The rootfs will reside in the NAND flash.
Signed-off-by: Tudor Ambarus
---
board/atmel/sam9x60ek/MAINTAINERS | 1 +
From: Nicolas Ferre
Add Ethernet controller to dtsi file and enable it on sam9x60ek
platform connected with rmii.
Signed-off-by: Nicolas Ferre
---
arch/arm/dts/sam9x60.dtsi | 31 +++
arch/arm/dts/sam9x60ek.dts | 5 +
2 files changed, 36 insertions(+)
diff
From: Tudor Ambarus
Boot from nand flash.
Signed-off-by: Tudor Ambarus
---
board/atmel/sam9x60ek/MAINTAINERS | 1 +
configs/sam9x60ek_nandflash_defconfig | 51 +++
2 files changed, 52 insertions(+)
create mode 100644 configs/sam9x60ek_nandflash_defconfig
From: Sandeep Sheriker Mallikarjun
add sam9x60ek_mmc_defconfig and for now only supports booting from
sdcard.
Signed-off-by: Sandeep Sheriker Mallikarjun
Signed-off-by: Nicolas Ferre
[nicolas.fe...@microchip.com: split patch, add Ethernet controller,
phy and tools]
From: Tudor Ambarus
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory.
Enable the qspi node together with the SST26VF064B qspi nor flash
memory. Booting from the QSPI NOR flash is now possible.
From: Sandeep Sheriker Mallikarjun
Add new Microchip sam9x60 SoC based on an ARM926.
Signed-off-by: Sandeep Sheriker Mallikarjun
[tudor.amba...@microchip.com: fix SFR definition]
Signed-off-by: Tudor Ambarus
---
arch/arm/mach-at91/Kconfig | 4 +
From: Tudor Ambarus
Add support for sam9x60 SOC, sam9x60ek board, dts, NAND and QSPI.
Add defconfigs for MMC, NAND and QSPI.
v2: add maintainers for qspi & nand defconfigs
Nicolas Ferre (1):
ARM: dts: at91: sam9x60: Add macb0 Ethernet controller
Sandeep Sheriker Mallikarjun (4):
ARM:
Hi, Simon,
On 09/23/2019 12:30 PM, Simon Goldschmidt wrote:
cut
>>> > Subject: [EXT] [PATCH 2/2] spi-nor: spi-nor-ids: Disable
>>> > SPI_NOR_4B_OPCODES for n25q512* and n25q256*
>>> >
>>> > Caution: EXT Email
>>> >
>>> > Not all variants of n25q256* and n25q512* support
Hi, Simon,
On 09/24/2019 02:47 PM, Simon Goldschmidt wrote:
> External E-Mail
>
>
> On Tue, Sep 24, 2019 at 7:55 AM Vignesh Raghavendra wrote:
>>
>> Newer variants of n25q256* and n25q512* flashes support 4 Byte
>> addressing opcodes. Add entries for the same. These flashes Bit 6 set in
>> 5th
From: Tudor Ambarus
CONFIG_SPI_FLASH_SFDP_SUPPORT enables the SFDP Vendor parser,
and for the SST case, the retrieval of the ethaddr from the
SPI NOR flash.
Signed-off-by: Tudor Ambarus
---
configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Tudor Ambarus
The SST26VF064BEUI spi-nor flash is programmed at the factory with a
globally unique address stored in the SFDP vendor parameter table and
it is permanently writeprotected. Retrieve the EUI-48 address and set it
as ethaddr env.
Signed-off-by: Tudor Ambarus
---
From: Tudor Ambarus
JESD216 allow vendors to define their own SFDP tables.
Add SST SFDP parser. The vendor table is allocated using resource-managed
kmalloc - the table will be freed on driver detach. It will be accessible
by getting the UCLASS_SPI_FLASH's private data.
The SST's SFDP table is
From: Tudor Ambarus
Enable the SPI NOR SFDP support and the Microchip QSPI driver.
CONFIG_SPI_FLASH_SFDP_SUPPORT enables the SFDP Vendor parser,
and for the SST case, the retrieval of the ethaddr from the
SPI NOR flash.
While touching the SPI NOR logic, sync with the
From: Tudor Ambarus
Parse manufacturer specific SFDP table. The SST SFDP table contains
pre-programmed globally unique MAC addresses. Retrieve the MAC
address from the SPI NOR flash and set it in ethaddr in env.
v2:
- s/SFDP_MICROCHIP_ID/SFDP_SST_ID
- don't drop all information we extracted
Hi, Simon, Vignesh,
On 10/17/2019 02:20 PM, Simon Goldschmidt wrote:
> On Mon, Oct 14, 2019 at 3:27 PM Vignesh Raghavendra wrote:
>> Current Cadence QSPI driver has few limitations. It assumes all read
>> operations to be in Quad mode and thus does not support SFDP parsing.
>> Also, adding
From: Sandeep Sheriker Mallikarjun
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.
Signed-off-by: Sandeep Sheriker Mallikarjun
[tudor.amba...@microchip.com:
- fix number of DRAM banks:
One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest
From: Sandeep Sheriker Mallikarjun
add device tree files for sam9x60ek board with below changes.
- Add initial device nodes (pmc, pinctrl, sdhc, dbgu & pit)
- Add the reg property for the pinctrl node.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the
From: Nicolas Ferre
Add Ethernet controller to dtsi file and enable it on sam9x60ek
platform connected with rmii.
Signed-off-by: Nicolas Ferre
---
arch/arm/dts/sam9x60.dtsi | 31 +++
arch/arm/dts/sam9x60ek.dts | 5 +
2 files changed, 36 insertions(+)
diff
From: Tudor Ambarus
Boot from nand flash.
Signed-off-by: Tudor Ambarus
---
configs/sam9x60ek_nandflash_defconfig | 51 +++
1 file changed, 51 insertions(+)
create mode 100644 configs/sam9x60ek_nandflash_defconfig
diff --git
From: Sandeep Sheriker Mallikarjun
Add new Microchip sam9x60 SoC based on an ARM926.
Signed-off-by: Sandeep Sheriker Mallikarjun
[tudor.amba...@microchip.com: fix SFR definition]
Signed-off-by: Tudor Ambarus
---
arch/arm/mach-at91/Kconfig | 4 +
From: Tudor Ambarus
The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.
Signed-off-by: Tudor Ambarus
---
arch/arm/mach-at91/armv7/sama5d4_devices.c | 2 +-
arch/arm/mach-at91/atmel_sfr.c | 2
From: Tudor Ambarus
Cope with the offsets defined at:
https://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections/demo_nandflash_map_lnx4sam6x.png
The environment starts at 0x14 and it's of size 0x2.
The device tree starts at 0x18 and it's of size 0x8.
The zImage starts at
From: Tudor Ambarus
- EBI Chip Select Register is now in SFR,
- the pins are set to default values,
- timings are matching MT29F4G08BABWP's nand flash requirements.
Signed-off-by: Tudor Ambarus
---
board/atmel/sam9x60ek/sam9x60ek.c | 61 +++
From: Tudor Ambarus
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory.
Enable the qspi node together with the SST26VF064B qspi nor flash
memory. Booting from the QSPI NOR flash is now possible.
From: Tudor Ambarus
Add support for sam9x60 SOC, sam9x60ek board, dts, NAND and QSPI.
Add defconfigs for MMC, NAND and QSPI.
Nicolas Ferre (1):
ARM: dts: at91: sam9x60: Add macb0 Ethernet controller
Sandeep Sheriker Mallikarjun (4):
ARM: at91: Add sam9x60 soc
ARM: dts: Add dts files for
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