On 29/11/18 4:48 PM, Simon Goldschmidt wrote:
> On Thu, Nov 29, 2018 at 11:56 AM Miquel Raynal
> wrote:
>>
>> Hi Vignesh,
>>
> While I think porting this from Linux is the right thing to do, I can't
> say I'm happy with losing yet another 2.5 kB for SPL when it is already
> too
Hi Marek, Simon
On 29/11/18 3:20 AM, Marek Vasut wrote:
> On 11/28/2018 09:34 PM, Simon Goldschmidt wrote:
>> On 28.11.2018 18:52, Marek Vasut wrote:
>>> On 11/28/2018 06:26 PM, Vignesh R wrote:
>>>> Enable tiny printf to reduce SPL foot print
>>>
spi_flash and spi_flash_ids are no longer needed after SPI NOR
migration. Remove them.
Signed-off-by: Vignesh R
---
drivers/mtd/spi/spi_flash.c | 1337 ---
drivers/mtd/spi/spi_flash_ids.c | 211 -
2 files changed, 1548 deletions(-)
delete mode 100644
Enable tiny printf to fit SPL into internal RAM
Signed-off-by: Vignesh R
---
configs/da850_am18xxevm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/da850_am18xxevm_defconfig
b/configs/da850_am18xxevm_defconfig
index 58745fec8267..5fecfccba50c 100644
--- a/configs
SPI controllers can support Dual/Quad modes, therefore remove this
constraint. Also, add claim and release bus when call spi_mem calls as
well.
Signed-off-by: Vignesh R
---
drivers/spi/spi-mem.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/spi/spi
Enable tiny printf to reduce SPL foot print
Signed-off-by: Vignesh R
---
configs/porter_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index d51db3d5cb28..14af0f69a278 100644
--- a/configs/porter_defconfig
+++ b/configs
Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD
layer. Fix up sf_dataflash to work in legacy way. And update sandbox to
use new interfaces/defintions
Signed-off-by: Vignesh R
---
arch/sh/include/asm/bitops.h | 4 +
common/spl/Kconfig | 7 +
drivers/mtd
git branch: spi-nor-mig
Vignesh R (6):
mtd: spi: Port SPI NOR framework from Linux
mtd spi: Switch to new SPI NOR framework
spi: spi-mem: Enable all SPI modes
porter_defconfig: Enable tiny printf
da8250_am18xxevm_defconfig: Enable TINY PRINTF
mtd: spi: Remove unused files
arch/sh/incl
On 16-Nov-18 6:29 PM, Rajat Srivastava wrote:
>> On Fri, Nov 16, 2018 at 11:19 AM Vignesh R wrote:
>>> On 16/11/18 3:10 PM, Rajat Srivastava wrote:
>>>>> Hi Rajat,
>>>>>
>>>>> On 13/11/18 5:30 PM, Rajat Srivastava wrote:
>
On 16/11/18 3:10 PM, Rajat Srivastava wrote:
>> Hi Rajat,
>>
>> On 13/11/18 5:30 PM, Rajat Srivastava wrote:
>>> Add support for JESD216 rev B standard JEDEC Serial Flash Discoverable
>>> Parameters (SFDP) tables to dynamically initialize flash size, page
>>> size and address width of the flash.
Hi Rajat,
On 13/11/18 5:30 PM, Rajat Srivastava wrote:
> Add support for JESD216 rev B standard JEDEC Serial
> Flash Discoverable Parameters (SFDP) tables to
> dynamically initialize flash size, page size and
> address width of the flash. More parameters can be
> added as per requirement.
> SFDP
On 17/10/18 4:58 PM, Rajat Srivastava wrote:
> Add support for JESD216 rev B standard JEDEC Serial
> Flash Discoverable Parameters (SFDP) tables to
> dynamically initialize flash size, page size and
> address width of the flash. More parameters can be
> added as per requirement.
> Already
Move am43xx_evm_qspiboot_defconfig to DM. This is required as SPI core
and TI QSPI driver no longer supports non DM interfaces.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
configs/am43xx_evm_qspiboot_defconfig | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff
With U-boot runtime board detect for DTB selection a "default" dtb needs
to be created. This will be used temporarily until the "proper" dtb is
selected.
Also, add -u-boot.dtsi for AM437x SK and IDK to enable I2C for
board detection via DM_I2C.
Signed-off-by: Vignes
with K2G EVM.
Tested on AM437x SK and IDK boards. Sanity tested on AM437x GP EVM.
Vignesh R (3):
board: ti: am43xx: Define embedded_dtb_select for runtime DTB
selection in U-boot
ARM: dts: Add new "generic" am4372 device tree file.
configs: am43xx_evm_qspiboot_defconfig:
AM437x QSPI boot is a single stage boot and hence needs runtime DTB
selection to support AM437x-SK and AM437x-IDK with DM enabled. This is
required to move am43xx_evm_qspiboot_defconfig to use DM/DT.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
board/ti/am43xx/board.
DWC3 USB3 controllers will need USB3 PHY to be enabled, in addition to
USB2 PHY, to be functional. Therefore enable USB3 PHY when available.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/usb/host/xhci-dwc3.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drive
Refractor PHY get/init/poweron and PHY poweroff/exit operations into
separate function so that its easy to support multiple PHYs.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/usb/host/xhci-dwc3.c | 75
1 file changed, 48 insertions(
This series has couple of fixes needed to get DWC3 USB3 controller to
talk to USB3 devices on AM57xx SoCs.
v2:
* Refractor PHY operations into separate functions.
Vignesh R (3):
usb: xhci-dwc3: Power on USB PHY before using
usb: xhc-dwc3: Refractor PHY operations into separate function
It is wrong that expect .phy_init() to also power on the PHY. Therefore,
explicitly, call generic_phy_power_on() after generic_phy_power_init() in
order to power on PHY before using it.
Signed-off-by: Vignesh R <vigne...@ti.com>
Reviewed-by: Bin Meng <bmeng...@gmail.com>
---
driv
Hi Bin,
On Tuesday 06 March 2018 12:59 PM, Bin Meng wrote:
> Hi Vignesh,
>
> On Mon, Mar 5, 2018 at 7:27 PM, Vignesh R <vigne...@ti.com> wrote:
>> DWC3 USB3 controllers will need USB3 PHY to be enabled, in addition to
>> USB2 PHY, to be functional. Therefore ena
Hi,
On Friday 05 January 2018 07:20 PM, Jean-Jacques Hiblot wrote:
> This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> drivers/phy/Kconfig | 8 ++
> drivers/phy/Makefile| 2 +
>
DWC3 USB3 controllers will need USB3 PHY to be enabled, in addition to
USB2 PHY, to be functional. Therefore enable USB3 PHY when available.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/usb/host/xhci-dwc3.c | 35 +++
1 file changed, 35 inse
It is wrong that expect phy init to also power on the PHY. Therefore,
explicitly, call generic_phy_power_on() after generic_phy_power_init() in
order to power on PHY before using it.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/usb/host/xhci-dwc3.c | 12
1 file chang
This series has couple of fixes needed to get DWC3 USB3 controller to
talk to USB3 devices on AM57xx SoCs.
Vignesh R (2):
usb: xhci-dwc3: Power on USB PHY before using
usb: xhci-dwc3: Enable USB3 PHY when available
drivers/usb/host/xhci-dwc3.c | 47
Add support to handle USB3 PHYs present on AM57xx/DRA7xx SoCs. This is
needed to move AM57xx to DM_USB.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/phy/ti-pipe3-phy.c | 30 +++---
1 file changed, 23 insertions(+), 7 deletions(-)
diff --git a/drivers/
Please add a commit message as this is a pretty big change providing a
overview what is being added and why?
On Monday 12 February 2018 10:08 PM, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas
> ---
> drivers/dma/dma-uclass.c| 212
K2G ICE has a s25fl256s1 QSPI NOR flash connected to QSPI at CS0. Add DT
entries for the same.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
Ported from linux-next.
arch/arm/dts/keystone-k2g-ice.dts | 48 +++
1 file changed, 48 insertions(+)
diff
Add pinmux for QSPI pins on K2G ICE board.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
board/ti/ks2_evm/mux-k2g.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
index 9e3fa1100331..f7d36d132ec8 100644
--- a/board/ti/k
.
v3:
Rebased on top of latest u-boot-spi/master changes.
Goldschmidt Simon (1):
Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction
when possible"
Vignesh R (2):
Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction
when possible"
s
e_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.
Signed-off-by: Simon Goldschmidt <sgoldschm...@de.pepperl-fuchs.com>
Signed-off-by: Vignesh R <vigne...@ti.com>
Acked-by: Marek Vasut <ma
is known to fail
sometimes.
[1] http://www.ti.com/lit/ug/spruhy8g/spruhy8g.pdf
Signed-off-by: Vignesh R <vigne...@ti.com>
Acked-by: Marek Vasut <ma...@denx.de>
Acked-by: Simon Goldschmidt <sgoldschm...@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jar...@gmail.com>
A
-by: Vignesh R <vigne...@ti.com>
Acked-by: Marek Vasut <ma...@denx.de>
Acked-by: Simon Goldschmidt <sgoldschm...@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jar...@gmail.com>
Acked-by: Jason Rush <jar...@gmail.com>
---
drivers/spi/cadence_qspi_apb.c | 26 ++---
On Tuesday 23 January 2018 03:01 PM, Jagan Teki wrote:
[...]
> u-boot-spi/master throws few warnings when I build for my platform:
> ~/workspace/u-boot:0f520af57c60:~ make distclean;make
> k2g_evm_defconfig;make -j4 -s;
>
> In file included from
On Tuesday 23 January 2018 02:37 PM, Jagan Teki wrote:
> On Tue, Jan 23, 2018 at 2:32 PM, Vignesh R <vigne...@ti.com> wrote:
>>
>>
>> On Tuesday 23 January 2018 02:15 PM, Jagan Teki wrote:
>>> On Tue, Jan 23, 2018 at 1:42 PM, Simon Goldschmidt
>>&
On Tuesday 23 January 2018 02:15 PM, Jagan Teki wrote:
> On Tue, Jan 23, 2018 at 1:42 PM, Simon Goldschmidt
> wrote:
>> Jagan,
>>
>>
>> the merge window is now less than 1 week for 2018.03 if I'm not mistaken.
>> Can you apply this, please?
>
> Can you resend
On Thursday 18 January 2018 01:45 PM, Simon Goldschmidt wrote:
> When the device tree is missing a correct spi slave description below
> the bus, the 'set_speed' callback can be called with 'speed' == 0 Hz.
> At least with cadence qspi, this leads to a division by zero.
>
> Prevent this by
Marek,
On 09-Jan-18 6:49 PM, Vignesh R wrote:
> This series reverts use of bounce_buf.c for non-DMA related alignment
> restriction and replaces it with local bounce buffer to handle problems
> with non 32 bit aligned writes on TI platforms.
> Based on top of Jason's ser
is known to fail
sometimes.
[1] http://www.ti.com/lit/ug/spruhy8g/spruhy8g.pdf
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v2: Move bounce buffer within cadence_qspi_apb_indirect_write_execute()
to handle arbitrary length buffers.
drivers/spi/cadence_qspi_apb.
-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/cadence_qspi_apb.c | 26 ++
include/configs/k2g_evm.h| 1 -
include/configs/socfpga_common.h | 1 -
include/configs/stv0991.h| 1 -
4 files changed, 6 insertions(+), 23 deletions(-)
diff --git a/drive
e_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.
Signed-off-by: Simon Goldschmidt <sgoldschm...@de.pepperl-fuchs.com>
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/caden
Simon (1):
Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction
when possible"
Vignesh R (2):
Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction
when possible"
spi: cadence_qspi_apb: Make flash writes 32 bit aligned
drivers/sp
On Tuesday 09 January 2018 11:31 AM, Goldschmidt Simon wrote:
> On Mon, 08/01/2018 12:18, Vignesh R wrote:
>> Make flash writes 32 bit aligned by using bounce buffers to deal with non 32
>> bit
>> aligned buffers. Allocate a 512 byte bounce buffer (max known p
Hi Lukasz,
Revisiting this old thread...
On 21-Jun-17 1:39 PM, Lukasz Majewski wrote:
> Hi Vignesh,
[...]
This is something to consult with Lukasz then.
>>>
>>> And it seems that we are heading to adding "gadget" infrastructure
>>> to DM.
>>>
>>
>> Yes, U-Boot is moving to DM for good
-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/cadence_qspi_apb.c | 26 ++
include/configs/k2g_evm.h| 1 -
include/configs/socfpga_common.h | 1 -
include/configs/stv0991.h| 1 -
4 files changed, 6 insertions(+), 23 deletions(-)
diff --git a/drive
Simon (1):
Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction
when possible"
Vignesh R (2):
Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction
when possible"
spi: cadence_qspi_apb: Make flash writes 32 bit aligned
driver
writes until the last word
of an indirect transfer. Otherwise indirect writes is known to fail
sometimes.
[1] http://www.ti.com/lit/ug/spruhy8g/spruhy8g.pdf
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/cadence_qspi.c | 13 -
drivers/spi/cadence_qspi.h
e_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.
Signed-off-by: Simon Goldschmidt <sgoldschm...@de.pepperl-fuchs.com>
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/spi/caden
On Monday 08 January 2018 09:10 AM, Jason Rush wrote:
[...]
>>> 1. The indaddrtrig register was being programmed with an incorrect value
>>> for socfpga
>>> as the result of assuming it should be programmed with the same address as
>>> the
>>> ahbbase address. This issue is resolved by
On Wednesday 03 January 2018 02:54 PM, Jagan Teki wrote:
> On Wed, Jan 3, 2018 at 2:18 PM, Vignesh R <vigne...@ti.com> wrote:
>>
[...]
>>>>>
>>>>> ===
>>>>> cmd/spinor.c
>>&
On Wednesday 03 January 2018 03:02 PM, Jagan Teki wrote:
> On Wed, Jan 3, 2018 at 2:19 PM, Vignesh R <vigne...@ti.com> wrote:
>>
>>
>> On Thursday 28 December 2017 11:42 AM, Jagan Teki wrote:
>> [...]
>>> +static const struct mtd_ops spi_nor_mtd
On Thursday 28 December 2017 11:42 AM, Jagan Teki wrote:
[...]
> +static const struct mtd_ops spi_nor_mtd_ops = {
> + .read = spi_nor_mread,
> + .erase = spi_nor_merase,
> +};
> +
Wondering why spi_nor_mwrite is not hooked up here?
> +U_BOOT_DRIVER(spinor_mtd) = {
> + .name
On Tuesday 02 January 2018 03:39 PM, Jagan Teki wrote:
> On Thu, Dec 28, 2017 at 8:14 PM, Lukasz Majewski wrote:
>> Hi Jagan,
>>
>>> Compared to previous series’s [1], [2], [3] and [4] this patch set
>>> redefined most of the implementation suitable to fit into existing
>>>
Hi Jagan,
On Tuesday 12 December 2017 01:07 PM, Jagan Teki wrote:
[...]
Prabhakar Kushwaha (5):
sf: Add support of 1-2-2, 1-4-4 IO READ protocols
sf: add method to support memory size above 128Mib
sf: parse Serial Flash Discoverable Parameters (SFDP) tables
sf:
+ Jagan,
On 16-Nov-17 7:33 PM, Jason Rush wrote:
> Adopt the Linux DT bindings. This also fixes an issue
> with the indaddrtrig register on the Cadence QSPI
> device being programmed with the wrong value for the
> socfpga arch.
>
Could we get these fixes in v2018.01-rc1/rc2?
> Tested on
On 04-Dec-17 10:31 PM, Frank Mori Hess wrote:
> On Mon, Dec 4, 2017 at 11:41 AM, Vignesh R <vigne...@ti.com> wrote:
>> Hi,
>>
>> On 04-Dec-17 6:41 PM, Frank Mori Hess wrote:
>>> Since your commit broke my platform to fix yours, shouldn't it be
>>> rev
-applying, I would recommend to
ping SPI maintainer to get http://patchwork.ozlabs.org/patch/838589/
merged as early as possible.
> On Dec 3, 2017 23:14, "Vignesh R" <vigne...@ti.com
> <mailto:vigne...@ti.com>> wrote:
>
>
>
> On Sunday
On Sunday 03 December 2017 09:29 PM, Frank Mori Hess wrote:
> This reverts commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1.
>
> My u-boot spl crashes in a loop when I boot off a
> cadence qspi flash. I narrowed it down to the changes from commit
> dac3bf20fb2c9b03476be0d73db620f62ab3cee1 which
(Altera Cyclone V)
Tested on TI K2G platform. For the series:
Tested-by: Vignesh R <vigne...@ti.com>
>
> Jason Rush (5):
> spi: cadence_spi: Sync DT bindings with Linux
> dts: cadence_spi: Sync DT bindings with Linux
> config: cadence_spi: Remove defines read from DT
>
and
> breaks the cadence_qspi driver which copies via cpu only: data that is
> copied by the cpu is in cache only and the cache invalidation at the end
> throws away this data.
>
> Signed-off-by: Simon Goldschmidt <sgoldschm...@de.pepperl-fuchs.com>
> ---
>
Acked-by: Vign
On Thursday 16 November 2017 04:21 PM, Goldschmidt Simon wrote:
> Hi Vignesh,
>
> Vignesh R wrote:
>> [..]
>> Its not actually unaligned access, cadence QSPI IP on TI platforms do
>> not support non-byte accesses except for the last word. As per the TRM:
>
Hi Simon,
On Thursday 16 November 2017 03:39 PM, Goldschmidt Simon wrote:
[...]
>
> This 32-bit spi transfer mode does not seem to be used too often, all
> other drivers I looked at are transferring byte by byte and thus can
> not be used as an example.
>
> Additionally, the TI platform Vignesh
+ Adam, who authored the reverted patch for omap3.
On Friday 22 September 2017 07:50 PM, Jaehoon Chung wrote:
> On 09/21/2017 11:51 PM, Jean-Jacques Hiblot wrote:
>> This series enables the ADMA present in some OMAP SOCs.
>> On a DRA7 the performances when reading from the eMMC go from 18MB/s
>>
Hi,
Removing mugunthan...@ti.com, who is no longer working for TI.
On Wednesday 06 September 2017 02:02 AM, Maxime Ripard wrote:
> Hi,
>
> I've been working with USB-Ethernet gadget for quite some time on the
> Allwinner SoCs, especially because most Allwinner boards lack an
> ethernet
+ Sekhar
On Monday 28 August 2017 04:09 AM, Adam Ford wrote:
> What starting up the DA850-EVM, U-Boot generates a warning:
>WARNING: Caches not enabled
>
> Looking at other arm926 processors, this is an attempt
> to enable the caches and remove the warning.
>
> I am notsure who the proper
On Tuesday 08 August 2017 10:27 AM, Chris Packham wrote:
> "jedec,spi-nor" is used by Linux for many boards with spi flash. In fact
> according to the binding documentation this must be included for any SPI
> NOR flash that can be identified by the JEDEC READ ID opcode (0x9F).
> Make device
On Thursday 27 July 2017 08:15 AM, Lokesh Vutla wrote:
> + Vignesh
>
> On 7/26/2017 10:41 PM, Tom Rini wrote:
>> The intention of having aaa_evm_xxx_defconfig variants is to allow
>> building for useful but non-default cases that cannot be easily done
>> with the standard aaa_evm_defconfig
Hi Bin,
On Monday 03 July 2017 06:49 PM, Bin Meng wrote:
> Hi Vignesh,
>
> On Thu, Jun 29, 2017 at 2:41 PM, Vignesh R <vigne...@ti.com> wrote:
>> Hi Stefan,
>>
>> On Thursday 29 June 2017 11:15 AM, Stefan Roese wrote:
>>> Hi,
>>>
>>&
Hi Stefan,
On Thursday 29 June 2017 11:15 AM, Stefan Roese wrote:
> Hi,
>
> as you might have noticed, Bin Meng is currently greatly improving
> the U-Boot xHCI support. While doing this, he noticed that some
> additions are more complex and especially ugly to add, since some
> users of the xHCI
On Thursday 22 June 2017 06:30 PM, Lukasz Majewski wrote:
> On Thu, 22 Jun 2017 17:42:38 +0530
> Vignesh R <vigne...@ti.com> wrote:
>
>>
>>
>> On Wednesday 21 June 2017 01:39 PM, Lukasz Majewski wrote:
>>> Hi Vignesh,
>>>
>>>>
Lokesh,
On Monday 10 April 2017 01:56 PM, Vignesh R wrote:
> It seems few config options are missing in the current
> am335x_evm_usbspl_defconfig causing USB RNDIS boot to fail on AM335x
> EVM. Fix this by adding required configs.
>
> Signed-off-by: Vignesh R <vigne...@ti.com
Hi,
On Monday 26 June 2017 05:12 PM, Ravi Kumar Prasad wrote:
> Hi,
>
> I'm developing a node.js usb bootloader server for the am335x (BeagleBone)
> platform which can boot it into USB mass storage mode. The server TFTPs SPL
> over usb and then TFTPs uboot (configured for ums) via SPL.
>
> The
On Wednesday 21 June 2017 01:39 PM, Lukasz Majewski wrote:
> Hi Vignesh,
>
>> Hi,
>>
>> On Tuesday 20 June 2017 07:14 PM, Lukasz Majewski wrote:
>>> Hi Marek, Vignesh,
>> [...]
>
> All gadget drivers like ether.c or f_mass_storage.c call
> usb_gadget_handle_interrupts() just passing
Hi,
On Tuesday 20 June 2017 07:14 PM, Lukasz Majewski wrote:
> Hi Marek, Vignesh,
[...]
>>>
>>> All gadget drivers like ether.c or f_mass_storage.c call
>>> usb_gadget_handle_interrupts() just passing the index of the USB
>>> instance. This does not help at all in dm case. What we would need
>>>
Hi Marek,
On Thursday 15 June 2017 10:27 PM, Marek Vasut wrote:
> On 06/14/2017 02:25 PM, Vignesh R wrote:
> [...]
>>>> /**
>>>> * dwc3_omap_uboot_init - dwc3 omap uboot initialization code
>>>> * @dev: struct dwc3_omap_device containing i
Hi Lukasz,
On Thursday 15 June 2017 10:28 PM, Marek Vasut wrote:
> On 06/14/2017 02:24 PM, Vignesh R wrote:
>>
>>
>> On Tuesday 13 June 2017 07:36 PM, Marek Vasut wrote:
>>> On 06/13/2017 02:10 PM, Vignesh R wrote:
>>>> Provide a way to read M
On Tuesday 13 June 2017 07:33 PM, Marek Vasut wrote:
> On 06/13/2017 02:10 PM, Vignesh R wrote:
>> From: Mugunthan V N <mugunthan...@ti.com>
>>
>> Add a TI DWC3 peripheral driver with driver model support and the
>> driver will be bound by the DWC3 wrapper driv
On Tuesday 13 June 2017 07:36 PM, Marek Vasut wrote:
> On 06/13/2017 02:10 PM, Vignesh R wrote:
>> Provide a way to read MAC address for usb_ether device from board
>> function. Board files can override board_set_usbnet_devaddr() to
>> populate MAC address to be used b
On Tuesday 13 June 2017 07:35 PM, Marek Vasut wrote:
>> diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
>> index e065c5aeb38d..18bbd5318e48 100644
>> --- a/drivers/usb/dwc3/gadget.c
>> +++ b/drivers/usb/dwc3/gadget.c
>> @@ -2610,7 +2610,7 @@ int dwc3_gadget_init(struct dwc3
On Tuesday 13 June 2017 07:31 PM, Marek Vasut wrote:
> On 06/13/2017 02:10 PM, Vignesh R wrote:
>> From: Mugunthan V N <mugunthan...@ti.com>
>>
>> Add support to get maximum speed from dt so that usb drivers
>> makes use of it for DT parsing.
>>
>
On Tuesday 13 June 2017 07:28 PM, Marek Vasut wrote:
> On 06/13/2017 02:09 PM, Vignesh R wrote:
>> From: Mugunthan V N <mugunthan...@ti.com>
>>
>> devm_zalloc() is already defined in dm/device.h header, so
>> devm_zalloc can be removed from linux_compact.h beade
On Tuesday 13 June 2017 06:33 PM, Lokesh Vutla wrote:
>
>
> On Tuesday 13 June 2017 05:40 PM, Vignesh R wrote:
>> Enable USB nodes required to support RNDIS boot in SPL.
>>
>> Signed-off-by: Vignesh R <vigne...@ti.com>
>> ---
>>
DWC3 can operate in either device mode or host mode. Add an entry to
support DWC3 gadget.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/usb/gadget/gadget_chips.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/usb/gadget/gadget_chips.h
b/drivers/usb/gadget/gadget_c
Populate DM_FLAG_PRE_RELOC, so that usb_ether can be used before
relocation in case of RNDIS boot.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/usb/gadget/ether.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/e
Enable USB nodes required to support RNDIS boot in SPL.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
arch/arm/dts/am437x-gp-evm-u-boot.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/am437x-gp-evm-u-boot.dtsi
b/arch/arm/dts/am437x-gp-evm-u-boo
From: Mugunthan V N <mugunthan...@ti.com>
Do not register usb devices when CONFIG_DM_USB is define.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
Signed-off-by: Vignesh R <vigne...@ti.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---
board/ti/am43xx/board.
From: Mugunthan V N <mugunthan...@ti.com>
Add support to get maximum speed from dt so that usb drivers
makes use of it for DT parsing.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
Signed-off-by: Vignesh R <vigne...@ti.com>
Reviewed-by: Simon Glass <s...@chromium.
Clean up include/configs/am43xx_evm.h and add configs to support USB
device boot for am43xx evm.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
configs/am43xx_evm_defconfig | 13 -
include/configs/am43xx_evm.h | 27 ---
2 files changed, 20 insertions(
avoid code duplication based on boards.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
Signed-off-by: Vignesh R <vigne...@ti.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---
board/ti/am43xx/board.c | 11 ---
board/ti/am57xx/board.c | 11 --
This wrapper will on bind
read dr_mode property and appropriately associate USB DT node with DWC3
peripheral driver or host driver.
This is similar to what exists today for MUSB and is instantiated by
arch_misc_init() function for am33xx and am43xx.
Signed-off-by: Mugunthan V N <mugunthan...@ti.
Add function to populate MAC address for usb ether device to support
RNDIS in SPL. Also make arch_misc_init() available when
CONFIG_SPL_USBEHT_SUPPORT is defined so that usb_ether_init() is called
for am43xx as well.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
arch/arm/mach-omap
Provide a way to read MAC address for usb_ether device from board
function. Board files can override board_set_usbnet_devaddr() to
populate MAC address to be used by usb_ether as device address.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
drivers/usb/gadget/ether.c | 6 ++
1 file c
From: Mugunthan V N <mugunthan...@ti.com>
Add a TI DWC3 peripheral driver with driver model support and the
driver will be bound by the DWC3 wrapper driver based on the
dr_mode device tree entry.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
Signed-off-by: Vignesh R <
From: Mugunthan V N <mugunthan...@ti.com>
Do not register usb devices when CONFIG_DM_USB is defined.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
Signed-off-by: Vignesh R <vigne...@ti.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---
board/ti/am57xx/board.c
From: Mugunthan V N <mugunthan...@ti.com>
devm_zalloc() is already defined in dm/device.h header, so
devm_zalloc can be removed from linux_compact.h beader file.
Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
Signed-off-by: Vignesh R <vigne...@ti.com>
Reviewed-
CONFIG_DM_USB is defined
drivers: usb: common: add support to get maximum speed from dt
drivers: usb: dwc3: add ti dwc3 peripheral driver with driver model
support
drivers: usb: dwc3: add ti dwc3 misc driver for wrapper
Vignesh R (6):
usb: gadget: ether: Provide a way to read MAC
On Monday 12 June 2017 10:12 PM, Jason Kridner wrote:
> I see you submitted this defconfig:
> https://lists.denx.de/pipermail/u-boot/2016-November/272425.html
>
> I have a Google Summer of Code student intern attempting to use it and he's
> seeing it hang without entering UMS mode. Details are
On Wednesday 31 May 2017 09:20 AM, Simon Glass wrote:
> On 23 May 2017 at 05:55, Vignesh R <vigne...@ti.com> wrote:
>> Add support to for USB device boot for dwc3 gadget, so that RNDIS can be
>> used in SPL to download next stage.
>> Provide a way to read MAC addres
Hi,
On Wednesday 31 May 2017 09:20 AM, Simon Glass wrote:
> On 23 May 2017 at 05:55, Vignesh R <vigne...@ti.com> wrote:
>> From: Mugunthan V N <mugunthan...@ti.com>
>>
>> Add a misc driver for DWC3 wrapper, so that based on dr_mode the
>> USB devices can
Hi,
On Wednesday 31 May 2017 09:20 AM, Simon Glass wrote:
> On 23 May 2017 at 05:55, Vignesh R <vigne...@ti.com> wrote:
>> From: Mugunthan V N <mugunthan...@ti.com>
>>
>> Add a misc driver for DWC3 wrapper, so that based on dr_mode the
>> USB devices can
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