On 03/28/2017 01:51 PM, Ken Lin wrote:
> Apply the proper setting for the reserved bits in SetDes Test and System Mode
> Control register
> to avoid the voltage peak issue while we do the IEEE PHY comformance test
>
> Signed-off-by: Ken Lin <yungching0...@gmail.com>
&g
On 03/28/2017 01:51 PM, Ken Lin wrote:
> Add the delay (10ms) to ensure the clock is stable and to meet the
> clock-to-reset(1ms) requirement recommended in the AR8033 datasheet
>
> Signed-off-by: Ken Lin <yungching0...@gmail.com>
> ---
Acked-by: Akshay Bhat <
On 03/28/2017 01:51 PM, Ken Lin wrote:
> Change the PMIC bulk configuration from auto mode to sync mode to avoid the
> voltage shutdown issue
>
> Signed-off-by: Ken Lin <yungching0...@gmail.com>
> ---
Acked-by: Akshay Bhat <
On 03/28/2017 01:51 PM, Ken Lin wrote:
> Add the configuration options for display initialization in case we need to
> do the display initialization in kernel to support different timing settings
>
> Signed-off-by: Ken Lin <yungching0...@gmail.com>
> ---
Acked-by:
From: Ken Lin <ken@advantech.com.tw>
Change the PMIC bulk configuration from auto mode to sync mode to avoid
voltage dropout issue seen in auto mode.
Signed-off-by: Ken Lin <ken@advantech.com.tw>
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
---
board/ge/bx
Hi Stefano
On Fri, Oct 7, 2016 at 6:25 AM, Stefano Babic wrote:
>
> But not pushed: in fact, this canoot be built anymore. You add a new
> CONFIG_ (but do you really need it ?), and this is not allowed anymore.
> It generates a build error because all CONFIG_ should be set via
Port2) on B850v3.
Signed-off-by: Ken Lin <ken@advantech.com.tw>
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
---
v1 -> v2:
Rename CONFIG_BOOTARGS_EXTRA to BX50V3_BOOTARGS_EXTRA since CONFIG_* is
reserved for defines added via Kconfig
include/configs/ge_bx50v3.h | 7 +
Port2) on B850v3.
Signed-off-by: Ken Lin <ken@advantech.com.tw>
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
---
include/configs/ge_bx50v3.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
inde
SATA II,
1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: u-boot@lists.denx.de
Cc: sba...@denx.de
---
v2 -> v3:
- Add Target check in dms-ba16 Kconfig to prevent IMX_CONFIG re-definition
- Set correct boot partition in bootargs whe
On 07/28/2016 07:53 AM, Stefano Babic wrote:
Hi Akshay,
On 28/07/2016 12:12, Stefano Babic wrote:
Hi Akshay,
this looks good to me. I apply it, and I let you think about an upgrade
to SPL for this board.
The patch breaks most of i.MX6 boards because it redefines IMX_CONFIG.
In fact:
SATA II,
1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: u-boot@lists.denx.de
Cc: sba...@denx.de
---
v1 -> v2:
Address comments made by Stefano Babic:
- Remove redundant clock enable code in .cfg
- Use register names instead of
1x UART, 2x I2C, 8x GPIO,
4x Host USB 2.0 port, 1x USB OTG port,
1x micro SD (SDHC),1x SDIO, 1x SATA II,
1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: u-boot@lists.denx.de
Cc: sba...@denx.de
---
arch/arm/cpu
SATA II,
1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: u-boot@lists.denx.de
Cc: sba...@denx.de
---
arch/arm/cpu/armv7/mx6/Kconfig | 5 +
board/advantech/dms-ba16/Kconfig | 27 ++
board/advantech/dms-ba16/MAINTAINERS
As of commit 69e173eb57d1f4848f070c83456096ba5d2ba1b4, CONFIG_OF_LIBFDT
needs to be selected in defconfig instead of board specific header file.
Hence enable CONFIG_OF_LIBFDT in defconfig.
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
---
configs/ge_b450v3_defconfig | 1 +
c
ed-off-by: Justin Waters <justin.wat...@timesys.com>
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: Stefano Babic <sba...@denx.de>
---
board/ge/bx50v3/bx50v3.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v
On a reset/reboot, the display power needs to be off for atleast 500ms
before turning it back on. So add a delay to the boot process to meet
the display timing requirement.
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: Stefano Babic <sba...@denx.de>
---
board/ge/bx50v3/
://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_3.10.17_1.0.1_ga=eecbe9a52587cf9eec30132fb9b8a6761f3a1e6d
NXP errata number: ERR009219, EB821
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: Stefano Babic <sba...@denx.de>
Cc: Fabio Estevam <fabio.este...@nxp
B450v3/B650v3 uses single channel LVDS and does not support HDMI.
B850v3 uses dual channel LVDS and supports HDMI. Hence split the display
setup into two different functions.
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: Stefano Babic <sba...@denx.de>
---
board/ge/bx5
ile
- Split patch into multiple patches addressing a single issue in a patch
Included the pwm backlight patch in this patch series
Added LVDS power on-off timing fix
Akshay Bhat (5):
imx: mx6: Fix procedure to switch the parent of LDB_DI_CLK
board: ge: bx50v3: Split display setup function
board:
To generate accurate pixel clocks required by the displays we need to
set the ldb_di_clk source on bx50v3 to PLL3 and b850v3 to PLL5. Since
PLL5 is disabled on reset, we need to enable PLL5.
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: Stefano Babic <sba...@denx.de>
-
Setup the LCD backlight brightness control pin to use PWM
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: Stefano Babic <sba...@denx.de>
---
board/ge/bx50v3/bx50v3.c| 11 +++
include/configs/ge_bx50v3.h | 3 +++
2 files changed, 14 insertions(+)
diff --gi
On Wed, Apr 6, 2016 at 11:22 AM, Fabio Estevam wrote:
> On Wed, Apr 6, 2016 at 12:18 PM, Stefano Babic wrote:
>
> > I frankly ask you if you think that this function can be factorized and
> > moved from board code to common code. What do you think ? Is there
On Tue, Mar 15, 2016 at 2:24 PM, Akshay Bhat <akshay.b...@timesys.com>
wrote:
> Setup the LCD backlight brightness control pin to use PWM
>
> Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
> Cc: Stefano Babic <sba...@denx.de>
> ---
>
Hi Stefano,
Can th
Hi Stefano,
On Tue, Mar 15, 2016 at 2:10 PM, Akshay Bhat <akshay.b...@timesys.com>
wrote:
Implements the below changes:
- Disable LVDS1 on B450v3/B650v3 boards since the final boards no longer
have connectors for the same. Only LVDS0 hardware connectors are present.
- Implement imx6
Setup the LCD backlight brightness control pin to use PWM
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: Stefano Babic <sba...@denx.de>
---
board/ge/bx50v3/bx50v3.c| 11 +++
include/configs/ge_bx50v3.h | 3 +++
2 files changed, 14 insertions(+)
diff --gi
generate
accurate pixel clock required for display connected to LVDS.
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
Cc: Stefano Babic <sba...@denx.de>
---
board/ge/bx50v3/bx50v3.c | 240 ++-
1 file changed, 198 insertions(+), 42 deleti
On 03/09/2016 06:47 AM, Stefano Babic wrote:
On 29/01/2016 21:16, Akshay Bhat wrote:
Add support for GE B450v3, B650v3 and B850v3 boards. The boards
are based on Advantech BA16 module which has a i.MX6D processor.
The boards support:
- FEC Ethernet
- USB Ports
- SDHC and MMC boot
Hi Stefano,
On 01/29/2016 11:07 PM, Peng Fan wrote:
Hi Akshay,
On Fri, Jan 29, 2016 at 03:16:40PM -0500, Akshay Bhat wrote:
Add support for GE B450v3, B650v3 and B850v3 boards. The boards
are based on Advantech BA16 module which has a i.MX6D processor.
The boards support:
- FEC Ethernet
- USB
SDIO, 1x SATA II,
1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
---
Changes in v2:
- Address comments from Peng Fan:
- Use static for iomux definitions and imx6_rgmii_rework()
- Use IS_ENABLED instead of ifdef in detect_bas
On 01/28/2016 10:12 PM, Peng Fan wrote:
Hi Akshay,
CC i.MX maintainer Stefano for you.
On Wed, Jan 27, 2016 at 05:53:47PM -0500, Akshay Bhat wrote:
Add support for GE B450v3, B650v3 and B850v3 boards. The boards
are based on Advantech BA16 module which has a imx6 processor.
Which imx6
SDIO, 1x SATA II,
1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2
Signed-off-by: Akshay Bhat <akshay.b...@timesys.com>
---
arch/arm/cpu/armv7/mx6/Kconfig | 10 +
board/ge/bx50v3/Kconfig| 15 ++
board/ge/bx50v3/MAINTAINERS| 8 +
board/ge/bx50v3/Makefile | 8 +
bo
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