Hi Paul,
On 09/30/2016 06:47 PM, Paul Burton wrote:
> * PGP Signed by an unknown key
>
> On Friday, 30 September 2016 17:53:38 BST Alexandre Courbot wrote:
>> On 09/30/2016 05:46 PM, Thierry Reding wrote:
>>> From: Thierry Reding <tred...@nvidia.com>
>>&g
s the above-mentioned commit expects.
>
> Fix this by checking for the right error code.
Tested-by: Alexandre Courbot <acour...@nvidia.com>
I sent a similar patch ~10 minutes before this one, but Thierry's commit
message is clearer than mine (and his handling of -ENODEV pro
On 09/30/2016 05:37 PM, Alexandre Courbot wrote:
> When calling clk_get_by_index(), fall back to the legacy method of
> getting the clock if -ENOENT is returned.
Withdrawing this patch as Thierry sent a better version of it.
___
U-Boot mailing
When calling clk_get_by_index(), fall back to the legacy method of
getting the clock if -ENOENT is returned.
Signed-off-by: Alexandre Courbot <acour...@nvidia.com>
---
drivers/serial/ns16550.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/serial/ns16550.c b/d
based on their compatible value rather
than their node name. This will work no matter what the node name is, i.e
for DTs both before and after any rename operation.
Generally speaking it is also much better to do it that way. Thanks!
Acked-by: Alexandre Courbot <acour...@n
On Wed, Oct 28, 2015 at 12:57 AM, Tom Warren <twar...@nvidia.com> wrote:
> Sorry, Alex. Missed these.
>
>> -Original Message-
>> From: Alexandre Courbot [mailto:gnu...@gmail.com]
>> Sent: Sunday, October 25, 2015 10:50 PM
>> To: Alex Courbot <acour
On 10/29/2015 02:59 AM, Stephen Warren wrote:
On 10/18/2015 10:57 PM, Alexandre Courbot wrote:
T210's GPU secure firmware loading requires a write-protected region
to be set up.
This patch reserves the upper 256KB of RAM as the WPR region and locks
it so the kernel can initiate secure firmware
Ping Tom, how does this look to you?
On Mon, Oct 19, 2015 at 1:57 PM, Alexandre Courbot <acour...@nvidia.com> wrote:
> This series makes U-boot program the write-protected (WPR) region of T210
> chips,
> allowing the kernel to perform GPU secure firmware loading.
>
> Tegra 2
T210's GPU secure firmware loading requires a write-protected region
to be set up.
This patch reserves the upper 256KB of RAM as the WPR region and locks
it so the kernel can initiate secure firmware loading.
Signed-off-by: Alexandre Courbot <acour...@nvidia.com>
---
arch/arm/include/as
Enable the GPU node in the system-wide ft_system_setup() hook instead of
the board-specific ft_board_hook(). This allows us to enable GPU per SoC
generation instead of per-board as we did initially.
Reported-by: Stephen Warren <swar...@nvidia.com>
Signed-off-by: Alexandre Courbot
Rename GPU functions to less generic names to avoid potential name
collisions.
Signed-off-by: Alexandre Courbot <acour...@nvidia.com>
---
arch/arm/include/asm/arch-tegra/gpu.h | 8
arch/arm/mach-tegra/board2.c | 4 ++--
arch/arm/mach-tegra/gpu.c | 4 ++--
3
There is no justification for this function, especially in exported
form.
Signed-off-by: Alexandre Courbot <acour...@nvidia.com>
---
arch/arm/include/asm/arch-tegra/gpu.h | 6 --
arch/arm/mach-tegra/gpu.c | 7 +--
2 files changed, 1 insertion(+), 12 deletions(-)
diff
loading.
Alexandre Courbot (4):
ARM: tegra: remove vpr_configured() function
ARM: tegra: simplify GPU setup
ARM: tegra: rename GPU functions
ARM: tegra210: gpu: configure WPR region
arch/arm/include/asm/arch-tegra/gpu.h | 14 +++--
arch/arm/include/asm/arch-tegra210/mc.h | 12
; Guillaume Gardet
Subject: Re: [U-Boot] [PATCH 0/2] ARM: tegra: enable GPU DT node
Am 23.07.2015 um 13:46 schrieb Andreas Färber:
Am 09.07.2015 um 09:32 schrieb Alexandre Courbot:
Tegra124 requires the bootloader to perform VPR initialization,
otherwise the GPU cannot be used by the system. Since using
On 07/24/2015 10:07 PM, Peter Robinson wrote:
Hi,
Tegra124 requires the bootloader to perform VPR initialization, otherwise the
GPU cannot be used by the system. Since using the GPU without that
initialization results in a hang, the GPU DT node is left disabled, and it is
the task of the
's Jetson TK1 and Venice 2.
Signed-off-by: Alexandre Courbot acour...@nvidia.com
Cc: Stephen Warren swar...@nvidia.com
Cc: Tom Warren twar...@nvidia.com
---
arch/arm/include/asm/arch-tegra/gpu.h | 16
arch/arm/mach-tegra/gpu.c | 19 +++
board/nvidia
into the more generic gpu.c file, which will
also host other GPU-related functions, and let boards specify
individually whether they need VPR setup or not.
Signed-off-by: Alexandre Courbot acour...@nvidia.com
Cc: Stephen Warren swar...@nvidia.com
Cc: Tom Warren twar...@nvidia.com
---
arch/arm/include
patching using the ft_board_setup() hook.
Alexandre Courbot (2):
ARM: tegra: move VPR configuration to a later stage
ARM: tegra: enable GPU DT node when appropriate
arch/arm/include/asm/arch-tegra/ap.h | 9 -
arch/arm/include/asm/arch-tegra/gpu.h | 43 +++
arch/arm
Hi Marek,
I am still not seeing this patch in mainline ; maybe you will want to
take it as you suggested?
Thanks,
Alex.
On 10/10/2014 12:10 AM, Marek Vasut wrote:
On Thursday, October 09, 2014 at 05:43:30 AM, Alexandre Courbot wrote:
This USB device works as-is on this driver.
Signed-off
This USB device works as-is on this driver.
Signed-off-by: Alexandre Courbot acour...@nvidia.com
---
drivers/usb/eth/asix.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/eth/asix.c b/drivers/usb/eth/asix.c
index 6557055e02b8..11811094ede8 100644
--- a/drivers/usb/eth/asix.c
Tom, is this patch ok for you? If yes, do you plan to merge it?
On Sat, Jun 28, 2014 at 1:21 AM, Thierry Reding
thierry.red...@gmail.com wrote:
On Tue, Jun 24, 2014 at 11:45:29AM +0900, Alexandre Courbot wrote:
From: Bryan Wu pe...@nvidia.com
On Tegra114 and Tegra124 platforms, certain
through, vpr.c style changes]
Signed-off-by: Alexandre Courbot acour...@nvidia.com
Cc: Tom Warren twar...@nvidia.com
Cc: Stephen Warren swar...@nvidia.com
Cc: Terje Bergstrom tbergst...@nvidia.com
---
Changes since v1:
- Use proper defines for fields values
- Move MC layout to T124 arch
On 06/24/2014 03:44 AM, Stephen Warren wrote:
On 06/23/2014 01:20 AM, Alexandre Courbot wrote:
From: Bryan Wu pe...@nvidia.com
On Tegra114 and Tegra124 platforms, certain display-related registers cannot
be accessed unless the VPR registers are programmed. For bootloader, we
probably don't
through, vpr.c style changes]
Signed-off-by: Alexandre Courbot acour...@nvidia.com
Reviewed-by: Stephen Warren swar...@nvidia.com
Cc: Tom Warren twar...@nvidia.com
Cc: Stephen Warren swar...@nvidia.com
Cc: Terje Bergstrom tbergst...@nvidia.com
---
Changes since v2:
- Remove useless switch case
Changes
through, vpr.c style changes]
Signed-off-by: Alexandre Courbot acour...@nvidia.com
Cc: Tom Warren twar...@nvidia.com
Cc: Stephen Warren swar...@nvidia.com
Cc: Terje Bergstrom tbergst...@nvidia.com
---
arch/arm/cpu/tegra-common/Makefile | 1 +
arch/arm/cpu/tegra-common/ap.c | 3 +++
arch/arm
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