[U-Boot] [PATCH] powerpc/85xx: Integrated Flash Controller NAND support

Add nand_spl and 8-bit NAND support on IFC controller. Signed-off-by: Dipen Dudhat --- Changes from v1: - Integrated Scott's comments arch/powerpc/cpu/mpc85xx/cpu_init_nand.c | 10 + arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds | 18 +- drivers/mtd/nand/Mak

[U-Boot] [PATCH v1] powerpc/85xx: Add support for Integrated Flash Controller (IFC)

supported Signed-off-by: Dipen Dudhat Acked-by: Scott Wood --- Changes from v0: - Integrated Wolfgang's comments arch/powerpc/cpu/mpc85xx/cpu.c|7 +- arch/powerpc/cpu/mpc8xxx/Makefile |1 + arch/powerpc/cpu/mpc8xxx/fsl_ifc.c| 84 +++ arch/powerpc/include/asm/con

[U-Boot] [PATCH] powerpc/85xx: Add support for Integrated Flash Controller (IFC)

supported Signed-off-by: Dipen Dudhat Acked-by: Scott Wood --- arch/powerpc/cpu/mpc85xx/cpu.c|7 +- arch/powerpc/cpu/mpc8xxx/Makefile |1 + arch/powerpc/cpu/mpc8xxx/fsl_ifc.c| 84 +++ arch/powerpc/include/asm/config.h |2 + arch/powerpc/include/asm/fsl_ifc.h

[U-Boot] [PATCH ] powerpc/85xx: Protect all LBC code with CONFIG_FSL_LBC

Future SoC (like the P1010) replace the LBC controller with the new IFC (Integrated Flash Controller) so ensure we properly protect code that is related to the LBC. Signed-off-by: Dipen Dudhat Acked-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/cpu.c |9 - arch/powerpc/cpu/mpc85xx

[U-Boot] [PATCH v1]ppc/P1_P2_RDB: Data width for eSDHC using I2C device on P1 & P2 RDB Platforms

On P1 and P2 RDB Platforms read the I2C EEPROM to get various board switch settings like NOR Flash Bank selection, SD Data width etc. Depending on, switch SW5[6] - select width for eSDHC ON - 4-bit [Enable eSPI] OFF - 8-bit [Disable eSPI] Signed-off-by: Dipen Dudhat

[U-Boot] [PATCH v3 3/3] ppc/p1_p2_RDB: DDR Relocation support for NAND/SD/eSPI Boot

DDR support to boot from NAND/eSDHC/eSPI on P1 & P2 RDB platforms. Specifically this support needed when L2 Cache size is less than 512K. Signed-off-by: Dipen Dudhat --- - Applies to http://git.denx.de/u-boot.git - Changes from v2: integrated kumar's comments. board/freescale/

[U-Boot] [PATCH v2 3/3] ppc/p1_p1_RDB: DDR Relocation support for NAND/SD/eSPI Boot

This patch adds support to boot from NAND/eSDHC/eSPI using DDR on P1 & P2 RDB platforms. Specifically this support needed when L2 Cache size is less than 512K. For this one define "CONFIG_L2_RELOC" has added in platform config file. Signed-off-by: Dipen Dudhat --- - A

[U-Boot] [PATCH v2 2/3] ppc/P1_P2_RDB: On-chip BootROM support

On Chip BootROM support for P1 and P2 series RDB platforms. This patch is derived from latest On Chip BootROM support on MPC8536DS by Mingkai Hu. Signed-off-by: Dipen Dudhat --- - Applies to http://git.denx.de/u-boot.git MAKEALL |8 Makefile

[U-Boot] [PATCH v2 1/3] ppc/P1_P2_RDB: NAND Boot Support

NAND Boot support for P1 and P2 series RDB platforms. This patch is derived from latest NAND Boot support on MPC8536DS by Mingkai Hu. Signed-off-by: Dipen Dudhat --- - Applies to http://git.denx.de/u-boot.git - Changes from v1: Integrated kumar's comments MA

[U-Boot] [PATCH v1]ppc/P1_P2_RDB: On-chip ROM boot

On Chip BootROM support for P1 and P2 series RDB platforms. This patch is derived from latest On Chip BootROM support on MPC8536DS by Mingkai Hu. Signed-off-by: Dipen Dudhat --- - Applies to http://git.denx.de/u-boot.git MAKEALL |2 ++ Makefile

[U-Boot] [PATCH v1] ppc/P1_P2_RDB: NAND Boot Support

NAND Boot support for P1 and P2 series RDB platforms. This patch is derived from latest NAND Boot support on MPC8536DS by Mingkai Hu. Signed-off-by: Dipen Dudhat --- - Applies to http://git.denx.de/u-boot.git MAKEALL|1 + Makefile

[U-Boot] [PATCH v3] ppc/85xx: PIO Support for FSL eSDHC Controller Driver

On some Freescale SoC Internal DMA of eSDHC controller has bug. So PIO Mode has been introduced to do data transfer using CPU. Signed-off-by: Dipen Dudhat --- Changes from v2: - Integated wolfgang and Bin Meng's Comments. drivers/mmc/fsl_esdhc.c |

[U-Boot] [PATCH v2] ppc/85xx: PIO Support for FSL eSDHC Controller Driver

: Dipen Dudhat --- Changes from v1: - Integrated comments for error handling - Formatting errors removed drivers/mmc/fsl_esdhc.c | 87 +- include/fsl_esdhc.h |2 + 2 files changed, 87 insertions(+), 2 deletions(-) diff --git a/drivers/mmc

[U-Boot] [PATCH v2] ppc/85xx: PIO Support for FSL eSDHC Controller Driver

: Dipen Dudhat --- drivers/mmc/fsl_esdhc.c | 87 +- include/fsl_esdhc.h |2 + 2 files changed, 87 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 27e4c48..7db8c0c 100644 --- a/drivers/mmc

[U-Boot] [PATCH v1] ppc/85xx: PIO Support for FSL eSDHC Controller Driver

PIO Mode Support for eSDHC Controller Driver on Freescale SoCs. Signed-off-by: Dipen Dudhat --- - applies on git.denx.de/u-boot-mpc85xx.git branch->next drivers/mmc/fsl_esdhc.c | 80 +- include/fsl_esdhc.h |2 + 2 files changed,

[U-Boot] [PATCH][v1] ppc/85xx: Fix up eSDHC controller clock frequency in the device tree

Signed-off-by: Dipen Dudhat Acked-by: Kumar Gala --- - applies on http://git.denx.de/u-boot-mpc85xx.git branch->next cpu/mpc85xx/fdt.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c index 53b184f..73886bd 100644 --- a/

[U-Boot] [PATCH][v1] ppc/85xx: Fix up eSDHC controller clock frequency in the device tree for P1 & P2 RDB platforms

Fix up eSDHC controller clock frequency in the device tree for P1 & P2 RDB platforms Signed-off-by: Dipen Dudhat --- - applies on git.denx.de/u-boot-mpc85xx.git branch->next board/freescale/p1_p2_rdb/p1_p2_rdb.c |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git

[U-Boot] [PATCH][v1] ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clk

Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a platform define. This will enable all the 85xx platforms to use sdhc_clk based on CONFIG_FSL_ESDHC. Signed-off-by: Gao Guanhua Signed-off-by: Dipen Dudhat --- - applies on git.denx.de/u-boot-mpc85xx.git branch->next

[U-Boot] [PATCH] PIO Mode Read/Write support for FSL eSDHC

PIO mode support for freescale eSDHC Driver. PIO has added to enable data transfer without use of eSDHC DMA Engine. Signed-off-by: Dipen Dudhat --- drivers/mmc/fsl_esdhc.c | 136 +++ include/fsl_esdhc.h |1 + 2 files changed, 127 insertions