[U-Boot] [PATCH] powerpc/mpc85xx: Serdes protocol 00 is supported

[Ebony Zhu]

0x00 is a valid serdes protocol for QorIQ parts, and can not be
used to test whether the serdes is enabled or disabled.

Signed-off-by: Ebony Zhu b45...@freescale.com
---
 arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 5 -
 1 file changed, 5 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c 
b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index d1fc76a..8edf5bb 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -186,11 +186,6 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, 
u32 sd_prctl_shift)
 #endif
 
cfg = in_be32(gur-rcwsr[4])  sd_prctl_mask;
-   /* Is serdes enabled at all? */
-   if (!cfg) {
-   printf(SERDES%d is not enabled\n, sd + 1);
-   return 0;
-   }
 
 /* Erratum A-007186
  * Freescale Scratch Pad Fuse Register n (SFP_FSPFR0)
-- 
1.8.3.1

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[U-Boot] [PATCH] board/freescale: Move CRC32 offset in NXID v1 data format

[Ebony Zhu]

According to AN3638, CRC of NXID v1 is at the end of the
256-byte I2C memory. The wrong CRC32 offset prevents Uboot
from reading system information from EEPROM. No NXID v0 is
being used on Freescale boards.

Signed-off-by: Ebony Zhu b45...@freescale.com
---
 board/freescale/common/sys_eeprom.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/board/freescale/common/sys_eeprom.c 
b/board/freescale/common/sys_eeprom.c
index 9c18dd8..1e212ad 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -21,7 +21,7 @@
 /* some boards with non-256-bytes EEPROM have special define */
 /* for MAX_NUM_PORTS in board-specific file */
 #ifndef MAX_NUM_PORTS
-#define MAX_NUM_PORTS  23
+#define MAX_NUM_PORTS  16
 #endif
 #define NXID_VERSION   1
 #endif
@@ -58,8 +58,9 @@ static struct __attribute__ ((__packed__)) eeprom {
u8 res_1[21]; /* 0x2b - 0x3f Reserved */
u8 mac_count; /* 0x40Number of MAC addresses */
u8 mac_flag;  /* 0x41MAC table flags */
-   u8 mac[MAX_NUM_PORTS][6]; /* 0x42 - x MAC addresses */
-   u32 crc;  /* x+1 CRC32 checksum */
+   u8 mac[MAX_NUM_PORTS][6]; /* 0x42 - 0xa1 MAC addresses */
+   u8 res_2[90]; /* 0xa2 - 0xfb Reserved */
+   u32 crc;  /* 0xfc - 0xff CRC32 checksum */
 #endif
 } e;
 
-- 
1.8.1.4

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