Re: [PATCH] mtd: cfi: Fix PPB lock status readout

2021-04-15 Thread Joakim Tjernlund
On Thu, 2021-04-15 at 07:25 +0200, Stefan Roese wrote: > On 11.04.21 20:47, Marek Vasut wrote: > > According to S26KL512S datasheet [1] and S29GL01GS datasheet [2], > > the procedure to read out PPB lock bits is to send the PPB Entry, > > PPB Read, Reset/ASO Exit. Currently, the code does send

Re: [PATCH] mpc83xx: Fix dcache setup in lock_ram_in_cache

2020-11-13 Thread Joakim Tjernlund
wrong with the CPUs cache and the CPU just RESET itself Jocke On Wed, 2020-11-11 at 13:54 +0100, Joakim Tjernlund wrote: > Lock dcache before clearing INIT_RAM. > More importantly, invalidate dcache contents before using it as RAM. > > Signed-off-by: Joakim Tjernlund > --- >

[PATCH] mpc83xx: Fix dcache setup in lock_ram_in_cache

2020-11-11 Thread Joakim Tjernlund
Lock dcache before clearing INIT_RAM. More importantly, invalidate dcache contents before using it as RAM. Signed-off-by: Joakim Tjernlund --- Something odd happend, on a stable mpc8321 board, small unrelated code changes made the board unbootable. Debugging with an emulator it looked like

Re: U-Boot FIT Signature Verification

2020-09-16 Thread Joakim Tjernlund
On Wed, 2020-09-16 at 13:55 +0200, Heinrich Schuchardt wrote: > On 16.09.20 13:40, Joakim Tjernlund wrote: > > On Wed, 2020-09-16 at 13:14 +0200, Heinrich Schuchardt wrote: > > > CAUTION: This email originated from outside of the organization. Do not > > > click links

Re: U-Boot FIT Signature Verification

2020-09-16 Thread Joakim Tjernlund
On Wed, 2020-09-16 at 13:14 +0200, Heinrich Schuchardt wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > On 16.09.20 10:13, AKASHI Takahiro wrote: > > On Wed,

Re: Changing U-boot relocation addres to SRAM (instead of DRAM)

2020-09-08 Thread Joakim Tjernlund
On Mon, 2020-09-07 at 22:24 +0300, Yusuf Altıparmak wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > Hello, > > I want to modify U-boot to relocate itself to

eSPI was: [PATCH] Revert "mpc85xx: ddr: Always start DDR RAM in Self Refresh mode"

2020-05-27 Thread Joakim Tjernlund
On Sun, 2020-04-12 at 04:22 +, Priyanka Jain wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > > -Original Message----- >

Re: [PATCH 00/24] spi: dm-conversion (part2)

2020-05-27 Thread Joakim Tjernlund
On Wed, 2020-05-27 at 22:16 +0530, Jagan Teki wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > I believe some boards can directly enable DM_SPI if it has >

USB gadget ethernet status ?

2020-05-13 Thread Joakim Tjernlund
I decided to check out USB gadget ethernet in u-boot and selected USB_ETHER/USB_ETH_RNDIS and tried to build it but that fails due to missing __constant_cpu_to_leXX() definitions. These are nowhere to find in u-boot so I wonder what shape above code is? Jocke

Re: [PATCH 2/2] env: add CONFIG_ENV_SECT_SIZE_AUTO

2020-05-06 Thread Joakim Tjernlund
On Wed, 2020-05-06 at 13:06 +0200, Joakim Tjernlund wrote: > On Wed, 2020-05-06 at 12:47 +0200, Rasmus Villemoes wrote: > > On 06/05/2020 12.18, Joakim Tjernlund wrote: > > > On Wed, 2020-05-06 at 12:00 +0200, Joakim Tjernlund wrote: > > > > On Wed, 2020-05-06 at

Re: [PATCH 2/2] env: add CONFIG_ENV_SECT_SIZE_AUTO

2020-05-06 Thread Joakim Tjernlund
On Wed, 2020-05-06 at 12:47 +0200, Rasmus Villemoes wrote: > On 06/05/2020 12.18, Joakim Tjernlund wrote: > > On Wed, 2020-05-06 at 12:00 +0200, Joakim Tjernlund wrote: > > > On Wed, 2020-05-06 at 11:37 +0200, Rasmus Villemoes wrote: > > > > CAUTION: This

Re: [PATCH 2/2] env: add CONFIG_ENV_SECT_SIZE_AUTO

2020-05-06 Thread Joakim Tjernlund
On Wed, 2020-05-06 at 12:15 +0200, Rasmus Villemoes wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > On 06/05/2020 12.00, Joakim Tjernlund

Re: [PATCH 2/2] env: add CONFIG_ENV_SECT_SIZE_AUTO

2020-05-06 Thread Joakim Tjernlund
On Wed, 2020-05-06 at 12:00 +0200, Joakim Tjernlund wrote: > On Wed, 2020-05-06 at 11:37 +0200, Rasmus Villemoes wrote: > > CAUTION: This email originated from outside of the organization. Do not > > click links or open attachments unless you recognize the sender and know > >

Re: [PATCH 2/2] env: add CONFIG_ENV_SECT_SIZE_AUTO

2020-05-06 Thread Joakim Tjernlund
On Wed, 2020-05-06 at 11:37 +0200, Rasmus Villemoes wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > On 06/05/2020 11.21, Joakim Tjernlund w

Re: [PATCH 2/2] env: add CONFIG_ENV_SECT_SIZE_AUTO

2020-05-06 Thread Joakim Tjernlund
On Wed, 2020-05-06 at 11:11 +0200, Rasmus Villemoes wrote: > > On 06/05/2020 10.59, Joakim Tjernlund wrote: > > On Wed, 2020-05-06 at 10:47 +0200, Rasmus Villemoes wrote: > > > At first, I wanted to allow setting CONFIG_ENV_SECT_SIZE to 0 to mean > > > "

Re: [PATCH 2/2] env: add CONFIG_ENV_SECT_SIZE_AUTO

2020-05-06 Thread Joakim Tjernlund
On Wed, 2020-05-06 at 10:47 +0200, Rasmus Villemoes wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > This is roughly the U-Boot side equivalent to commit >

Re: [PATCH] Revert "mpc85xx: ddr: Always start DDR RAM in Self Refresh mode"

2020-04-10 Thread Joakim Tjernlund
On Fri, 2020-04-10 at 11:40 +, Priyanka Jain wrote: > > > -Original Message- > > From: Joakim Tjernlund > > Sent: Thursday, April 9, 2020 6:24 PM > > To: Priyanka Jain ; Biwen Li (OSS) > > > > Cc: u-boot@lists.denx.de; Biwen Li ; Jiafei P

Re: [PATCH] Revert "mpc85xx: ddr: Always start DDR RAM in Self Refresh mode"

2020-04-09 Thread Joakim Tjernlund
On Thu, 2020-04-09 at 20:44 +0800, Biwen Li wrote: This revert will bring back another bug, can you try finding out why it does work? May there are some minor tweaks needed ? Jocke > > From: Biwen Li > > This reverts commit 2a5d5d27edfbdb0e02a7fcf05569f92c02ae44ee. > After applied

Re: [PATCH] ddr: fsl: Impl. Erratum A008109

2019-12-17 Thread Joakim Tjernlund
On Tue, 2019-12-17 at 08:55 +, Priyanka Jain wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > > -Original Message----- >

Re: [PATCH v2 1/2] common: fdt_support: add support for setting usable memory

2019-12-03 Thread Joakim Tjernlund
On Tue, 2019-12-03 at 14:04 +0200, Igor Opaniuk wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > From: Igor Opaniuk > > Add support for setting

[U-Boot] [PATCH] mpc85xx: ddr: Always start DDR RAM in Self Refresh mode

2019-11-27 Thread Joakim Tjernlund
unconditionally made all our boards stable again, regardless of Cold/Warm boot. Signed-off-by: Joakim Tjernlund --- drivers/ddr/fsl/mpc85xx_ddr_gen3.c | 13 ++--- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl

Re: [U-Boot] [PATCH] ddr: fsl: Impl. Erratum A008109

2019-11-25 Thread Joakim Tjernlund
On Wed, 2019-11-20 at 17:07 +0100, Joakim Tjernlund wrote: > Impl. erratum as descibed in errata doc. > Enable A008109 for T1040 and T1024 > > Signed-off-by: Joakim Tjernlund > --- > arch/powerpc/cpu/mpc85xx/Kconfig | 2 ++ > drivers/ddr/fsl/Kconfig | 3 +

[U-Boot] [PATCH] ddr: fsl: Impl. Erratum A008109

2019-11-20 Thread Joakim Tjernlund
Impl. erratum as descibed in errata doc. Enable A008109 for T1040 and T1024 Signed-off-by: Joakim Tjernlund --- arch/powerpc/cpu/mpc85xx/Kconfig | 2 ++ drivers/ddr/fsl/Kconfig | 3 +++ drivers/ddr/fsl/ctrl_regs.c | 6 ++ 3 files changed, 11 insertions(+) diff --git a/arch

Re: [U-Boot] [PATCH v5 2/5] dm: spi: Convert Freescale ESPI driver to driver model

2019-08-21 Thread Joakim Tjernlund
On Wed, 2019-08-21 at 09:46 +, Xiaowei Bao wrote: > > -Original Message- > > From: Joakim Tjernlund > > Sent: 2019年8月21日 15:52 > > To: Prabhakar Kushwaha ; Ruchika Gupta > > ; Xiaowei Bao ; > > Shengzhou Liu ; w...@denx.de; > > ja...@amarula

Re: [U-Boot] [PATCH v5 2/5] dm: spi: Convert Freescale ESPI driver to driver model

2019-08-21 Thread Joakim Tjernlund
On Wed, 2019-08-21 at 01:19 +, Xiaowei Bao wrote: > > > -Original Message- > > From: Joakim Tjernlund > > Sent: 2019年8月20日 19:04 > > To: Prabhakar Kushwaha ; Ruchika Gupta > > ; Xiaowei Bao ; > > Shengzhou Liu ; w...@denx.de; > &

Re: [U-Boot] [PATCH v5 2/5] dm: spi: Convert Freescale ESPI driver to driver model

2019-08-20 Thread Joakim Tjernlund
On Tue, 2019-08-20 at 06:59 +, Xiaowei Bao wrote: > > From: Chuanhua Han > > Modify the Freescale ESPI driver to support the driver model. > Also resolved the following problems: > > = WARNING == > This board does not use CONFIG_DM_SPI. Please update

Re: [U-Boot] [PATCH v2 10/19] spi: mpc8xxx: Simplify logic a bit

2019-05-15 Thread Joakim Tjernlund
On Wed, 2019-05-15 at 07:02 +0200, Mario Six wrote: > On Tue, May 14, 2019 at 3:53 PM Jagan Teki wrote: > > On Thu, May 2, 2019 at 2:37 PM Joakim Tjernlund > > wrote: > > > On Thu, 2019-05-02 at 07:31 +0200, Mario Six wrote: > > > > CAUTION: This email origina

Re: [U-Boot] [PATCH v2 10/19] spi: mpc8xxx: Simplify logic a bit

2019-05-02 Thread Joakim Tjernlund
m vacation, so here's my answer: > > On Mon, Apr 29, 2019 at 12:41 PM Jagan Teki > wrote: > > + Mario > > > > On Mon, Apr 29, 2019 at 2:48 PM Joakim Tjernlund > > wrote: > > > On Mon, 2019-04-29 at 01:58 +0530, Jagan Teki wrote: > > > > From:

Re: [U-Boot] [PATCH v2 10/19] spi: mpc8xxx: Simplify logic a bit

2019-04-29 Thread Joakim Tjernlund
On Mon, 2019-04-29 at 01:58 +0530, Jagan Teki wrote: > > From: Mario Six > > We do nothing in the loop if the "not empty" event was not detected. To > simplify the logic, check if this is the case, and skip the execution of > the loop early to reduce the nesting level and flag checking. Looked

[U-Boot] eMMC boot partition possible with an eMMC 4.2 controller ?

2019-02-05 Thread Joakim Tjernlund
Trying to figure out if it will be possible to boot u-boot from an eMMC boot partition using an eMMC 4.2 controller(eMMC boot part. was introduced in 4.3) ? I know this might not be the best list to ask this but I have been unable to find this out using Google and I hope there is someone here

Re: [U-Boot] [PATCH 2/2] board: tbs2910: Remove FIT support in defconfig to reduce u-boot size

2019-01-10 Thread Joakim Tjernlund
On Wed, 2019-01-09 at 17:39 -0500, Tom Rini wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > On Wed, Jan 09, 2019 at 05:01:37PM +0100, Stefano Babic wrote: >

[U-Boot] [PATCH] mpc85xx: Add support for -msingle-pic-base

2018-12-06 Thread Joakim Tjernlund
hex filename 288002 17868 24968 330838 50c56 u-boot.aft Signed-off-by: Joakim Tjernlund --- arch/powerpc/cpu/mpc85xx/config.mk | 1 + arch/powerpc/cpu/mpc85xx/start.S | 3 +++ 2 files changed, 4 insertions(+) diff --git a/arch/powerpc/cpu/mpc85xx/config.mk b/arch/powerpc/cpu

[U-Boot] [PATCH] mpc83xx: Add support for -msingle-pic-base

2018-11-28 Thread Joakim Tjernlund
-msingle-pic-base is a new gcc(from 4.6) option for ppc and it reduces the size of my u-boot with about 4 KB. While at it, add -fno-jump-tables too to save a few more bytes. Signed-off-by: Joakim Tjernlund --- I think all PowerPC's can use this but I have only tested 83xx so just enable

Re: [U-Boot] [PATCH v2 1/9] powerpc, mpc8xx: clear top of stack

2018-11-21 Thread Joakim Tjernlund
On Wed, 2018-11-21 at 08:51 +, Christophe Leroy wrote: > > Reported-by: Joakim Tjernlund > Signed-off-by: Christophe Leroy Reviewed-by: Joakim Tjernlund Leroy, if you need space, you may want to revive: https://github.com/u-boot/u-boot/commit/39768f7715ed637ef02f49fc7de664c

Re: [U-Boot] i2c: Fix pca953x endianess issue, commit daa75b34828d45b7c1d63009188d45f4a32d06ba

2018-10-11 Thread Joakim Tjernlund
Okt. 2018 um 07:42 Uhr schrieb Heiko Schocher : > > > > Hello Joakim, > > > > Am 10.10.2018 um 19:34 schrieb Joakim Tjernlund: > > > This commit broke our pca953x usage(on ppc). > > > > > > I wonder why gpio pins here has an endia

[U-Boot] i2c: Fix pca953x endianess issue, commit daa75b34828d45b7c1d63009188d45f4a32d06ba

2018-10-10 Thread Joakim Tjernlund
This commit broke our pca953x usage(on ppc). I wonder why gpio pins here has an endian, its not a number. If there must be an endian connected with this, should it not be a cpu_to_be16 instead, which will retain compatibility ? ___ U-Boot mailing list

Re: [U-Boot] [PATCH] fw_setenv: avoid writing environment when nothing has changed

2018-09-24 Thread Joakim Tjernlund
On Mon, 2018-09-24 at 08:42 +0100, Alex Kiernan wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > On Wed, Sep 5, 2018 at 8:23 PM Rasmus Villemoes > wrote: > >

Re: [U-Boot] Fwd: Parallel build is broken

2018-09-05 Thread Joakim Tjernlund
On Tue, 2018-09-04 at 17:43 -0400, Tom Rini wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > On Tue, Sep 04, 2018 at 09:05:55PM +0300, Andy Shevchenko wrote:

Re: [U-Boot] [PATCH] FSL PCI: Configure PCIe reference ratio

2018-08-02 Thread Joakim Tjernlund
York, did this go anywhere? Jocke On Tue, 2018-02-27 at 19:54 +, York Sun wrote: > > On 02/27/2018 11:52 AM, Joakim Tjernlund wrote: > > On Tue, 2018-02-27 at 19:30 +, York Sun wrote: > > > > > > On 11/21/2017 10:20 AM, Joakim Tjernlund wrote: > > &

Re: [U-Boot] [PATCH] fs: btrfs: Fix wrong comparison in logical to physical mapping

2018-07-04 Thread Joakim Tjernlund
On Wed, 2018-07-04 at 19:10 +0200, Marek Behún wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > The comparison > logical > item->logical + item->length > in

Re: [U-Boot] [PATCH] Makefile: Ensure we build with -std=gnu11

2018-06-20 Thread Joakim Tjernlund
On Tue, 2018-06-19 at 23:57 -0400, Tom Rini wrote: > > > With the move to using at least gcc-6 for many targets we now have C > code that requires the GNU11 C standard to be used in all cases. Requiring gcc-6 is a bit much I think, there are lots of cross gcc's out there that is older. I don't

Re: [U-Boot] [PATCH RFCv2 0/6] Beginning of migration of MPC8xx to DM model

2018-05-04 Thread Joakim Tjernlund
On Fri, 2018-05-04 at 12:33 +0200, Christophe LEROY wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > Hi Mario, > > Le 04/05/2018 à 11:56, Mario Six a écrit :

Re: [U-Boot] [PATCH v2 00/18] spi: mpc8xxx: DM conversion

2018-04-26 Thread Joakim Tjernlund
On Thu, 2018-04-26 at 11:35 +0530, Jagan Teki wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > On Thu, Apr 26, 2018 at 11:24 AM, Mario Six

Re: [U-Boot] [PATCH] FSL PCI: Configure PCIe reference ratio

2018-02-27 Thread Joakim Tjernlund
On Tue, 2018-02-27 at 19:30 +, York Sun wrote: > > On 11/21/2017 10:20 AM, Joakim Tjernlund wrote: > > On Tue, 2017-11-21 at 18:04 +, York Sun wrote: > > > > > > > > > On 11/21/2017 09:52 AM, Joakim Tjernlund wrote: > > > >

Re: [U-Boot] [PATCH] drivers/ddr/fsl: Dual-license DDR driver

2018-02-13 Thread Joakim Tjernlund
ntributed to that code for their explicit > > permission. Legally it is a huge difference between actively > > confirming approval and not reacting at all. > > > > All people (except Freescale and NXP employees) contributed to this code > are in

Re: [U-Boot] [PATCH v3 09/15] env: Support multiple environments

2018-02-07 Thread Joakim Tjernlund
On Thu, 1970-01-01 at 00:00 +, Simon Goldschmidt wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > On 06.02.2018 09:20, Joakim Tjernlund

Re: [U-Boot] [PATCH v3 09/15] env: Support multiple environments

2018-02-07 Thread Joakim Tjernlund
On Thu, 1970-01-01 at 00:00 +, Maxime Ripard wrote: > Hi, > > On Tue, Feb 06, 2018 at 08:20:49AM +0000, Joakim Tjernlund wrote: > > On Thu, 1970-01-01 at 00:00 +, Simon Goldschmidt wrote: > > > > . > > > > Reviewed-by: Andre Przywara &l

Re: [U-Boot] [PATCH v3 09/15] env: Support multiple environments

2018-02-06 Thread Joakim Tjernlund
On Thu, 1970-01-01 at 00:00 +, Simon Goldschmidt wrote: . > > Reviewed-by: Andre Przywara > > Reviewed-by: Simon Glass > > Signed-off-by: Maxime Ripard > > --- > > env/env.c | 80

Re: [U-Boot] U-Boot 2015 and u-boot-fw-utils 2017.09

2018-01-11 Thread Joakim Tjernlund
On Thu, 1970-01-01 at 00:00 +, Wolfgang Denk wrote: > > Hello, > > In message <2018000422.7957c7f3@jawa> you wrote: > > > > > I am using U-Boot 2015.04, and the new root file system for my > > > platform includes u-boot-fw-utils 2017.09. I have noticed that > > > fw_{print,set}env

Re: [U-Boot] [PATCH v2 0/9] reduce the size of the mmc core

2018-01-04 Thread Joakim Tjernlund
On Thu, 2018-01-04 at 15:23 +0100, Jean-Jacques Hiblot wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > This series applies on u-boot/next > > It aims at

Re: [U-Boot] U-Boot proper(not SPL) relocate option

2017-11-29 Thread Joakim Tjernlund
On Wed, 2017-11-29 at 19:11 +0900, Masahiro Yamada wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > Hi Simon, > > > 2017-11-28 2:13 GMT+09:00 Simon Glass

Re: [U-Boot] [PATCH] FSL PCI: Configure PCIe reference ratio

2017-11-21 Thread Joakim Tjernlund
On Tue, 2017-11-21 at 18:35 +, York Sun wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > On 11/21/2017 10:20 AM, Joakim Tjernlund wrote

Re: [U-Boot] [PATCH] FSL PCI: Configure PCIe reference ratio

2017-11-21 Thread Joakim Tjernlund
On Tue, 2017-11-21 at 18:04 +, York Sun wrote: > > > On 11/21/2017 09:52 AM, Joakim Tjernlund wrote: > > On Tue, 2017-11-21 at 17:45 +, York Sun wrote: > > > > > > On 11/21/2017 09:41 AM, Joakim Tjernlund wrote: > > > > On T

Re: [U-Boot] [PATCH] FSL PCI: Configure PCIe reference ratio

2017-11-21 Thread Joakim Tjernlund
On Tue, 2017-11-21 at 17:45 +, York Sun wrote: > > On 11/21/2017 09:41 AM, Joakim Tjernlund wrote: > > On Tue, 2017-11-21 at 17:32 +, York Sun wrote: > > > CAUTION: This email originated from outside of the organization. Do not > > > click links or open at

Re: [U-Boot] [PATCH] FSL PCI: Configure PCIe reference ratio

2017-11-21 Thread Joakim Tjernlund
On Tue, 2017-11-21 at 17:32 +, York Sun wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > On 11/21/2017 09:29 AM, Joakim Tjernlund wrote

Re: [U-Boot] [PATCH] FSL PCI: Configure PCIe reference ratio

2017-11-21 Thread Joakim Tjernlund
On Tue, 2017-11-21 at 17:23 +, York Sun wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > On 11/21/2017 09:18 AM, Joakim Tjernlund wrote

Re: [U-Boot] [PATCH] FSL PCI: Configure PCIe reference ratio

2017-11-21 Thread Joakim Tjernlund
On Tue, 2017-09-12 at 19:56 +0200, Joakim Tjernlund wrote: > Most FSL PCIe controllers expects 333 MHz PCI reference clock. > This clock is derived from the CCB but in many cases the ref. > clock is not 333 MHz and a divisor needs to be configured. > > This adds PEX_CCB_DIV #d

Re: [U-Boot] [PATCH 3/3] Powerpc: pcie: Make pcie link state judgement more specific

2017-11-08 Thread Joakim Tjernlund
> > > -Original Message----- > > From: Joakim Tjernlund [mailto:joakim.tjernl...@infinera.com] > > Sent: Friday, October 20, 2017 9:13 PM > > To: w...@denx.de; Mingkai Hu <mingkai...@nxp.com>; > > tony.obr...@alliedtelesis.co.nz; u-boot@lists.d

Re: [U-Boot] [PATCH 3/3] Powerpc: pcie: Make pcie link state judgement more specific

2017-10-20 Thread Joakim Tjernlund
On Fri, 2017-10-20 at 18:16 +0800, Bao Xiaowei wrote: > CAUTION: This email originated from outside of the organization. Do not click > links or open attachments unless you recognize the sender and know the > content is safe. > > > For some special reset times for longer pcie devices, the pcie

[U-Boot] [PATCH] FSL PCI: Configure PCIe reference ratio

2017-09-12 Thread Joakim Tjernlund
Most FSL PCIe controllers expects 333 MHz PCI reference clock. This clock is derived from the CCB but in many cases the ref. clock is not 333 MHz and a divisor needs to be configured. This adds PEX_CCB_DIV #define which can be defined for each type of CPU/platform. Signed-off-by: Joakim

Re: [U-Boot] setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?

2017-09-07 Thread Joakim Tjernlund
On Thu, 2017-09-07 at 06:45 +, Mingkai Hu wrote: > > -Original Message- > > From: Mingkai Hu > > Sent: Wednesday, September 06, 2017 5:37 PM > > To: 'Joakim Tjernlund' <joakim.tjernl...@infinera.com>; Roy Zang > > <roy.z...@nxp.com>;

Re: [U-Boot] setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?

2017-09-06 Thread Joakim Tjernlund
On Wed, 2017-09-06 at 09:36 +, Mingkai Hu wrote: > > -Original Message- > > From: Joakim Tjernlund [mailto:joakim.tjernl...@infinera.com] > > Sent: Tuesday, September 05, 2017 8:45 PM > > To: Mingkai Hu <mingkai...@nxp.com>; Roy Zang <roy.z...@nxp.com

Re: [U-Boot] setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?

2017-09-05 Thread Joakim Tjernlund
On Wed, 2017-08-30 at 15:25 +, York Sun wrote: > On 08/30/2017 06:05 AM, Joakim Tjernlund wrote: > > On Tue, 2017-08-29 at 17:33 +, York Sun wrote: > > > +Roy Zang to comment on PCIe clock source > > > > > > On 08/29/2017 10:06 AM, Joakim Tjernlund wro

Re: [U-Boot] FSL PCIe LTSSM >= PCI_LTSSM_L0 equals link up

2017-09-05 Thread Joakim Tjernlund
On Mon, 2017-08-28 at 17:14 +, York Sun wrote: > +Xiaowei > > On 08/28/2017 10:09 AM, Joakim Tjernlund wrote: > > On Mon, 2017-08-28 at 16:55 +, York Sun wrote: > > > On 08/28/2017 09:48 AM, Joakim Tjernlund wrote: > > > > FSL PCIe controller drivers be

Re: [U-Boot] setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?

2017-08-30 Thread Joakim Tjernlund
On Wed, 2017-08-30 at 15:25 +, York Sun wrote: > On 08/30/2017 06:05 AM, Joakim Tjernlund wrote: > > On Tue, 2017-08-29 at 17:33 +, York Sun wrote: > > > +Roy Zang to comment on PCIe clock source > > > > > > On 08/29/2017 10:06 AM, Joakim Tjernlund wro

Re: [U-Boot] setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?

2017-08-30 Thread Joakim Tjernlund
On Tue, 2017-08-29 at 17:33 +, York Sun wrote: > +Roy Zang to comment on PCIe clock source > > On 08/29/2017 10:06 AM, Joakim Tjernlund wrote: > > On Tue, 2017-08-29 at 15:43 +, York Sun wrote: > > > On 08/29/2017 06:21 AM, Joakim Tjernlund wrote: > > > &g

Re: [U-Boot] setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?

2017-08-29 Thread Joakim Tjernlund
On Tue, 2017-08-29 at 15:43 +, York Sun wrote: > On 08/29/2017 06:21 AM, Joakim Tjernlund wrote: > > On Tue, 2017-08-29 at 12:47 +0200, Joakim Tjernlund wrote: > > > As we are looking at PCI stuff ATM I would like to ask > > > about PEX_GCLK_RATIO in E500 CPUs.

Re: [U-Boot] setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?

2017-08-29 Thread Joakim Tjernlund
On Tue, 2017-08-29 at 12:47 +0200, Joakim Tjernlund wrote: > As we are looking at PCI stuff ATM I would like to ask > about PEX_GCLK_RATIO in E500 CPUs. I cannot find this is setup > at all for E500 but I THINK this is required. > > In 83xx one do: > get_clocks(); >

Re: [U-Boot] FSL PCIe LTSSM >= PCI_LTSSM_L0 equals link up

2017-08-29 Thread Joakim Tjernlund
in uboot or kernel, this solution is used for layerscape platform. > I am not asking about the layerscape platform, I want to know what to do with FSL. Please read the whole thread. > Thanks > > -Original Message- > From: Joakim Tjernlund [mailto:joakim.tjernl...@infinera

[U-Boot] setup of PEX_GCLK_RATIO in E500 CPUs(P2010) missing ?

2017-08-29 Thread Joakim Tjernlund
As we are looking at PCI stuff ATM I would like to ask about PEX_GCLK_RATIO in E500 CPUs. I cannot find this is setup at all for E500 but I THINK this is required. In 83xx one do: get_clocks(); /* Configure the PCIE controller core clock ratio */ out_le32(hose_cfg_base + PEX_GCLK_RATIO, (((bus ?

Re: [U-Boot] FSL PCIe LTSSM >= PCI_LTSSM_L0 equals link up

2017-08-29 Thread Joakim Tjernlund
FSL u-boot/linux users. > Thanks > > > -Original Message- > From: Joakim Tjernlund [mailto:joakim.tjernl...@infinera.com] > Sent: Tuesday, August 29, 2017 2:45 PM > To: Xiaowei Bao <xiaowei@nxp.com>; York Sun <york@nxp.com> > Cc: u-boot@lists.

Re: [U-Boot] FSL PCIe LTSSM >= PCI_LTSSM_L0 equals link up

2017-08-29 Thread Joakim Tjernlund
- > From: York Sun > Sent: Tuesday, August 29, 2017 1:15 AM > To: Xiaowei Bao <xiaowei@nxp.com> > Cc: Joakim Tjernlund <joakim.tjernl...@infinera.com>; u-boot@lists.denx.de > Subject: Re: FSL PCIe LTSSM >= PCI_LTSSM_L0 equals link up > > +Xiaowei > >

Re: [U-Boot] FSL PCIe LTSSM >= PCI_LTSSM_L0 equals link up

2017-08-28 Thread Joakim Tjernlund
On Mon, 2017-08-28 at 16:55 +, York Sun wrote: > On 08/28/2017 09:48 AM, Joakim Tjernlund wrote: > > FSL PCIe controller drivers before REV 3 has this test for link up: > >enabled = ltssm >= PCI_LTSSM_L0; > > > > We have a PCIe dev. that stays in LTSSM=0x51

[U-Boot] FSL PCIe LTSSM >= PCI_LTSSM_L0 equals link up

2017-08-28 Thread Joakim Tjernlund
FSL PCIe controller drivers before REV 3 has this test for link up: enabled = ltssm >= PCI_LTSSM_L0; We have a PCIe dev. that stays in LTSSM=0x51 (Polling Compliance) when non ready for PCI transaktions. When FSL PCIe controller tries to access this device, it hangs forever. Is LTSSM=0x51

Re: [U-Boot] Orphan Freescale PowerPC boards

2017-05-17 Thread Joakim Tjernlund
On Wed, 2017-05-17 at 13:25 -0400, Tom Rini wrote: > On Wed, May 17, 2017 at 04:57:57PM +, york sun wrote: > > On 05/09/2017 08:52 AM, York Sun wrote: > > > On 05/09/2017 08:49 AM, Tom Rini wrote: > > > > On Tue, May 09, 2017 at 08:46:46AM -0700, York Sun wrote: > > > > > On 05/09/2017 05:36

Re: [U-Boot] [PATCH] sunxi: Explicitly call fdt_fixup_ethernet() in our ft_board_setup()

2017-04-28 Thread Joakim Tjernlund
On Fri, 2017-04-28 at 11:05 +0200, Maxime Ripard wrote: > On Fri, Apr 28, 2017 at 03:33:53PM +0800, Chen-Yu Tsai wrote: > > The sunxi platform relies on the core boot sequence to load and process > > device tree blobs, including writing back any MAC addresses we generate > > by an implicit call to

Re: [U-Boot] Remove global variable env_t *env_ptr ?

2017-04-04 Thread Joakim Tjernlund
On Tue, 2017-04-04 at 13:27 +0200, Wolfgang Denk wrote: > Dear Joakim, > > In message <1491302640.30240.1.ca...@infinera.com> you wrote: > > > > > That is my exact question - when would this happen? Flash sectors > > > do now wander around in memory or change size :-) > > > > No, but they

Re: [U-Boot] Remove global variable env_t *env_ptr ?

2017-04-04 Thread Joakim Tjernlund
On Tue, 2017-04-04 at 12:31 +0200, Wolfgang Denk wrote: > Dear Joakim, > > In message <1491301459.28343.1.ca...@infinera.com> you wrote: > > > > Use case is when CONFIG_ENV_SECT_SIZE and/or CONFIG_ENV_ADDR are non > > constants. > > That is my exact question - when would this happen? Flash

Re: [U-Boot] Remove global variable env_t *env_ptr ?

2017-04-04 Thread Joakim Tjernlund
On Tue, 2017-04-04 at 10:55 +0200, Lukasz Majewski wrote: > Hi Joakim, > > > I am looking at adding support for runtime sizing of CONFIG_ENV_ADDR > > as we need to replace out flash but we don't want to create a new > > u-boot binairy just for this simple change. > > Please correct me if I did

Re: [U-Boot] Remove global variable env_t *env_ptr ?

2017-04-04 Thread Joakim Tjernlund
On Mon, 2017-04-03 at 22:17 +0200, Wolfgang Denk wrote: > Dear Joakim, Dear Wolfgang, > > In message <1491221969.4177.81.ca...@infinera.com> you wrote: > > I am looking at adding support for runtime sizing of CONFIG_ENV_ADDR as > > we need to replace out flash but we don't want to create a new

[U-Boot] Remove global variable env_t *env_ptr ?

2017-04-03 Thread Joakim Tjernlund
I am looking at adding support for runtime sizing of CONFIG_ENV_ADDR as we need to replace out flash but we don't want to create a new u-boot binairy just for this simple change. While converting env_flash.c I noted the global variable env_t *env_ptr = (env_t *)CONFIG_ENV_ADDR; which cannot be

Re: [U-Boot] [PATCH] Remove extra fdt_fixup_ethernet() call

2017-04-03 Thread Joakim Tjernlund
On Fri, 2017-03-31 at 22:21 -0600, Simon Glass wrote: > Hi Joakim, > > On 23 March 2017 at 11:02, Joakim Tjernlund > <joakim.tjernl...@infinera.com> wrote: > > ft_cpu_setup() already calls fdt_fixup_ethernet(), calling it > > in image_setup_libfdt() is both redundan

Re: [U-Boot] [PATCH] Remove extra fdt_fixup_ethernet() call

2017-03-28 Thread Joakim Tjernlund
On Thu, 2017-03-23 at 18:02 +0100, Joakim Tjernlund wrote: > ft_cpu_setup() already calls fdt_fixup_ethernet(), calling it > in image_setup_libfdt() is both redundant and breaks any modifications > done by ft_board_setup(). Restore the old behavior by removing > the call in image_

[U-Boot] [PATCH] Remove extra fdt_fixup_ethernet() call

2017-03-23 Thread Joakim Tjernlund
ft_cpu_setup() already calls fdt_fixup_ethernet(), calling it in image_setup_libfdt() is both redundant and breaks any modifications done by ft_board_setup(). Restore the old behavior by removing the call in image_setup_libfdt() Signed-off-by: Joakim Tjernlund <joakim.tjernl...@infinera.

Re: [U-Boot] libfdt SWIG build error with Python 3.x

2017-02-09 Thread Joakim Tjernlund
On Thu, 2017-02-09 at 13:17 +, Ricardo Martins wrote: > In some Linux distributions (e.g., Arch Linux) the Python binary points to > Python 3.x instead of Python 2.x. This is an issue when building the libfdt > SWIG extension, as the generated extension file will be called something > like

[U-Boot] PHY less eth on x86 u-boot?

2017-02-03 Thread Joakim Tjernlund
How does PHY less ethernet work on x86 u-boot? In powerpc we have the device tree where one can express a "fixed-link", does this work for x86 too? Jocke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] u-boot.git or u-boot-x86.git for x86_64 u-boots?

2017-01-24 Thread Joakim Tjernlund
On Sat, 2017-01-14 at 10:06 -0700, Simon Glass wrote: > Hi Joakim, > > On 14 January 2017 at 04:51, Bin Meng <bmeng...@gmail.com> wrote: > > +Simon, > > > > On Fri, Jan 13, 2017 at 4:12 AM, Joakim Tjernlund > > <joakim.tjernl...@infinera.com> wrot

Re: [U-Boot] [PATCH v2 1/2] powerpc: mpc83xx: Minimize r1 modification

2017-01-17 Thread Joakim Tjernlund
only set the SP > once after all computations are done. > > Signed-off-by: Mario Six <mario....@gdsys.cc> Reviewed-by: Joakim Tjernlund <joakim.tjernl...@infinera.com> > --- > > Changes in v2: > > Patch added (following a suggestion by Joakim Tjernlund

Re: [U-Boot] u-boot.git or u-boot-x86.git for x86_64 u-boots?

2017-01-15 Thread Joakim Tjernlund
On Sat, 2017-01-14 at 10:06 -0700, Simon Glass wrote: > Hi Joakim, > > On 14 January 2017 at 04:51, Bin Meng <bmeng...@gmail.com> wrote: > > +Simon, > > > > On Fri, Jan 13, 2017 at 4:12 AM, Joakim Tjernlund > > <joakim.tjernl...@infinera.com> wrot

Re: [U-Boot] u-boot.git or u-boot-x86.git for x86_64 u-boots?

2017-01-14 Thread Joakim Tjernlund
On Sat, 2017-01-14 at 19:51 +0800, Bin Meng wrote: > +Simon, > > On Fri, Jan 13, 2017 at 4:12 AM, Joakim Tjernlund > <joakim.tjernl...@infinera.com> wrote: > > I found two repos w.r.t x86_64 for u-boot, which one should I use? > > > > U-Boot x86_64 support is

[U-Boot] u-boot.git or u-boot-x86.git for x86_64 u-boots?

2017-01-12 Thread Joakim Tjernlund
I found two repos w.r.t x86_64 for u-boot, which one should I use? I am ATM only looking at USING the qemu-x86 target for now. BTW, I found tools/binman/binman.py only worked with python 2.7, maybe you can change the shebang to python2.7 as my default python is 3.4 Jocke

Re: [U-Boot] [PATCH] powerpc: mpc83xx: Enable pre-relocation malloc

2017-01-06 Thread Joakim Tjernlund
On Fri, 2017-01-06 at 14:56 +0100, Mario Six wrote: > To enable DM on MPC83xx, we need pre-relocation malloc, which is > implemented in this patch. > Would be nice if you could avoid using r1, each time you modify r1 gdb will be upset/confused if you ever try to debug start.S with gdb. I guess

Re: [U-Boot] [PATCH v3 0/3] dm: gpio: Add driver for MPC85xx GPIO controller

2016-05-13 Thread Joakim Tjernlund
register to work around a known > issue > in some MPC85xx GPIO controllers (as pointed out by Joakim Tjernlund). >  Nice, thanks. Do you have any plans to do mpc83xx also? It needs the same gpdat shadow.   Jocke ___ U-Boot mailing list U-Boot@li

Re: [U-Boot] GPIO driver for Freescale QorIQ T2080

2016-05-11 Thread Joakim Tjernlund
On Wed, 2016-05-11 at 11:54 +0200, Mario Six wrote: > On Tue, May 10, 2016 at 1:22 AM, Hamish Martin < > hamish.mar...@alliedtelesis.co.nz> wrote: > > > > > Hi, > > > > I'm looking for uboot driver support for the Freescale QorIQ T2080 CPU. > > This has 4 blocks of GPIOs similar to the single

Re: [U-Boot] [PATCH v3] spi: fsl_espi: Return all data read from device unmodified

2015-12-12 Thread Joakim Tjernlund
On Fri, 2015-12-11 at 21:19 -0500, Dale P. Smith wrote: > Signed-off-by: Dale P. Smith > --- > Changes for v2: >    - First attempt at using git format-patch > Changes for v3: >    - Fix subject. >    - Add changelog While this is a step in the right direction, this

Re: [U-Boot] [PATCH v4 1/2] Reserve secure memory

2015-11-16 Thread Joakim Tjernlund
On Mon, 2015-11-16 at 08:34 -0800, York Sun wrote: > Secure memory is at the end of memory, separated and reserved > from OS, tracked by gd->secure_ram. Secure memory can host > MMU tables, security monitor, etc. Don't see the difference with pram here? Also, do you really wan't to hide the

Re: [U-Boot] [PATCH v1] armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server

2015-11-16 Thread Joakim Tjernlund
On Mon, 2015-11-16 at 09:03 -0800, York Sun wrote: > > On 11/12/2015 02:54 PM, Joakim Tjernlund wrote: > > On Thu, 2015-11-12 at 14:20 -0800, York Sun wrote: > > > Introduce a new function to calculate reserved memory to replace macro > > > CONFIG_SYS_MEM_TOP_HIDE fo

Re: [U-Boot] [PATCH v1] armv8: fsl-layerscale: Rewrite reserving memory for MC and debug server

2015-11-12 Thread Joakim Tjernlund
On Thu, 2015-11-12 at 14:20 -0800, York Sun wrote: > Introduce a new function to calculate reserved memory to replace macro > CONFIG_SYS_MEM_TOP_HIDE for more flexibility. Legacy use of this macro is > still supported. MC and debug server are not board-specific. Move the > reservation function to

Re: [U-Boot] [PATCH v1 0/7] Enable high speed and heavy load for DDR4 for LSCH3

2015-11-11 Thread Joakim Tjernlund
On Thu, 2015-11-05 at 12:47 -0800, York Sun wrote: > > On 11/05/2015 11:53 AM, Joakim Tjernlund wrote: > > On Thu, 2015-11-05 at 10:29 -0800, York Sun wrote: > > > > > > On 11/05/2015 10:19 AM, Joakim Tjernlund wrote: > > > > On Thu,

Re: [U-Boot] [PATCH v1 0/7] Enable high speed and heavy load for DDR4 for LSCH3

2015-11-06 Thread Joakim Tjernlund
On Fri, 2015-11-06 at 02:24 +, Yuantian Tang wrote: > > > -Original Message- > > From: York Sun [mailto:york...@freescale.com] > > Sent: Friday, November 06, 2015 1:42 AM > > To: Joakim Tjernlund <joakim.tjernl...@transmode.se>; Tang Yuantian- > &

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