Re: [PATCH 1/1] board: ae350: Support autoboot from RAM

2021-11-03 Thread Rick Chen
" > > echo $cmd > eval $cmd > } > > The address where the kernel is loaded can be altered by changing the value > of KERNEL_IMAGE_ADDR. > > Signed-off-by: Leo Yu-Chi Liang > --- > include/configs/ax25-ae350.h | 13 - > 1 file changed, 12 insertions(+), 1 deletion(-) Reviewed-by: Rick Chen

Re: [PATCH 1/1] board: sifive: unmatched: enlarge CONFIG_SYS_SPL_MALLOC_SIZE

2021-11-03 Thread Rick Chen
> Hi Rick, > > On Mon, Oct 25, 2021 at 10:24 AM Rick Chen wrote: > > > > Hi, Bin > > > > > Hi Rick, > > > > > > On Mon, Oct 25, 2021 at 9:49 AM Rick Chen wrote: > > > > > > > > Hi Bin, > > > > > >

Re: [PATCH] riscv: ae350: Use #if defined instead of CONFIG_IS_ENABLED

2021-10-31 Thread Rick Chen
/include/linux/kconfig.h, > CONFIG_IS_ENABLED(OF_BOARD) expands to 0 when CONFIG_SPL_BUILD is defined > because there is no CONFIG_SPL_OF_BOARD. > > Use #if defined instead. > > Signed-off-by: Leo Yu-Chi Liang > --- > board/AndesTech/ax25-ae350/ax25-ae350.c | 4 ++-- > 1 file changed,

Re: [PATCH 07/10] Convert CONFIG_OF_EMBED to Kconfig

2021-10-31 Thread Rick Chen
> include/configs/imx8qxp_mek.h | 2 -- > 8 files changed, 2 insertions(+), 15 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH 2/2] cmd: sbi: show SBI implementation version

2021-10-27 Thread Rick Chen
show the SBI implementation version > > Signed-off-by: Heinrich Schuchardt > --- > cmd/riscv/sbi.c | 26 ++ > 1 file changed, 18 insertions(+), 8 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH 1/2] riscv: function to retrieve SBI implementation version

2021-10-27 Thread Rick Chen
> > Provide function sbi_get_impl_version() to retrieve the SBI implementation > version. > > Signed-off-by: Heinrich Schuchardt > --- > arch/riscv/include/asm/sbi.h | 1 + > arch/riscv/lib/sbi.c | 19 +++ > 2 files changed, 20 insertions(+) Reviewed-by: Rick Chen

Re: [PATCH 1/1] board: sifive: unmatched: enlarge CONFIG_SYS_SPL_MALLOC_SIZE

2021-10-24 Thread Rick Chen
Hi, Bin > Hi Rick, > > On Mon, Oct 25, 2021 at 9:49 AM Rick Chen wrote: > > > > Hi Bin, > > > > > From: Bin Meng > > > Sent: Tuesday, October 19, 2021 4:55 PM > > > To: Alexandre Ghiti > > > Cc: Heinrich Schuchardt ; Tom Rini

Re: [PATCH 1/1] board: sifive: unmatched: enlarge CONFIG_SYS_SPL_MALLOC_SIZE

2021-10-24 Thread Rick Chen
t; > #define CONFIG_SPL_STACK (0x0800 + 0x001D - \ > > > > GENERATED_GBL_DATA_SIZE) > > > > > > What caused this? > > > > > > Last time this was seen on Ax25-AE350, CONFIG_SPL_SYS_MALLOC_F_LEN > &

Re: [PATCH 1/1] riscv: ae350: enable Coherence Manager for ae350

2021-09-23 Thread Rick Chen
in the beginning, u-boot-spl would > sometimes fail to boot to u-boot proper. > > Enable CM and I/D cache at the same time in harts_early_init > > Signed-off-by: Leo Yu-Chi Liang > --- > arch/riscv/cpu/ax25/cpu.c | 42 +++ > 1 file changed, 42 insertions(+) Reviewed-by: Rick Chen

Re: [PATCH v2] board: sifive: Fix a potential build warning in board_fdt_blob_setup()

2021-09-17 Thread Rick Chen
unleashed.c | 4 ++-- > board/sifive/unmatched/unmatched.c | 4 ++-- > 2 files changed, 4 insertions(+), 4 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH] riscv: Fix setting no-map in reserved memory nodes

2021-09-17 Thread Rick Chen
9f179a ("riscv: Provide a mechanism to fix DT for reserved > memory") > Signed-off-by: Samuel Holland > --- > > arch/riscv/lib/fdt_fixup.c | 5 +---- > 1 file changed, 1 insertion(+), 4 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH 09/14] lmb: riscv: Add arch_lmb_reserve()

2021-09-01 Thread Rick Chen
> > Add arch_lmb_reserve() implemented using arch_lmb_reserve_generic(). > It is rather likely this architecture also needs to cover U-Boot with LMB > before booting Linux. > > Signed-off-by: Marek Vasut > Cc: Atish Patra > Cc: Leo > Cc: Rick Chen > Cc: Simon Goldsc

Re: [PATCH 08/14] lmb: nds32: Add arch_lmb_reserve()

2021-09-01 Thread Rick Chen
reserve() implemented using arch_lmb_reserve_generic(). > It is rather likely this architecture also needs to cover U-Boot with LMB > before booting Linux. > > Signed-off-by: Marek Vasut > Cc: Rick Chen > Cc: Simon Goldschmidt > Cc: Tom Rini > --- > arch/nds32/lib/bootm.c | 13 +

Re: [PATCH v5 2/5] common: board_r: support enable_caches for RISC-V

2021-09-01 Thread Rick Chen
n/board_r.c | 4 ++-- > 2 files changed, 6 insertions(+), 2 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH v5 5/5] riscv: lib: modify the indent

2021-09-01 Thread Rick Chen
; Subject: [PATCH v5 5/5] riscv: lib: modify the indent > > We usually use a space in function declaration, rather than a tab. > > Signed-off-by: Zong Li > Reviewed-by: Sean Anderson > --- > arch/riscv/include/asm/cache.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Rick Chen

Re: [PATCH v5 4/5] board: sifive: use ccache driver instead of helper function

2021-09-01 Thread Rick Chen
- > arch/riscv/include/asm/arch-fu540/cache.h | 14 -- > arch/riscv/include/asm/arch-fu740/cache.h | 14 -- > board/sifive/unleashed/unleashed.c| 10 +---- > board/sifive/unmatched/unmatched.c| 11 ++--- Reviewed-by: Rick Chen

Re: [PATCH v5 3/5] riscv: lib: implement enable_caches for sifive cache

2021-09-01 Thread Rick Chen
interface of cache > uclass to execute the relative implementation in SiFive ccache driver. > > Signed-off-by: Zong Li > --- > arch/riscv/Kconfig| 5 + > arch/riscv/lib/Makefile | 1 + > arch/riscv/lib/sifive_cache.c | 27 +++++++ > 3 files changed, 33 insertions(+) Reviewed-by: Rick Chen

Re: [PATCH v4 2/4] riscv: lib: implement enable_caches for sifive cache

2021-08-31 Thread Rick Chen
> From: Zong Li > Sent: Tuesday, August 31, 2021 5:21 PM > To: Rick Jian-Zhi Chen(陳建志) ; Leo Yu-Chi Liang(梁育齊) > ; bmeng...@gmail.com; sean...@gmail.com; > green@sifive.com; paul.walms...@sifive.com; s...@chromium.org; > u-boot@lists.denx.de > Cc: Zong Li > Subject: [PATCH v4 2/4] riscv:

Re: [PATCH v4 1/4] cache: add sifive composable cache driver

2021-08-31 Thread Rick Chen
.c | 75 + > 3 files changed, 83 insertions(+) > create mode 100644 drivers/cache/cache-sifive-ccache.c Reviewed-by: Rick Chen

Re: [PATCH] Convert CONFIG_SYS_MALLOC_LEN to Kconfig

2021-08-30 Thread Rick Chen
> --- For riscv, Reviewed-by: Rick Chen

Re: [PATCH] Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig

2021-08-29 Thread Rick Chen
; Cc: Daniel Schwierzeck > Cc: Leo > Cc: Palmer Dabbelt > Cc: Paul Walmsley > Cc: Rick Chen > Cc: Sean Anderson > Cc: Simon Glass > Signed-off-by: Tom Rini > --- > I'm Cc'ing a bunch of RISC-V folks since that's where I'm least confident and > just put it per-bo

Re: [PATCH 3/3] Convert CONFIG_SYS_LOAD_ADDR to Kconfig

2021-08-25 Thread Rick Chen
configs/ae350_rv64_spl_xip_defconfig | 1 + > configs/ae350_rv64_xip_defconfig | 1 + Reviewed-by: Rick Chen

Re: [PATCH 05/12] mmc: nds32: ftsdc010: Convert to livetree

2021-08-08 Thread Rick Chen
ivetree API for this driver. > > Signed-off-by: Simon Glass > --- > > drivers/mmc/ftsdc010_mci.c | 22 +++--- > 1 file changed, 7 insertions(+), 15 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH] riscv: cpu: fu740: Fix typo of date

2021-08-02 Thread Rick Chen
; arch/riscv/cpu/fu740/spl.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Rick Chen

Re: [PATCH 4/5] riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit

2021-06-14 Thread Rick Chen
ir interrupt parent have 2 > cells encoded in their interrupts property, but plic0 only provides 1 cell in > #interrupt-cells which is incorrect. > > Signed-off-by: Bin Meng > --- > > arch/riscv/dts/ae350_32.dts | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Rick Chen

Re: [PATCH 3/5] riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes

2021-06-14 Thread Rick Chen
nodes, so #address-cells is not needed. > > Signed-off-by: Bin Meng > --- > > arch/riscv/dts/ae350_32.dts | 2 -- > arch/riscv/dts/ae350_64.dts | 2 -- > 2 files changed, 4 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH 1/5] riscv: ae350: dts: Add SPDX license header

2021-06-14 Thread Rick Chen
gt; Signed-off-by: Bin Meng > --- > > arch/riscv/dts/ae350_32.dts | 2 ++ > arch/riscv/dts/ae350_64.dts | 2 ++ > 2 files changed, 4 insertions(+) Reviewed-by: Rick Chen

Re: [PATCH 5/5] riscv: ae350: dts: Add missing "u-boot,dm-spl" for SPL config

2021-06-14 Thread Rick Chen
> Hi Rick, > > On Sat, Jun 12, 2021 at 9:30 PM Rick Chen wrote: > > > > HI Bin > > > > > Hi Rick, > > > > > > On Wed, Jun 9, 2021 at 3:06 PM Rick Chen wrote: > > > > > > > > Hi Bin, > > > > > > > &

Re: [RFT PATCH] riscv: andes_plic: Fix riscv_get_ipi() mask

2021-06-14 Thread Rick Chen
g on Andes hardware, which I don't have access to. > > > > arch/riscv/lib/andes_plic.c | 4 +++- > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > Ping? Though there will be only one hart will jump to U-Boot proper currently, and this delay loop seem to be unnecessary. But it is still a good catch. Thanks, Rick Tested-by: Rick Chen Reviewed-by: Rick Chen

Re: [PATCH 5/5] riscv: ae350: dts: Add missing "u-boot,dm-spl" for SPL config

2021-06-12 Thread Rick Chen
HI Bin > Hi Rick, > > On Wed, Jun 9, 2021 at 3:06 PM Rick Chen wrote: > > > > Hi Bin, > > > > > From: Bin Meng > > > Sent: Friday, June 04, 2021 1:51 PM > > > To: Rick Jian-Zhi Chen(陳建志) ; Leo Yu-Chi Liang(梁育齊) > > > ; U-Boot

Re: [PATCH 5/5] riscv: ae350: dts: Add missing "u-boot,dm-spl" for SPL config

2021-06-09 Thread Rick Chen
Hi Bin, > From: Bin Meng > Sent: Friday, June 04, 2021 1:51 PM > To: Rick Jian-Zhi Chen(陳建志) ; Leo Yu-Chi Liang(梁育齊) > ; U-Boot Mailing List > Subject: [PATCH 5/5] riscv: ae350: dts: Add missing "u-boot,dm-spl" for SPL > config > > At present the AE350 SPL defconfig is using OF_PRIOR_STAGE.

Re: [PATCH 2/5] riscv: ae350: dts: Remove the unnecessary space in bootargs

2021-06-09 Thread Rick Chen
ootargs. Drop one. > > Signed-off-by: Bin Meng > --- > > arch/riscv/dts/ae350_32.dts | 2 +- > arch/riscv/dts/ae350_64.dts | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH] riscv: ae350: doc: Remove CONFIG_SKIP_LOWLEVEL_INIT

2021-06-06 Thread Rick Chen
s in ax25-ae350.h, while actually it > is not. Remove it. > > Signed-off-by: Bin Meng > --- > > doc/board/AndesTech/ax25-ae350.rst | 19 --- > 1 file changed, 4 insertions(+), 15 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH v2 1/1] sandbox: don't refer to symbol _init

2021-05-19 Thread Rick Chen
> Reviewed-by: Bin Meng > --- > v2: > fix typo in commit message > --- > common/board_f.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) Reviewed-by: Rick Chen

Re: [PATCH] riscv: Split SiFive CLINT support between SPL and U-Boot proper

2021-05-17 Thread Rick Chen
ch/riscv/cpu/fu540/Kconfig | 2 +- > arch/riscv/cpu/generic/Kconfig | 3 ++- > arch/riscv/include/asm/global_data.h | 2 +- > arch/riscv/lib/Makefile | 2 +- > drivers/timer/Makefile | 2 +- > 6 files changed, 14 insertions(+), 6 deletions(-) Reviewed-by: Rick Chen

Re: FW: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb

2021-05-17 Thread Rick Chen
Hi Bin > Hi Rick, > > On Wed, May 12, 2021 at 11:25 AM Rick Chen wrote: > > > > HI Bin, > > > > > > > > > Hi Rick, > > > > > > > > On Tue, May 11, 2021 at 8:49 AM Rick Chen wrote: > > > > > > > > &g

Re: [PATCH] Revert "riscv: cpu: fu740: clear feature disable CSR"

2021-05-13 Thread Rick Chen
> From: Bin Meng > Sent: Friday, May 14, 2021 11:50 AM > To: Green Wan > Cc: Rick Jian-Zhi Chen(陳建志) ; Sean Anderson > ; U-Boot Mailing List > Subject: Re: [PATCH] Revert "riscv: cpu: fu740: clear feature disable CSR" > > On Fri, May 14, 2021 at 11:45 AM Green Wan wrote: > > > > Hi Bin, > > >

Re: [PATCH] riscv: ax25-ae350: doc: Fix minor format issues

2021-05-12 Thread Rick Chen
gt; Signed-off-by: Bin Meng > --- > > doc/board/AndesTech/ax25-ae350.rst | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH v5 05/13] binman: Add support for RISC-V OpenSBI fw_dynamic blob

2021-05-11 Thread Rick Chen
/binman/etype/opensbi.py | 23 +++ > tools/binman/ftest.py | 7 +++ > tools/binman/test/201_opensbi.dts | 14 ++ > 4 files changed, 57 insertions(+) Reviewed-by: Rick Chen

Re: [PATCH v5 02/13] binman: Correct '-a' description in the doc

2021-05-11 Thread Rick Chen
Bin Meng > Reviewed-by: Simon Glass > --- > > (no changes since v1) > > tools/binman/binman.rst | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH v5 01/13] common: kconfig: Correct a typo in SPL_LOAD_FIT

2021-05-11 Thread Rick Chen
Bin Meng > Reviewed-by: Simon Glass > --- > > (no changes since v1) > > common/Kconfig.boot | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Rick Chen

Re: [PATCH v5 12/13] riscv: ae350: Switch to use binman to generate u-boot.itb

2021-05-11 Thread Rick Chen
configs/ae350_rv64_spl_xip_defconfig | 2 ++ > 7 files changed, 13 insertions(+) Reviewed-by: Rick Chen

Re: FW: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb

2021-05-11 Thread Rick Chen
HI Bin, > > > Hi Rick, > > > > On Tue, May 11, 2021 at 8:49 AM Rick Chen wrote: > > > > > > Hi Bin, > > > > > > > Hi Rick, > > > > > > > > On Mon, May 10, 2021 at 3:22 PM Rick Chen wrote: > > >

Re: FW: [PATCH] pwm: sifive: make set_config() and set_enable() work properly

2021-05-11 Thread Rick Chen
> 1 file changed, 11 insertions(+), 10 deletions(-) Reviewed-by: Rick Chen

Re: FW: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb

2021-05-10 Thread Rick Chen
> Hi Rick, > > On Tue, May 11, 2021 at 8:49 AM Rick Chen wrote: > > > > Hi Bin, > > > > > Hi Rick, > > > > > > On Mon, May 10, 2021 at 3:22 PM Rick Chen wrote: > > > > > > > > Hi Bin > > > > > > &g

Re: FW: [PATCH v5 05/13] binman: Add support for RISC-V OpenSBI fw_dynamic blob

2021-05-10 Thread Rick Chen
/binman/etype/opensbi.py | 23 +++ > tools/binman/ftest.py | 7 +++ > tools/binman/test/201_opensbi.dts | 14 ++ > 4 files changed, 57 insertions(+) Reviewed-by: Rick Chen

Re: FW: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb

2021-05-10 Thread Rick Chen
Hi Bin, > Hi Rick, > > On Mon, May 10, 2021 at 3:22 PM Rick Chen wrote: > > > > Hi Bin > > > > > Hi Bin, > > > > > > > From: Bin Meng > > > > Sent: Monday, May 10, 2021 2:58 PM > > > > To: Simon Glass ; Rick Ji

Re: FW: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb

2021-05-10 Thread Rick Chen
Hi Bin > Hi Bin, > > > From: Bin Meng > > Sent: Monday, May 10, 2021 2:58 PM > > To: Simon Glass ; Rick Jian-Zhi Chen(陳建志) > > ; u-boot@lists.denx.de > > Subject: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb > > > > This series updates binman to handle creation of

Re: FW: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb

2021-05-10 Thread Rick Chen
Hi Bin, > From: Bin Meng > Sent: Monday, May 10, 2021 2:58 PM > To: Simon Glass ; Rick Jian-Zhi Chen(陳建志) > ; u-boot@lists.denx.de > Subject: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb > > This series updates binman to handle creation of u-boot.itb image for RISC-V >

Re: [PATCH] riscv: Fix arch_fixup_fdt always failing without /chosen

2021-05-09 Thread Rick Chen
uot;riscv: Move all fdt fixups together") > Signed-off-by: Sean Anderson > --- > I have not actually tested this (nor observed the original failure). But this > seemed buggy from inspection. > > arch/riscv/lib/fdt_fixup.c | 11 +++ > 1 file changed, 7 insertions(+)

Re: [PATCH v6 2/7] riscv: cpu: fu740: Add support for cpu fu740

2021-05-02 Thread Rick Chen
rch/riscv/include/asm/arch-fu740/reset.h | 13 ++ > arch/riscv/include/asm/arch-fu740/spl.h | 14 ++ > arch/riscv/lib/sifive_clint.c | 1 - Refer to comments about [PATCH v7 1/8]. https://www.mail-archive.com/u-boot@lists.denx.de/msg405522.html Hope same code base can be effective re-use in the future. Reviewed-by: Rick Chen

Re: [PATCH v7 0/8] Add FU740 chip and HiFive Unmatched board support

2021-05-02 Thread Rick Chen
Hi Green, > Hi Rick, > > Thanks for quick response. See my reply below. > > On Mon, May 3, 2021 at 10:34 AM Rick Chen wrote: > > > > Hi Green, > > > > > > I did not sign the Reviewed-by for this patch "board: sifive: add > > HiFive Unmatche

Re: [PATCH v7 0/8] Add FU740 chip and HiFive Unmatched board support

2021-05-02 Thread Rick Chen
Hi Green, I did not sign the Reviewed-by for this patch "board: sifive: add HiFive Unmatched board support" from v1 to v6. But it just has been tagged in [v7,7/8] board: sifive: add HiFive Unmatched board support by yourself. [v6,6/7] board: sifive: add HiFive Unmatched board support

Re: [PATCH] atcspi200: Add timeout mechanism in spi_xfer()

2021-04-22 Thread Rick Chen
10 -- > 1 file changed, 8 insertions(+), 2 deletions(-) Reviewed-by: Rick Chen

Re: [RFC PATCH v6 2/2] arch: riscv: cpu: fu740: clear feature disable CSR

2021-04-16 Thread Rick Chen
io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf > > Signed-off-by: Green Wan > Reviewed-by: Sean Anderson > Reviewed-by: Bin Meng > --- > arch/riscv/cpu/fu740/spl.c | 15 +++ > 1 file changed, 15 insertions(+) Reviewed-by: Rick Chen

Re: [RFC PATCH v6 1/2] arch: riscv: cpu: Add callback to init each core

2021-04-16 Thread Rick Chen
is M-mode check can be remove, it is a repeat confirmation in harts_early_init() of arch/riscv/cpu/fu740/spl.c Other than that, Reviewed-by: Rick Chen > + /* > +* Configure proprietary settings and customized CRSs of harts > +*/ > +call_harts_early_init: > +

Re: [PATCH v6 1/7] riscv: dts: add fu740 support

2021-04-16 Thread Rick Chen
Hi Green > On Thu, Apr 15, 2021 at 1:25 PM Rick Chen wrote: > > > > Hi Green, > > > > > From: Green Wan [mailto:green@sifive.com] > > > Sent: Thursday, April 08, 2021 9:40 PM > > > Cc: bmeng...@gmail.com; Green Wan; Greentime Hu; Rick Jian-Zhi

Re: [PATCH v6 1/7] riscv: dts: add fu740 support

2021-04-14 Thread Rick Chen
t doesn't make sense. Maybe you can combine with the dts relative files in [PATCH v6 6/7] into one patch and name as : riscv: dts: ... LGTM. Other than that, Reviewed-by: Rick Chen > dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb > dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microc

Re: [RFC PATCH v5 2/2] board: sifive: unmatched: clear feature disable CSR

2021-04-13 Thread Rick Chen
Hi Green, > From: Green Wan [mailto:green@sifive.com] > Sent: Tuesday, April 13, 2021 5:32 PM > Cc: Green Wan; Sean Anderson; Bin Meng; Rick Jian-Zhi Chen(陳建志); Paul > Walmsley; Pragnesh Patel; Bin Meng; Simon Glass; Atish Patra; Leo Yu-Chi > Liang(梁育齊); Brad Kim; open list > Subject: [RFC

Re: [RFC PATCH v5 1/2] arch: riscv: cpu: Add callback to init each core

2021-04-13 Thread Rick Chen
> From: Green Wan [mailto:green@sifive.com] > Sent: Tuesday, April 13, 2021 5:32 PM > Cc: Green Wan; Rick Jian-Zhi Chen(陳建志); Paul Walmsley; Pragnesh Patel; Sean > Anderson; Bin Meng; Simon Glass; Atish Patra; Leo Yu-Chi Liang(梁育齊); Brad > Kim; open list > Subject: [RFC PATCH v5 1/2] arch:

Re: [RFC PATCH v4 1/2] arch: riscv: cpu: Add callback to init each core

2021-04-13 Thread Rick Chen
Hi Sean, > On 4/13/21 12:12 AM, Rick Chen wrote: > > Hi Sean > > > >> On 4/12/21 10:39 PM, Rick Chen wrote: > >>> Hi Green, > >>> > >>>> From: Green Wan [mailto:green@sifive.com] > >>>> Sent: Monday, April 12, 2021

Re: [RFC PATCH v4 1/2] arch: riscv: cpu: Add callback to init each core

2021-04-12 Thread Rick Chen
Hi Sean > On 4/12/21 10:39 PM, Rick Chen wrote: > > Hi Green, > > > >> From: Green Wan [mailto:green@sifive.com] > >> Sent: Monday, April 12, 2021 10:33 AM > >> To: Sean Anderson > >> Cc: Rick Chen; Rick Jian-Zhi Chen(陳建志); Bin Meng; U-Boo

Re: [RFC PATCH v4 1/2] arch: riscv: cpu: Add callback to init each core

2021-04-12 Thread Rick Chen
Hi Green, > From: Green Wan [mailto:green@sifive.com] > Sent: Tuesday, March 30, 2021 1:27 PM > Cc: Green Wan; Rick Jian-Zhi Chen(陳建志); Paul Walmsley; Pragnesh Patel; Sean > Anderson; Bin Meng; Simon Glass; Atish Patra; Leo Yu-Chi Liang(梁育齊); Brad > Kim; u-boot@lists.denx.de > Subject: [RFC

Re: [RFC PATCH v4 1/2] arch: riscv: cpu: Add callback to init each core

2021-04-12 Thread Rick Chen
Hi Green, > From: Green Wan [mailto:green@sifive.com] > Sent: Monday, April 12, 2021 10:33 AM > To: Sean Anderson > Cc: Rick Chen; Rick Jian-Zhi Chen(陳建志); Bin Meng; U-Boot Mailing List; Paul > Walmsley; Pragnesh Patel; Simon Glass; Atish Patra; Leo Yu-Chi Liang(梁育齊); >

Re: [PATCH 1/1] cmd/exception: support ebreak exception on RISC-V

2021-04-12 Thread Rick Chen
ction should generate a breakpoint exception. > > Signed-off-by: Heinrich Schuchardt > --- > cmd/riscv/exception.c | 10 ++ > doc/usage/exception.rst | 3 +++ > 2 files changed, 13 insertions(+) Reviewed-by: Rick Chen

Re: [RFC PATCH v4 1/2] arch: riscv: cpu: Add callback to init each core

2021-04-09 Thread Rick Chen
for CPUs which previously only enabled them for the > > boot hart. I think ax25 is the only CPU which currently does this. Bin, > > would this be an issue? No, they are functions shall be called in different stage about lottery. riscv_hart_early_init() is called before lottery for

Re: [PATCH v3 2/2] riscv: timer: Add support for an early timer

2021-01-11 Thread Rick Chen
e() > > This is mostly useful in tracing. > > > > Signed-off-by: Pragnesh Patel > > --- > > > > Changes in v3: > > - Add IS_ENABLED(CONFIG_TIMER_EARLY) for timer_early_get_rate() > > and timer_early_get_count() functions. > > Reviewed-by: Rick C

Re: [PATCH v7 7/7] doc: board: Add Microchip MPFS Icicle Kit doc

2021-01-10 Thread Rick Chen
Hi Padmarao > From: Padmarao Begari [mailto:padmarao.beg...@microchip.com] > Sent: Tuesday, December 22, 2020 9:12 PM > To: u-boot@lists.denx.de; bmeng...@gmail.com; Rick Jian-Zhi Chen(陳建志); > anup.pa...@wdc.com; lukas.a...@aisec.fraunhofer.de; joe.hershber...@ni.com; > lu...@denx.de;

Re: [PATCH v3 2/2] riscv: timer: Add support for an early timer

2021-01-10 Thread Rick Chen
gnesh Patel > --- > > Changes in v3: > - Add IS_ENABLED(CONFIG_TIMER_EARLY) for timer_early_get_rate() > and timer_early_get_count() functions. Reviewed-by: Rick Chen

Re: [PATCH v2 2/2] riscv: timer: Add support for an early timer

2021-01-05 Thread Rick Chen
Hi Pragnesh > On Tue, Jan 5, 2021 at 7:12 AM Sean Anderson wrote: > > > > On 1/4/21 8:37 PM, Rick Chen wrote: > > > Hi Pragnesh > > > > > >>> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com] > > >>> Sent: Tuesday, Decemb

Re: [PATCH v7 2/7] net: macb: Add DMA 64-bit address support for macb

2021-01-04 Thread Rick Chen
Hi Joe > From: Padmarao Begari [mailto:padmarao.beg...@microchip.com] > Sent: Tuesday, December 22, 2020 9:12 PM > To: u-boot@lists.denx.de; bmeng...@gmail.com; Rick Jian-Zhi Chen(陳建志); > anup.pa...@wdc.com; lukas.a...@aisec.fraunhofer.de; joe.hershber...@ni.com; > lu...@denx.de;

Re: [PATCH v2 2/2] riscv: timer: Add support for an early timer

2021-01-04 Thread Rick Chen
; > drivers/timer/andes_plmt_timer.c | 21 - > > drivers/timer/riscv_timer.c| 21 - > > drivers/timer/sifive_clint_timer.c | 21 - > > include/configs/ax25-ae350.h | 5 + > > include/configs/qemu-riscv.h

Re: [PATCH v7 1/7] riscv: Add DMA 64-bit address support

2021-01-04 Thread Rick Chen
s. If the DMA API only uses 32/64-bit > addresses, dma_addr_t need only be 32/64 bits wide. > > Signed-off-by: Padmarao Begari > Reviewed-by: Anup Patel > Reviewed-by: Bin Meng > --- > arch/riscv/Kconfig | 4 > arch/riscv/include/asm/types.h | 4 > 2 files changed, 8 insertions(+) > Reviewed-by: Rick Chen

Re: [PATCH] doc: qemu-riscv: Fix opensbi build instructions

2020-12-29 Thread Rick Chen
Rini > Subject: [PATCH] doc: qemu-riscv: Fix opensbi build instructions > > Latest opensbi uses generic platform for Qemu. Update the build > instructions. > > Signed-off-by: Atish Patra > --- > doc/board/emulation/qemu-riscv.rst | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Rick Chen

Re: [PATCH v2 2/2] riscv: timer: Add support for an early timer

2020-12-29 Thread Rick Chen
- > drivers/timer/sifive_clint_timer.c | 21 - > include/configs/ax25-ae350.h | 5 + > include/configs/qemu-riscv.h | 5 + > include/configs/sifive-fu540.h | 5 + > 6 files changed, 75 insertions(+), 3 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH v2 1/2] trace: select TIMER_EARLY to avoid infinite recursion

2020-12-29 Thread Rick Chen
will make gd->dm_root = NULL and gd->timer = NULL, so > timer_get_us() -> get_ticks() -> dm_timer_init() will lead to an > indefinite recursion. > > So select TIMER_EARLY when tracing got enabled. > > Signed-off-by: Pragnesh Patel > --- > > Changes in v2: > - new patch > > lib/Kconfig | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Rick Chen

Re: [PATCH v2] riscv: Add support for SPI on Kendryte K210

2020-12-29 Thread Rick Chen
> > board/sipeed/maix/Kconfig | 16 ++ > configs/sipeed_maix_bitm_defconfig | 11 + > doc/board/sipeed/maix.rst | 319 - > include/configs/sipeed-maix.h | 7 +- > 4 files changed, 301 insertions(+), 52 deletions(-) Reviewed-by: Rick Chen

Re: [PATCH 1/4] nds32: Remove dead reset_cpu() implementation

2020-12-20 Thread Rick Chen
3xx) or realized using a WDT (e.g. ag101). > > Remove this left-over implementation in preparation for the removal of > the `addr` parameter in the entire tree. > > Cc: Rick Chen > Signed-off-by: Harald Seiler > --- > arch/nds32/cpu/n1213/start.S | 22 ---

Re: [PATCH] riscv: timer: Add support for an early timer

2020-12-09 Thread Rick Chen
Hi Pragnesh > Hi Rick, > > [...] > >> > >>Following are the configurations, steps and debug logs: > >> > >>+++ b/configs/ae350_rv64_defconfig > >>q+CONFIG_TRACE=y > >>+CONFIG_TRACE_BUFFER_SIZE=0x0100 > >>+CONFIG_TRACE_CALL_DEPTH_LIMIT=15 > >>+CONFIG_CMD_TRACE=y > >>+CONFIG_TIMER_EARLY=y > >>

Re: [PATCH v5 0/7] Microchip PolarFire SoC support

2020-12-09 Thread Rick Chen
Hi Padmarao > From: Padmarao Begari [mailto:padmarao.beg...@microchip.com] > Sent: Thursday, December 03, 2020 4:32 AM > To: u-boot@lists.denx.de; bmeng...@gmail.com; Rick Jian-Zhi Chen(陳建志); > anup.pa...@wdc.com; lukas.a...@aisec.fraunhofer.de; joe.hershber...@ni.com; > lu...@denx.de;

Re: [PATCH] riscv: timer: Add support for an early timer

2020-11-26 Thread Rick Chen
Hi, Pragnesh > Hi Rick, > > >-Original Message----- > >From: Rick Chen > >Sent: 26 November 2020 14:44 > >To: Pragnesh Patel > >Cc: Simon Glass ; U-Boot Mailing List >b...@lists.denx.de>; Atish Patra ; Bin Meng > >; Paul Walmsley ( Sifive) ;

Re: [PATCH] riscv: timer: Add support for an early timer

2020-11-26 Thread Rick Chen
Hi Pragnesh > Hi Rick, > > >-Original Message----- > >From: Rick Chen > >Sent: 24 November 2020 13:08 > >To: Pragnesh Patel > >Cc: U-Boot Mailing List ; Atish Patra > >; Bin Meng ; Paul Walmsley ( > >Sifive) ; Anup Patel ; Sagar > >Kad

Re: [PATCH] riscv: timer: Add support for an early timer

2020-11-23 Thread Rick Chen
Hi Pragnesh, > From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com] > Sent: Tuesday, November 17, 2020 7:05 PM > To: u-boot@lists.denx.de > Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com; > paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com; Rick >

Re: [PATCH] riscv: fix the wrong swap value register

2020-11-23 Thread Rick Chen
ster > > Not s2 register, t1 register is correct > Fortunately, it works because t1 register has a garbage value > > Signed-off-by: Brad Kim > --- > arch/riscv/cpu/start.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Rick Chen > diff --

Re: [PATCH v3 1/1] riscv: Add timer_get_us() for tracing

2020-11-15 Thread Rick Chen
Hi Pragnesh > Hi Rick, > > >-Original Message----- > >From: Rick Chen > >Sent: 13 November 2020 13:37 > >To: Pragnesh Patel > >Cc: U-Boot Mailing List ; Atish Patra > >; palmerdabb...@google.com; Bin Meng > >; Paul Walmsley ( Sifive) ; >

Re: [PATCH v3 1/1] riscv: Add timer_get_us() for tracing

2020-11-13 Thread Rick Chen
Hi Pragnesh > From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com] > Sent: Wednesday, November 11, 2020 6:15 PM > To: u-boot@lists.denx.de > Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com; > paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com; Rick >

Re: [PATCH 1/2] pinctrl: k210: Fix inverted IE and OE for I2C

2020-11-12 Thread Rick Chen
00644 > > --- a/drivers/pinctrl/pinctrl-kendryte.c > > +++ b/drivers/pinctrl/pinctrl-kendryte.c > > @@ -55,8 +55,9 @@ > > > > Reviewed-by: Rick Chen Please check about the CI failure items: https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/742884254 +drivers

Re: [PATCH v2 1/2] i2c: ocores: add i2c driver for OpenCores I2C controller

2020-11-12 Thread Rick Chen
> Signed-off-by: Pragnesh Patel > > --- > > > > Changes in v2: > > - Remove TYPE_SIFIVE_REV0 flag > > - Update the Opencores I2C Controller Link > > > > drivers/i2c/Kconfig | 7 + > > drivers/i2c/Makefile | 1 + > > drivers/i2c/ocore

Re: [PATCH v2 2/2] riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controller

2020-11-10 Thread Rick Chen
ller. > > Signed-off-by: Pragnesh Patel > --- > > (no changes since v1) > > arch/riscv/cpu/fu540/Kconfig | 2 ++ > board/sifive/fu540/Kconfig | 1 + > 2 files changed, 3 insertions(+) > Reviewed-by: Rick Chen

Re: [PATCH v2 1/2] i2c: ocores: add i2c driver for OpenCores I2C controller

2020-11-10 Thread Rick Chen
> - Update the Opencores I2C Controller Link > > drivers/i2c/Kconfig | 7 + > drivers/i2c/Makefile | 1 + > drivers/i2c/ocores_i2c.c | 636 +++ > 3 files changed, 644 insertions(+) > create mode 100644 drivers/i2c/ocores_i2c.c > Reviewed-by: Rick Chen

Re: [RESEND,PATCH v2 1/1] riscv: Add timer_get_us() for tracing

2020-11-09 Thread Rick Chen
Hi Pragnesh > Hi Rick, > > >-Original Message----- > >From: Rick Chen > >Sent: 09 November 2020 13:44 > >To: Pragnesh Patel > >Cc: U-Boot Mailing List ; Atish Patra > >; Bin Meng ; Paul Walmsley ( > >Sifive) ; Anup Patel ; Sagar > &

Re: [RESEND,PATCH v2 1/1] riscv: Add timer_get_us() for tracing

2020-11-09 Thread Rick Chen
> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com] > Sent: Thursday, November 05, 2020 7:31 PM > To: u-boot@lists.denx.de > Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com; > paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com; Rick > Jian-Zhi

Re: [PATCH 1/1] riscv: enable SATA disk on qemu-riscv64_defconfig

2020-11-03 Thread Rick Chen
llow attaching a virtual SATA disk to qemu-riscv64_defconfig. > > Signed-off-by: Heinrich Schuchardt > --- > configs/qemu-riscv64_defconfig | 6 ++ > 1 file changed, 6 insertions(+) > Reviewed-by: Rick Chen

Re: [PATCH v4 0/7] wdt: Add support for watchdogs on Kendryte K210

2020-11-03 Thread Rick Chen
rror > >> riscv: Add watchdog bindings for the k210 > >> riscv: Enable watchdog for the k210 > >> > >> arch/riscv/dts/k210.dtsi | 1 - > >> board/sipeed/maix/Kconfig | 2 ++ > >> drivers/watchdog/designware_wdt.c | 39 -------

Re: [PATCH] riscv: Fix efi header for RV32

2020-11-03 Thread Rick Chen
; >> --- > >> arch/riscv/lib/crt0_riscv_efi.S | 7 ++- > >> 1 file changed, 6 insertions(+), 1 deletion(-) > >> Reviewed-by: Rick Chen > >> diff --git a/arch/riscv/lib/crt0_riscv_efi.S > >b/arch/riscv/lib/crt0_riscv_efi.S > >> index 8

Re: [PATCH v2 15/16] riscv: k210: Use AI as the parent clock of aisram, not PLL1

2020-11-03 Thread Rick Chen
; 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Rick Chen

Re: [PATCH v2 14/16] riscv: k210: Rename airam to aisram

2020-11-02 Thread Rick Chen
tions(+), 2 deletions(-) > Reviewed-by: Rick Chen

Re: [PATCH v2 13/16] riscv: Enable AI ram on K210

2020-11-02 Thread Rick Chen
) > > board/sipeed/maix/Kconfig | 2 ++ > board/sipeed/maix/maix.c | 26 -- > configs/sipeed_maix_bitm_defconfig | 1 + > include/configs/sipeed-maix.h | 4 > 4 files changed, 3 insertions(+), 30 deletions(-) > Reviewed-by: Rick Chen

Re: [PATCH v2 12/16] riscv: Probe ram in dram_init

2020-11-02 Thread Rick Chen
; > arch/riscv/cpu/generic/dram.c | 26 ++ > 1 file changed, 26 insertions(+) > Reviewed-by: Rick Chen

Re: [PATCH v2 11/16] ram: sifive: Default to y only if compiling for fu540

2020-11-02 Thread Rick Chen
> Other RISC-V targets should not have RAM_SIFIVE enabled by default. > > Signed-off-by: Sean Anderson > Reviewed-by: Pragnesh Patel > --- > > (no changes since v1) > > drivers/ram/sifive/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Rick Chen

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