[PATCH v2 3/3] arm: dts: drop downstream IPQ4019 DTSI
We want to use OF_UPSTREAM on IPQ40XX as its well supported upstream, so
lets drop our downstream DTSI.
Signed-off-by: Robert Marko
Acked-by: Caleb Connolly
---
arch/arm/dts/qcom-ipq4019.dtsi | 202 -
1 file changed, 202 deletions(-)
delete mode 100644 arch/arm/dts/qcom-ipq4019.dtsi
diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi
deleted file mode 100644
index f9489e42ea..00
--- a/arch/arm/dts/qcom-ipq4019.dtsi
+++ /dev/null
@@ -1,202 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2019 Sartura Ltd.
- *
- * Author: Robert Marko
- */
-
- /dts-v1/;
-
-#include "skeleton.dtsi"
-#include
-#include
-#include
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- model = "Qualcomm Technologies, Inc. IPQ4019";
- compatible = "qcom,ipq4019";
-
- aliases {
- serial0 = _uart1;
- spi0 = _spi1;
- };
-
- reserved-memory {
- #address-cells = <0x1>;
- #size-cells = <0x1>;
- ranges;
-
- smem_mem: smem_region: smem@87e0 {
- reg = <0x87e0 0x08>;
- no-map;
- };
-
- tz@87e8 {
- reg = <0x87e8 0x18>;
- no-map;
- };
- };
-
- smem {
- compatible = "qcom,smem";
- memory-region = <_mem>;
- };
-
- soc: soc {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
-
- gcc: clock-controller@180 {
- compatible = "qcom,gcc-ipq4019";
- reg = <0x180 0x6>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- bootph-all;
- };
-
- rng: rng@22000 {
- compatible = "qcom,prng";
- reg = <0x22000 0x140>;
- clocks = < GCC_PRNG_AHB_CLK>;
- status = "disabled";
- };
-
- soc_gpios: pinctrl@100 {
- compatible = "qcom,ipq4019-pinctrl";
- reg = <0x100 0x30>;
- gpio-controller;
- gpio-count = <100>;
- gpio-bank-name="soc";
- #gpio-cells = <2>;
- bootph-all;
- };
-
- blsp1_uart1: serial@78af000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x78af000 0x200>;
- clock = < GCC_BLSP1_UART1_APPS_CLK>;
- bit-rate = <0xFF>;
- status = "disabled";
- bootph-all;
- };
-
- blsp1_spi1: spi@78b5000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x78b5000 0x600>;
- clocks = < GCC_BLSP1_QUP1_SPI_APPS_CLK>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- bootph-all;
- };
-
- mdio: mdio@9 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "qcom,ipq4019-mdio";
- reg = <0x9 0x64>;
- status = "disabled";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- };
-
- ethphy2: ethernet-phy@2 {
- reg = <2>;
- };
-
- ethphy3: ethernet-phy@3 {
- reg = <3>;
- };
-
- ethphy4: ethernet-phy@4 {
- reg = <4>;
- };
- };
-
- usb3_ss_phy: ssphy@9a000 {
- compatible = "qcom,usb-ss-ipq4019-phy";
- #phy-cells = <0>;
- reg = <0x9a000 0x800>;
- reg-names = "phy_base";
- resets = < USB3_UNIPHY_PH
[PATCH v2 1/3] mach-ipq40xx: add CPU specific code
Provide basic DRAM info population from DT, cache setting and the
board_init stub.
Signed-off-by: Robert Marko
Acked-by: Caleb Connolly
---
Changes in v2:
* Drop
arch/arm/mach-ipq40xx/Makefile | 7 ++
arch/arm/mach-ipq40xx/cpu.c| 43 ++
2 files changed, 50 insertions(+)
create mode 100644 arch/arm/mach-ipq40xx/Makefile
create mode 100644 arch/arm/mach-ipq40xx/cpu.c
diff --git a/arch/arm/mach-ipq40xx/Makefile b/arch/arm/mach-ipq40xx/Makefile
new file mode 100644
index 00..d611de9933
--- /dev/null
+++ b/arch/arm/mach-ipq40xx/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2024 Sartura Ltd.
+#
+# Author: Robert Marko
+
+obj-y += cpu.o
diff --git a/arch/arm/mach-ipq40xx/cpu.c b/arch/arm/mach-ipq40xx/cpu.c
new file mode 100644
index 00..92c34d6111
--- /dev/null
+++ b/arch/arm/mach-ipq40xx/cpu.c
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * CPU code for Qualcomm IPQ40xx SoC
+ *
+ * Copyright (c) 2024 Sartura Ltd.
+ *
+ * Author: Robert Marko
+ */
+
+#include
+#include
+
+int dram_init(void)
+{
+ int ret;
+
+ ret = fdtdec_setup_memory_banksize();
+ if (ret)
+ return ret;
+ return fdtdec_setup_mem_size_base();
+}
+
+/*
+ * Enable/Disable D-cache.
+ * I-cache is already enabled in start.S
+ */
+void enable_caches(void)
+{
+ dcache_enable();
+}
+
+void disable_caches(void)
+{
+ dcache_disable();
+}
+
+/*
+ * In case boards need specific init code, they can override this stub.
+ */
+int __weak board_init(void)
+{
+ return 0;
+}
--
2.45.0
[PATCH v2 2/3] mach-ipq40xx: use OF_UPSTREAM
Now that drivers are compatible enough with the upstream DTS, there is no reason to not use the upstream DTS, so imply OF_UPSTREAM by default. Signed-off-by: Robert Marko Acked-by: Caleb Connolly --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 39ad03acd2..914a7552b4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -769,6 +769,7 @@ config ARCH_IPQ40XX select CLK_QCOM_IPQ4019 select PINCTRL_QCOM_IPQ4019 imply CMD_DM + imply OF_UPSTREAM config ARCH_KEYSTONE bool "TI Keystone" -- 2.45.0
[PATCH v3] sysreset: add Qualcomm PSHOLD reset driver
Number of Qualcomm ARMv7 SoC-s did not use PSCI but rather used PSHOLD
(Qualcomm Power Supply Hold Reset) bit to trigger reset or poweroff.
Qualcomm IPQ40XX is one of them, so provide a simple sysreset driver based
on the upstream Linux one, it is DT compatible as well.
Signed-off-by: Robert Marko
Reviewed-by: Caleb Connolly
---
Changes in v3:
* Drop
Changes in v2:
* Use QCOM instead of MSM naming
drivers/sysreset/Kconfig| 6 +++
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_qcom-pshold.c | 55 +
3 files changed, 62 insertions(+)
create mode 100644 drivers/sysreset/sysreset_qcom-pshold.c
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index b64bfadb20..121194e441 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -240,6 +240,12 @@ config SYSRESET_RAA215300
help
Add support for the system reboot via the Renesas RAA215300 PMIC.
+config SYSRESET_QCOM_PSHOLD
+ bool "Support sysreset for Qualcomm SoCs via PSHOLD"
+ depends on ARCH_IPQ40XX
+ help
+ Add support for the system reboot on Qualcomm SoCs via PSHOLD.
+
endif
endmenu
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index d59299aa31..a6a0584585 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -29,4 +29,5 @@ obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_AT91) += sysreset_at91.o
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o
obj-$(CONFIG_SYSRESET_RAA215300) += sysreset_raa215300.o
+obj-$(CONFIG_SYSRESET_QCOM_PSHOLD) += sysreset_qcom-pshold.o
obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
diff --git a/drivers/sysreset/sysreset_qcom-pshold.c
b/drivers/sysreset/sysreset_qcom-pshold.c
new file mode 100644
index 00..4529047853
--- /dev/null
+++ b/drivers/sysreset/sysreset_qcom-pshold.c
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm PSHOLD reset driver
+ *
+ * Copyright (c) 2024 Sartura Ltd.
+ *
+ * Author: Robert Marko
+ * Based on the Linux msm-poweroff driver.
+ *
+ */
+
+#include
+#include
+#include
+#include
+
+struct qcom_pshold_priv {
+ phys_addr_t base;
+};
+
+static int qcom_pshold_request(struct udevice *dev, enum sysreset_t type)
+{
+ struct qcom_pshold_priv *priv = dev_get_priv(dev);
+
+ writel(0, priv->base);
+ mdelay(1);
+
+ return 0;
+}
+
+static struct sysreset_ops qcom_pshold_ops = {
+ .request = qcom_pshold_request,
+};
+
+static int qcom_pshold_probe(struct udevice *dev)
+{
+ struct qcom_pshold_priv *priv = dev_get_priv(dev);
+
+ priv->base = dev_read_addr(dev);
+ return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
+}
+
+static const struct udevice_id qcom_pshold_ids[] = {
+ { .compatible = "qcom,pshold", },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(qcom_pshold) = {
+ .name = "qcom_pshold",
+ .id = UCLASS_SYSRESET,
+ .of_match = qcom_pshold_ids,
+ .probe = qcom_pshold_probe,
+ .priv_auto = sizeof(struct qcom_pshold_priv),
+ .ops= _pshold_ops,
+};
--
2.45.0
[RFC PATCH 5/5] sysreset: call .on_reset for UCLASS_SPI_FLASH before reset request
Call .on_reset method for UCLASS_SPI_FLASH devices before requesting reset. This fixes the issue with 4-byte adressing mode being left enabled on board reset. That is an issue on Qualcomm IPQ4019 boards since the CPU expects flash to be in 3-byte adressing mode and will just hang otherwise. Note that this does not fix a case where you remove the power while U-Boot is still running and in that case it will still be stuck in 4-byte mode. Signed-off-by: Robert Marko --- drivers/sysreset/sysreset-uclass.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c index 6151b5fe03..8321cc4230 100644 --- a/drivers/sysreset/sysreset-uclass.c +++ b/drivers/sysreset/sysreset-uclass.c @@ -30,6 +30,13 @@ int sysreset_request(struct udevice *dev, enum sysreset_t type) if (!ops->request) return -ENOSYS; + /* +* Call the .on_reset op for SPI flash devices. +* This is required for most devices in order to exit the +* 4-byte adressing mode. +*/ + uclass_id_on_reset(UCLASS_SPI_FLASH); + return ops->request(dev, type); } -- 2.45.0
[RFC PATCH 4/5] mtd: spi: sf: implement .on_reset method
Implement .on_reset method for SPI flash, by extending the remove method
to exit 4-byte adressing mode in case it was entered before.
This fixes the issue with 4-byte adressing mode being left enabled on
board reset.
That is an issue on Qualcomm IPQ4019 boards since the CPU expects flash
to be in 3-byte adressing mode and will just hang otherwise.
Note that this does not fix a case where you remove the power while U-Boot
is still running and in that case it will still be stuck in 4-byte mode.
Signed-off-by: Robert Marko
---
drivers/mtd/spi/sf_probe.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index de6516f106..31dae17ba0 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -225,6 +225,15 @@ static int spi_flash_std_remove(struct udevice *dev)
struct spi_flash *flash = dev_get_uclass_priv(dev);
int ret;
+ if (flash->addr_width == 4 &&
+ !(flash->info->flags & SPI_NOR_OCTAL_DTR_READ) &&
+ (JEDEC_MFR(flash->info) != SNOR_MFR_SPANSION) &&
+ !(flash->flags & SNOR_F_4B_OPCODES)) {
+ ret = spi_nor_set_4byte(flash, flash->info, 0);
+ if (ret)
+ return ret;
+ }
+
if (CONFIG_IS_ENABLED(SPI_DIRMAP)) {
spi_mem_dirmap_destroy(flash->dirmap.wdesc);
spi_mem_dirmap_destroy(flash->dirmap.rdesc);
@@ -258,6 +267,7 @@ U_BOOT_DRIVER(jedec_spi_nor) = {
.of_match = spi_flash_std_ids,
.probe = spi_flash_std_probe,
.remove = spi_flash_std_remove,
+ .on_reset = spi_flash_std_remove,
.priv_auto = sizeof(struct spi_nor),
.ops= _flash_std_ops,
.flags = DM_FLAG_OS_PREPARE,
--
2.45.0
[RFC PATCH 3/5] mtd: spi-nor: rename and export 4-byte adressing mode function
Currently 4-byte adressing mode function is not exported, but since we plan
to use it outside of the SPI NOR core we need to export it.
While we are here, rename it to align the naming with the rest of exported
functions.
Signed-off-by: Robert Marko
---
drivers/mtd/spi/spi-nor-core.c | 7 +++
include/linux/mtd/spi-nor.h| 10 ++
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 8882b045ce..8a64ee40c3 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -682,8 +682,7 @@ static void spi_nor_set_4byte_opcodes(struct spi_nor *nor,
#endif /* !CONFIG_SPI_FLASH_BAR */
/* Enable/disable 4-byte addressing mode. */
-static int set_4byte(struct spi_nor *nor, const struct flash_info *info,
-int enable)
+int spi_nor_set_4byte(struct spi_nor *nor, const struct flash_info *info, int
enable)
{
int status;
bool need_wren = false;
@@ -3481,7 +3480,7 @@ static int s25_s28_post_bfpt_fixup(struct spi_nor *nor,
*/
if (params->size > SZ_128M) {
if (bfpt->dwords[BFPT_DWORD(16)] & BFPT_DWORD16_EX4B_PWRCYC) {
- ret = set_4byte(nor, nor->info, 1);
+ ret = spi_nor_set_4byte(nor, nor->info, 1);
if (ret)
return ret;
}
@@ -3915,7 +3914,7 @@ static int spi_nor_init(struct spi_nor *nor)
*/
if (nor->flags & SNOR_F_BROKEN_RESET)
debug("enabling reset hack; may not recover from
unexpected reboots\n");
- set_4byte(nor, nor->info, 1);
+ spi_nor_set_4byte(nor, nor->info, 1);
}
return 0;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 80e56cf308..94c0e5e98f 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -646,6 +646,16 @@ static inline int spi_nor_remove(struct spi_nor *nor)
* Return: 0 for success, -errno for failure.
*/
int spi_nor_remove(struct spi_nor *nor);
+
+/**
+ * spi_nor_set_4byte() - perform cleanup before booting to the next stage
+ * @nor: the spi_nor structure
+ * @flash_info:the flash_info structure
+ * @enable:enable or disable 4byte mode
+ *
+ * Return: 0 for success, -errno for failure.
+ */
+int spi_nor_set_4byte(struct spi_nor *nor, const struct flash_info *info, int
enable);
#endif
#endif
--
2.45.0
[RFC PATCH 1/5] dm: core: add on_reset method
Currently, we dont have a specific method that is intented to be called
right before calling board reset.
Intention for this method is to be able to exit 4-byte adressing mode on
SPI-NOR devices before reset.
Signed-off-by: Robert Marko
---
include/dm/device.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/dm/device.h b/include/dm/device.h
index add67f9ec0..19713d958c 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -344,6 +344,7 @@ struct udevice_id {
* @probe: Called to probe a device, i.e. activate it
* @remove: Called to remove a device, i.e. de-activate it
* @unbind: Called to unbind a device from its driver
+ * @on_reset: Called befora calling board reset
* @of_to_plat: Called before probe to decode device tree data
* @child_post_bind: Called after a new child has been bound
* @child_pre_probe: Called before a child device is probed. The device has
@@ -379,6 +380,7 @@ struct driver {
int (*probe)(struct udevice *dev);
int (*remove)(struct udevice *dev);
int (*unbind)(struct udevice *dev);
+ int (*on_reset)(struct udevice *dev);
int (*of_to_plat)(struct udevice *dev);
int (*child_post_bind)(struct udevice *dev);
int (*child_pre_probe)(struct udevice *dev);
--
2.45.0
[RFC PATCH 2/5] dm: core: introduce uclass_id_on_reset()
Implement a helper to call .on_reset method for every device in a
certain uclass.
Intention is to use this helper for UCLASS_SPI_FLASH before board
reset to exit 4-byte adressing mode.
Signed-off-by: Robert Marko
---
drivers/core/uclass.c | 13 +
include/dm/uclass.h | 8
2 files changed, 21 insertions(+)
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index e46d5717aa..bed5553d5e 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -831,6 +831,19 @@ int uclass_id_count(enum uclass_id id)
return count;
}
+int uclass_id_on_reset(enum uclass_id id)
+{
+ struct udevice *dev;
+ struct uclass *uc;
+
+ uclass_id_foreach_dev(id, dev, uc) {
+ if (dev->driver->on_reset)
+ return dev->driver->on_reset(dev);
+ }
+
+ return 0;
+}
+
UCLASS_DRIVER(nop) = {
.id = UCLASS_NOP,
.name = "nop",
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 456eef7f2f..57eb1b144f 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -454,6 +454,14 @@ int uclass_probe_all(enum uclass_id id);
*/
int uclass_id_count(enum uclass_id id);
+/**
+ * uclass_id_on_reset() - call on_reset for devices of a given uclass ID
+ *
+ * @id: uclass ID to look up
+ * Return: 0 if OK, other -ve on error
+ */
+int uclass_id_on_reset(enum uclass_id id);
+
/**
* uclass_id_foreach_dev() - iterate through devices of a given uclass ID
*
--
2.45.0
[RFC PATCH 0/5] Implement exiting 4-byte adressing mode before reset
This fixes the issue with 4-byte adressing mode being left enabled on board reset. That is an issue on Qualcomm IPQ4019 boards since the CPU expects flash to be in 3-byte adressing mode and will just hang otherwise. Note that this does not fix a case where you remove the power while U-Boot is still running and in that case it will still be stuck in 4-byte mode. Robert Marko (5): dm: core: add on_reset method dm: core: introduce uclass_id_on_reset() mtd: spi-nor: rename and export 4-byte adressing mode function mtd: spi: sf: implement .on_reset method sysreset: call .on_reset for UCLASS_SPI_FLASH before reset request drivers/core/uclass.c | 13 + drivers/mtd/spi/sf_probe.c | 10 ++ drivers/mtd/spi/spi-nor-core.c | 7 +++ drivers/sysreset/sysreset-uclass.c | 7 +++ include/dm/device.h| 2 ++ include/dm/uclass.h| 8 include/linux/mtd/spi-nor.h| 10 ++ 7 files changed, 53 insertions(+), 4 deletions(-) -- 2.45.0
Re: [PATCH 0/2] qcom: ehci: enable core + iface clocks
On Thu, May 2, 2024 at 3:41 PM Caleb Connolly wrote: > > Hi Sam, > > On 02/05/2024 15:16, Sam Day wrote: > > These clocks are mandatory, as can be seen in msm_hsusb driver in the > > Linux kernel. > > > > The appropriate HS_USB AHB/SYSTEM clocks were added to gcc_apq8016. > > > > Technically there's other adjacent SoC families that can use the > > msm_hsusb driver with different clocks, but only msm8916/apq8016 are > > currently making use of it so I think this change shouldn't break > > anything elsewhere. > > Thanks for the patches. I have a feeling this might break IPQ4019, you > might need to stub the clks there (cc Robert). Hi, IPQ4019 does not use ehci-msm, but rather DWC3 so it should be fine. Regards, Robert > > Seems like the To: and Cc: addresses aren't all quite right still. > > > > Signed-off-by: Sam Day > > --- > > Sam Day (2): > >clk/qcom: apq8016: add support for USB_HS clocks > >ehci: msm: bring up iface + core clocks > > > > drivers/clk/qcom/clock-apq8016.c | 31 +++ > > drivers/usb/host/ehci-msm.c | 37 > > +++-- > > 2 files changed, 66 insertions(+), 2 deletions(-) > > --- > > base-commit: ff0de1f0557ed7d2dab47ba976a37347a1fdc432 > > change-id: 20240502-msm8916-hs-usb-clocks-34bc22b03f3d > > > > Best regards, > > -- > // Caleb (they/them) -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: robert.ma...@sartura.hr Web: www.sartura.hr
[PATCH 2/2] mtd: spi-nor-core: add 4-byte OPCODE support for Winbond W25Q256JV
Winbond W25Q256FV and W25Q256JV share the same JEDEC ID, but only
W25Q256JV fully supports 4-byte OPCODE-s.
In order to differentiate between them we can use the SFDP header version
and apply a fixup post BFPT.
Based on upstream Linux commit ("mtd: spi-nor: winbond: Fix 4-byte opcode
support for w25q256").
Signed-off-by: Robert Marko
---
drivers/mtd/spi/spi-nor-core.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 7615ba602f..8882b045ce 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3816,6 +3816,32 @@ static struct spi_nor_fixups macronix_octal_fixups = {
};
#endif /* CONFIG_SPI_FLASH_MACRONIX */
+#if CONFIG_IS_ENABLED(SPI_FLASH_WINBOND)
+static int w25q256_post_bfpt_fixup(struct spi_nor *nor,
+ const struct sfdp_parameter_header *header,
+ const struct sfdp_bfpt *bfpt,
+ struct spi_nor_flash_parameter *params)
+{
+ /*
+* W25Q256JV supports 4B opcodes but W25Q256FV does not.
+* Unfortunately, Winbond has re-used the same JEDEC ID for both
+* variants which prevents us from defining a new entry in the parts
+* table.
+* To differentiate between W25Q256JV and W25Q256FV check SFDP header
+* version: only JV has JESD216A compliant structure (version 5).
+*/
+ if(header->major == SFDP_JESD216_MAJOR &&
+ header->minor == SFDP_JESD216A_MINOR)
+ nor->flags |= SNOR_F_4B_OPCODES;
+
+ return 0;
+}
+
+static struct spi_nor_fixups w25q256_fixups = {
+ .post_bfpt = w25q256_post_bfpt_fixup,
+};
+#endif /* CONFIG_SPI_FLASH_WINBOND */
+
/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
* @nor: pointer to a 'struct spi_nor'
*
@@ -4004,6 +4030,11 @@ void spi_nor_set_fixups(struct spi_nor *nor)
#if CONFIG_IS_ENABLED(SPI_FLASH_MACRONIX)
nor->fixups = _octal_fixups;
#endif /* SPI_FLASH_MACRONIX */
+
+#if CONFIG_IS_ENABLED(SPI_FLASH_WINBOND)
+ if (!strcmp(nor->info->name, "w25q256"))
+ nor->fixups = _fixups;
+#endif /* SPI_FLASH_WINBOND */
}
int spi_nor_scan(struct spi_nor *nor)
--
2.44.0
[PATCH 1/2] mtd: spi-nor-core: allow overriding 4-byte OPCODE support
Currently, the only way to indicate 4-byte OPCODE support is by setting
the SPI_NOR_4B_OPCODES feature flag for each JEDEC ID in spi_nor_ids[].
However, its becoming increasingly common practice for vendors to reuse
the same JEDEC ID for new revisions of current parts.
For example Winbond W25Q256FV does not fully support 4-byte OPCODE-s while
newer W25Q256JV revision does fully support them but they share the same
JEDEC ID thus currently its not possible to advertise support for 4-byte
OPCODE-s on W25Q256JV.
Luckily for us, there usually is a way to differentiate between parts with
the same JEDEC ID by differences in SFDP tables, so in order to be able to
apply a fixup after they are parsed lets add a feature flag that we can
override.
Signed-off-by: Robert Marko
---
drivers/mtd/spi/spi-nor-core.c | 6 --
include/linux/mtd/spi-nor.h| 1 +
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index f86003ca8c..7615ba602f 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3879,7 +3879,7 @@ static int spi_nor_init(struct spi_nor *nor)
if (nor->addr_width == 4 &&
!(nor->info->flags & SPI_NOR_OCTAL_DTR_READ) &&
(JEDEC_MFR(nor->info) != SNOR_MFR_SPANSION) &&
- !(nor->info->flags & SPI_NOR_4B_OPCODES)) {
+ !(nor->flags & SNOR_F_4B_OPCODES)) {
/*
* If the RESET# pin isn't hooked up properly, or the system
* otherwise doesn't perform a reset command in the boot
@@ -4118,6 +4118,8 @@ int spi_nor_scan(struct spi_nor *nor)
nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
if (info->flags & USE_CLSR)
nor->flags |= SNOR_F_USE_CLSR;
+ if (info->flags & SPI_NOR_4B_OPCODES)
+ nor->flags |= SNOR_F_4B_OPCODES;
if (info->flags & SPI_NOR_NO_ERASE)
mtd->flags |= MTD_NO_ERASE;
@@ -4156,7 +4158,7 @@ int spi_nor_scan(struct spi_nor *nor)
/* enable 4-byte addressing if the device exceeds 16MiB */
nor->addr_width = 4;
if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
- info->flags & SPI_NOR_4B_OPCODES)
+ nor->flags & SNOR_F_4B_OPCODES)
spi_nor_set_4byte_opcodes(nor, info);
#else
/* Configure the BAR - discover bank cmds and read current bank */
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index d1dbf3eadb..80e56cf308 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -294,6 +294,7 @@ enum spi_nor_option_flags {
SNOR_F_BROKEN_RESET = BIT(6),
SNOR_F_SOFT_RESET = BIT(7),
SNOR_F_IO_MODE_EN_VOLATILE = BIT(8),
+ SNOR_F_4B_OPCODES = BIT(9),
};
struct spi_nor;
--
2.44.0
[PATCH v2] sysreset: add Qualcomm PSHOLD reset driver
Number of Qualcomm ARMv7 SoC-s did not use PSCI but rather used PSHOLD
(Qualcomm Power Supply Hold Reset) bit to trigger reset or poweroff.
Qualcomm IPQ40XX is one of them, so provide a simple sysreset driver based
on the upstream Linux one, it is DT compatible as well.
Signed-off-by: Robert Marko
Reviewed-by: Caleb Connolly
---
Changes in v2:
* Use QCOM instead of MSM naming
drivers/sysreset/Kconfig| 6 +++
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_qcom-pshold.c | 56 +
3 files changed, 63 insertions(+)
create mode 100644 drivers/sysreset/sysreset_qcom-pshold.c
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 49c0787b26..920dceb70b 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -235,6 +235,12 @@ config SYSRESET_RAA215300
help
Add support for the system reboot via the Renesas RAA215300 PMIC.
+config SYSRESET_QCOM_PSHOLD
+ bool "Support sysreset for Qualcomm SoCs via PSHOLD"
+ depends on ARCH_IPQ40XX
+ help
+ Add support for the system reboot on Qualcomm SoCs via PSHOLD.
+
endif
endmenu
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index e0e732205d..f0620c391e 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -28,4 +28,5 @@ obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_AT91) += sysreset_at91.o
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o
obj-$(CONFIG_SYSRESET_RAA215300) += sysreset_raa215300.o
+obj-$(CONFIG_SYSRESET_QCOM_PSHOLD) += sysreset_qcom-pshold.o
obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
diff --git a/drivers/sysreset/sysreset_qcom-pshold.c
b/drivers/sysreset/sysreset_qcom-pshold.c
new file mode 100644
index 00..25231cf5e2
--- /dev/null
+++ b/drivers/sysreset/sysreset_qcom-pshold.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm PSHOLD reset driver
+ *
+ * Copyright (c) 2024 Sartura Ltd.
+ *
+ * Author: Robert Marko
+ * Based on the Linux msm-poweroff driver.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+struct qcom_pshold_priv {
+ phys_addr_t base;
+};
+
+static int qcom_pshold_request(struct udevice *dev, enum sysreset_t type)
+{
+ struct qcom_pshold_priv *priv = dev_get_priv(dev);
+
+ writel(0, priv->base);
+ mdelay(1);
+
+ return 0;
+}
+
+static struct sysreset_ops qcom_pshold_ops = {
+ .request = qcom_pshold_request,
+};
+
+static int qcom_pshold_probe(struct udevice *dev)
+{
+ struct qcom_pshold_priv *priv = dev_get_priv(dev);
+
+ priv->base = dev_read_addr(dev);
+ return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
+}
+
+static const struct udevice_id qcom_pshold_ids[] = {
+ { .compatible = "qcom,pshold", },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(qcom_pshold) = {
+ .name = "qcom_pshold",
+ .id = UCLASS_SYSRESET,
+ .of_match = qcom_pshold_ids,
+ .probe = qcom_pshold_probe,
+ .priv_auto = sizeof(struct qcom_pshold_priv),
+ .ops= _pshold_ops,
+};
--
2.44.0
[PATCH 3/3] arm: dts: drop downstream IPQ4019 DTSI
We want to use OF_UPSTREAM on IPQ40XX as its well supported upstream, so
lets drop our downstream DTSI.
Signed-off-by: Robert Marko
---
arch/arm/dts/qcom-ipq4019.dtsi | 202 -
1 file changed, 202 deletions(-)
delete mode 100644 arch/arm/dts/qcom-ipq4019.dtsi
diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi
deleted file mode 100644
index f9489e42ea..00
--- a/arch/arm/dts/qcom-ipq4019.dtsi
+++ /dev/null
@@ -1,202 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2019 Sartura Ltd.
- *
- * Author: Robert Marko
- */
-
- /dts-v1/;
-
-#include "skeleton.dtsi"
-#include
-#include
-#include
-
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
-
- model = "Qualcomm Technologies, Inc. IPQ4019";
- compatible = "qcom,ipq4019";
-
- aliases {
- serial0 = _uart1;
- spi0 = _spi1;
- };
-
- reserved-memory {
- #address-cells = <0x1>;
- #size-cells = <0x1>;
- ranges;
-
- smem_mem: smem_region: smem@87e0 {
- reg = <0x87e0 0x08>;
- no-map;
- };
-
- tz@87e8 {
- reg = <0x87e8 0x18>;
- no-map;
- };
- };
-
- smem {
- compatible = "qcom,smem";
- memory-region = <_mem>;
- };
-
- soc: soc {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
-
- gcc: clock-controller@180 {
- compatible = "qcom,gcc-ipq4019";
- reg = <0x180 0x6>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- bootph-all;
- };
-
- rng: rng@22000 {
- compatible = "qcom,prng";
- reg = <0x22000 0x140>;
- clocks = < GCC_PRNG_AHB_CLK>;
- status = "disabled";
- };
-
- soc_gpios: pinctrl@100 {
- compatible = "qcom,ipq4019-pinctrl";
- reg = <0x100 0x30>;
- gpio-controller;
- gpio-count = <100>;
- gpio-bank-name="soc";
- #gpio-cells = <2>;
- bootph-all;
- };
-
- blsp1_uart1: serial@78af000 {
- compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
- reg = <0x78af000 0x200>;
- clock = < GCC_BLSP1_UART1_APPS_CLK>;
- bit-rate = <0xFF>;
- status = "disabled";
- bootph-all;
- };
-
- blsp1_spi1: spi@78b5000 {
- compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x78b5000 0x600>;
- clocks = < GCC_BLSP1_QUP1_SPI_APPS_CLK>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- bootph-all;
- };
-
- mdio: mdio@9 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "qcom,ipq4019-mdio";
- reg = <0x9 0x64>;
- status = "disabled";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- };
-
- ethphy2: ethernet-phy@2 {
- reg = <2>;
- };
-
- ethphy3: ethernet-phy@3 {
- reg = <3>;
- };
-
- ethphy4: ethernet-phy@4 {
- reg = <4>;
- };
- };
-
- usb3_ss_phy: ssphy@9a000 {
- compatible = "qcom,usb-ss-ipq4019-phy";
- #phy-cells = <0>;
- reg = <0x9a000 0x800>;
- reg-names = "phy_base";
- resets = < USB3_UNIPHY_PHY_ARES>;
-
[PATCH 2/3] mach-ipq40xx: use OF_UPSTREAM
Now that drivers are compatible enough with the upstream DTS, there is no reason to not use the upstream DTS, so imply OF_UPSTREAM by default. Signed-off-by: Robert Marko --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 93e12d8d53..5c2769b59d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -768,6 +768,7 @@ config ARCH_IPQ40XX select CLK_QCOM_IPQ4019 select PINCTRL_QCOM_IPQ4019 imply CMD_DM + imply OF_UPSTREAM config ARCH_KEYSTONE bool "TI Keystone" -- 2.44.0
[PATCH 1/3] mach-ipq40xx: add CPU specific code
Provide basic DRAM info population from DT, cache setting and the
board_init stub.
Signed-off-by: Robert Marko
---
arch/arm/mach-ipq40xx/Makefile | 7 ++
arch/arm/mach-ipq40xx/cpu.c| 44 ++
2 files changed, 51 insertions(+)
create mode 100644 arch/arm/mach-ipq40xx/Makefile
create mode 100644 arch/arm/mach-ipq40xx/cpu.c
diff --git a/arch/arm/mach-ipq40xx/Makefile b/arch/arm/mach-ipq40xx/Makefile
new file mode 100644
index 00..d611de9933
--- /dev/null
+++ b/arch/arm/mach-ipq40xx/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2024 Sartura Ltd.
+#
+# Author: Robert Marko
+
+obj-y += cpu.o
diff --git a/arch/arm/mach-ipq40xx/cpu.c b/arch/arm/mach-ipq40xx/cpu.c
new file mode 100644
index 00..0446627a8f
--- /dev/null
+++ b/arch/arm/mach-ipq40xx/cpu.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * CPU code for Qualcomm IPQ40xx SoC
+ *
+ * Copyright (c) 2024 Sartura Ltd.
+ *
+ * Author: Robert Marko
+ */
+
+#include
+#include
+#include
+
+int dram_init(void)
+{
+ int ret;
+
+ ret = fdtdec_setup_memory_banksize();
+ if (ret)
+ return ret;
+ return fdtdec_setup_mem_size_base();
+}
+
+/*
+ * Enable/Disable D-cache.
+ * I-cache is already enabled in start.S
+ */
+void enable_caches(void)
+{
+ dcache_enable();
+}
+
+void disable_caches(void)
+{
+ dcache_disable();
+}
+
+/*
+ * In case boards need specific init code, they can override this stub.
+ */
+int __weak board_init(void)
+{
+ return 0;
+}
--
2.44.0
[PATCH 4/4] MAINTAINERS: IPQ40XX: add pinctrl driver
Pinctrl drivers were moved to a dedicated directory but the entry was never updated, so add the pinctrl-ipq4019 driver entry. Signed-off-by: Robert Marko --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 207c8b763f..382376b8e3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -343,6 +343,7 @@ F: drivers/phy/phy-qcom-ipq4019-usb.c F: drivers/spi/spi-qup.c F: drivers/net/mdio-ipq4019.c F: drivers/rng/msm_rng.c +F: drivers/pinctrl/qcom/pinctrl-ipq4019.c ARM LAYERSCAPE SFP M: Sean Anderson -- 2.44.0
[PATCH 3/4] MAINTAINERS: IPQ40XX: add clock-ipq4019 instead of reset driver
The reset handling was added to the clock drivers but the entry was never updated, so add the clock-ipq4019 driver instead. Signed-off-by: Robert Marko --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index fdce7c8334..207c8b763f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -338,7 +338,7 @@ M: Luka Perkov S: Maintained F: arch/arm/mach-ipq40xx/ F: include/dt-bindings/clock/qcom,gcc-ipq4019.h -F: drivers/reset/reset-ipq4019.c +F: drivers/clk/qcom/clock-ipq4019.c F: drivers/phy/phy-qcom-ipq4019-usb.c F: drivers/spi/spi-qup.c F: drivers/net/mdio-ipq4019.c -- 2.44.0
[PATCH 2/4] MAINTAINERS: IPQ40XX: update GCC dt-bindings
The separate clock and reset dt-bindings for IPQ40XX were merged into one recently, but the entry was not updated so do it now. Signed-off-by: Robert Marko --- MAINTAINERS | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 8691500d28..fdce7c8334 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -337,8 +337,7 @@ M: Robert Marko M: Luka Perkov S: Maintained F: arch/arm/mach-ipq40xx/ -F: include/dt-bindings/clock/qcom,ipq4019-gcc.h -F: include/dt-bindings/reset/qcom,ipq4019-reset.h +F: include/dt-bindings/clock/qcom,gcc-ipq4019.h F: drivers/reset/reset-ipq4019.c F: drivers/phy/phy-qcom-ipq4019-usb.c F: drivers/spi/spi-qup.c -- 2.44.0
[PATCH 1/4] MAINTAINERS: IPQ40XX: remove Luka Kovacic as maintainer
Luka Kovacic is no longer at Sartura, so remove him as one of IPQ40xx maintainers. Signed-off-by: Robert Marko --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index d0a4a28b40..8691500d28 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -334,7 +334,6 @@ F: drivers/spi/gxp_spi.c ARM IPQ40XX M: Robert Marko -M: Luka Kovacic M: Luka Perkov S: Maintained F: arch/arm/mach-ipq40xx/ -- 2.44.0
[PATCH] sysreset: add Qualcomm PSHOLD reset driver
Number of Qualcomm ARMv7 SoC-s did not use PSCI but rather used PSHOLD
(Qualcomm Power Supply Hold Reset) bit to trigger reset or poweroff.
Qualcomm IPQ40XX is one of them, so provide a simple sysreset driver based
on the upstream Linux one, it is DT compatible as well.
Signed-off-by: Robert Marko
---
drivers/sysreset/Kconfig | 6 +++
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_msm-pshold.c | 56 ++
3 files changed, 63 insertions(+)
create mode 100644 drivers/sysreset/sysreset_msm-pshold.c
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 49c0787b26..30ff9e576d 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -235,6 +235,12 @@ config SYSRESET_RAA215300
help
Add support for the system reboot via the Renesas RAA215300 PMIC.
+config SYSRESET_MSM_PSHOLD
+ bool "Support sysreset for Qualcomm SoCs via PSHOLD"
+ depends on ARCH_IPQ40XX
+ help
+ Add support for the system reboot on Qualcomm SoCs via PSHOLD.
+
endif
endmenu
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index e0e732205d..da61dca8e2 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -28,4 +28,5 @@ obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_AT91) += sysreset_at91.o
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o
obj-$(CONFIG_SYSRESET_RAA215300) += sysreset_raa215300.o
+obj-$(CONFIG_SYSRESET_MSM_PSHOLD) += sysreset_msm-pshold.o
obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
diff --git a/drivers/sysreset/sysreset_msm-pshold.c
b/drivers/sysreset/sysreset_msm-pshold.c
new file mode 100644
index 00..d25a412954
--- /dev/null
+++ b/drivers/sysreset/sysreset_msm-pshold.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm PSHOLD reset driver
+ *
+ * Copyright (c) 2024 Sartura Ltd.
+ *
+ * Author: Robert Marko
+ * Based on the Linux msm-poweroff driver.
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+struct msm_pshold_priv {
+ phys_addr_t base;
+};
+
+static int msm_pshold_request(struct udevice *dev, enum sysreset_t type)
+{
+ struct msm_pshold_priv *priv = dev_get_priv(dev);
+
+ writel(0, priv->base);
+ mdelay(1);
+
+ return 0;
+}
+
+static struct sysreset_ops msm_pshold_ops = {
+ .request = msm_pshold_request,
+};
+
+static int msm_pshold_probe(struct udevice *dev)
+{
+ struct msm_pshold_priv *priv = dev_get_priv(dev);
+
+ priv->base = dev_read_addr(dev);
+ return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
+}
+
+static const struct udevice_id msm_pshold_ids[] = {
+ { .compatible = "qcom,pshold", },
+ { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(msm_pshold) = {
+ .name = "msm_pshold",
+ .id = UCLASS_SYSRESET,
+ .of_match = msm_pshold_ids,
+ .probe = msm_pshold_probe,
+ .priv_auto = sizeof(struct msm_pshold_priv),
+ .ops= _pshold_ops,
+};
--
2.44.0
[PATCH] .gitignore: add LTO generated file
Currently, keep-syms-lto.c is being generated if LTO is enabled but unlike keep-syms-lto.o it is not being ignored, so lets add keep-syms-lto.* to .gitignore. Signed-off-by: Robert Marko --- .gitignore | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitignore b/.gitignore index be137040a2..324078769b 100644 --- a/.gitignore +++ b/.gitignore @@ -67,6 +67,7 @@ fit-dtb.blob* /Test* /capsule.*.efi-capsule /capsule*.map +/keep-syms-lto.* # # Generated include files -- 2.44.0
[PATCH v2 5/5] pinctrl: qcom: ipq4019: support all pin functions
Currently, IPQ4019 pinctrl driver supports only a very limited number of
pin functions and is not fully DT compatible with Linux pinctrl nodes.
IPQ40xx SoC-s sometimes use different pin function numbers for the same
function depending on the pin number, so for example I2C0 on GPIO58 uses
function number 3 while on GPIO59 it uses function number 2.
So, in order to make the driver compatible with upstream DTS to avoid the
need to patch the pinctrl nodes in U-Boot and support all of the missing
pin functions lets rework the driver based on upstream Linux IPQ4019
pinctrl driver and the pending SM8150 U-Boot pinctrl driver which also uses
different function numbers pased on the exact pin number.
Signed-off-by: Robert Marko
---
drivers/pinctrl/qcom/pinctrl-ipq4019.c | 306 +++--
1 file changed, 293 insertions(+), 13 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
index 48644a51ae..26ab487857 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -14,19 +14,291 @@
#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN] __section(".data");
+
+enum ipq4019_functions {
+ qca_mux_gpio,
+ qca_mux_aud_pin,
+ qca_mux_audio_pwm,
+ qca_mux_blsp_i2c0,
+ qca_mux_blsp_i2c1,
+ qca_mux_blsp_spi0,
+ qca_mux_blsp_spi1,
+ qca_mux_blsp_uart0,
+ qca_mux_blsp_uart1,
+ qca_mux_chip_rst,
+ qca_mux_i2s_rx,
+ qca_mux_i2s_spdif_in,
+ qca_mux_i2s_spdif_out,
+ qca_mux_i2s_td,
+ qca_mux_i2s_tx,
+ qca_mux_jtag,
+ qca_mux_led0,
+ qca_mux_led1,
+ qca_mux_led2,
+ qca_mux_led3,
+ qca_mux_led4,
+ qca_mux_led5,
+ qca_mux_led6,
+ qca_mux_led7,
+ qca_mux_led8,
+ qca_mux_led9,
+ qca_mux_led10,
+ qca_mux_led11,
+ qca_mux_mdc,
+ qca_mux_mdio,
+ qca_mux_pcie,
+ qca_mux_pmu,
+ qca_mux_prng_rosc,
+ qca_mux_qpic,
+ qca_mux_rgmii,
+ qca_mux_rmii,
+ qca_mux_sdio,
+ qca_mux_smart0,
+ qca_mux_smart1,
+ qca_mux_smart2,
+ qca_mux_smart3,
+ qca_mux_tm,
+ qca_mux_wifi0,
+ qca_mux_wifi1,
+ qca_mux_NA,
+};
+
+#define QCA_PIN_FUNCTION(fname)\
+ [qca_mux_##fname] = {#fname, qca_mux_##fname}
+
static const struct pinctrl_function msm_pinctrl_functions[] = {
- {"gpio", 0},
- {"blsp_uart0_0", 1}, /* Only for GPIO:16,17 */
- {"blsp_uart0_1", 2}, /* Only for GPIO:60,61 */
- {"blsp_uart1", 1},
- {"blsp_spi0_0", 1}, /* Only for GPIO:12,13,14,15 */
- {"blsp_spi0_1", 2}, /* Only for GPIO:54,55,56,57 */
- {"blsp_spi1", 2},
- {"mdio_0", 1}, /* Only for GPIO6 */
- {"mdio_1", 2}, /* Only for GPIO53 */
- {"mdc_0", 1}, /* Only for GPIO7 */
- {"mdc_1", 2}, /* Only for GPIO52 */
+ QCA_PIN_FUNCTION(aud_pin),
+ QCA_PIN_FUNCTION(audio_pwm),
+ QCA_PIN_FUNCTION(blsp_i2c0),
+ QCA_PIN_FUNCTION(blsp_i2c1),
+ QCA_PIN_FUNCTION(blsp_spi0),
+ QCA_PIN_FUNCTION(blsp_spi1),
+ QCA_PIN_FUNCTION(blsp_uart0),
+ QCA_PIN_FUNCTION(blsp_uart1),
+ QCA_PIN_FUNCTION(chip_rst),
+ QCA_PIN_FUNCTION(gpio),
+ QCA_PIN_FUNCTION(i2s_rx),
+ QCA_PIN_FUNCTION(i2s_spdif_in),
+ QCA_PIN_FUNCTION(i2s_spdif_out),
+ QCA_PIN_FUNCTION(i2s_td),
+ QCA_PIN_FUNCTION(i2s_tx),
+ QCA_PIN_FUNCTION(jtag),
+ QCA_PIN_FUNCTION(led0),
+ QCA_PIN_FUNCTION(led1),
+ QCA_PIN_FUNCTION(led2),
+ QCA_PIN_FUNCTION(led3),
+ QCA_PIN_FUNCTION(led4),
+ QCA_PIN_FUNCTION(led5),
+ QCA_PIN_FUNCTION(led6),
+ QCA_PIN_FUNCTION(led7),
+ QCA_PIN_FUNCTION(led8),
+ QCA_PIN_FUNCTION(led9),
+ QCA_PIN_FUNCTION(led10),
+ QCA_PIN_FUNCTION(led11),
+ QCA_PIN_FUNCTION(mdc),
+ QCA_PIN_FUNCTION(mdio),
+ QCA_PIN_FUNCTION(pcie),
+ QCA_PIN_FUNCTION(pmu),
+ QCA_PIN_FUNCTION(prng_rosc),
+ QCA_PIN_FUNCTION(qpic),
+ QCA_PIN_FUNCTION(rgmii),
+ QCA_PIN_FUNCTION(rmii),
+ QCA_PIN_FUNCTION(sdio),
+ QCA_PIN_FUNCTION(smart0),
+ QCA_PIN_FUNCTION(smart1),
+ QCA_PIN_FUNCTION(smart2),
+ QCA_PIN_FUNCTION(smart3),
+ QCA_PIN_FUNCTION(tm),
+ QCA_PIN_FUNCTION(wifi0),
+ QCA_PIN_FUNCTION(wifi1),
};
+
+typedef unsigned int msm_pin_function[15];
+
+#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13,
f14) \
+ [id] = {qca_mux_gpio, /* gpio mode */ \
+ qca_mux_##f1, \
+ qca_mux_##f2, \
+ qca_mux_##f3, \
+ qca_mux_
[PATCH v2 4/5] pinctrl: qcom: ipq4019: enable DM_FLAG_PRE_RELOC
If compiled with logging and debug UART support, the following is printed:
serial_msm serial@78af000: pinctrl_select_state_full:
uclass_get_device_by_phandle_id: err=-19
This is due to the fact that IPQ4019 pinctrl driver is not available prior
to relocation and thus MSM serial will fail probing as pinctrl provider is
not available.
So, lets enable DM_FLAG_PRE_RELOC for IPQ4019 pinctrl to fix this.
Signed-off-by: Robert Marko
---
drivers/pinctrl/qcom/pinctrl-ipq4019.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
index 4fcc4b1810..48644a51ae 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -68,4 +68,5 @@ U_BOOT_DRIVER(pinctrl_ipq4019) = {
.of_match = msm_pinctrl_ids,
.ops= _pinctrl_ops,
.bind = msm_pinctrl_bind,
+ .flags = DM_FLAG_PRE_RELOC,
};
--
2.44.0
[PATCH v2 3/5] pinctrl: qcom: ipq4019: adapt pin name lookup to upstream DTS
We want to use OF_UPSTREAM on IPQ40XX as its well supported upstream, so
as a preparation update pinctrl driver to look for the upstream pin format.
Signed-off-by: Robert Marko
Reviewed-by: Caleb Connolly
---
drivers/pinctrl/qcom/pinctrl-ipq4019.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
index 4479230313..4fcc4b1810 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -36,7 +36,7 @@ static const char *ipq4019_get_function_name(struct udevice
*dev,
static const char *ipq4019_get_pin_name(struct udevice *dev,
unsigned int selector)
{
- snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
return pin_name;
}
--
2.44.0
[PATCH v2 2/5] mach-ipq40xx: import GPIO header from mach-snapgradon
Pinctrl driver was refactored and moved, but the required header that
it depends on was not included.
Fixes: 24d2908e987a ("pinctrl: qcom: move ipq4019 driver from mach-ipq40xx")
Signed-off-by: Robert Marko
---
arch/arm/mach-ipq40xx/include/mach/gpio.h | 37 +++
1 file changed, 31 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-ipq40xx/include/mach/gpio.h
b/arch/arm/mach-ipq40xx/include/mach/gpio.h
index a45747c0fe..53c6ae0649 100644
--- a/arch/arm/mach-ipq40xx/include/mach/gpio.h
+++ b/arch/arm/mach-ipq40xx/include/mach/gpio.h
@@ -1,10 +1,35 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Empty gpio.h
+ * Qualcomm common pin control data.
*
- * This file must stay as arch/arm/include/asm/gpio.h requires it.
- *
- * Copyright (c) 2019 Sartura Ltd.
- *
- * Author: Robert Marko
+ * Copyright (C) 2023 Linaro Ltd.
*/
+#ifndef _QCOM_GPIO_H_
+#define _QCOM_GPIO_H_
+
+#include
+#include
+
+struct msm_pin_data {
+ int pin_count;
+ const unsigned int *pin_offsets;
+ /* Index of first special pin, these are ignored for now */
+ unsigned int special_pins_start;
+};
+
+static inline u32 qcom_pin_offset(const unsigned int *offs, unsigned int
selector)
+{
+ u32 out = (selector * 0x1000);
+
+ if (offs)
+ return out + offs[selector];
+
+ return out;
+}
+
+static inline bool qcom_is_special_pin(const struct msm_pin_data *pindata,
unsigned int pin)
+{
+ return pindata->special_pins_start && pin >=
pindata->special_pins_start;
+}
+
+#endif /* _QCOM_GPIO_H_ */
--
2.44.0
[PATCH v2 1/5] pinctrl: qcom: allow selecting with ARCH_IPQ40XX
IPQ4019 pinctrl driver was moved to the dedicated Qualcomm pinctrl
directory, but the KConfig depends on ARCH_SNAPDRAGON only and thus
PINCTRL_QCOM_IPQ4019 cannot be selected when ARCH_IPQ40XX is used.
Fixes: 24d2908e987a ("pinctrl: qcom: move ipq4019 driver from mach-ipq40xx")
Signed-off-by: Robert Marko
Reviewed-by: Caleb Connolly
---
drivers/pinctrl/qcom/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index 2fe6398147..bd2019c866 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -1,4 +1,4 @@
-if ARCH_SNAPDRAGON
+if ARCH_SNAPDRAGON || ARCH_IPQ40XX
config PINCTRL_QCOM
depends on PINCTRL_GENERIC
--
2.44.0
Re: [PATCH 2/3] mach-ipq40xx: import GPIO header from mach-snapgradon
On Thu, Apr 18, 2024 at 1:02 PM Caleb Connolly
wrote:
>
> Hi Robert,
>
> On 18/04/2024 10:14, Robert Marko wrote:
> > Pinctrl driver was refactored and moved, but the required header that
> > it depends on was not included.
>
> Thanks for these patches!
>
> I'm a bit worried about duplicating this header file, we could probably
> move it to the main include directory instead?
Hi Caleb,
That works for me as its a straight copy from mach-snapdragon.
>
> Alternatively, do you think it would be sensible to combine
> mach-snapdragon with mach-ipq40xx ?
>
> I received some patches a while ago from some Qualcomm engineers trying
> to introduce support for newer IPQ SoCs, where they also seem to want to
> build U-Boot as 32-bit (something I guess ipq40xx may also do?).
If it's possible, I would prefer to keep mach-ipq40xx separate and
probably convert it
to mach-ipq later since I would also love to see some newer SoC-s as well.
While Snapdragon and IPQ40xx are similar currently they will diverge for sure.
I dont understand why Qualcomm still insists on building the stock
U-Boot in ARMv7 32-bit
compatibility mode for all of the Cortex-A53 based IPQ807x/60xx/50xx and so on.
Regards,
Robert
>
> I'm easy either way, just want to get a better understanding of this.
>
> Kind regards,
> >
> > Fixes: 24d2908e987a ("pinctrl: qcom: move ipq4019 driver from mach-ipq40xx")
> > Signed-off-by: Robert Marko
> > ---
> > arch/arm/mach-ipq40xx/include/mach/gpio.h | 37 +++
> > 1 file changed, 31 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm/mach-ipq40xx/include/mach/gpio.h
> > b/arch/arm/mach-ipq40xx/include/mach/gpio.h
> > index a45747c0fe..53c6ae0649 100644
> > --- a/arch/arm/mach-ipq40xx/include/mach/gpio.h
> > +++ b/arch/arm/mach-ipq40xx/include/mach/gpio.h
> > @@ -1,10 +1,35 @@
> > /* SPDX-License-Identifier: GPL-2.0+ */
> > /*
> > - * Empty gpio.h
> > + * Qualcomm common pin control data.
> > *
> > - * This file must stay as arch/arm/include/asm/gpio.h requires it.
> > - *
> > - * Copyright (c) 2019 Sartura Ltd.
> > - *
> > - * Author: Robert Marko
> > + * Copyright (C) 2023 Linaro Ltd.
> > */
> > +#ifndef _QCOM_GPIO_H_
> > +#define _QCOM_GPIO_H_
> > +
> > +#include
> > +#include
> > +
> > +struct msm_pin_data {
> > + int pin_count;
> > + const unsigned int *pin_offsets;
> > + /* Index of first special pin, these are ignored for now */
> > + unsigned int special_pins_start;
> > +};
> > +
> > +static inline u32 qcom_pin_offset(const unsigned int *offs, unsigned int
> > selector)
> > +{
> > + u32 out = (selector * 0x1000);
> > +
> > + if (offs)
> > + return out + offs[selector];
> > +
> > + return out;
> > +}
> > +
> > +static inline bool qcom_is_special_pin(const struct msm_pin_data *pindata,
> > unsigned int pin)
> > +{
> > + return pindata->special_pins_start && pin >=
> > pindata->special_pins_start;
> > +}
> > +
> > +#endif /* _QCOM_GPIO_H_ */
>
> --
> // Caleb (they/them)
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
[PATCH] arm: mach-ipq40xx: dont select SMEM by default
IPQ40xx SoC-s dont have proper SMEM support like more modern Qualcomm SoC-s so there is no point in selecting the required drivers. Signed-off-by: Robert Marko --- arch/arm/Kconfig | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 23ee25269a..922c28cca9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -762,10 +762,8 @@ config ARCH_IPQ40XX select DM_SERIAL select DM_RESET select GPIO_EXTRA_HEADER - select MSM_SMEM select PINCTRL select CLK - select SMEM select OF_CONTROL select CLK_QCOM_IPQ4019 select PINCTRL_QCOM_IPQ4019 -- 2.44.0
[PATCH 3/3] pinctrl: qcom: ipq4019: adapt pin name lookup to upstream DTS
We want to use OF_UPSTREAM on IPQ40XX as its well supported upstream, so
as a preparation update pinctrl driver to look for the upstream pin format.
Signed-off-by: Robert Marko
---
drivers/pinctrl/qcom/pinctrl-ipq4019.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
index 4479230313..4fcc4b1810 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -36,7 +36,7 @@ static const char *ipq4019_get_function_name(struct udevice
*dev,
static const char *ipq4019_get_pin_name(struct udevice *dev,
unsigned int selector)
{
- snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
+ snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);
return pin_name;
}
--
2.44.0
[PATCH 2/3] mach-ipq40xx: import GPIO header from mach-snapgradon
Pinctrl driver was refactored and moved, but the required header that
it depends on was not included.
Fixes: 24d2908e987a ("pinctrl: qcom: move ipq4019 driver from mach-ipq40xx")
Signed-off-by: Robert Marko
---
arch/arm/mach-ipq40xx/include/mach/gpio.h | 37 +++
1 file changed, 31 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-ipq40xx/include/mach/gpio.h
b/arch/arm/mach-ipq40xx/include/mach/gpio.h
index a45747c0fe..53c6ae0649 100644
--- a/arch/arm/mach-ipq40xx/include/mach/gpio.h
+++ b/arch/arm/mach-ipq40xx/include/mach/gpio.h
@@ -1,10 +1,35 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Empty gpio.h
+ * Qualcomm common pin control data.
*
- * This file must stay as arch/arm/include/asm/gpio.h requires it.
- *
- * Copyright (c) 2019 Sartura Ltd.
- *
- * Author: Robert Marko
+ * Copyright (C) 2023 Linaro Ltd.
*/
+#ifndef _QCOM_GPIO_H_
+#define _QCOM_GPIO_H_
+
+#include
+#include
+
+struct msm_pin_data {
+ int pin_count;
+ const unsigned int *pin_offsets;
+ /* Index of first special pin, these are ignored for now */
+ unsigned int special_pins_start;
+};
+
+static inline u32 qcom_pin_offset(const unsigned int *offs, unsigned int
selector)
+{
+ u32 out = (selector * 0x1000);
+
+ if (offs)
+ return out + offs[selector];
+
+ return out;
+}
+
+static inline bool qcom_is_special_pin(const struct msm_pin_data *pindata,
unsigned int pin)
+{
+ return pindata->special_pins_start && pin >=
pindata->special_pins_start;
+}
+
+#endif /* _QCOM_GPIO_H_ */
--
2.44.0
[PATCH 1/3] pinctrl: qcom: allow selecting with ARCH_IPQ40XX
IPQ4019 pinctrl driver was moved to the dedicated Qualcomm pinctrl
directory, but the KConfig depends on ARCH_SNAPDRAGON only and thus
PINCTRL_QCOM_IPQ4019 cannot be selected when ARCH_IPQ40XX is used.
Fixes: 24d2908e987a ("pinctrl: qcom: move ipq4019 driver from mach-ipq40xx")
Signed-off-by: Robert Marko
---
drivers/pinctrl/qcom/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig
index 2fe6398147..bd2019c866 100644
--- a/drivers/pinctrl/qcom/Kconfig
+++ b/drivers/pinctrl/qcom/Kconfig
@@ -1,4 +1,4 @@
-if ARCH_SNAPDRAGON
+if ARCH_SNAPDRAGON || ARCH_IPQ40XX
config PINCTRL_QCOM
depends on PINCTRL_GENERIC
--
2.44.0
Re: [PATCH 1/3] serial: allow selecting MSM debug UART with ARCH_IPQ40XX
On Mon, Apr 15, 2024 at 1:21 PM Caleb Connolly wrote: > > Hi Robert, > > Happy to see someone working on those IPQ platforms. If it makes sense > to then I'd be happy to adopt them under ARCH_SNAPDRAGON at some point? > I'm not hugely familiar with the usecase here (but eager to learn more!). Well, IPQ40xx is quite a popular WiSoC family and its cheap but the stock bootloader limits any kind of custom use case, so here we are. Regards, Robert > > On 15/04/2024 11:49, Robert Marko wrote: > > Currently, DEBUG_UART_MSM depends on ARCH_SNAPDRAGON only, but IPQ40XX > > devices also use the same UART HW so they can also use the debug UART. > > > > So, allow selecting DEBUG_UART_MSM when using ARCH_IPQ40XX as well. > > > > Signed-off-by: Robert Marko > > Reviewed-by: Caleb Connolly > > --- > > drivers/serial/Kconfig | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig > > index 8b19e2684e..1fe4607598 100644 > > --- a/drivers/serial/Kconfig > > +++ b/drivers/serial/Kconfig > > @@ -321,7 +321,7 @@ config DEBUG_UART_S5P > > > > config DEBUG_UART_MSM > > bool "Qualcomm QUP UART debug" > > - depends on ARCH_SNAPDRAGON > > + depends on ARCH_SNAPDRAGON || ARCH_IPQ40XX > > help > > Select this to enable a debug UART using the serial_msm driver. You > > will need to provide parameters to make this work. The driver will > > -- > // Caleb (they/them) -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: robert.ma...@sartura.hr Web: www.sartura.hr
Re: [PATCH 3/3] serial: msm: calculate bit clock divider
On Mon, Apr 15, 2024 at 4:18 PM Caleb Connolly
wrote:
>
>
>
> On 15/04/2024 14:05, Robert Marko wrote:
> > On Mon, Apr 15, 2024 at 2:44 PM Caleb Connolly
> > wrote:
> >>
> >> The driver currently requires the bit clock divider be hardcoded in
> >> devicetree (or use the hardcoded default from apq8016).
> >>
> >> The bit clock divider is used to derive the baud rate from the core
> >> clock:
> >>
> >> baudrate = clk_rate / csr_div
> >>
> >> clk_rate is the actual programmed core clock rate which is returned by
> >> clk_set_rate(), and this UART driver only supports a baudrate of 115200.
> >> We can therefore determine the appropriate value for UARTDM_CSR by
> >> iterating over the possible values and finding the one where the
> >> equation above holds true for a baudrate of 115200.
> >>
> >> Implement this logic and drop the non-standard DT bindings for this
> >> driver.
> >>
> >> Tested on dragonboard410c.
> >>
> >> Signed-off-by: Caleb Connolly
> >
> > Works on Alfa AP120C (IPQ4018) with full DM UART, but debug UART
> > prints junk since .clk_rate = 7372800 is not correct for IPQ40xx.
> > I would suggest using .clk_rate = CONFIG_VAL(DEBUG_UART_CLOCK) instead
> > to populate the value per board, this also avoids per ARCH ifdefs.
>
> Ok awesome, thanks for trying this out. I'll send a v2 with your suggestion.
>
> Can I add your Tested-by?
Sure,
Tested-by: Robert Marko
Regards,
Robert
> >
> > Regards,
> > Robert
> >> ---
> >> Cc: Robert Marko
> >> ---
> >> doc/device-tree-bindings/serial/msm-serial.txt | 10 ---
> >> drivers/serial/serial_msm.c| 87
> >> +-
> >> 2 files changed, 70 insertions(+), 27 deletions(-)
> >>
> >> diff --git a/doc/device-tree-bindings/serial/msm-serial.txt
> >> b/doc/device-tree-bindings/serial/msm-serial.txt
> >> deleted file mode 100644
> >> index dca995798a90..
> >> --- a/doc/device-tree-bindings/serial/msm-serial.txt
> >> +++ /dev/null
> >> @@ -1,10 +0,0 @@
> >> -Qualcomm UART (Data Mover mode)
> >> -
> >> -Required properties:
> >> -- compatible: must be "qcom,msm-uartdm-v1.4"
> >> -- reg: start address and size of the registers
> >> -- clock: interface clock (must accept baudrate as a frequency)
> >> -
> >> -Optional properties:
> >> -- bit-rate: Data Mover bit rate register value
> >> - (If not defined then 0xCC is used as default)
> >> diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
> >> index 8044d38518db..e461929b4338 100644
> >> --- a/drivers/serial/serial_msm.c
> >> +++ b/drivers/serial/serial_msm.c
> >> @@ -31,8 +31,18 @@
> >> #define UARTDM_RXFS_BUF_SHIFT 0x7 /* Number of bytes in the packing
> >> buffer */
> >> #define UARTDM_RXFS_BUF_MASK0x7
> >> #define UARTDM_MR1 0x00
> >> #define UARTDM_MR2 0x04
> >> +/*
> >> + * This is documented on page 1817 of the apq8016e technical reference
> >> manual.
> >> + * section 6.2.5.3.26
> >> + *
> >> + * The upper nybble contains the bit clock divider for the RX pin, the
> >> lower
> >> + * nybble defines the TX pin. In almost all cases these should be the
> >> same value.
> >> + *
> >> + * The baud rate is the core clock frequency divided by the fixed divider
> >> value
> >> + * programmed into this register (defined in calc_csr_bitrate()).
> >> + */
> >> #define UARTDM_CSR 0xA0
> >>
> >> #define UARTDM_SR0xA4 /* Status register */
> >> #define UARTDM_SR_RX_READY (1 << 0) /* Word is the receiver FIFO */
> >> @@ -52,9 +62,8 @@
> >>
> >> #define UARTDM_TF 0x100 /* UART Transmit FIFO register */
> >> #define UARTDM_RF 0x140 /* UART Receive FIFO register */
> >>
> >> -#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC
> >> #define MSM_BOOT_UART_DM_8_N_1_MODE 0x34
> >> #define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10
> >> #define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20
> >>
> >> @@ -63,9 +72,9 @@ DECLARE_GLOBAL_DATA_PTR;
> >> struct msm_serial_data {
> >> phys_addr_t base;
> >> unsigned chars_cn
Re: [PATCH 3/3] serial: msm: calculate bit clock divider
On Mon, Apr 15, 2024 at 2:44 PM Caleb Connolly
wrote:
>
> The driver currently requires the bit clock divider be hardcoded in
> devicetree (or use the hardcoded default from apq8016).
>
> The bit clock divider is used to derive the baud rate from the core
> clock:
>
> baudrate = clk_rate / csr_div
>
> clk_rate is the actual programmed core clock rate which is returned by
> clk_set_rate(), and this UART driver only supports a baudrate of 115200.
> We can therefore determine the appropriate value for UARTDM_CSR by
> iterating over the possible values and finding the one where the
> equation above holds true for a baudrate of 115200.
>
> Implement this logic and drop the non-standard DT bindings for this
> driver.
>
> Tested on dragonboard410c.
>
> Signed-off-by: Caleb Connolly
Works on Alfa AP120C (IPQ4018) with full DM UART, but debug UART
prints junk since .clk_rate = 7372800 is not correct for IPQ40xx.
I would suggest using .clk_rate = CONFIG_VAL(DEBUG_UART_CLOCK) instead
to populate the value per board, this also avoids per ARCH ifdefs.
Regards,
Robert
> ---
> Cc: Robert Marko
> ---
> doc/device-tree-bindings/serial/msm-serial.txt | 10 ---
> drivers/serial/serial_msm.c| 87
> +-
> 2 files changed, 70 insertions(+), 27 deletions(-)
>
> diff --git a/doc/device-tree-bindings/serial/msm-serial.txt
> b/doc/device-tree-bindings/serial/msm-serial.txt
> deleted file mode 100644
> index dca995798a90..
> --- a/doc/device-tree-bindings/serial/msm-serial.txt
> +++ /dev/null
> @@ -1,10 +0,0 @@
> -Qualcomm UART (Data Mover mode)
> -
> -Required properties:
> -- compatible: must be "qcom,msm-uartdm-v1.4"
> -- reg: start address and size of the registers
> -- clock: interface clock (must accept baudrate as a frequency)
> -
> -Optional properties:
> -- bit-rate: Data Mover bit rate register value
> - (If not defined then 0xCC is used as default)
> diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
> index 8044d38518db..e461929b4338 100644
> --- a/drivers/serial/serial_msm.c
> +++ b/drivers/serial/serial_msm.c
> @@ -31,8 +31,18 @@
> #define UARTDM_RXFS_BUF_SHIFT 0x7 /* Number of bytes in the packing
> buffer */
> #define UARTDM_RXFS_BUF_MASK0x7
> #define UARTDM_MR1 0x00
> #define UARTDM_MR2 0x04
> +/*
> + * This is documented on page 1817 of the apq8016e technical reference
> manual.
> + * section 6.2.5.3.26
> + *
> + * The upper nybble contains the bit clock divider for the RX pin, the lower
> + * nybble defines the TX pin. In almost all cases these should be the same
> value.
> + *
> + * The baud rate is the core clock frequency divided by the fixed divider
> value
> + * programmed into this register (defined in calc_csr_bitrate()).
> + */
> #define UARTDM_CSR 0xA0
>
> #define UARTDM_SR0xA4 /* Status register */
> #define UARTDM_SR_RX_READY (1 << 0) /* Word is the receiver FIFO */
> @@ -52,9 +62,8 @@
>
> #define UARTDM_TF 0x100 /* UART Transmit FIFO register */
> #define UARTDM_RF 0x140 /* UART Receive FIFO register */
>
> -#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC
> #define MSM_BOOT_UART_DM_8_N_1_MODE 0x34
> #define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10
> #define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20
>
> @@ -63,9 +72,9 @@ DECLARE_GLOBAL_DATA_PTR;
> struct msm_serial_data {
> phys_addr_t base;
> unsigned chars_cnt; /* number of buffered chars */
> uint32_t chars_buf; /* buffered chars */
> - uint32_t clk_bit_rate; /* data mover mode bit rate register value */
> + uint32_t clk_rate; /* core clock rate */
> };
>
> static int msm_serial_fetch(struct udevice *dev)
> {
> @@ -155,34 +164,63 @@ static const struct dm_serial_ops msm_serial_ops = {
> .pending = msm_serial_pending,
> .getc = msm_serial_getc,
> };
>
> -static int msm_uart_clk_init(struct udevice *dev)
> +static long msm_uart_clk_init(struct udevice *dev)
> {
> - uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
> - "clock-frequency", 115200);
> + struct msm_serial_data *priv = dev_get_priv(dev);
> struct clk clk;
> int ret;
> + long rate;
>
> ret = clk_get_by_name(dev, "core", );
> if (ret < 0) {
> pr_warn("%s: Failed to get clock: %d\n", __func__, ret);
> - return ret;
> + return 0;
> }
>
> -
[PATCH v2] usb: dwc3-generic: fix support without DM_REGULATOR
Recent addition of vbus-supply support has broke platform which dont use
controllable regulators for USB.
Issue is that even withou DM_REGULATOR being enabled regulator related
functions will still build as there is a stub in regulator.h but they will
simply return -ENOSYS which will then make dwc3_generic_host_probe()
return the same error thus breaking probe.
So, check whether return code is -ENOSYS before erroring out.
Fixes: de451d5d5b6f ("usb: dwc3-generic: support external vbus regulator")
Signed-off-by: Robert Marko
---
Changes in v2:
* Drop #ifdefs and check for -ENOSYS that regulator stub returns
drivers/usb/dwc3/dwc3-generic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 7a00529a2a..df0b0b8c02 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -248,7 +248,7 @@ static int dwc3_generic_host_probe(struct udevice *dev)
/* Only returns an error if regulator is valid and failed to enable due
to a driver issue */
rc = regulator_set_enable_if_allowed(priv->vbus_supply, true);
- if (rc)
+ if (rc && rc != -ENOSYS)
return rc;
hccr = (struct xhci_hccr *)priv->gen_priv.base;
--
2.44.0
Re: [PATCH 3/3] serial: msm_serial: set .clk_bit_rate in debug UART
On Mon, Apr 15, 2024 at 1:46 PM Caleb Connolly
wrote:
>
>
>
> On 15/04/2024 11:49, Robert Marko wrote:
> > Currently, .clk_bit_rate is not being set in init_serial_data for debug
> > UART, but its then used uart_dm_init() and this breaks debug UART on
> > IPQ40xx.
> >
> > So, lets populate .clk_bit_rate for debug UART as well.
> > IPQ40xx requires special value of 0xff, so set it if ARCH_IPQ40XX is
> > selected, otherwise default to the same value that regular DM UART
> > will use.
>
> Ah, I have a patch lying around to configure this automatically, but
> didn't get around to sending it. Could you give it a test on your IPQ
> board if I send it your way?
Sure, that would be great.
Regards,
Robert
>
> Kind regards,
> >
> > Signed-off-by: Robert Marko
> > ---
> > drivers/serial/serial_msm.c | 5 +
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
> > index 8044d38518..80069f5cfb 100644
> > --- a/drivers/serial/serial_msm.c
> > +++ b/drivers/serial/serial_msm.c
> > @@ -242,6 +242,11 @@ U_BOOT_DRIVER(serial_msm) = {
> >
> > static struct msm_serial_data init_serial_data = {
> > .base = CONFIG_VAL(DEBUG_UART_BASE),
> > +#ifdef CONFIG_ARCH_IPQ40XX
> > + .clk_bit_rate = 0xff,
> > +#else
> > + .clk_bit_rate = UART_DM_CLK_RX_TX_BIT_RATE,
> > +#endif
> > };
> >
> > #include
>
> --
> // Caleb (they/them)
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
Re: [PATCH] usb: dwc3-generic: fix support without DM_REGULATOR
On Mon, Apr 15, 2024 at 12:57 PM Caleb Connolly
wrote:
>
>
>
> On 15/04/2024 11:53, Robert Marko wrote:
> > Recent addition of vbus-supply support has broke platform which dont use
> > controllable regulators for USB.
> >
> > Issue is that even withou DM_REGULATOR being enabled regulator related
> > functions will still build as there is a stub in regulator.h but they will
> > simply return -ENOSYS which will then make dwc3_generic_host_probe()
> > return the same error thus breaking probe.
>
> Rather than stubbing out the code, could you check for -ENOSYS and
> ignore the error in that case? I believe there's only one place where
> this matters (marked below).
Sure, that was my first approach but it did not seem right to me.
But if its OK with you, I can do that.
Regards,
Robert
> >
> > Fixes: de451d5d5b6f ("usb: dwc3-generic: support external vbus regulator")
> > Signed-off-by: Robert Marko
> > ---
> > drivers/usb/dwc3/dwc3-generic.c | 8
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/usb/dwc3/dwc3-generic.c
> > b/drivers/usb/dwc3/dwc3-generic.c
> > index 7a00529a2a..784d3ec2ed 100644
> > --- a/drivers/usb/dwc3/dwc3-generic.c
> > +++ b/drivers/usb/dwc3/dwc3-generic.c
> > @@ -242,6 +242,7 @@ static int dwc3_generic_host_probe(struct udevice *dev)
> > if (rc)
> > return rc;
> >
> > +#if CONFIG_IS_ENABLED(DM_REGULATOR)
> > rc = device_get_supply_regulator(dev, "vbus-supply",
> > >vbus_supply);
> > if (rc)
> > debug("%s: No vbus regulator found: %d\n", dev->name, rc);
> > @@ -250,14 +251,17 @@ static int dwc3_generic_host_probe(struct udevice
> > *dev)
> > rc = regulator_set_enable_if_allowed(priv->vbus_supply, true);
> > if (rc)
> > return rc;
>
> Here, if (rc && rc != -ENOSYS)
> or even if (CONFIG_IS_ENABLED(DM_REGULATOR) && rc) to be verbose (maybe
> not the preferred style though).
>
> All the other regulator_* calls either ignore the result or only print a
> debug message.
> > +#endif
> >
> > hccr = (struct xhci_hccr *)priv->gen_priv.base;
> > hcor = (struct xhci_hcor *)(priv->gen_priv.base +
> > HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
> >
> > rc = xhci_register(dev, hccr, hcor);
> > +#if CONFIG_IS_ENABLED(DM_REGULATOR)
> > if (rc)
> > regulator_set_enable_if_allowed(priv->vbus_supply, false);
> > +#endif
> >
> > return rc;
> > }
> > @@ -265,14 +269,18 @@ static int dwc3_generic_host_probe(struct udevice
> > *dev)
> > static int dwc3_generic_host_remove(struct udevice *dev)
> > {
> > struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
> > +#if CONFIG_IS_ENABLED(DM_REGULATOR)
> > int rc;
> > +#endif
> >
> > /* This function always returns 0 */
> > xhci_deregister(dev);
> >
> > +#if CONFIG_IS_ENABLED(DM_REGULATOR)
> > rc = regulator_set_enable_if_allowed(priv->vbus_supply, false);
> > if (rc)
> > debug("%s: Failed to disable vbus regulator: %d\n",
> > dev->name, rc);
> > +#endif
> >
> > return dwc3_generic_remove(dev, >gen_priv);
> > }
>
> --
> // Caleb (they/them)
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
[PATCH] usb: dwc3-generic: fix support without DM_REGULATOR
Recent addition of vbus-supply support has broke platform which dont use
controllable regulators for USB.
Issue is that even withou DM_REGULATOR being enabled regulator related
functions will still build as there is a stub in regulator.h but they will
simply return -ENOSYS which will then make dwc3_generic_host_probe()
return the same error thus breaking probe.
Fixes: de451d5d5b6f ("usb: dwc3-generic: support external vbus regulator")
Signed-off-by: Robert Marko
---
drivers/usb/dwc3/dwc3-generic.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 7a00529a2a..784d3ec2ed 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -242,6 +242,7 @@ static int dwc3_generic_host_probe(struct udevice *dev)
if (rc)
return rc;
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
rc = device_get_supply_regulator(dev, "vbus-supply",
>vbus_supply);
if (rc)
debug("%s: No vbus regulator found: %d\n", dev->name, rc);
@@ -250,14 +251,17 @@ static int dwc3_generic_host_probe(struct udevice *dev)
rc = regulator_set_enable_if_allowed(priv->vbus_supply, true);
if (rc)
return rc;
+#endif
hccr = (struct xhci_hccr *)priv->gen_priv.base;
hcor = (struct xhci_hcor *)(priv->gen_priv.base +
HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
rc = xhci_register(dev, hccr, hcor);
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
if (rc)
regulator_set_enable_if_allowed(priv->vbus_supply, false);
+#endif
return rc;
}
@@ -265,14 +269,18 @@ static int dwc3_generic_host_probe(struct udevice *dev)
static int dwc3_generic_host_remove(struct udevice *dev)
{
struct dwc3_generic_host_priv *priv = dev_get_priv(dev);
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
int rc;
+#endif
/* This function always returns 0 */
xhci_deregister(dev);
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
rc = regulator_set_enable_if_allowed(priv->vbus_supply, false);
if (rc)
debug("%s: Failed to disable vbus regulator: %d\n", dev->name,
rc);
+#endif
return dwc3_generic_remove(dev, >gen_priv);
}
--
2.44.0
[PATCH 3/3] serial: msm_serial: set .clk_bit_rate in debug UART
Currently, .clk_bit_rate is not being set in init_serial_data for debug
UART, but its then used uart_dm_init() and this breaks debug UART on
IPQ40xx.
So, lets populate .clk_bit_rate for debug UART as well.
IPQ40xx requires special value of 0xff, so set it if ARCH_IPQ40XX is
selected, otherwise default to the same value that regular DM UART
will use.
Signed-off-by: Robert Marko
---
drivers/serial/serial_msm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
index 8044d38518..80069f5cfb 100644
--- a/drivers/serial/serial_msm.c
+++ b/drivers/serial/serial_msm.c
@@ -242,6 +242,11 @@ U_BOOT_DRIVER(serial_msm) = {
static struct msm_serial_data init_serial_data = {
.base = CONFIG_VAL(DEBUG_UART_BASE),
+#ifdef CONFIG_ARCH_IPQ40XX
+ .clk_bit_rate = 0xff,
+#else
+ .clk_bit_rate = UART_DM_CLK_RX_TX_BIT_RATE,
+#endif
};
#include
--
2.44.0
[PATCH 2/3] serial: msm_serial: remove .clk_rate from debug UART
MSM serial in DEBUG UART mode is trying to set .clk_rate, but the
msm_serial_data structure does not have such property at all, so lets
remove it as otherwise it will fail compiling.
Fixes: 90023bdfe979 ("serial: msm: add debug UART")
Signed-off-by: Robert Marko
---
drivers/serial/serial_msm.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
index ac4280c6c4..8044d38518 100644
--- a/drivers/serial/serial_msm.c
+++ b/drivers/serial/serial_msm.c
@@ -242,7 +242,6 @@ U_BOOT_DRIVER(serial_msm) = {
static struct msm_serial_data init_serial_data = {
.base = CONFIG_VAL(DEBUG_UART_BASE),
- .clk_rate = 7372800,
};
#include
--
2.44.0
[PATCH 1/3] serial: allow selecting MSM debug UART with ARCH_IPQ40XX
Currently, DEBUG_UART_MSM depends on ARCH_SNAPDRAGON only, but IPQ40XX devices also use the same UART HW so they can also use the debug UART. So, allow selecting DEBUG_UART_MSM when using ARCH_IPQ40XX as well. Signed-off-by: Robert Marko --- drivers/serial/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 8b19e2684e..1fe4607598 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -321,7 +321,7 @@ config DEBUG_UART_S5P config DEBUG_UART_MSM bool "Qualcomm QUP UART debug" - depends on ARCH_SNAPDRAGON + depends on ARCH_SNAPDRAGON || ARCH_IPQ40XX help Select this to enable a debug UART using the serial_msm driver. You will need to provide parameters to make this work. The driver will -- 2.44.0
Re: [PATCH v3 1/3] arm: mvebu: Espressobin: move FDT fixup into a separate function
On Tue, Jan 9, 2024 at 4:34 PM Stefan Roese wrote:
>
> Hi Robert,
>
> On 1/9/24 14:16, Robert Marko wrote:
> > On Wed, Nov 29, 2023 at 11:11 AM Robert Marko
> > wrote:
> >>
> >> Currently, Esspresobin FDT is being fixed up directly in ft_board_setup()
> >> which makes it hard to add support for any other board to be fixed up.
> >>
> >> So, lets just move the FDT fixup code to a separate function and call it
> >> if compatible matches, there should be no functional change.
> >>
> >> Signed-off-by: Robert Marko
> >> Reviewed-by: Stefan Roese
> >
> >
> > Hi Stefan,
> > Since 2024.01 was released, can this series be pulled in now?
>
> It's on my list. I actually already started with some CI build tests.
> Hope to get this done by end of this week, before I leave for a
> short vacation.
Sounds good.
Regards,
Robert
>
> Thanks,
> Stefan
>
> > Regards,
> > Robert
> >
> >>
> >> ---
> >> board/Marvell/mvebu_armada-37xx/board.c | 14 +-
> >> 1 file changed, 9 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/board/Marvell/mvebu_armada-37xx/board.c
> >> b/board/Marvell/mvebu_armada-37xx/board.c
> >> index 04124d8014..1471caa9a6 100644
> >> --- a/board/Marvell/mvebu_armada-37xx/board.c
> >> +++ b/board/Marvell/mvebu_armada-37xx/board.c
> >> @@ -363,18 +363,14 @@ EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT,
> >> last_stage_init);
> >> #endif
> >>
> >> #ifdef CONFIG_OF_BOARD_SETUP
> >> -int ft_board_setup(void *blob, struct bd_info *bd)
> >> +static int espressobin_fdt_setup(void *blob)
> >> {
> >> -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> >> int ret;
> >> int spi_off;
> >> int parts_off;
> >> int part_off;
> >>
> >> /* Fill SPI MTD partitions for Linux kernel on Espressobin */
> >> - if (!of_machine_is_compatible("globalscale,espressobin"))
> >> - return 0;
> >> -
> >> spi_off = fdt_node_offset_by_compatible(blob, -1,
> >> "jedec,spi-nor");
> >> if (spi_off < 0)
> >> return 0;
> >> @@ -459,6 +455,14 @@ int ft_board_setup(void *blob, struct bd_info *bd)
> >> return 0;
> >> }
> >>
> >> + return 0;
> >> +}
> >> +
> >> +int ft_board_setup(void *blob, struct bd_info *bd)
> >> +{
> >> +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> >> + if (of_machine_is_compatible("globalscale,espressobin"))
> >> + return espressobin_fdt_setup(blob);
> >> #endif
> >> return 0;
> >> }
> >> --
> >> 2.43.0
> >>
> >
> >
>
> Viele Grüße,
> Stefan Roese
>
> --
> DENX Software Engineering GmbH, Managing Director: Erika Unter
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
Re: [PATCH v3 1/3] arm: mvebu: Espressobin: move FDT fixup into a separate function
On Wed, Nov 29, 2023 at 11:11 AM Robert Marko wrote:
>
> Currently, Esspresobin FDT is being fixed up directly in ft_board_setup()
> which makes it hard to add support for any other board to be fixed up.
>
> So, lets just move the FDT fixup code to a separate function and call it
> if compatible matches, there should be no functional change.
>
> Signed-off-by: Robert Marko
> Reviewed-by: Stefan Roese
Hi Stefan,
Since 2024.01 was released, can this series be pulled in now?
Regards,
Robert
>
> ---
> board/Marvell/mvebu_armada-37xx/board.c | 14 +-
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/board/Marvell/mvebu_armada-37xx/board.c
> b/board/Marvell/mvebu_armada-37xx/board.c
> index 04124d8014..1471caa9a6 100644
> --- a/board/Marvell/mvebu_armada-37xx/board.c
> +++ b/board/Marvell/mvebu_armada-37xx/board.c
> @@ -363,18 +363,14 @@ EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
> #endif
>
> #ifdef CONFIG_OF_BOARD_SETUP
> -int ft_board_setup(void *blob, struct bd_info *bd)
> +static int espressobin_fdt_setup(void *blob)
> {
> -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> int ret;
> int spi_off;
> int parts_off;
> int part_off;
>
> /* Fill SPI MTD partitions for Linux kernel on Espressobin */
> - if (!of_machine_is_compatible("globalscale,espressobin"))
> - return 0;
> -
> spi_off = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor");
> if (spi_off < 0)
> return 0;
> @@ -459,6 +455,14 @@ int ft_board_setup(void *blob, struct bd_info *bd)
> return 0;
> }
>
> + return 0;
> +}
> +
> +int ft_board_setup(void *blob, struct bd_info *bd)
> +{
> +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> + if (of_machine_is_compatible("globalscale,espressobin"))
> + return espressobin_fdt_setup(blob);
> #endif
> return 0;
> }
> --
> 2.43.0
>
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
[PATCH v3 3/3] arm: mvebu: eDPU: support new board revision
There is a new eDPU revision that uses Marvell 88E6361 switch onboard.
We can rely on detecting the switch to enable and fixup the Linux DTS
so a single DTS can be used.
There is currently no support for the 88E6361 switch and thus no working
networking in U-Boot, so we disable both ports.
Signed-off-by: Robert Marko
Reviewed-by: Stefan Roese
---
Changes in v3:
* Add check for DM_MDIO
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 13 ++-
arch/arm/dts/armada-3720-eDPU.dts | 47
board/Marvell/mvebu_armada-37xx/board.c | 128 ++
configs/eDPU_defconfig| 1 +
4 files changed, 184 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
index cb02b70e54..c3d450dd83 100644
--- a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
@@ -32,14 +32,17 @@
bootph-all;
};
- {
- /* G.hn does not work without additional configuration */
- status = "disabled";
-};
-
{
fixed-link {
speed = <1000>;
full-duplex;
};
};
+
+/*
+ * eDPU v2 has a MV88E6361 switch on the MDIO bus and U-boot is used
+ * to patch the Linux DTS if its found so enable MDIO by default.
+ */
+ {
+ status = "okay";
+};
diff --git a/arch/arm/dts/armada-3720-eDPU.dts
b/arch/arm/dts/armada-3720-eDPU.dts
index 57fc698e55..d6d37a1f6f 100644
--- a/arch/arm/dts/armada-3720-eDPU.dts
+++ b/arch/arm/dts/armada-3720-eDPU.dts
@@ -12,3 +12,50 @@
{
phy-mode = "2500base-x";
};
+
+/*
+ * External MV88E6361 switch is only available on v2 of the board.
+ * U-Boot will enable the MDIO bus and switch nodes.
+ */
+ {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+
+ /* Actual device is MV88E6361 */
+ switch: switch@0 {
+ compatible = "marvell,mv88e6190";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ ethernet = <>;
+ };
+
+ port@9 {
+ reg = <9>;
+ label = "downlink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ };
+
+ port@a {
+ reg = <10>;
+ label = "uplink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ sfp = <_eth1>;
+ };
+ };
+ };
+};
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index f532486b70..1685b12b84 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -50,6 +51,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* Single-chip mode */
/* Switch Port Registers */
#define MVEBU_SW_LINK_CTRL_REG (1)
+#define MVEBU_SW_PORT_SWITCH_ID(3)
#define MVEBU_SW_PORT_CTRL_REG (4)
#define MVEBU_SW_PORT_BASE_VLAN(6)
@@ -57,6 +59,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define MVEBU_G2_SMI_PHY_CMD_REG (24)
#define MVEBU_G2_SMI_PHY_DATA_REG (25)
+#define SWITCH_88E6361_PRODUCT_NUMBER 0x2610
+
/*
* Memory Controller Registers
*
@@ -73,6 +77,30 @@ DECLARE_GLOBAL_DATA_PTR;
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR3 2
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR4 3
+static bool is_edpu_plus(void)
+{
+ struct udevice *bus;
+ ofnode node;
+ int val;
+
+ if (!CONFIG_IS_ENABLED(DM_MDIO))
+ return false;
+
+ node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
+ if (!ofnode_valid(node) ||
+ uclass_get_device_by_ofnode(UCLASS_MDIO, node, ) ||
+ device_probe(bus)) {
+ printf("Cannot find MDIO bus\n");
+ return -ENODEV;
+ }
+
+ val = dm_mdio_read(bus, 0x0, MDIO_DEVAD_NONE, MVEBU_SW_PORT_SWITCH_ID);
+ if (val == SWITCH_88E6361_PRODUCT_NUMBER)
+
[PATCH v3 2/3] arm: mvebu: Espressobin: move network setup into a separate function
Currently, Esspresobin switch is being setup directly in last_stage_init()
which makes it hard to add support for any other board to be setup.
So, lets just move the switch setup code to a separate function and call it
if compatible matches, there should be no functional change.
Signed-off-by: Robert Marko
Reviewed-by: Stefan Roese
---
Changes in v2:
* Rebase on top of current master and resolve conflicts
board/Marvell/mvebu_armada-37xx/board.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index 1471caa9a6..f532486b70 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -301,14 +301,12 @@ static int mii_multi_chip_mode_write(struct udevice *bus,
int dev_smi_addr,
return 0;
}
-/* Bring-up board-specific network stuff */
-static int last_stage_init(void)
+static int espressobin_last_stage_init(void)
{
struct udevice *bus;
ofnode node;
- if (!CONFIG_IS_ENABLED(DM_MDIO) ||
- !of_machine_is_compatible("globalscale,espressobin"))
+ if (!CONFIG_IS_ENABLED(DM_MDIO))
return 0;
node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
@@ -358,8 +356,17 @@ static int last_stage_init(void)
return 0;
}
-EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
+/* Bring-up board-specific network stuff */
+static int last_stage_init(void)
+{
+
+ if (of_machine_is_compatible("globalscale,espressobin"))
+ return espressobin_last_stage_init();
+
+ return 0;
+}
+EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
#endif
#ifdef CONFIG_OF_BOARD_SETUP
--
2.43.0
[PATCH v3 1/3] arm: mvebu: Espressobin: move FDT fixup into a separate function
Currently, Esspresobin FDT is being fixed up directly in ft_board_setup()
which makes it hard to add support for any other board to be fixed up.
So, lets just move the FDT fixup code to a separate function and call it
if compatible matches, there should be no functional change.
Signed-off-by: Robert Marko
Reviewed-by: Stefan Roese
---
board/Marvell/mvebu_armada-37xx/board.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index 04124d8014..1471caa9a6 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -363,18 +363,14 @@ EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, struct bd_info *bd)
+static int espressobin_fdt_setup(void *blob)
{
-#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
int ret;
int spi_off;
int parts_off;
int part_off;
/* Fill SPI MTD partitions for Linux kernel on Espressobin */
- if (!of_machine_is_compatible("globalscale,espressobin"))
- return 0;
-
spi_off = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor");
if (spi_off < 0)
return 0;
@@ -459,6 +455,14 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
}
+ return 0;
+}
+
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+ if (of_machine_is_compatible("globalscale,espressobin"))
+ return espressobin_fdt_setup(blob);
#endif
return 0;
}
--
2.43.0
Re: [PATCH v2 1/3] arm: mvebu: Espressobin: move FDT fixup into a separate function
On Tue, Nov 28, 2023 at 4:49 PM Stefan Roese wrote:
>
> Hi Robert,
>
> On 11/28/23 16:44, Stefan Roese wrote:
> > Hi Robert,
> >
> > On 11/28/23 11:19, Robert Marko wrote:
> >> On Fri, Oct 20, 2023 at 12:21 PM Robert Marko
> >> wrote:
> >>>
> >>> Currently, Esspresobin FDT is being fixed up directly in
> >>> ft_board_setup()
> >>> which makes it hard to add support for any other board to be fixed up.
> >>>
> >>> So, lets just move the FDT fixup code to a separate function and call it
> >>> if compatible matches, there should be no functional change.
> >>>
> >>> Signed-off-by: Robert Marko
> >>> Reviewed-by: Stefan Roese
> >>
> >> Hi Stefan,
> >>
> >> Is there anything I can do to get this series merged?
> >
> > I just looked at it (again). My recollection was that something was
> > missing here - so I was waiting for a new version. Does not seem to
> > be the case though. So I guess I forgot to pull it (sorry for that)
> > and now with rc3 out it seems a bit too late in the release cycle.
> > I hope you don't mind that it's postponed to the next merge window.
>
> Seems my memory is not that bad after all. A world CI build fails with
> these 3 commits. Could you please have a look?
>
> Completed: 84 total built, 84 newly), duration 1:01:11, rate 0.02
> + ret=100
> + [[ 100 -ne 0 ]]
> + tools/buildman/buildman -o /tmp -seP am33xx at91_kirkwood mvebu omap
> -x siemens
> Summary of current source for 84 boards (2 threads, 1 job per thread)
> aarch64: w+ x240 turris_mox mvebu_ac5_rd eDPU
> mvebu_espressobin-88f3720 uDPU clearfog_gt_8k mvebu_db_armada8k
> mvebu_mcbin-88f8040 mvebu_puzzle-m801-88f8040 mvebu_crb_cn9130
> mvebu_db_cn9130 + mvebu_db-88f3720
> arm: w+ am335x_shc am335x_shc_ict am335x_shc_netboot
> am335x_shc_sdboot brsmarc1 cm_t43 chiliboard am335x_igep003x am335x_sl50
> am43xx_evm_qspiboot am43xx_hs_evm_qspi controlcenterdc db-88f6720
> db-88f6820-gp igep00x0 sniper omap3_beagle omap4_panda omap4_sdp4430
> +aarch64-linux-ld.bfd: board/Marvell/mvebu_armada-37xx/board.o: in
> function `is_edpu_plus':
> +board/Marvell/mvebu_armada-37xx/board.c:94:(.text.last_stage_init+0xb4):
> undefined reference to `dm_mdio_read'
> +make[1]: *** [Makefile:1765: u-boot] Error 139
> +make[1]: *** Deleting file 'u-boot'
> +make: *** [Makefile:177: sub-make] Error 2
Ok, seems like CI doesn't have DM MDIO enabled.
Will fixup today.
I am fine with pulling the fixed patchset after the stable release.
Regards,
Robert
>
>
> Thanks,
> Stefan
>
>
> > Thanks,
> > Stefan
> >
> >> Regards,
> >> Robert
> >>
> >>> ---
> >>> board/Marvell/mvebu_armada-37xx/board.c | 14 +-
> >>> 1 file changed, 9 insertions(+), 5 deletions(-)
> >>>
> >>> diff --git a/board/Marvell/mvebu_armada-37xx/board.c
> >>> b/board/Marvell/mvebu_armada-37xx/board.c
> >>> index 04124d8014..1471caa9a6 100644
> >>> --- a/board/Marvell/mvebu_armada-37xx/board.c
> >>> +++ b/board/Marvell/mvebu_armada-37xx/board.c
> >>> @@ -363,18 +363,14 @@ EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT,
> >>> last_stage_init);
> >>> #endif
> >>>
> >>> #ifdef CONFIG_OF_BOARD_SETUP
> >>> -int ft_board_setup(void *blob, struct bd_info *bd)
> >>> +static int espressobin_fdt_setup(void *blob)
> >>> {
> >>> -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> >>> int ret;
> >>> int spi_off;
> >>> int parts_off;
> >>> int part_off;
> >>>
> >>> /* Fill SPI MTD partitions for Linux kernel on Espressobin */
> >>> - if (!of_machine_is_compatible("globalscale,espressobin"))
> >>> - return 0;
> >>> -
> >>> spi_off = fdt_node_offset_by_compatible(blob, -1,
> >>> "jedec,spi-nor");
> >>> if (spi_off < 0)
> >>> return 0;
> >>> @@ -459,6 +455,14 @@ int ft_board_setup(void *blob, struct bd_info *bd)
> >>> return 0;
> >>> }
> >>>
> >>> + return 0;
> >>> +}
> >>> +
> >>> +int ft_board_setup(void *blob, struct bd_info *bd)
> >>> +{
> >>> +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> >>> + if (of_machine_is_compatible("globalscale,espressobin"))
> >>> + return espressobin_fdt_setup(blob);
> >>> #endif
> >>> return 0;
> >>> }
> >>> --
> >>> 2.41.0
> >>>
> >>
> >>
> >
> > Viele Grüße,
> > Stefan Roese
> >
>
> Viele Grüße,
> Stefan Roese
>
> --
> DENX Software Engineering GmbH, Managing Director: Erika Unter
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
Re: [PATCH v2 1/3] arm: mvebu: Espressobin: move FDT fixup into a separate function
On Fri, Oct 20, 2023 at 12:21 PM Robert Marko wrote:
>
> Currently, Esspresobin FDT is being fixed up directly in ft_board_setup()
> which makes it hard to add support for any other board to be fixed up.
>
> So, lets just move the FDT fixup code to a separate function and call it
> if compatible matches, there should be no functional change.
>
> Signed-off-by: Robert Marko
> Reviewed-by: Stefan Roese
Hi Stefan,
Is there anything I can do to get this series merged?
Regards,
Robert
> ---
> board/Marvell/mvebu_armada-37xx/board.c | 14 +-
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/board/Marvell/mvebu_armada-37xx/board.c
> b/board/Marvell/mvebu_armada-37xx/board.c
> index 04124d8014..1471caa9a6 100644
> --- a/board/Marvell/mvebu_armada-37xx/board.c
> +++ b/board/Marvell/mvebu_armada-37xx/board.c
> @@ -363,18 +363,14 @@ EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
> #endif
>
> #ifdef CONFIG_OF_BOARD_SETUP
> -int ft_board_setup(void *blob, struct bd_info *bd)
> +static int espressobin_fdt_setup(void *blob)
> {
> -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> int ret;
> int spi_off;
> int parts_off;
> int part_off;
>
> /* Fill SPI MTD partitions for Linux kernel on Espressobin */
> - if (!of_machine_is_compatible("globalscale,espressobin"))
> - return 0;
> -
> spi_off = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor");
> if (spi_off < 0)
> return 0;
> @@ -459,6 +455,14 @@ int ft_board_setup(void *blob, struct bd_info *bd)
> return 0;
> }
>
> + return 0;
> +}
> +
> +int ft_board_setup(void *blob, struct bd_info *bd)
> +{
> +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
> + if (of_machine_is_compatible("globalscale,espressobin"))
> + return espressobin_fdt_setup(blob);
> #endif
> return 0;
> }
> --
> 2.41.0
>
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
Re: [PATCH 2/3] arm: mvebu: Espressobin: move network setup into a separate function
On Fri, Oct 20, 2023 at 8:46 AM Stefan Roese wrote:
>
> Hi Robert,
>
> On 9/18/23 08:47, Stefan Roese wrote:
> > On 9/14/23 12:16, Robert Marko wrote:
> >> Currently, Esspresobin switch is being setup directly in
> >> last_stage_init()
> >> which makes it hard to add support for any other board to be setup.
> >>
> >> So, lets just move the switch setup code to a separate function and
> >> call it
> >> if compatible matches, there should be no functional change.
> >>
> >> Signed-off-by: Robert Marko
> >
> > Reviewed-by: Stefan Roese
>
> This patch and the next one do not apply on latest master. Could you
> please re-spin the patch series?
Done.
Regards,
Robert
>
> Thanks,
> Stefan
>
> > Thanks,
> > Stefan
> >
> >> ---
> >> board/Marvell/mvebu_armada-37xx/board.c | 16 +++-
> >> 1 file changed, 11 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/board/Marvell/mvebu_armada-37xx/board.c
> >> b/board/Marvell/mvebu_armada-37xx/board.c
> >> index da325e8c75..6527155c6e 100644
> >> --- a/board/Marvell/mvebu_armada-37xx/board.c
> >> +++ b/board/Marvell/mvebu_armada-37xx/board.c
> >> @@ -300,15 +300,11 @@ static int mii_multi_chip_mode_write(struct
> >> udevice *bus, int dev_smi_addr,
> >> return 0;
> >> }
> >> -/* Bring-up board-specific network stuff */
> >> -int last_stage_init(void)
> >> +static int espressobin_last_stage_init(void)
> >> {
> >> struct udevice *bus;
> >> ofnode node;
> >> -if (!of_machine_is_compatible("globalscale,espressobin"))
> >> -return 0;
> >> -
> >> node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
> >> if (!ofnode_valid(node) ||
> >> uclass_get_device_by_ofnode(UCLASS_MDIO, node, ) ||
> >> @@ -356,6 +352,16 @@ int last_stage_init(void)
> >> return 0;
> >> }
> >> +
> >> +/* Bring-up board-specific network stuff */
> >> +int last_stage_init(void)
> >> +{
> >> +
> >> +if (of_machine_is_compatible("globalscale,espressobin"))
> >> +return espressobin_last_stage_init();
> >> +
> >> +return 0;
> >> +}
> >> #endif
> >> #ifdef CONFIG_OF_BOARD_SETUP
> >
> > Viele Grüße,
> > Stefan Roese
> >
>
> Viele Grüße,
> Stefan Roese
>
> --
> DENX Software Engineering GmbH, Managing Director: Erika Unter
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
[PATCH v2 3/3] arm: mvebu: eDPU: support new board revision
There is a new eDPU revision that uses Marvell 88E6361 switch onboard.
We can rely on detecting the switch to enable and fixup the Linux DTS
so a single DTS can be used.
There is currently no support for the 88E6361 switch and thus no working
networking in U-Boot, so we disable both ports.
Signed-off-by: Robert Marko
Reviewed-by: Stefan Roese
---
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 13 ++-
arch/arm/dts/armada-3720-eDPU.dts | 47
board/Marvell/mvebu_armada-37xx/board.c | 125 ++
configs/eDPU_defconfig| 1 +
4 files changed, 181 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
index cb02b70e54..c3d450dd83 100644
--- a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
@@ -32,14 +32,17 @@
bootph-all;
};
- {
- /* G.hn does not work without additional configuration */
- status = "disabled";
-};
-
{
fixed-link {
speed = <1000>;
full-duplex;
};
};
+
+/*
+ * eDPU v2 has a MV88E6361 switch on the MDIO bus and U-boot is used
+ * to patch the Linux DTS if its found so enable MDIO by default.
+ */
+ {
+ status = "okay";
+};
diff --git a/arch/arm/dts/armada-3720-eDPU.dts
b/arch/arm/dts/armada-3720-eDPU.dts
index 57fc698e55..d6d37a1f6f 100644
--- a/arch/arm/dts/armada-3720-eDPU.dts
+++ b/arch/arm/dts/armada-3720-eDPU.dts
@@ -12,3 +12,50 @@
{
phy-mode = "2500base-x";
};
+
+/*
+ * External MV88E6361 switch is only available on v2 of the board.
+ * U-Boot will enable the MDIO bus and switch nodes.
+ */
+ {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+
+ /* Actual device is MV88E6361 */
+ switch: switch@0 {
+ compatible = "marvell,mv88e6190";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ ethernet = <>;
+ };
+
+ port@9 {
+ reg = <9>;
+ label = "downlink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ };
+
+ port@a {
+ reg = <10>;
+ label = "uplink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ sfp = <_eth1>;
+ };
+ };
+ };
+};
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index f532486b70..aeddff7468 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -50,6 +51,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* Single-chip mode */
/* Switch Port Registers */
#define MVEBU_SW_LINK_CTRL_REG (1)
+#define MVEBU_SW_PORT_SWITCH_ID(3)
#define MVEBU_SW_PORT_CTRL_REG (4)
#define MVEBU_SW_PORT_BASE_VLAN(6)
@@ -57,6 +59,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define MVEBU_G2_SMI_PHY_CMD_REG (24)
#define MVEBU_G2_SMI_PHY_DATA_REG (25)
+#define SWITCH_88E6361_PRODUCT_NUMBER 0x2610
+
/*
* Memory Controller Registers
*
@@ -73,6 +77,27 @@ DECLARE_GLOBAL_DATA_PTR;
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR3 2
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR4 3
+static bool is_edpu_plus(void)
+{
+ struct udevice *bus;
+ ofnode node;
+ int val;
+
+ node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
+ if (!ofnode_valid(node) ||
+ uclass_get_device_by_ofnode(UCLASS_MDIO, node, ) ||
+ device_probe(bus)) {
+ printf("Cannot find MDIO bus\n");
+ return -ENODEV;
+ }
+
+ val = dm_mdio_read(bus, 0x0, MDIO_DEVAD_NONE, MVEBU_SW_PORT_SWITCH_ID);
+ if (val == SWITCH_88E6361_PRODUCT_NUMBER)
+ return true;
+ else
+ return false;
+}
+
int board_early_init_f(void)
{
return 0;
@@ -357,6
[PATCH v2 2/3] arm: mvebu: Espressobin: move network setup into a separate function
Currently, Esspresobin switch is being setup directly in last_stage_init()
which makes it hard to add support for any other board to be setup.
So, lets just move the switch setup code to a separate function and call it
if compatible matches, there should be no functional change.
Signed-off-by: Robert Marko
Reviewed-by: Stefan Roese
---
Changes in v2:
* Rebase on top of current master and resolve conflicts
board/Marvell/mvebu_armada-37xx/board.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index 1471caa9a6..f532486b70 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -301,14 +301,12 @@ static int mii_multi_chip_mode_write(struct udevice *bus,
int dev_smi_addr,
return 0;
}
-/* Bring-up board-specific network stuff */
-static int last_stage_init(void)
+static int espressobin_last_stage_init(void)
{
struct udevice *bus;
ofnode node;
- if (!CONFIG_IS_ENABLED(DM_MDIO) ||
- !of_machine_is_compatible("globalscale,espressobin"))
+ if (!CONFIG_IS_ENABLED(DM_MDIO))
return 0;
node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
@@ -358,8 +356,17 @@ static int last_stage_init(void)
return 0;
}
-EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
+/* Bring-up board-specific network stuff */
+static int last_stage_init(void)
+{
+
+ if (of_machine_is_compatible("globalscale,espressobin"))
+ return espressobin_last_stage_init();
+
+ return 0;
+}
+EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
#endif
#ifdef CONFIG_OF_BOARD_SETUP
--
2.41.0
[PATCH v2 1/3] arm: mvebu: Espressobin: move FDT fixup into a separate function
Currently, Esspresobin FDT is being fixed up directly in ft_board_setup()
which makes it hard to add support for any other board to be fixed up.
So, lets just move the FDT fixup code to a separate function and call it
if compatible matches, there should be no functional change.
Signed-off-by: Robert Marko
Reviewed-by: Stefan Roese
---
board/Marvell/mvebu_armada-37xx/board.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index 04124d8014..1471caa9a6 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -363,18 +363,14 @@ EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, struct bd_info *bd)
+static int espressobin_fdt_setup(void *blob)
{
-#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
int ret;
int spi_off;
int parts_off;
int part_off;
/* Fill SPI MTD partitions for Linux kernel on Espressobin */
- if (!of_machine_is_compatible("globalscale,espressobin"))
- return 0;
-
spi_off = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor");
if (spi_off < 0)
return 0;
@@ -459,6 +455,14 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
}
+ return 0;
+}
+
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+ if (of_machine_is_compatible("globalscale,espressobin"))
+ return espressobin_fdt_setup(blob);
#endif
return 0;
}
--
2.41.0
Re: [PATCH] kbuild: use which $(DTC) as a dependency
On 17. 10. 2023. 12:44, Richard Marko wrote: If we try to build using external dtc using make DTC=dtc we get a confusing error like make[2]: *** No rule to make target 'arch/x86/dts/bayleybay.dtb', needed by 'dtbs'. Stop. Workaround is to use make DTC=$( which dtc ) Can you please use command -v dtc instead as which is not part of POSIX? Regards, Robert which gives make a full path, so the dependency is satisfied. This was introduced by commit d50af66 kbuild: add dtc as dependency on .dtb files and we extend it so it calls which automatically (similar to scripts/dtc-version.sh) Signed-off-by: Richard Marko --- scripts/Makefile.lib | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 8dc6ec82cd..04fc9b0752 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -351,7 +351,7 @@ endif dtsi_include_list_deps = $(addprefix $(obj)/,$(subst $(quote),,$(dtsi_include_list))) -$(obj)/%.dtb: $(src)/%.dts $(DTC) $(dtsi_include_list_deps) FORCE +$(obj)/%.dtb: $(src)/%.dts $(shell which $(DTC)) $(dtsi_include_list_deps) FORCE $(call if_changed_dep,dtc) pre-tmp = $(subst $(comma),_,$(dot-target).pre.tmp)
[PATCH 3/3] arm: mvebu: eDPU: support new board revision
There is a new eDPU revision that uses Marvell 88E6361 switch onboard.
We can rely on detecting the switch to enable and fixup the Linux DTS
so a single DTS can be used.
There is currently no support for the 88E6361 switch and thus no working
networking in U-Boot, so we disable both ports.
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 13 ++-
arch/arm/dts/armada-3720-eDPU.dts | 47
board/Marvell/mvebu_armada-37xx/board.c | 125 ++
configs/eDPU_defconfig| 2 +
4 files changed, 182 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
index cb02b70e54..c3d450dd83 100644
--- a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
@@ -32,14 +32,17 @@
bootph-all;
};
- {
- /* G.hn does not work without additional configuration */
- status = "disabled";
-};
-
{
fixed-link {
speed = <1000>;
full-duplex;
};
};
+
+/*
+ * eDPU v2 has a MV88E6361 switch on the MDIO bus and U-boot is used
+ * to patch the Linux DTS if its found so enable MDIO by default.
+ */
+ {
+ status = "okay";
+};
diff --git a/arch/arm/dts/armada-3720-eDPU.dts
b/arch/arm/dts/armada-3720-eDPU.dts
index 57fc698e55..d6d37a1f6f 100644
--- a/arch/arm/dts/armada-3720-eDPU.dts
+++ b/arch/arm/dts/armada-3720-eDPU.dts
@@ -12,3 +12,50 @@
{
phy-mode = "2500base-x";
};
+
+/*
+ * External MV88E6361 switch is only available on v2 of the board.
+ * U-Boot will enable the MDIO bus and switch nodes.
+ */
+ {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <_pins>;
+
+ /* Actual device is MV88E6361 */
+ switch: switch@0 {
+ compatible = "marvell,mv88e6190";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ ethernet = <>;
+ };
+
+ port@9 {
+ reg = <9>;
+ label = "downlink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ };
+
+ port@a {
+ reg = <10>;
+ label = "uplink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ sfp = <_eth1>;
+ };
+ };
+ };
+};
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index 6527155c6e..6d633e94f3 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -49,6 +50,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* Single-chip mode */
/* Switch Port Registers */
#define MVEBU_SW_LINK_CTRL_REG (1)
+#define MVEBU_SW_PORT_SWITCH_ID(3)
#define MVEBU_SW_PORT_CTRL_REG (4)
#define MVEBU_SW_PORT_BASE_VLAN(6)
@@ -56,6 +58,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define MVEBU_G2_SMI_PHY_CMD_REG (24)
#define MVEBU_G2_SMI_PHY_DATA_REG (25)
+#define SWITCH_88E6361_PRODUCT_NUMBER 0x2610
+
/*
* Memory Controller Registers
*
@@ -72,6 +76,27 @@ DECLARE_GLOBAL_DATA_PTR;
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR3 2
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR4 3
+static bool is_edpu_plus(void)
+{
+ struct udevice *bus;
+ ofnode node;
+ int val;
+
+ node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
+ if (!ofnode_valid(node) ||
+ uclass_get_device_by_ofnode(UCLASS_MDIO, node, ) ||
+ device_probe(bus)) {
+ printf("Cannot find MDIO bus\n");
+ return -ENODEV;
+ }
+
+ val = dm_mdio_read(bus, 0x0, MDIO_DEVAD_NONE, MVEBU_SW_PORT_SWITCH_ID);
+ if (val == SWITCH_88E6361_PRODUCT_NUMBER)
+ return true;
+ else
+ return false;
+}
+
int board_early_init_f(void)
{
return 0;
@@ -353,6 +378,41 @@
[PATCH 2/3] arm: mvebu: Espressobin: move network setup into a separate function
Currently, Esspresobin switch is being setup directly in last_stage_init()
which makes it hard to add support for any other board to be setup.
So, lets just move the switch setup code to a separate function and call it
if compatible matches, there should be no functional change.
Signed-off-by: Robert Marko
---
board/Marvell/mvebu_armada-37xx/board.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index da325e8c75..6527155c6e 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -300,15 +300,11 @@ static int mii_multi_chip_mode_write(struct udevice *bus,
int dev_smi_addr,
return 0;
}
-/* Bring-up board-specific network stuff */
-int last_stage_init(void)
+static int espressobin_last_stage_init(void)
{
struct udevice *bus;
ofnode node;
- if (!of_machine_is_compatible("globalscale,espressobin"))
- return 0;
-
node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
if (!ofnode_valid(node) ||
uclass_get_device_by_ofnode(UCLASS_MDIO, node, ) ||
@@ -356,6 +352,16 @@ int last_stage_init(void)
return 0;
}
+
+/* Bring-up board-specific network stuff */
+int last_stage_init(void)
+{
+
+ if (of_machine_is_compatible("globalscale,espressobin"))
+ return espressobin_last_stage_init();
+
+ return 0;
+}
#endif
#ifdef CONFIG_OF_BOARD_SETUP
--
2.41.0
[PATCH 1/3] arm: mvebu: Espressobin: move FDT fixup into a separate function
Currently, Esspresobin FDT is being fixed up directly in ft_board_setup()
which makes it hard to add support for any other board to be fixed up.
So, lets just move the FDT fixup code to a separate function and call it
if compatible matches, there should be no functional change.
Signed-off-by: Robert Marko
---
board/Marvell/mvebu_armada-37xx/board.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index 3ab6e8873d..da325e8c75 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -359,18 +359,14 @@ int last_stage_init(void)
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, struct bd_info *bd)
+static int espressobin_fdt_setup(void *blob)
{
-#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
int ret;
int spi_off;
int parts_off;
int part_off;
/* Fill SPI MTD partitions for Linux kernel on Espressobin */
- if (!of_machine_is_compatible("globalscale,espressobin"))
- return 0;
-
spi_off = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor");
if (spi_off < 0)
return 0;
@@ -455,6 +451,14 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
}
+ return 0;
+}
+
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+ if (of_machine_is_compatible("globalscale,espressobin"))
+ return espressobin_fdt_setup(blob);
#endif
return 0;
}
--
2.41.0
[PATCH 2/2] net: mv88e6xxx: add Clause 45 support
Marvell LinkStreet switches support Clause 45 MDIO on the internal bus.
C45 read or writes require the register address to be written first to
the SMI PHY Data register, and then a special C45 Write Address Register
OP is used on the SMI PHY Register before making a C45 Read Data Register
OP and being able to actually read the register.
Signed-off-by: Robert Marko
---
drivers/net/mv88e6xxx.c | 69 +++--
1 file changed, 67 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mv88e6xxx.c b/drivers/net/mv88e6xxx.c
index deb72772d19..b9ee093c3af 100644
--- a/drivers/net/mv88e6xxx.c
+++ b/drivers/net/mv88e6xxx.c
@@ -114,6 +114,9 @@
#define SMI_CMD_OP_MASKGENMASK(11, 10)
#define SMI_CMD_CLAUSE_22_OP_WRITE 0x1
#define SMI_CMD_CLAUSE_22_OP_READ 0x2
+#define SMI_CMD_CLAUSE_45_OP_WRITE_ADDR0x0
+#define SMI_CMD_CLAUSE_45_OP_WRITE 0x1
+#define SMI_CMD_CLAUSE_45_OP_READ 0x3
#define SMI_CMD_ADDR_MASK GENMASK(9, 5)
#define SMI_CMD_REG_MASK GENMASK(4, 0)
@@ -125,6 +128,18 @@
(SMI_BUSY | SMI_CMD_CLAUSE_22 | FIELD_PREP(SMI_CMD_OP_MASK,
SMI_CMD_CLAUSE_22_OP_WRITE)) | \
(FIELD_PREP(SMI_CMD_ADDR_MASK, addr)) | \
(FIELD_PREP(SMI_CMD_REG_MASK, reg))
+#define SMI_CMD_SET_C45_ADDR(phyad, devad) \
+ (SMI_BUSY | FIELD_PREP(SMI_CMD_OP_MASK,
SMI_CMD_CLAUSE_45_OP_WRITE_ADDR)) | \
+ (FIELD_PREP(SMI_CMD_ADDR_MASK, phyad)) | \
+ (FIELD_PREP(SMI_CMD_REG_MASK, devad))
+#define SMI_CMD_READ_C45(phyad, devad) \
+ (SMI_BUSY | FIELD_PREP(SMI_CMD_OP_MASK, SMI_CMD_CLAUSE_45_OP_READ)) | \
+ (FIELD_PREP(SMI_CMD_ADDR_MASK, phyad)) | \
+ (FIELD_PREP(SMI_CMD_REG_MASK, devad))
+#define SMI_CMD_WRITE_C45(phyad, devad) \
+ (SMI_BUSY | FIELD_PREP(SMI_CMD_OP_MASK, SMI_CMD_CLAUSE_45_OP_WRITE)) | \
+ (FIELD_PREP(SMI_CMD_ADDR_MASK, phyad)) | \
+ (FIELD_PREP(SMI_CMD_REG_MASK, devad))
/* ID register values for different switch models */
#define PORT_SWITCH_ID_60200x0200
@@ -273,12 +288,37 @@ static int mv88e6xxx_phy_wait(struct udevice *dev)
static int mv88e6xxx_phy_read_indirect(struct udevice *dev, int phyad, int
devad, int reg)
{
struct mv88e6xxx_priv *priv = dev_get_priv(dev);
+ u16 smi_cmd;
int res;
+ if (devad >= 0) {
+ /*
+* For C45 we need to write the register address into the
+* PHY Data register first and then call the Write Address
+* Register OP in the PHY command register.
+*/
+ res = mv88e6xxx_reg_write(dev, priv->global2,
+ GLOBAL2_REG_PHY_DATA,
+ reg);
+
+ res = mv88e6xxx_reg_write(dev, priv->global2,
+ GLOBAL2_REG_PHY_CMD,
+ SMI_CMD_SET_C45_ADDR(phyad, devad));
+
+ /* Wait for busy bit to clear */
+ res = mv88e6xxx_phy_wait(dev);
+ if (res < 0)
+ return res;
+
+ /* Set the actual C45 or C22 OP-s */
+ smi_cmd = SMI_CMD_READ_C45(phyad, devad);
+ } else
+ smi_cmd = SMI_CMD_READ(phyad, reg);
+
/* Issue command to read */
res = mv88e6xxx_reg_write(dev, priv->global2,
GLOBAL2_REG_PHY_CMD,
- SMI_CMD_READ(phyad, reg));
+ smi_cmd);
/* Wait for data to be read */
res = mv88e6xxx_phy_wait(dev);
@@ -294,8 +334,33 @@ static int mv88e6xxx_phy_write_indirect(struct udevice
*dev, int phyad,
int devad, int reg, u16 data)
{
struct mv88e6xxx_priv *priv = dev_get_priv(dev);
+ u16 smi_cmd;
int res;
+ if (devad >= 0) {
+ /*
+* For C45 we need to write the register address into the
+* PHY Data register first and then call the Write Address
+* Register OP in the PHY command register.
+*/
+ res = mv88e6xxx_reg_write(dev, priv->global2,
+ GLOBAL2_REG_PHY_DATA,
+ reg);
+
+ res = mv88e6xxx_reg_write(dev, priv->global2,
+ GLOBAL2_REG_PHY_CMD,
+ SMI_CMD_SET_C45_ADDR(phyad, devad));
+
+ /* Wait for busy bit to clear */
+ res = mv88e6xxx_phy_wait(dev);
+ if (res < 0)
+ return res;
+
+ /* Set the actual C45 or C22 OP-s */
+ smi_cmd = SMI_CMD_WRITE_C45(phyad, devad);
+ } else
+ smi_cmd = SMI_CMD_WRITE(phyad, reg);
+
/* Set the d
[PATCH 1/2] net: mv88e6xxx: use generic bitfield macros for MDIO
Driver is currently defining the mask and bit shifting itself, there is no need for that as U-Boot has generic bitfield macros that help us achieve the same result but in a cleaner way. Signed-off-by: Robert Marko --- drivers/net/mv88e6xxx.c | 25 + 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/drivers/net/mv88e6xxx.c b/drivers/net/mv88e6xxx.c index 64e860e324d..deb72772d19 100644 --- a/drivers/net/mv88e6xxx.c +++ b/drivers/net/mv88e6xxx.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -110,20 +111,20 @@ */ #define SMI_BUSY BIT(15) #define SMI_CMD_CLAUSE_22 BIT(12) -#define SMI_CMD_CLAUSE_22_OP_READ (2 << 10) -#define SMI_CMD_CLAUSE_22_OP_WRITE (1 << 10) -#define SMI_CMD_ADDR_SHIFT 5 -#define SMI_CMD_ADDR_MASK 0x1f -#define SMI_CMD_REG_SHIFT 0 -#define SMI_CMD_REG_MASK 0x1f +#define SMI_CMD_OP_MASKGENMASK(11, 10) +#define SMI_CMD_CLAUSE_22_OP_WRITE 0x1 +#define SMI_CMD_CLAUSE_22_OP_READ 0x2 + +#define SMI_CMD_ADDR_MASK GENMASK(9, 5) +#define SMI_CMD_REG_MASK GENMASK(4, 0) #define SMI_CMD_READ(addr, reg) \ - (SMI_BUSY | SMI_CMD_CLAUSE_22 | SMI_CMD_CLAUSE_22_OP_READ) | \ - (((addr) & SMI_CMD_ADDR_MASK) << SMI_CMD_ADDR_SHIFT) | \ - (((reg) & SMI_CMD_REG_MASK) << SMI_CMD_REG_SHIFT) + (SMI_BUSY | SMI_CMD_CLAUSE_22 | FIELD_PREP(SMI_CMD_OP_MASK, SMI_CMD_CLAUSE_22_OP_READ)) | \ + (FIELD_PREP(SMI_CMD_ADDR_MASK, addr)) | \ + (FIELD_PREP(SMI_CMD_REG_MASK, reg)) #define SMI_CMD_WRITE(addr, reg) \ - (SMI_BUSY | SMI_CMD_CLAUSE_22 | SMI_CMD_CLAUSE_22_OP_WRITE) | \ - (((addr) & SMI_CMD_ADDR_MASK) << SMI_CMD_ADDR_SHIFT) | \ - (((reg) & SMI_CMD_REG_MASK) << SMI_CMD_REG_SHIFT) + (SMI_BUSY | SMI_CMD_CLAUSE_22 | FIELD_PREP(SMI_CMD_OP_MASK, SMI_CMD_CLAUSE_22_OP_WRITE)) | \ + (FIELD_PREP(SMI_CMD_ADDR_MASK, addr)) | \ + (FIELD_PREP(SMI_CMD_REG_MASK, reg)) /* ID register values for different switch models */ #define PORT_SWITCH_ID_60200x0200 -- 2.41.0
Re: [PATCH] arm64: a37xx: pinctrl: probe after binding
On Mon, Feb 13, 2023 at 12:36 AM Simon Glass wrote:
>
> Hi,
>
> On Thu, 19 Jan 2023 at 00:00, Stefan Roese wrote:
> >
> > On 1/17/23 15:08, Robert Marko wrote:
> > > Currently, pinctrl drivers are getting probed during post-bind, however
> > > that is being reverted, and on A37XX pinctrl driver is the one that
> > > registers the GPIO driver during the probe.
> > >
> > > So, if the pinctrl driver doesn't get probed GPIO-s won't get registered
> > > and thus they cannot be used.
> > >
> > > This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s
> > > and without them being registered networking won't work as it only has
> > > one SFP slot and the TX disable GPIO is on the SB controller.
> > >
> > > So, lets just add a flag only to A37XX driver to probe after binding
> > > in order for the GPIO driver to always get registered.
> > >
> > > Signed-off-by: Robert Marko
> >
> > Reviewed--by: Stefan Roese
> >
> > Thanks,
> > Stefan
> >
> > > ---
> > > drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 14 ++
> > > 1 file changed, 14 insertions(+)
> > >
> > > diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> > > b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> > > index 25fbe39abd1..1be6252227d 100644
> > > --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> > > +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> > > @@ -745,6 +745,19 @@ static int armada_37xx_pinctrl_probe(struct udevice
> > > *dev)
> > > return 0;
> > > }
> > >
> > > +static int armada_37xx_pinctrl_bind(struct udevice *dev)
> > > +{
> > > + /*
> > > + * Make sure that the pinctrl driver gets probed after binding
> > > + * as on A37XX the pinctrl driver is the one that is also
> > > + * registering the GPIO one during probe, so if its not probed
> > > + * GPIO-s are not registered as well.
> > > + */
> > > + dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
> > > +
> > > + return 0;
> > > +}
> > > +
> > > static const struct udevice_id armada_37xx_pinctrl_of_match[] = {
> > > {
> > > .compatible = "marvell,armada3710-sb-pinctrl",
> > > @@ -762,6 +775,7 @@ U_BOOT_DRIVER(armada_37xx_pinctrl) = {
> > > .id = UCLASS_PINCTRL,
> > > .of_match = of_match_ptr(armada_37xx_pinctrl_of_match),
> > > .probe = armada_37xx_pinctrl_probe,
> > > + .bind = armada_37xx_pinctrl_bind,
> > > .priv_auto = sizeof(struct armada_37xx_pinctrl),
> > > .ops = _37xx_pinctrl_ops,
> > > };
> >
>
> This is OK if you really want to do this. Is it not possible to do the
> bind of the GPIO devices in the pinctrl bind() handler, as is done by
> other SoCs? Why do we need to probe the pinctrl driver first?
Because on A37xx the pinctrl driver needs to be probed before the GPIO
one can be probed as GPIO driver is using internal data that is filled in
by the pinctrl driver.
Regards,
Robert
>
> Reviewed-by: Simon Glass
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
[PATCH] arm64: a37xx: pinctrl: probe after binding
Currently, pinctrl drivers are getting probed during post-bind, however
that is being reverted, and on A37XX pinctrl driver is the one that
registers the GPIO driver during the probe.
So, if the pinctrl driver doesn't get probed GPIO-s won't get registered
and thus they cannot be used.
This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s
and without them being registered networking won't work as it only has
one SFP slot and the TX disable GPIO is on the SB controller.
So, lets just add a flag only to A37XX driver to probe after binding
in order for the GPIO driver to always get registered.
Signed-off-by: Robert Marko
---
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 25fbe39abd1..1be6252227d 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -745,6 +745,19 @@ static int armada_37xx_pinctrl_probe(struct udevice *dev)
return 0;
}
+static int armada_37xx_pinctrl_bind(struct udevice *dev)
+{
+ /*
+* Make sure that the pinctrl driver gets probed after binding
+* as on A37XX the pinctrl driver is the one that is also
+* registering the GPIO one during probe, so if its not probed
+* GPIO-s are not registered as well.
+*/
+ dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
+
+ return 0;
+}
+
static const struct udevice_id armada_37xx_pinctrl_of_match[] = {
{
.compatible = "marvell,armada3710-sb-pinctrl",
@@ -762,6 +775,7 @@ U_BOOT_DRIVER(armada_37xx_pinctrl) = {
.id = UCLASS_PINCTRL,
.of_match = of_match_ptr(armada_37xx_pinctrl_of_match),
.probe = armada_37xx_pinctrl_probe,
+ .bind = armada_37xx_pinctrl_bind,
.priv_auto = sizeof(struct armada_37xx_pinctrl),
.ops = _37xx_pinctrl_ops,
};
--
2.39.0
Re: [PATCH] dm: pinctrl: Revert "pinctrl: probe pinctrl drivers during post-bind"
On Fri, Jan 13, 2023 at 12:43 AM Simon Glass wrote: > > Hi, > > On Tue, 3 Jan 2023 at 10:05, Simon Glass wrote: > > > > Hi Robert, > > > > On Fri, 30 Dec 2022 at 13:26, Robert Marko wrote: > > > > > > > > > > > > On Fri, Dec 30, 2022 at 8:02 PM Simon Glass wrote: > > >> > > >> Hi Pali, > > >> > > >> On Fri, 30 Dec 2022 at 12:02, Pali Rohár wrote: > > >> > > > >> > On Friday 30 December 2022 11:47:29 Simon Glass wrote: > > >> > > Hi Pali, > > >> > > > > >> > > On Fri, 30 Dec 2022 at 10:13, Pali Rohár wrote: > > >> > > > > > >> > > > On Friday 30 December 2022 10:00:11 Simon Glass wrote: > > >> > > > > Hi Pali, > > >> > > > > > > >> > > > > On Fri, 30 Dec 2022 at 09:53, Pali Rohár wrote: > > >> > > > > > > > >> > > > > > On Friday 30 December 2022 09:30:27 Simon Glass wrote: > > >> > > > > > > Hi Pali, > > >> > > > > > > > > >> > > > > > > On Wed, 21 Dec 2022 at 17:02, Pali Rohár > > >> > > > > > > wrote: > > >> > > > > > > > > > >> > > > > > > > On Wednesday 21 December 2022 07:27:39 Simon Glass wrote: > > >> > > > > > > > > This breaks chromebook_coral and it is also not how > > >> > > > > > > > > things should work. If > > >> > > > > > > > > a board needs to bind GPIOs as part of a pinctrl driver > > >> > > > > > > > > this can be done > > >> > > > > > > > > during the bind step, if needed. > > >> > > > > > > > > > > >> > > > > > > > > We cannot probe pinctrl devices when binding as a rule, > > >> > > > > > > > > since it cannot be > > >> > > > > > > > > supported on some platforms. > > >> > > > > > > > > > > >> > > > > > > > > The bind and probe steps are separate in U-Boot and they > > >> > > > > > > > > should remain > > >> > > > > > > > > separate. > > >> > > > > > > > > > > >> > > > > > > > > This reverts commit > > >> > > > > > > > > f9ec791b5e24378b71590877499f8683d5f54dac. > > >> > > > > > > > > > >> > > > > > > > Unfortunately reverting this patch would break other > > >> > > > > > > > devices, mostly > > >> > > > > > > > A3720 based where pinctrl driver acts also as gpio driver. > > >> > > > > > > > Because no > > >> > > > > > > > other caller then register gpio driver and so other > > >> > > > > > > > drivers which parses > > >> > > > > > > > gpios from DT (which belongs to that gpio driver) will > > >> > > > > > > > fail during > > >> > > > > > > > probe. > > >> > > > > > > > > >> > > > > > > That is something to be sorted out for that platform. You > > >> > > > > > > can bind > > >> > > > > > > GPIO devices in the pinctrl driver's bind() method as other > > >> > > > > > > SoCs do. > > >> > > > > > > Even better, the device tree typically has that info in it, > > >> > > > > > > i.e. GPIO > > >> > > > > > > subnodes within the pinctrl node. > > >> > > > > > > > > >> > > > > > > Probing pinctrl in a bind function is unfortunately just > > >> > > > > > > wrong. It > > >> > > > > > > will cause all sorts of problems, and perhaps already has. > > >> > > > > > > > >> > > > > > Ok, so it means that > > >> > > > > > drivers/pinctrl/mvebu/pinctrl-armada-37xx.c needs > > >> > > > > >
Re: [PATCH] dm: pinctrl: Revert "pinctrl: probe pinctrl drivers during post-bind"
> > > > remove a lot of ugly code in the driver. This Linux-centric nature
> of
> > > > > device tree bindings really is infuriating:
> > > >
> > > > All a3720 DTS files are 1:1 copied from Linux. So if problem is in
> DTS
> > > > file then it should be discussed with Linux dt/mvebu maintainers.
> This
> > > > year I fixed U-Boot code to handle Linux a3720 DTS files and then
> copied
> > > > DTS files from Linux. So it is not a good idea to have again
> different
> > > > DTS file for u-boot and different for kernel.
>
> That was not my suggestion. I would simply like the bindings in Linux
> to be more explicit, rather than having driver code manually written
> to do what the device tree is supposed to do.
>
> > > >
> > > > > /* FIXME: Use livtree and check the result of device_bind() below
> */
> > > > > fdt_for_each_subnode(subnode, blob, node) {
> > > > > if (fdtdec_get_bool(blob, subnode, "gpio-controller")) {
> > > > > ret = 0;
> > > > > break;
> > > > > }
> > > > > };
> > > > > if (ret)
> > > > >return ret;
> > > > >
> > > > >
> > > > > Failing that it just needs a bind() method that calls
> > > > > armada_37xx_gpiochip_register()
> > > > >
> > > > > Regards,
> > > > > Simon
> > > >
> > > > Seems that it is not such simple. armada_37xx_gpiochip_register()
> > > > depends on initialized and bound pinctrl part of driver. So before
> > > > binding gpio you need to bind pinctrl as they share internal
> structures.
> > >
> > > Where are you seeing that? From what I can tell it just binds the GPIO
> > > driver. It doesn't probe it. So long as you bind the GPIO driver in
> > > armada_37xx_pinctrl_bind() it should be equivalent.
> >
> > armada_37xx_gpiochip_register() calls device_bind() for
> > _37xx_gpio_driver which probe method armada_37xx_gpio_probe() and
> > ops _37xx_gpio_ops callbacks access a37xx pinctrl internal
> > structures.
>
> Yes but probing is different from binding, please see [1]
>
> >
> > So I'm not sure if there is an issue or not. But for sure a37xx gpio
> > must be probed after a37xx pinctrl is probed because a37xx pinctrl probe
> > function fills internal a37xx pinctrl strucutre used by a37xx gpio probe
> > function.
>
> Yes, children are probed after parents, as in docs:
>
> "All parent devices are probed. It is not possible to activate a
> device unless its predecessors (all the way up to the root device) are
> activated. This means (for example) that an I2C driver will require
> that its bus be activated."
>
Hi Simon,
Finally, catching up with emails.
The issue here is that there is nothing probing the pinctrl driver as no
pinmuxing on that
controller is being done and so GPIO doesn't get probed as well which in
turn is breaking
networking as Methode eDPU board only has SFP ports and TX disable remains
active since
the networking driver cannot toggle the GPIO as it's not registered.
Other than inventing a pinmux node and attaching it so that controller gets
probed I dont see
how to solve it within the current U-boot scope.
Regards,
Robert
>
> >
> > > And don't forget the root cause of this whole problem is Linux-centrix
> > > DT bindings.
>
> Regards,
> Simon
>
> [1]
> https://u-boot.readthedocs.io/en/latest/develop/driver-model/design.html#driver-lifecycle
>
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: <http://goog_1951392730>robert.ma...@sartura.hr
Web: www.sartura.hr
Re: [PATCH v2 2/2] ipq40xx/snapdragon: Merge the two, more than 90% overlapping Qualcomm's Snapdrgon based arches, into one: "mach-snapdragon".
On Sun, Nov 6, 2022 at 2:53 AM Andrey VOLKOV wrote:
>
> Signed-off-by: Andrey VOLKOV
> ---
> arch/arm/Kconfig | 19 +-
> arch/arm/Makefile | 1 -
> arch/arm/mach-ipq40xx/Kconfig | 15 --
> arch/arm/mach-ipq40xx/Makefile| 9 -
> arch/arm/mach-ipq40xx/include/mach/gpio.h | 10 --
> arch/arm/mach-ipq40xx/pinctrl-snapdragon.c| 166 --
> arch/arm/mach-ipq40xx/pinctrl-snapdragon.h| 30
> arch/arm/mach-snapdragon/Kconfig | 47 -
> arch/arm/mach-snapdragon/Makefile | 5 +-
> .../clock-ipq4019.c | 0
> .../pinctrl-ipq4019.c | 0
> arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 38 ++--
> arch/arm/mach-snapdragon/pinctrl-snapdragon.h | 1 +
> drivers/phy/qcom/Kconfig | 2 +-
> drivers/reset/Kconfig | 2 +-
> drivers/reset/reset-qcom.c| 2 +-
> drivers/smem/Kconfig | 2 +-
> drivers/spi/Kconfig | 2 +-
> 18 files changed, 80 insertions(+), 271 deletions(-)
> delete mode 100644 arch/arm/mach-ipq40xx/Kconfig
> delete mode 100644 arch/arm/mach-ipq40xx/Makefile
> delete mode 100644 arch/arm/mach-ipq40xx/include/mach/gpio.h
> delete mode 100644 arch/arm/mach-ipq40xx/pinctrl-snapdragon.c
> delete mode 100644 arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
> rename arch/arm/{mach-ipq40xx => mach-snapdragon}/clock-ipq4019.c (100%)
> rename arch/arm/{mach-ipq40xx => mach-snapdragon}/pinctrl-ipq4019.c (100%)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index cdc8d4aeb4..d94ca7dcf9 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -781,21 +781,6 @@ config ARCH_INTEGRATOR
> select PL01X_SERIAL
> imply CMD_DM
>
> -config ARCH_IPQ40XX
> - bool "Qualcomm IPQ40xx SoCs"
> - select CPU_V7A
> - select DM
> - select DM_GPIO
> - select DM_SERIAL
> - select DM_RESET
> - select GPIO_EXTRA_HEADER
> - select MSM_SMEM
> - select PINCTRL
> - select CLK
> - select SMEM
> - select OF_CONTROL
> - imply CMD_DM
> -
> config ARCH_KEYSTONE
> bool "TI Keystone"
> select CMD_POWEROFF
> @@ -1076,6 +1061,7 @@ config ARCH_RMOBILE
>
> config ARCH_SNAPDRAGON
> bool "Qualcomm Snapdragon SoCs"
> + select CLK
> select DM
> select DM_GPIO
> select DM_SERIAL
> @@ -1083,6 +1069,7 @@ config ARCH_SNAPDRAGON
> select MSM_SMEM
> select OF_CONTROL
> select OF_SEPARATE
> + select PINCTRL
> select SMEM
> select SPMI
> imply CMD_DM
> @@ -2203,8 +2190,6 @@ source "arch/arm/mach-highbank/Kconfig"
>
> source "arch/arm/mach-integrator/Kconfig"
>
> -source "arch/arm/mach-ipq40xx/Kconfig"
> -
> source "arch/arm/mach-k3/Kconfig"
>
> source "arch/arm/mach-keystone/Kconfig"
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index ac602aed9c..ceee6a02d0 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -61,7 +61,6 @@ machine-$(CONFIG_ARCH_DAVINCI)+= davinci
> machine-$(CONFIG_ARCH_EXYNOS) += exynos
> machine-$(CONFIG_ARCH_GXP) += hpe
> machine-$(CONFIG_ARCH_HIGHBANK)+= highbank
> -machine-$(CONFIG_ARCH_IPQ40XX) += ipq40xx
> machine-$(CONFIG_ARCH_K3) += k3
> machine-$(CONFIG_ARCH_KEYSTONE)+= keystone
> machine-$(CONFIG_ARCH_KIRKWOOD)+= kirkwood
> diff --git a/arch/arm/mach-ipq40xx/Kconfig b/arch/arm/mach-ipq40xx/Kconfig
> deleted file mode 100644
> index f9db55c42a..00
> --- a/arch/arm/mach-ipq40xx/Kconfig
> +++ /dev/null
> @@ -1,15 +0,0 @@
> -if ARCH_IPQ40XX
> -
> -config SYS_SOC
> - default "ipq40xx"
> -
> -config SYS_MALLOC_F_LEN
> - default 0x2000
> -
> -config TEXT_BASE
> - default 0x8730
> -
> -config NR_DRAM_BANKS
> - default 1
> -
> -endif
> diff --git a/arch/arm/mach-ipq40xx/Makefile b/arch/arm/mach-ipq40xx/Makefile
> deleted file mode 100644
> index 08a65b8854..00
> --- a/arch/arm/mach-ipq40xx/Makefile
> +++ /dev/null
> @@ -1,9 +0,0 @@
> -# SPDX-License-Identifier: GPL-2.0+
> -#
> -# Copyright (c) 2019 Sartura Ltd.
> -#
> -# Author: Robert Marko
> -
> -obj-y += clock-ipq4019.o
> -obj-y += pinctrl-snapdragon.o
> -obj-y += pinctrl-ipq4019.o
> diff --git
Re: [PATCH 1/2] mach-snapdragon/mach-ipq40xx: fix, merge and refactoring
On Tue, Nov 8, 2022 at 4:20 PM Tom Rini wrote: > > On Sun, Nov 06, 2022 at 02:52:56AM +0100, Andrey VOLKOV wrote: > > Hi Robert, Tom, > > > > Updated patches are following, could you review/accept them? > > > > Le 04/11/2022 à 12:05, Robert Marko a écrit : > > > On Tue, Oct 25, 2022 at 3:31 AM Andrey Volkov wrote: > > >> SoC: qcom: Add missing Qualcomm's SOCs definitions to the arch KConfig > > >> > > >> From: Andrey VOLKOV > > >> > > >> Add APQ8016/APQ8096/QCS40X decls to the KConfig, convert SDM845 > > >> declaration to the hidden one (selected by target), > > >> and update mach-snapdragon/Makefile accordingly. > > >> > > >> Also move 'CONFIG_ARM64' choice to the new declarations, since > > >> 'Snapdragon' contains Cortex A7A members too. > > >> > > >> Signed-off-by: Andrey VOLKOV > > > I like this cleanup effort, however, can you rebase this to apply on the > > > master? > > > I would like to use this as a base of moving IPQ40xx to use Linux DTS > > > and keep it in sync. > > > > It's nice idea, except that full blown DTS is huge enough (+some KiB at > > least), > > and i'm afraid it's an old, old story about failing to make it :(. > > Probably will be better if we will have some option that allowed to import > > and > > reuse DTS files directly from the kernel. > > Something like CONFIG_DTS_FILE_PATH/CONFIG_DTS_INCLUDES/... > > > > @Tom, any additional comments/objections? > > > > Btw As far as I remember, this topic (reuse kernel's DTS) has been discussed > > repeatedly since the mid-2000s, but I don't remember why it was not > > implemented yet. > > Is the problem that the full DTS would make the resulting binary too > large to fit in some restricted and can't be changed easily space? > Generally we do want to keep the DTS files in-sync with the kernel. Most IPQ40xx devices have a slot of 512kB left for the bootloader which cannot be easily expanded, however, that should still be enough for synced DTS anyway. I am now more familiar with U-boot and really dont like the IPQ40xx target as it is and would like to rework it, including using upstream DTS. Regards, Robert > > -- > Tom -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: robert.ma...@sartura.hr Web: www.sartura.hr
Re: [PATCH 1/2] mach-snapdragon/mach-ipq40xx: fix, merge and refactoring
IG_QCS40X) += pinctrl-qcs404.o
> diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
> b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
> index ab884ab6bf..4ed4ab4d4c 100644
> --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
> +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
> @@ -149,7 +149,7 @@ static const struct udevice_id msm_pinctrl_ids[] = {
> { }
> };
>
> -U_BOOT_DRIVER(pinctrl_snapdraon) = {
> +U_BOOT_DRIVER(pinctrl_snapdragon) = {
> .name= "pinctrl_msm",
> .id= UCLASS_PINCTRL,
> .of_match= msm_pinctrl_ids,
> diff --git a/drivers/reset/reset-qcom.c b/drivers/reset/reset-qcom.c
> index 94315e76d5..2c61d6a6dc 100644
> --- a/drivers/reset/reset-qcom.c
> +++ b/drivers/reset/reset-qcom.c
> @@ -102,7 +102,7 @@ static const struct qcom_reset_map gcc_qcom_resets[] = {
> };
> #endif
>
> -#ifdef CONFIG_TARGET_QCS404EVB
> +#ifdef CONFIG_QCS40X
> #include
> static const struct qcom_reset_map gcc_qcom_resets[] = {
> [GCC_GENI_IR_BCR] = { 0x0F000 },
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
Re: Unable to boot sandbox64 with test dtb
On Tue, Oct 18, 2022 at 9:40 AM Sughosh Ganu wrote: > hi, > Since "1fad2cb852 thermal: add sandbox driver", sandbox64 does not > boot with the test device tree. Trying to boot with the -T option > results in a crash. > > Creating new bloblist size 400 at c000 > Error binding driver 'thermal-sandbox': -96 > Some drivers failed to bind > initcall sequence 55d97913d340 failed at call 000660c5 > (err=-96) > ### ERROR ### Please RESET the board ### > > Robert, can you please check how this can be fixed on the sandbox64 > variant. Thanks. I see that you already sent a patch, so I won't repeat myself. Is sandbox64 not covered by tests? Regards, Robert > > > -sughosh > -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: <http://goog_1951392730>robert.ma...@sartura.hr Web: www.sartura.hr
Re: [PATCH] thermal: sandbox: Don't build sandbox thermal driver for sandbox64
On Tue, Oct 18, 2022 at 10:04 AM Sughosh Ganu wrote: > The sandbox64 defconfig does not enable the thermal uclass, but builds > the thermal sandbox driver. This breaks booting the sandbox64 variant > with the test device tree. Do not build the driver for the sandbox64 > variant. > Hi, It would probably be better to just enable the driver for sandbox64. It is weird that sandbox64 is not covered by tests as well. Regards, Robert > > Signed-off-by: Sughosh Ganu > --- > drivers/thermal/Makefile | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile > index 8acc7d20cb..04559dbaf4 100644 > --- a/drivers/thermal/Makefile > +++ b/drivers/thermal/Makefile > @@ -4,7 +4,9 @@ > # Author: Nitin Garg > > obj-$(CONFIG_DM_THERMAL) += thermal-uclass.o > +ifeq ($(CONFIG_SANDBOX64),) > obj-$(CONFIG_SANDBOX) += thermal_sandbox.o > +endif > obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o > obj-$(CONFIG_IMX_SCU_THERMAL) += imx_scu_thermal.o > obj-$(CONFIG_TI_DRA7_THERMAL) += ti-bandgap.o > -- > 2.34.1 > > -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: <http://goog_1951392730>robert.ma...@sartura.hr Web: www.sartura.hr
[PATCH] smem: msm: add missing
MSM SMEM driver is currently missing header and throws the following compile error: drivers/smem/msm_smem.c: In function ‘qcom_smem_get_ptable’: drivers/smem/msm_smem.c:635:71: error: ‘SZ_4K’ undeclared (first use in this function) 635 | ptable = smem->regions[0].virt_base + smem->regions[0].size - SZ_4K; Signed-off-by: Robert Marko Cc: luka.per...@sartura.hr --- drivers/smem/msm_smem.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/smem/msm_smem.c b/drivers/smem/msm_smem.c index 6395b61b0d..17ee6c837c 100644 --- a/drivers/smem/msm_smem.c +++ b/drivers/smem/msm_smem.c @@ -18,6 +18,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; -- 2.37.3
Re: [PATCH v2 4/4] test: cmd: add test for temperature command
On Tue, Sep 6, 2022 at 11:18 PM Simon Glass wrote: > > Hi Robert, > H > On Tue, 6 Sept 2022 at 04:50, Robert Marko wrote: > > > > On Sat, Sep 3, 2022 at 3:54 AM Tom Rini wrote: > > > > > > On Fri, Aug 12, 2022 at 08:15:50PM +0200, Robert Marko wrote: > > > > > > > Add simple test for the temperature command. > > > > > > > > Signed-off-by: Robert Marko > > > > Reviewed-by: Simon Glass > > > > --- > > > > test/cmd/Makefile | 1 + > > > > test/cmd/temperature.c | 39 +++ > > > > 2 files changed, 40 insertions(+) > > > > create mode 100644 test/cmd/temperature.c > > > > > > This causes failures such as: > > > https://source.denx.de/u-boot/u-boot/-/jobs/490586 > > > Captured stdout setup > > > - > > > /u-boot > > > Creating new bloblist size 400 at c000 > > > Error binding driver 'thermal-sandbox': -96 > > > Some drivers failed to bind > > > initcall sequence 560e11b023a0 failed at call 0005a8ef > > > (err=-96) > > > ### ERROR ### Please RESET the board ### > > > > Ok, so its failing on SPL and flattree/noninstall variants, but why is > > the test even getting > > executed if CONFIG_CMD_TEMPERATURE is not set in their defconfig-s? > > It looks like you are enabling CMD_TEMPERATURE for sandbox_flattree. > Error -96 means the uclass is missing, so make sure that is built. > > For sandbox_spl the same applies. This is not about what happens in > SPL itself, but what happens when sandbox SPL runs U-Boot proper. Thanks, I have sent a v3 yesterday that passes make check. Regards, Robert > > Regards, > Simon -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: robert.ma...@sartura.hr Web: www.sartura.hr
[PATCH v3 4/4] test: cmd: add test for temperature command
Add simple test for the temperature command.
Signed-off-by: Robert Marko
Reviewed-by: Simon Glass
---
test/cmd/Makefile | 1 +
test/cmd/temperature.c | 39 +++
2 files changed, 40 insertions(+)
create mode 100644 test/cmd/temperature.c
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index c331757425..f9493357a5 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o
obj-$(CONFIG_CMD_PINMUX) += pinmux.o
obj-$(CONFIG_CMD_PWM) += pwm.o
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
+obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o
diff --git a/test/cmd/temperature.c b/test/cmd/temperature.c
new file mode 100644
index 00..2a1ea0611d
--- /dev/null
+++ b/test/cmd/temperature.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Executes tests for temperature command
+ *
+ * Copyright (C) 2022 Sartura Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static int dm_test_cmd_temperature(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+
+ ut_assertok(uclass_get_device(UCLASS_THERMAL, 0, ));
+ ut_assertnonnull(dev);
+
+ ut_assertok(console_record_reset_enable());
+
+ /* Test that "temperature list" shows the sandbox device */
+ ut_assertok(run_command("temperature list", 0));
+ ut_assert_nextline("| Device| Driver
| Parent");
+ ut_assert_nextline("| thermal | thermal-sandbox
| root_driver");
+ ut_assert_console_end();
+
+ /* Test that "temperature get thermal" returns expected value */
+ console_record_reset();
+ ut_assertok(run_command("temperature get thermal", 0));
+ ut_assert_nextline("thermal: 100 C");
+ ut_assert_console_end();
+
+ return 0;
+}
+
+DM_TEST(dm_test_cmd_temperature, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
--
2.37.3
[PATCH v3 3/4] thermal: add sandbox driver
Provide a simple sandbox driver for the thermal uclass.
It simply registers and returns 100 degrees C if requested.
Signed-off-by: Robert Marko
Reviewed-by: Simon Glass
---
Changes in v3:
* Enable thermal class and temperature command in Sandbox SPL, flattree
and noinstall defconfigs as well to fix make check failing
---
arch/sandbox/dts/sandbox.dtsi | 4
arch/sandbox/dts/test.dts | 4
configs/sandbox_defconfig | 2 ++
configs/sandbox_flattree_defconfig | 2 ++
configs/sandbox_noinst_defconfig | 2 ++
configs/sandbox_spl_defconfig | 2 ++
drivers/thermal/Makefile | 1 +
drivers/thermal/thermal_sandbox.c | 36 ++
8 files changed, 53 insertions(+)
create mode 100644 drivers/thermal/thermal_sandbox.c
diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index 56e6b38bfa..a7b6a010ea 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -439,6 +439,10 @@
sandbox_tee {
compatible = "sandbox,tee";
};
+
+ thermal {
+ compatible = "sandbox,thermal";
+ };
};
_ec {
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 2761588f0d..e7cc5384d5 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1683,6 +1683,10 @@
compatible = "sandbox,regmap_test";
};
};
+
+ thermal {
+ compatible = "sandbox,thermal";
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index ab5d3f19bf..80397a4a38 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -77,6 +77,7 @@ CONFIG_CMD_PCI=y
CONFIG_CMD_READ=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
+CONFIG_CMD_TEMPERATURE=y
CONFIG_CMD_USB=y
CONFIG_CMD_AXI=y
CONFIG_CMD_SETEXPR_FMT=y
@@ -280,6 +281,7 @@ CONFIG_SYSINFO=y
CONFIG_SYSINFO_SANDBOX=y
CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
CONFIG_SANDBOX_TIMER=y
diff --git a/configs/sandbox_flattree_defconfig
b/configs/sandbox_flattree_defconfig
index a8b439faa9..4c206afe53 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -45,6 +45,7 @@ CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
+CONFIG_CMD_TEMPERATURE=y
CONFIG_CMD_USB=y
CONFIG_BOOTP_DNS2=y
CONFIG_CMD_TFTPPUT=y
@@ -185,6 +186,7 @@ CONFIG_SYSINFO=y
CONFIG_SYSINFO_SANDBOX=y
CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
CONFIG_SANDBOX_TIMER=y
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index 3d34d81731..c3d84bc61c 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -62,6 +62,7 @@ CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
+CONFIG_CMD_TEMPERATURE=y
CONFIG_CMD_USB=y
CONFIG_BOOTP_DNS2=y
CONFIG_CMD_TFTPPUT=y
@@ -212,6 +213,7 @@ CONFIG_SYSINFO_SANDBOX=y
CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
+CONFIG_DM_THERMAL=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
CONFIG_SANDBOX_TIMER=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 76e8acd126..53c48d1285 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -62,6 +62,7 @@ CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
+CONFIG_CMD_TEMPERATURE=y
CONFIG_CMD_USB=y
CONFIG_BOOTP_DNS2=y
CONFIG_CMD_TFTPPUT=y
@@ -215,6 +216,7 @@ CONFIG_SYSINFO_SANDBOX=y
CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
+CONFIG_DM_THERMAL=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
CONFIG_SANDBOX_TIMER=y
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 6dda62bcd1..f2ee1df394 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -4,6 +4,7 @@
# Author: Nitin Garg
obj-$(CONFIG_DM_THERMAL) += thermal-uclass.o
+obj-$(CONFIG_SANDBOX) += thermal_sandbox.o
obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
obj-$(CONFIG_IMX_SCU_THERMAL) += imx_scu_thermal.o
obj-$(CONFIG_SPARX5_THERMAL) += sparx5-temp.o
diff --git a/drivers/thermal/thermal_sandbox.c
b/drivers/thermal/thermal_sandbox.c
new file mode 100644
index 00..acc364feb0
--- /dev/null
+++ b/drivers/thermal/thermal_sandbox.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2022 Sartura Ltd.
+ * Written by Robert Marko
+ *
+ * Sandbox driver for the thermal uclass.
+ */
+
+#include
+#include
+#include
+
+int sandbox_thermal_get_temp(struct udevice *dev, int *temp)
+{
+ /* Simply return 100°C */
+ *temp = 100;
+
+ return 0;
+}
+
+static const struct dm_thermal_ops sandbox_thermal_ops = {
+ .get_temp = sandbox_thermal_get_temp,
+};
+
+static const struct udevice_
[PATCH v3 2/4] doc: cmd: temperature: add documentation
Add documentation for the temperature command. Signed-off-by: Robert Marko Reviewed-by: Simon Glass --- doc/usage/cmd/temperature.rst | 50 +++ doc/usage/index.rst | 1 + 2 files changed, 51 insertions(+) create mode 100644 doc/usage/cmd/temperature.rst diff --git a/doc/usage/cmd/temperature.rst b/doc/usage/cmd/temperature.rst new file mode 100644 index 00..a5144ec50f --- /dev/null +++ b/doc/usage/cmd/temperature.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +temperature command +=== + +Synopsis + + +:: + +temperature list +temperature get [thermal device name] + +Description +--- + +The *temperature* command is used to list thermal sensors and get their +readings. + +The 'temperature list' command diplays the available thermal devices. + +The 'temperature get' command is used to get the reading in degrees C from +the desired device which is selected by passing its device name. + +thermal device name +device name of thermal sensor to select + +Example +--- + +:: + + +=> temperature list +| Device| Driver| Parent +| tmon@610508110| sparx5-temp | axi@6 +=> +=> temperature get tmon@610508110 +tmon@610508110: 42 C + +Configuration +- + +The *temperature* command is only available if CONFIG_CMD_TEMPERATURE=y. + +Return value + + +The return value $? is set to 0 (true) if the command succeeded and to 1 (false) +otherwise. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 28f9683a3e..92967efdd2 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -63,6 +63,7 @@ Shell commands cmd/scp03 cmd/setexpr cmd/size + cmd/temperature cmd/true cmd/ums cmd/wdt -- 2.37.3
[PATCH v3 1/4] cmd: add temperature command
Currently, there is no way for users to check the readings from thermal
sensors from U-boot console, only some boards print it during boot.
So, lets add a simple "temperature" command that allows listing thermal
uclass devices and getting their value.
Note that the thermal devices are intenionally probed if list is used as
almost always they will not get probed otherwise and there is no way for
users to manually call probe on a certain device from console.
Assumption is made that temperature is returned in degrees C and not
milidegrees like in Linux as this is what most drivers seem to return.
Signed-off-by: Robert Marko
Reviewed-by: Simon Glass
---
Changes in v2:
* Drop by using uclass_get_device_by_name()
* Make the unit clear in help
* Expand Kconfig boolean and help
* Drop degree symbol as test doesnt work with it.
---
cmd/Kconfig | 6
cmd/Makefile | 1 +
cmd/temperature.c | 85 +++
3 files changed, 92 insertions(+)
create mode 100644 cmd/temperature.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 8ea064b8d2..4376909ca8 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1445,6 +1445,12 @@ config DEFAULT_SPI_MODE
depends on CMD_SPI
default 0
+config CMD_TEMPERATURE
+ bool "temperature - display the temperature from thermal sensors"
+ depends on DM_THERMAL
+ help
+ Provides a way to list thermal sensors and to get their readings.
+
config CMD_TSI148
bool "tsi148 - Command to access tsi148 device"
help
diff --git a/cmd/Makefile b/cmd/Makefile
index 6e87522b62..141e440d01 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -152,6 +152,7 @@ obj-$(CONFIG_CMD_STRINGS) += strings.o
obj-$(CONFIG_CMD_SMC) += smccc.o
obj-$(CONFIG_CMD_SYSBOOT) += sysboot.o
obj-$(CONFIG_CMD_STACKPROTECTOR_TEST) += stackprot_test.o
+obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o
obj-$(CONFIG_CMD_TERMINAL) += terminal.o
obj-$(CONFIG_CMD_TIME) += time.o
obj-$(CONFIG_CMD_TIMER) += timer.o
diff --git a/cmd/temperature.c b/cmd/temperature.c
new file mode 100644
index 00..420965de14
--- /dev/null
+++ b/cmd/temperature.c
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Copyright (c) 2022 Sartura Ltd.
+ * Written by Robert Marko
+ */
+
+#include
+#include
+#include
+#include
+
+#define LIMIT_DEVNAME 30
+
+static int do_get(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct udevice *dev;
+ int ret, temp;
+
+ if (argc < 2) {
+ printf("thermal device not selected\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = uclass_get_device_by_name(UCLASS_THERMAL, argv[1], );
+ if (ret) {
+ printf("thermal device not found\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = thermal_get_temp(dev, );
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ printf("%s: %d C\n", dev->name, temp);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_list(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct udevice *dev;
+
+ printf("| %-*.*s| %-*.*s| %s\n",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, "Device",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, "Driver",
+ "Parent");
+
+ uclass_foreach_dev_probe(UCLASS_THERMAL, dev) {
+ printf("| %-*.*s| %-*.*s| %s\n",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, dev->name,
+ LIMIT_DEVNAME, LIMIT_DEVNAME, dev->driver->name,
+ dev->parent->name);
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+static struct cmd_tbl temperature_subcmd[] = {
+ U_BOOT_CMD_MKENT(list, 1, 1, do_list, "", ""),
+ U_BOOT_CMD_MKENT(get, 2, 1, do_get, "", ""),
+};
+
+static int do_temperature(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct cmd_tbl *cmd;
+
+ argc--;
+ argv++;
+
+ cmd = find_cmd_tbl(argv[0], temperature_subcmd,
ARRAY_SIZE(temperature_subcmd));
+ if (!cmd || argc > cmd->maxargs)
+ return CMD_RET_USAGE;
+
+ return cmd->cmd(cmdtp, flag, argc, argv);
+}
+
+U_BOOT_CMD(temperature, CONFIG_SYS_MAXARGS, 1, do_temperature,
+ "thermal sensor temperature",
+ "list\t\tshow list of temperature sensors\n"
+ "get [thermal device name]\tprint temperature in degrees C"
+);
--
2.37.3
[PATCH v3 4/4] test: cmd: add test for temperature command
Add simple test for the temperature command.
Signed-off-by: Robert Marko
Reviewed-by: Simon Glass
---
test/cmd/Makefile | 1 +
test/cmd/temperature.c | 39 +++
2 files changed, 40 insertions(+)
create mode 100644 test/cmd/temperature.c
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index c331757425..f9493357a5 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o
obj-$(CONFIG_CMD_PINMUX) += pinmux.o
obj-$(CONFIG_CMD_PWM) += pwm.o
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
+obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o
diff --git a/test/cmd/temperature.c b/test/cmd/temperature.c
new file mode 100644
index 00..2a1ea0611d
--- /dev/null
+++ b/test/cmd/temperature.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Executes tests for temperature command
+ *
+ * Copyright (C) 2022 Sartura Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static int dm_test_cmd_temperature(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+
+ ut_assertok(uclass_get_device(UCLASS_THERMAL, 0, ));
+ ut_assertnonnull(dev);
+
+ ut_assertok(console_record_reset_enable());
+
+ /* Test that "temperature list" shows the sandbox device */
+ ut_assertok(run_command("temperature list", 0));
+ ut_assert_nextline("| Device| Driver
| Parent");
+ ut_assert_nextline("| thermal | thermal-sandbox
| root_driver");
+ ut_assert_console_end();
+
+ /* Test that "temperature get thermal" returns expected value */
+ console_record_reset();
+ ut_assertok(run_command("temperature get thermal", 0));
+ ut_assert_nextline("thermal: 100 C");
+ ut_assert_console_end();
+
+ return 0;
+}
+
+DM_TEST(dm_test_cmd_temperature, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
--
2.37.3
[PATCH v3 3/4] thermal: add sandbox driver
Provide a simple sandbox driver for the thermal uclass.
It simply registers and returns 100 degrees C if requested.
Signed-off-by: Robert Marko
Reviewed-by: Simon Glass
---
Changes in v3:
* Enable thermal class and temperature command in Sandbox SPL, flattree
and noinstall defconfigs as well to fix make check failing
---
arch/sandbox/dts/sandbox.dtsi | 4
arch/sandbox/dts/test.dts | 4
configs/sandbox_defconfig | 2 ++
configs/sandbox_flattree_defconfig | 2 ++
configs/sandbox_noinst_defconfig | 2 ++
configs/sandbox_spl_defconfig | 2 ++
drivers/thermal/Makefile | 1 +
drivers/thermal/thermal_sandbox.c | 36 ++
8 files changed, 53 insertions(+)
create mode 100644 drivers/thermal/thermal_sandbox.c
diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index 56e6b38bfa..a7b6a010ea 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -439,6 +439,10 @@
sandbox_tee {
compatible = "sandbox,tee";
};
+
+ thermal {
+ compatible = "sandbox,thermal";
+ };
};
_ec {
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 2761588f0d..e7cc5384d5 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1683,6 +1683,10 @@
compatible = "sandbox,regmap_test";
};
};
+
+ thermal {
+ compatible = "sandbox,thermal";
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index ab5d3f19bf..80397a4a38 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -77,6 +77,7 @@ CONFIG_CMD_PCI=y
CONFIG_CMD_READ=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
+CONFIG_CMD_TEMPERATURE=y
CONFIG_CMD_USB=y
CONFIG_CMD_AXI=y
CONFIG_CMD_SETEXPR_FMT=y
@@ -280,6 +281,7 @@ CONFIG_SYSINFO=y
CONFIG_SYSINFO_SANDBOX=y
CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
CONFIG_SANDBOX_TIMER=y
diff --git a/configs/sandbox_flattree_defconfig
b/configs/sandbox_flattree_defconfig
index a8b439faa9..4c206afe53 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -45,6 +45,7 @@ CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
+CONFIG_CMD_TEMPERATURE=y
CONFIG_CMD_USB=y
CONFIG_BOOTP_DNS2=y
CONFIG_CMD_TFTPPUT=y
@@ -185,6 +186,7 @@ CONFIG_SYSINFO=y
CONFIG_SYSINFO_SANDBOX=y
CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
CONFIG_SANDBOX_TIMER=y
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index 3d34d81731..c3d84bc61c 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -62,6 +62,7 @@ CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
+CONFIG_CMD_TEMPERATURE=y
CONFIG_CMD_USB=y
CONFIG_BOOTP_DNS2=y
CONFIG_CMD_TFTPPUT=y
@@ -212,6 +213,7 @@ CONFIG_SYSINFO_SANDBOX=y
CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
+CONFIG_DM_THERMAL=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
CONFIG_SANDBOX_TIMER=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 76e8acd126..53c48d1285 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -62,6 +62,7 @@ CONFIG_CMD_OSD=y
CONFIG_CMD_PCI=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
+CONFIG_CMD_TEMPERATURE=y
CONFIG_CMD_USB=y
CONFIG_BOOTP_DNS2=y
CONFIG_CMD_TFTPPUT=y
@@ -215,6 +216,7 @@ CONFIG_SYSINFO_SANDBOX=y
CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
+CONFIG_DM_THERMAL=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
CONFIG_SANDBOX_TIMER=y
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 6dda62bcd1..f2ee1df394 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -4,6 +4,7 @@
# Author: Nitin Garg
obj-$(CONFIG_DM_THERMAL) += thermal-uclass.o
+obj-$(CONFIG_SANDBOX) += thermal_sandbox.o
obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
obj-$(CONFIG_IMX_SCU_THERMAL) += imx_scu_thermal.o
obj-$(CONFIG_SPARX5_THERMAL) += sparx5-temp.o
diff --git a/drivers/thermal/thermal_sandbox.c
b/drivers/thermal/thermal_sandbox.c
new file mode 100644
index 00..acc364feb0
--- /dev/null
+++ b/drivers/thermal/thermal_sandbox.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2022 Sartura Ltd.
+ * Written by Robert Marko
+ *
+ * Sandbox driver for the thermal uclass.
+ */
+
+#include
+#include
+#include
+
+int sandbox_thermal_get_temp(struct udevice *dev, int *temp)
+{
+ /* Simply return 100°C */
+ *temp = 100;
+
+ return 0;
+}
+
+static const struct dm_thermal_ops sandbox_thermal_ops = {
+ .get_temp = sandbox_thermal_get_temp,
+};
+
+static const struct udevice_
[PATCH v3 2/4] doc: cmd: temperature: add documentation
Add documentation for the temperature command. Signed-off-by: Robert Marko Reviewed-by: Simon Glass --- doc/usage/cmd/temperature.rst | 50 +++ doc/usage/index.rst | 1 + 2 files changed, 51 insertions(+) create mode 100644 doc/usage/cmd/temperature.rst diff --git a/doc/usage/cmd/temperature.rst b/doc/usage/cmd/temperature.rst new file mode 100644 index 00..a5144ec50f --- /dev/null +++ b/doc/usage/cmd/temperature.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +temperature command +=== + +Synopsis + + +:: + +temperature list +temperature get [thermal device name] + +Description +--- + +The *temperature* command is used to list thermal sensors and get their +readings. + +The 'temperature list' command diplays the available thermal devices. + +The 'temperature get' command is used to get the reading in degrees C from +the desired device which is selected by passing its device name. + +thermal device name +device name of thermal sensor to select + +Example +--- + +:: + + +=> temperature list +| Device| Driver| Parent +| tmon@610508110| sparx5-temp | axi@6 +=> +=> temperature get tmon@610508110 +tmon@610508110: 42 C + +Configuration +- + +The *temperature* command is only available if CONFIG_CMD_TEMPERATURE=y. + +Return value + + +The return value $? is set to 0 (true) if the command succeeded and to 1 (false) +otherwise. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 28f9683a3e..92967efdd2 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -63,6 +63,7 @@ Shell commands cmd/scp03 cmd/setexpr cmd/size + cmd/temperature cmd/true cmd/ums cmd/wdt -- 2.37.3
[PATCH v3 1/4] cmd: add temperature command
Currently, there is no way for users to check the readings from thermal
sensors from U-boot console, only some boards print it during boot.
So, lets add a simple "temperature" command that allows listing thermal
uclass devices and getting their value.
Note that the thermal devices are intenionally probed if list is used as
almost always they will not get probed otherwise and there is no way for
users to manually call probe on a certain device from console.
Assumption is made that temperature is returned in degrees C and not
milidegrees like in Linux as this is what most drivers seem to return.
Signed-off-by: Robert Marko
Reviewed-by: Simon Glass
---
Changes in v2:
* Drop by using uclass_get_device_by_name()
* Make the unit clear in help
* Expand Kconfig boolean and help
* Drop degree symbol as test doesnt work with it.
---
cmd/Kconfig | 6
cmd/Makefile | 1 +
cmd/temperature.c | 85 +++
3 files changed, 92 insertions(+)
create mode 100644 cmd/temperature.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 8ea064b8d2..4376909ca8 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1445,6 +1445,12 @@ config DEFAULT_SPI_MODE
depends on CMD_SPI
default 0
+config CMD_TEMPERATURE
+ bool "temperature - display the temperature from thermal sensors"
+ depends on DM_THERMAL
+ help
+ Provides a way to list thermal sensors and to get their readings.
+
config CMD_TSI148
bool "tsi148 - Command to access tsi148 device"
help
diff --git a/cmd/Makefile b/cmd/Makefile
index 6e87522b62..141e440d01 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -152,6 +152,7 @@ obj-$(CONFIG_CMD_STRINGS) += strings.o
obj-$(CONFIG_CMD_SMC) += smccc.o
obj-$(CONFIG_CMD_SYSBOOT) += sysboot.o
obj-$(CONFIG_CMD_STACKPROTECTOR_TEST) += stackprot_test.o
+obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o
obj-$(CONFIG_CMD_TERMINAL) += terminal.o
obj-$(CONFIG_CMD_TIME) += time.o
obj-$(CONFIG_CMD_TIMER) += timer.o
diff --git a/cmd/temperature.c b/cmd/temperature.c
new file mode 100644
index 00..420965de14
--- /dev/null
+++ b/cmd/temperature.c
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Copyright (c) 2022 Sartura Ltd.
+ * Written by Robert Marko
+ */
+
+#include
+#include
+#include
+#include
+
+#define LIMIT_DEVNAME 30
+
+static int do_get(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct udevice *dev;
+ int ret, temp;
+
+ if (argc < 2) {
+ printf("thermal device not selected\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = uclass_get_device_by_name(UCLASS_THERMAL, argv[1], );
+ if (ret) {
+ printf("thermal device not found\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = thermal_get_temp(dev, );
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ printf("%s: %d C\n", dev->name, temp);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_list(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct udevice *dev;
+
+ printf("| %-*.*s| %-*.*s| %s\n",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, "Device",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, "Driver",
+ "Parent");
+
+ uclass_foreach_dev_probe(UCLASS_THERMAL, dev) {
+ printf("| %-*.*s| %-*.*s| %s\n",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, dev->name,
+ LIMIT_DEVNAME, LIMIT_DEVNAME, dev->driver->name,
+ dev->parent->name);
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+static struct cmd_tbl temperature_subcmd[] = {
+ U_BOOT_CMD_MKENT(list, 1, 1, do_list, "", ""),
+ U_BOOT_CMD_MKENT(get, 2, 1, do_get, "", ""),
+};
+
+static int do_temperature(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct cmd_tbl *cmd;
+
+ argc--;
+ argv++;
+
+ cmd = find_cmd_tbl(argv[0], temperature_subcmd,
ARRAY_SIZE(temperature_subcmd));
+ if (!cmd || argc > cmd->maxargs)
+ return CMD_RET_USAGE;
+
+ return cmd->cmd(cmdtp, flag, argc, argv);
+}
+
+U_BOOT_CMD(temperature, CONFIG_SYS_MAXARGS, 1, do_temperature,
+ "thermal sensor temperature",
+ "list\t\tshow list of temperature sensors\n"
+ "get [thermal device name]\tprint temperature in degrees C"
+);
--
2.37.3
Re: [PATCH v2 4/4] test: cmd: add test for temperature command
On Sat, Sep 3, 2022 at 3:54 AM Tom Rini wrote: > > On Fri, Aug 12, 2022 at 08:15:50PM +0200, Robert Marko wrote: > > > Add simple test for the temperature command. > > > > Signed-off-by: Robert Marko > > Reviewed-by: Simon Glass > > --- > > test/cmd/Makefile | 1 + > > test/cmd/temperature.c | 39 +++ > > 2 files changed, 40 insertions(+) > > create mode 100644 test/cmd/temperature.c > > This causes failures such as: > https://source.denx.de/u-boot/u-boot/-/jobs/490586 > Captured stdout setup > - > /u-boot > Creating new bloblist size 400 at c000 > Error binding driver 'thermal-sandbox': -96 > Some drivers failed to bind > initcall sequence 560e11b023a0 failed at call 0005a8ef (err=-96) > ### ERROR ### Please RESET the board ### Ok, so its failing on SPL and flattree/noninstall variants, but why is the test even getting executed if CONFIG_CMD_TEMPERATURE is not set in their defconfig-s? Regards, Robert > > -- > Tom -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: robert.ma...@sartura.hr Web: www.sartura.hr
[PATCH v2 3/4] thermal: add sandbox driver
Provide a simple sandbox driver for the thermal uclass.
It simply registers and returns 100 degrees C if requested.
Signed-off-by: Robert Marko
---
arch/sandbox/dts/sandbox.dtsi | 4
arch/sandbox/dts/test.dts | 4
configs/sandbox_defconfig | 2 ++
drivers/thermal/Makefile | 1 +
drivers/thermal/thermal_sandbox.c | 36 +++
5 files changed, 47 insertions(+)
create mode 100644 drivers/thermal/thermal_sandbox.c
diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index aa22b8765c..c24aee1d05 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -426,6 +426,10 @@
sandbox_tee {
compatible = "sandbox,tee";
};
+
+ thermal {
+ compatible = "sandbox,thermal";
+ };
};
_ec {
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index d1a8cc7bfb..f002233064 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1668,6 +1668,10 @@
compatible = "sandbox,regmap_test";
};
};
+
+ thermal {
+ compatible = "sandbox,thermal";
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index eba7bcbb48..d4965248d4 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -77,6 +77,7 @@ CONFIG_CMD_PCI=y
CONFIG_CMD_READ=y
CONFIG_CMD_REMOTEPROC=y
CONFIG_CMD_SPI=y
+CONFIG_CMD_TEMPERATURE=y
CONFIG_CMD_USB=y
CONFIG_CMD_AXI=y
CONFIG_CMD_SETEXPR_FMT=y
@@ -282,6 +283,7 @@ CONFIG_SYSINFO=y
CONFIG_SYSINFO_SANDBOX=y
CONFIG_SYSINFO_GPIO=y
CONFIG_SYSRESET=y
+CONFIG_DM_THERMAL=y
CONFIG_TIMER=y
CONFIG_TIMER_EARLY=y
CONFIG_SANDBOX_TIMER=y
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 6dda62bcd1..f2ee1df394 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -4,6 +4,7 @@
# Author: Nitin Garg
obj-$(CONFIG_DM_THERMAL) += thermal-uclass.o
+obj-$(CONFIG_SANDBOX) += thermal_sandbox.o
obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
obj-$(CONFIG_IMX_SCU_THERMAL) += imx_scu_thermal.o
obj-$(CONFIG_SPARX5_THERMAL) += sparx5-temp.o
diff --git a/drivers/thermal/thermal_sandbox.c
b/drivers/thermal/thermal_sandbox.c
new file mode 100644
index 00..acc364feb0
--- /dev/null
+++ b/drivers/thermal/thermal_sandbox.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (c) 2022 Sartura Ltd.
+ * Written by Robert Marko
+ *
+ * Sandbox driver for the thermal uclass.
+ */
+
+#include
+#include
+#include
+
+int sandbox_thermal_get_temp(struct udevice *dev, int *temp)
+{
+ /* Simply return 100°C */
+ *temp = 100;
+
+ return 0;
+}
+
+static const struct dm_thermal_ops sandbox_thermal_ops = {
+ .get_temp = sandbox_thermal_get_temp,
+};
+
+static const struct udevice_id sandbox_thermal_ids[] = {
+ { .compatible = "sandbox,thermal" },
+ { }
+};
+
+U_BOOT_DRIVER(thermal_sandbox) = {
+ .name = "thermal-sandbox",
+ .id = UCLASS_THERMAL,
+ .of_match = sandbox_thermal_ids,
+ .ops= _thermal_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};
--
2.37.1
[PATCH v2 4/4] test: cmd: add test for temperature command
Add simple test for the temperature command.
Signed-off-by: Robert Marko
---
test/cmd/Makefile | 1 +
test/cmd/temperature.c | 39 +++
2 files changed, 40 insertions(+)
create mode 100644 test/cmd/temperature.c
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index c331757425..f9493357a5 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o
obj-$(CONFIG_CMD_PINMUX) += pinmux.o
obj-$(CONFIG_CMD_PWM) += pwm.o
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
+obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o
diff --git a/test/cmd/temperature.c b/test/cmd/temperature.c
new file mode 100644
index 00..2a1ea0611d
--- /dev/null
+++ b/test/cmd/temperature.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Executes tests for temperature command
+ *
+ * Copyright (C) 2022 Sartura Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+static int dm_test_cmd_temperature(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+
+ ut_assertok(uclass_get_device(UCLASS_THERMAL, 0, ));
+ ut_assertnonnull(dev);
+
+ ut_assertok(console_record_reset_enable());
+
+ /* Test that "temperature list" shows the sandbox device */
+ ut_assertok(run_command("temperature list", 0));
+ ut_assert_nextline("| Device| Driver
| Parent");
+ ut_assert_nextline("| thermal | thermal-sandbox
| root_driver");
+ ut_assert_console_end();
+
+ /* Test that "temperature get thermal" returns expected value */
+ console_record_reset();
+ ut_assertok(run_command("temperature get thermal", 0));
+ ut_assert_nextline("thermal: 100 C");
+ ut_assert_console_end();
+
+ return 0;
+}
+
+DM_TEST(dm_test_cmd_temperature, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
--
2.37.1
[PATCH v2 1/4] cmd: add temperature command
Currently, there is no way for users to check the readings from thermal
sensors from U-boot console, only some boards print it during boot.
So, lets add a simple "temperature" command that allows listing thermal
uclass devices and getting their value.
Note that the thermal devices are intenionally probed if list is used as
almost always they will not get probed otherwise and there is no way for
users to manually call probe on a certain device from console.
Assumption is made that temperature is returned in degrees C and not
milidegrees like in Linux as this is what most drivers seem to return.
Signed-off-by: Robert Marko
---
Changes in v2:
* Drop by using uclass_get_device_by_name()
* Make the unit clear in help
* Expand Kconfig boolean and help
* Drop degree symbol as test doesnt work with it.
---
cmd/Kconfig | 6
cmd/Makefile | 1 +
cmd/temperature.c | 85 +++
3 files changed, 92 insertions(+)
create mode 100644 cmd/temperature.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 3625ff2a50..ffbfed1f38 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1435,6 +1435,12 @@ config DEFAULT_SPI_MODE
depends on CMD_SPI
default 0
+config CMD_TEMPERATURE
+ bool "temperature - display the temperature from thermal sensors"
+ depends on DM_THERMAL
+ help
+ Provides a way to list thermal sensors and to get their readings.
+
config CMD_TSI148
bool "tsi148 - Command to access tsi148 device"
help
diff --git a/cmd/Makefile b/cmd/Makefile
index 5e43a1e022..8874462f1a 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -152,6 +152,7 @@ obj-$(CONFIG_CMD_STRINGS) += strings.o
obj-$(CONFIG_CMD_SMC) += smccc.o
obj-$(CONFIG_CMD_SYSBOOT) += sysboot.o
obj-$(CONFIG_CMD_STACKPROTECTOR_TEST) += stackprot_test.o
+obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o
obj-$(CONFIG_CMD_TERMINAL) += terminal.o
obj-$(CONFIG_CMD_TIME) += time.o
obj-$(CONFIG_CMD_TIMER) += timer.o
diff --git a/cmd/temperature.c b/cmd/temperature.c
new file mode 100644
index 00..420965de14
--- /dev/null
+++ b/cmd/temperature.c
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Copyright (c) 2022 Sartura Ltd.
+ * Written by Robert Marko
+ */
+
+#include
+#include
+#include
+#include
+
+#define LIMIT_DEVNAME 30
+
+static int do_get(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct udevice *dev;
+ int ret, temp;
+
+ if (argc < 2) {
+ printf("thermal device not selected\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = uclass_get_device_by_name(UCLASS_THERMAL, argv[1], );
+ if (ret) {
+ printf("thermal device not found\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = thermal_get_temp(dev, );
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ printf("%s: %d C\n", dev->name, temp);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_list(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct udevice *dev;
+
+ printf("| %-*.*s| %-*.*s| %s\n",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, "Device",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, "Driver",
+ "Parent");
+
+ uclass_foreach_dev_probe(UCLASS_THERMAL, dev) {
+ printf("| %-*.*s| %-*.*s| %s\n",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, dev->name,
+ LIMIT_DEVNAME, LIMIT_DEVNAME, dev->driver->name,
+ dev->parent->name);
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+static struct cmd_tbl temperature_subcmd[] = {
+ U_BOOT_CMD_MKENT(list, 1, 1, do_list, "", ""),
+ U_BOOT_CMD_MKENT(get, 2, 1, do_get, "", ""),
+};
+
+static int do_temperature(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct cmd_tbl *cmd;
+
+ argc--;
+ argv++;
+
+ cmd = find_cmd_tbl(argv[0], temperature_subcmd,
ARRAY_SIZE(temperature_subcmd));
+ if (!cmd || argc > cmd->maxargs)
+ return CMD_RET_USAGE;
+
+ return cmd->cmd(cmdtp, flag, argc, argv);
+}
+
+U_BOOT_CMD(temperature, CONFIG_SYS_MAXARGS, 1, do_temperature,
+ "thermal sensor temperature",
+ "list\t\tshow list of temperature sensors\n"
+ "get [thermal device name]\tprint temperature in degrees C"
+);
--
2.37.1
[PATCH v2 2/4] doc: cmd: temperature: add documentation
Add documentation for the temperature command. Signed-off-by: Robert Marko --- doc/usage/cmd/temperature.rst | 50 +++ doc/usage/index.rst | 1 + 2 files changed, 51 insertions(+) create mode 100644 doc/usage/cmd/temperature.rst diff --git a/doc/usage/cmd/temperature.rst b/doc/usage/cmd/temperature.rst new file mode 100644 index 00..a5144ec50f --- /dev/null +++ b/doc/usage/cmd/temperature.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +temperature command +=== + +Synopsis + + +:: + +temperature list +temperature get [thermal device name] + +Description +--- + +The *temperature* command is used to list thermal sensors and get their +readings. + +The 'temperature list' command diplays the available thermal devices. + +The 'temperature get' command is used to get the reading in degrees C from +the desired device which is selected by passing its device name. + +thermal device name +device name of thermal sensor to select + +Example +--- + +:: + + +=> temperature list +| Device| Driver| Parent +| tmon@610508110| sparx5-temp | axi@6 +=> +=> temperature get tmon@610508110 +tmon@610508110: 42 C + +Configuration +- + +The *temperature* command is only available if CONFIG_CMD_TEMPERATURE=y. + +Return value + + +The return value $? is set to 0 (true) if the command succeeded and to 1 (false) +otherwise. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 2ba8733b92..b6f307b2bd 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -62,6 +62,7 @@ Shell commands cmd/scp03 cmd/setexpr cmd/size + cmd/temperature cmd/true cmd/ums cmd/wdt -- 2.37.1
Re: [PATCH] cmd: add temperature command
On Fri, Aug 12, 2022 at 5:11 PM Simon Glass wrote:
>
> Hi Robert,
>
> On Fri, 12 Aug 2022 at 06:19, Robert Marko wrote:
> >
> > Currently, there is no way for users to check the readings from thermal
> > sensors from U-boot console, only some boards print it during boot.
> >
> > So, lets add a simple "temperature" command that allows listing thermal
> > uclass devices and getting their value.
> >
> > Note that the thermal devices are intenionally probed if list is used as
> > almost always they will not get probed otherwise and there is no way for
> > users to manually call probe on a certain device from console.
> >
> > Assumption is made that temperature is returned in degrees C and not
> > milidegrees like in Linux as this is what most drivers seem to return.
> >
> > Signed-off-by: Robert Marko
> > ---
> > cmd/Kconfig | 6
> > cmd/Makefile | 1 +
> > cmd/temperature.c | 86 +++
> > 3 files changed, 93 insertions(+)
> > create mode 100644 cmd/temperature.c
>
> Don't forget to add doc/usage/command/.. and a sandbox test in test/cmd/
>
> https://u-boot.readthedocs.io/en/latest/develop/testing.html
Yeah, forgot those, will include them in v2.
>
> >
> > diff --git a/cmd/Kconfig b/cmd/Kconfig
> > index 3625ff2a50..9bd639c740 100644
> > --- a/cmd/Kconfig
> > +++ b/cmd/Kconfig
> > @@ -1435,6 +1435,12 @@ config DEFAULT_SPI_MODE
> > depends on CMD_SPI
> > default 0
> >
> > +config CMD_TEMPERATURE
> > + bool "temperature"
>
> How about:
>
> temperature - display the temperature from thermal sensors
>
> > + depends on DM_THERMAL
> > + help
> > + Provides a way to get the temperature reading from thermal
> > sensors.
>
> It also allows listing.
Will expand on this and the previous point.
>
> > +
> > config CMD_TSI148
> > bool "tsi148 - Command to access tsi148 device"
> > help
> > diff --git a/cmd/Makefile b/cmd/Makefile
> > index 5e43a1e022..8874462f1a 100644
> > --- a/cmd/Makefile
> > +++ b/cmd/Makefile
> > @@ -152,6 +152,7 @@ obj-$(CONFIG_CMD_STRINGS) += strings.o
> > obj-$(CONFIG_CMD_SMC) += smccc.o
> > obj-$(CONFIG_CMD_SYSBOOT) += sysboot.o
> > obj-$(CONFIG_CMD_STACKPROTECTOR_TEST) += stackprot_test.o
> > +obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o
> > obj-$(CONFIG_CMD_TERMINAL) += terminal.o
> > obj-$(CONFIG_CMD_TIME) += time.o
> > obj-$(CONFIG_CMD_TIMER) += timer.o
> > diff --git a/cmd/temperature.c b/cmd/temperature.c
> > new file mode 100644
> > index 00..ccf839058e
> > --- /dev/null
> > +++ b/cmd/temperature.c
> > @@ -0,0 +1,86 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +
> > +/*
> > + * Copyright (c) 2022 Sartura Ltd.
> > + * Written by Robert Marko
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
>
> I hope you can drop this
>
> > +#include
> > +
> > +#define LIMIT_DEVNAME 30
> > +
> > +static int do_get(struct cmd_tbl *cmdtp, int flag, int argc,
> > + char *const argv[])
> > +{
> > + struct udevice *dev;
> > + int ret, temp;
> > +
> > + if (argc < 2) {
> > + printf("thermal device not selected\n");
> > + return CMD_RET_FAILURE;
> > + }
> > +
> > + ret = uclass_get_device_by_name(UCLASS_THERMAL, argv[1], );
>
> You should use the get function normally, since it probes the device
> and for most devices you should only call their methods when the
> device is probed/activated.
I actually wanted the behavior of uclass_get_device_by_name() but completely
missed that it exists, so that is why uclass_foreach_dev_probe() was
used in list
to probe the drivers, but it still allowed for user to directly feed
the device-name
and crash U-boot as device being passed to thermal_get_temp was not probed.
Will switch to uclass_get_device_by_name() in v2 to solve that.
>
> > + if (ret) {
> > + printf("thermal device not found\n");
> > + return CMD_RET_FAILURE;
> > + }
> > +
> > + ret = thermal_get_temp(dev, );
> > + if (ret)
> > + return CMD_RET_FAILURE;
> > +
> > + printf("%s: %d°C\n", dev->name, temp);
> > +
> > + return CMD_RET_SUCCESS;
> > +}
> > +
> >
[PATCH] cmd: add temperature command
Currently, there is no way for users to check the readings from thermal
sensors from U-boot console, only some boards print it during boot.
So, lets add a simple "temperature" command that allows listing thermal
uclass devices and getting their value.
Note that the thermal devices are intenionally probed if list is used as
almost always they will not get probed otherwise and there is no way for
users to manually call probe on a certain device from console.
Assumption is made that temperature is returned in degrees C and not
milidegrees like in Linux as this is what most drivers seem to return.
Signed-off-by: Robert Marko
---
cmd/Kconfig | 6
cmd/Makefile | 1 +
cmd/temperature.c | 86 +++
3 files changed, 93 insertions(+)
create mode 100644 cmd/temperature.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 3625ff2a50..9bd639c740 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1435,6 +1435,12 @@ config DEFAULT_SPI_MODE
depends on CMD_SPI
default 0
+config CMD_TEMPERATURE
+ bool "temperature"
+ depends on DM_THERMAL
+ help
+ Provides a way to get the temperature reading from thermal sensors.
+
config CMD_TSI148
bool "tsi148 - Command to access tsi148 device"
help
diff --git a/cmd/Makefile b/cmd/Makefile
index 5e43a1e022..8874462f1a 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -152,6 +152,7 @@ obj-$(CONFIG_CMD_STRINGS) += strings.o
obj-$(CONFIG_CMD_SMC) += smccc.o
obj-$(CONFIG_CMD_SYSBOOT) += sysboot.o
obj-$(CONFIG_CMD_STACKPROTECTOR_TEST) += stackprot_test.o
+obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o
obj-$(CONFIG_CMD_TERMINAL) += terminal.o
obj-$(CONFIG_CMD_TIME) += time.o
obj-$(CONFIG_CMD_TIMER) += timer.o
diff --git a/cmd/temperature.c b/cmd/temperature.c
new file mode 100644
index 00..ccf839058e
--- /dev/null
+++ b/cmd/temperature.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Copyright (c) 2022 Sartura Ltd.
+ * Written by Robert Marko
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define LIMIT_DEVNAME 30
+
+static int do_get(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct udevice *dev;
+ int ret, temp;
+
+ if (argc < 2) {
+ printf("thermal device not selected\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = uclass_find_device_by_name(UCLASS_THERMAL, argv[1], );
+ if (ret) {
+ printf("thermal device not found\n");
+ return CMD_RET_FAILURE;
+ }
+
+ ret = thermal_get_temp(dev, );
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ printf("%s: %d°C\n", dev->name, temp);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_list(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct udevice *dev;
+
+ printf("| %-*.*s| %-*.*s| %s\n",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, "Device",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, "Driver",
+ "Parent");
+
+ uclass_foreach_dev_probe(UCLASS_THERMAL, dev) {
+ printf("| %-*.*s| %-*.*s| %s\n",
+ LIMIT_DEVNAME, LIMIT_DEVNAME, dev->name,
+ LIMIT_DEVNAME, LIMIT_DEVNAME, dev->driver->name,
+ dev->parent->name);
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
+static struct cmd_tbl temperature_subcmd[] = {
+ U_BOOT_CMD_MKENT(list, 1, 1, do_list, "", ""),
+ U_BOOT_CMD_MKENT(get, 2, 1, do_get, "", ""),
+};
+
+static int do_temperature(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct cmd_tbl *cmd;
+
+ argc--;
+ argv++;
+
+ cmd = find_cmd_tbl(argv[0], temperature_subcmd,
ARRAY_SIZE(temperature_subcmd));
+ if (!cmd || argc > cmd->maxargs)
+ return CMD_RET_USAGE;
+
+ return cmd->cmd(cmdtp, flag, argc, argv);
+}
+
+U_BOOT_CMD(temperature, CONFIG_SYS_MAXARGS, 1, do_temperature,
+ "thermal sensor temperature",
+ "list\t\tshow list of temperature sensors\n"
+ "get [thermal device name]\tprint temperature"
+);
--
2.37.1
Re: [PATCH 04/13] reset: qcom: Add support for QCS404 SoC reset table
On Tue, Aug 9, 2022 at 3:25 PM Sumit Garg wrote:
>
> Hi Robert,
>
> Thanks for your review.
>
> On Sat, 6 Aug 2022 at 13:11, Robert Marko wrote:
> >
> > On Thu, Aug 4, 2022 at 4:28 PM Sumit Garg wrote:
> > >
> > > Signed-off-by: Sumit Garg
> > > ---
> > > drivers/reset/reset-qcom.c | 30 ++
> > > 1 file changed, 30 insertions(+)
> > >
> > > diff --git a/drivers/reset/reset-qcom.c b/drivers/reset/reset-qcom.c
> > > index 40f436ede4..94315e76d5 100644
> > > --- a/drivers/reset/reset-qcom.c
> > > +++ b/drivers/reset/reset-qcom.c
> > > @@ -102,6 +102,35 @@ static const struct qcom_reset_map gcc_qcom_resets[]
> > > = {
> > > };
> > > #endif
> > >
> > > +#ifdef CONFIG_TARGET_QCS404EVB
> >
> > Hi,
> > Why not pass the reset maps via match data per compatible?
> >
>
> Yeah but that won't allow me to get rid of this "#ifdef" since
> bindings header (qcom,gcc-qcs404.h) and corresponding reset table
> needs to be included under it due to overlapping reset IDs. So it
> won't add any value.
Hi,
I see it now.
Regards,
Robert
>
> -Sumit
>
> > Regards,
> > Robert
> >
> > > +#include
> > > +static const struct qcom_reset_map gcc_qcom_resets[] = {
> > > + [GCC_GENI_IR_BCR] = { 0x0F000 },
> > > + [GCC_CDSP_RESTART] = { 0x18000 },
> > > + [GCC_USB_HS_BCR] = { 0x41000 },
> > > + [GCC_USB2_HS_PHY_ONLY_BCR] = { 0x41034 },
> > > + [GCC_QUSB2_PHY_BCR] = { 0x4103c },
> > > + [GCC_USB_HS_PHY_CFG_AHB_BCR] = { 0xc, 1 },
> > > + [GCC_USB2A_PHY_BCR] = { 0xc, 0 },
> > > + [GCC_USB3_PHY_BCR] = { 0x39004 },
> > > + [GCC_USB_30_BCR] = { 0x39000 },
> > > + [GCC_USB3PHY_PHY_BCR] = { 0x39008 },
> > > + [GCC_PCIE_0_BCR] = { 0x3e000 },
> > > + [GCC_PCIE_0_PHY_BCR] = { 0x3e004 },
> > > + [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x3e038 },
> > > + [GCC_PCIEPHY_0_PHY_BCR] = { 0x3e03c },
> > > + [GCC_PCIE_0_AXI_MASTER_STICKY_ARES] = { 0x3e040, 6},
> > > + [GCC_PCIE_0_AHB_ARES] = { 0x3e040, 5 },
> > > + [GCC_PCIE_0_AXI_SLAVE_ARES] = { 0x3e040, 4 },
> > > + [GCC_PCIE_0_AXI_MASTER_ARES] = { 0x3e040, 3 },
> > > + [GCC_PCIE_0_CORE_STICKY_ARES] = { 0x3e040, 2 },
> > > + [GCC_PCIE_0_SLEEP_ARES] = { 0x3e040, 1 },
> > > + [GCC_PCIE_0_PIPE_ARES] = { 0x3e040, 0 },
> > > + [GCC_EMAC_BCR] = { 0x4e000 },
> > > + [GCC_WDSP_RESTART] = {0x19000},
> > > +};
> > > +#endif
> > > +
> > > static int qcom_reset_assert(struct reset_ctl *rst)
> > > {
> > > struct qcom_reset_priv *priv = dev_get_priv(rst->dev);
> > > @@ -141,6 +170,7 @@ static const struct reset_ops qcom_reset_ops = {
> > >
> > > static const struct udevice_id qcom_reset_ids[] = {
> > > { .compatible = "qcom,gcc-reset-ipq4019" },
> > > + { .compatible = "qcom,gcc-reset-qcs404" },
> > > { }
> > > };
> > >
> > > --
> > > 2.25.1
> > >
> >
> >
> > --
> > Robert Marko
> > Staff Embedded Linux Engineer
> > Sartura Ltd.
> > Lendavska ulica 16a
> > 1 Zagreb, Croatia
> > Email: robert.ma...@sartura.hr
> > Web: www.sartura.hr
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
Re: [PATCH 04/13] reset: qcom: Add support for QCS404 SoC reset table
On Thu, Aug 4, 2022 at 4:28 PM Sumit Garg wrote:
>
> Signed-off-by: Sumit Garg
> ---
> drivers/reset/reset-qcom.c | 30 ++
> 1 file changed, 30 insertions(+)
>
> diff --git a/drivers/reset/reset-qcom.c b/drivers/reset/reset-qcom.c
> index 40f436ede4..94315e76d5 100644
> --- a/drivers/reset/reset-qcom.c
> +++ b/drivers/reset/reset-qcom.c
> @@ -102,6 +102,35 @@ static const struct qcom_reset_map gcc_qcom_resets[] = {
> };
> #endif
>
> +#ifdef CONFIG_TARGET_QCS404EVB
Hi,
Why not pass the reset maps via match data per compatible?
Regards,
Robert
> +#include
> +static const struct qcom_reset_map gcc_qcom_resets[] = {
> + [GCC_GENI_IR_BCR] = { 0x0F000 },
> + [GCC_CDSP_RESTART] = { 0x18000 },
> + [GCC_USB_HS_BCR] = { 0x41000 },
> + [GCC_USB2_HS_PHY_ONLY_BCR] = { 0x41034 },
> + [GCC_QUSB2_PHY_BCR] = { 0x4103c },
> + [GCC_USB_HS_PHY_CFG_AHB_BCR] = { 0xc, 1 },
> + [GCC_USB2A_PHY_BCR] = { 0xc, 0 },
> + [GCC_USB3_PHY_BCR] = { 0x39004 },
> + [GCC_USB_30_BCR] = { 0x39000 },
> + [GCC_USB3PHY_PHY_BCR] = { 0x39008 },
> + [GCC_PCIE_0_BCR] = { 0x3e000 },
> + [GCC_PCIE_0_PHY_BCR] = { 0x3e004 },
> + [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x3e038 },
> + [GCC_PCIEPHY_0_PHY_BCR] = { 0x3e03c },
> + [GCC_PCIE_0_AXI_MASTER_STICKY_ARES] = { 0x3e040, 6},
> + [GCC_PCIE_0_AHB_ARES] = { 0x3e040, 5 },
> + [GCC_PCIE_0_AXI_SLAVE_ARES] = { 0x3e040, 4 },
> + [GCC_PCIE_0_AXI_MASTER_ARES] = { 0x3e040, 3 },
> + [GCC_PCIE_0_CORE_STICKY_ARES] = { 0x3e040, 2 },
> + [GCC_PCIE_0_SLEEP_ARES] = { 0x3e040, 1 },
> + [GCC_PCIE_0_PIPE_ARES] = { 0x3e040, 0 },
> + [GCC_EMAC_BCR] = { 0x4e000 },
> + [GCC_WDSP_RESTART] = {0x19000},
> +};
> +#endif
> +
> static int qcom_reset_assert(struct reset_ctl *rst)
> {
> struct qcom_reset_priv *priv = dev_get_priv(rst->dev);
> @@ -141,6 +170,7 @@ static const struct reset_ops qcom_reset_ops = {
>
> static const struct udevice_id qcom_reset_ids[] = {
> { .compatible = "qcom,gcc-reset-ipq4019" },
> + { .compatible = "qcom,gcc-reset-qcs404" },
> { }
> };
>
> --
> 2.25.1
>
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
[PATCH 2/2] mvebu: uDPU: disable non-present peripherals
uDPU like eDPU does not expose SCSI based peripherals like SATA nor PCI and for sure it does not have the Intel E1000 PCI card. So, like for eDPU remove those from the defconfig. Signed-off-by: Robert Marko --- configs/uDPU_defconfig | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index f7cd1a0589..ec7cda6a29 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -12,7 +12,6 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-3720-uDPU" CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_SYS_LOAD_ADDR=0x600 CONFIG_DEBUG_UART=y -CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y @@ -33,7 +32,6 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y -CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -49,7 +47,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_AHCI_MVEBU=y CONFIG_CLK=y CONFIG_CLK_MVEBU=y CONFIG_DM_I2C=y @@ -72,17 +69,15 @@ CONFIG_PHYLIB_10G=y CONFIG_PHY_MARVELL=y CONFIG_PHY_FIXED=y CONFIG_PHY_GIGE=y -CONFIG_E1000=y CONFIG_MVNETA=y CONFIG_MVMDIO=y -CONFIG_PCI=y -CONFIG_PCI_AARDVARK=y CONFIG_PHY=y CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +# CONFIG_SCSI is not set CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y CONFIG_SYSINFO=y -- 2.36.1
[PATCH 1/2] mvebu: eDPU: disable SCSI support
eDPU does not use SCSI nor it has SATA exposed, and commit arm: mvebu: a3720: Set BOOT_TARGET_DEVICES list to enabled peripherals now allows compiling U-boot wihout all of the BOOT_TARGET_DEVICES since not all boards have all of the listed peripherals exposed. So, disable SCSI support in defconfig for eDPU. Signed-off-by: Robert Marko --- configs/eDPU_defconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig index e2e593ad21..9c124bf147 100644 --- a/configs/eDPU_defconfig +++ b/configs/eDPU_defconfig @@ -32,7 +32,6 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y -# CONFIG_CMD_SCSI is not set CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -78,7 +77,7 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_SCSI=y +# CONFIG_SCSI is not set CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y CONFIG_SYSINFO=y -- 2.36.1
Re: [PATCH v5 2/3] arm: mvebu: add support for Methode eDPU
On Fri, Jun 3, 2022 at 11:42 AM Stefan Roese wrote: > > On 02.06.22 23:58, Pali Rohár wrote: > > On Monday 23 May 2022 11:20:27 Pali Rohár wrote: > >> On Monday 23 May 2022 11:18:23 Robert Marko wrote: > >>> On Mon, May 23, 2022 at 10:20 AM Pali Rohár wrote: > >>>> > >>>> On Friday 20 May 2022 13:46:32 Robert Marko wrote: > >>>>> Changes in v4: > >>>>> * Remove CMD_PCI as PCI is disabled anyway > >>>>> > >>>>> Changes in v3: > >>>>> * Use DTS-es pending merge upstream > >>>>> * Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI > >>>>> device > >>>>> as one of the bootable ones. > >>>>> We dont have space constraints, so just re-enable SCSI rather than > >>>>> making > >>>>> one more config header > >>>> > >>>> Hello! Is this SCSI error related to distroboot as for NVMe here? > >>>> https://patchwork.ozlabs.org/comment/2896154/ > >>> > >>> Hi Pali, its the same type of error, just for SCSI. > >>> I see that you posted a possible solution for cases where boards dont have > >>> one of the listed media enabled. > >> > >> Ok! I added guard in new patch for all boot targets, including SCSI, so > >> it should fix also issue for *DPU boards. > > > > Hello! Patch "Set BOOT_TARGET_DEVICES list to enabled peripherals" is > > now in u-boot-marvell tree, so you could send a patch which disables > > those unused peripherals in eDPU defconfig file. > > https://source.denx.de/u-boot/custodians/u-boot-marvell/-/commits/master/ > > Just to clarify: I originally wanted to push those changes in "master" > upstream beginning of this week. But decided to defer this until the > next merge window open, as most of them are not bug fixes. > > Still Pali's comment is correct. You could already work on a patch using > these groundwork patches as basis. No issues, I was waiting for them to be picked into your tree. I will whip up a patch to disable SCSI now that it's not required anymore. Regards, Robert > > Thanks, > Stefan > > >>> Regards, > >>> Robert > >>>> > >>>>> Changes in v2: > >>>>> * Correct the PHY mode to 2500Base-X > >>>>> * Add the DTB to Makefile > >>>>> * Remove SCSI/SATA, PCI and E1000 from defconfig as they are not present > >>> > >>> > >>> > >>> -- > >>> Robert Marko > >>> Staff Embedded Linux Engineer > >>> Sartura Ltd. > >>> Lendavska ulica 16a > >>> 1 Zagreb, Croatia > >>> Email: robert.ma...@sartura.hr > >>> Web: www.sartura.hr > > Viele Grüße, > Stefan Roese > > -- > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: robert.ma...@sartura.hr Web: www.sartura.hr
Re: [PATCH v5 2/3] arm: mvebu: add support for Methode eDPU
On Mon, May 23, 2022 at 10:20 AM Pali Rohár wrote: > > On Friday 20 May 2022 13:46:32 Robert Marko wrote: > > Changes in v4: > > * Remove CMD_PCI as PCI is disabled anyway > > > > Changes in v3: > > * Use DTS-es pending merge upstream > > * Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device > > as one of the bootable ones. > > We dont have space constraints, so just re-enable SCSI rather than making > > one more config header > > Hello! Is this SCSI error related to distroboot as for NVMe here? > https://patchwork.ozlabs.org/comment/2896154/ Hi Pali, its the same type of error, just for SCSI. I see that you posted a possible solution for cases where boards dont have one of the listed media enabled. Regards, Robert > > > Changes in v2: > > * Correct the PHY mode to 2500Base-X > > * Add the DTB to Makefile > > * Remove SCSI/SATA, PCI and E1000 from defconfig as they are not present -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: robert.ma...@sartura.hr Web: www.sartura.hr
[PATCH v5 3/3] MAINTAINERS: add myself as Methode maintainer
I am currently maintaing the Methode uDPU and eDPU boards so add myself as the maintainer for them. Remove the old entry from board/Marvell/mvebu_armada-37xx/MAINTAINERS. Signed-off-by: Robert Marko --- Changes in v5: * Remove entry from the board/Marvell/mvebu_armada-37xx/MAINTAINERS --- MAINTAINERS | 8 board/Marvell/mvebu_armada-37xx/MAINTAINERS | 5 - 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 56be0bfad0..3d72b0c11f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -344,6 +344,14 @@ F: tools/mtk_image.c F: tools/mtk_image.h N: mediatek +ARM METHODE SUPPORT +M: Robert Marko +S: Maintained +F: arch/arm/dts/armada-3720-eDPU* +F: arch/arm/dts/armada-3720-uDPU* +F: configs/eDPU_defconfig +F: configs/uDPU_defconfig + ARM MICROCHIP/ATMEL AT91 M: Eugen Hristev S: Maintained diff --git a/board/Marvell/mvebu_armada-37xx/MAINTAINERS b/board/Marvell/mvebu_armada-37xx/MAINTAINERS index f2c0a582d7..9b0afeef10 100644 --- a/board/Marvell/mvebu_armada-37xx/MAINTAINERS +++ b/board/Marvell/mvebu_armada-37xx/MAINTAINERS @@ -9,8 +9,3 @@ ESPRESSOBin BOARD M: Konstantin Porotchkin S: Maintained F: configs/mvebu_espressobin-88f3720_defconfig - -uDPU BOARD -M: Vladimir Vid -S: Maintained -F: configs/uDPU_defconfig -- 2.36.1
[PATCH v5 2/3] arm: mvebu: add support for Methode eDPU
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not
work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko
---
Changes in v4:
* Remove CMD_PCI as PCI is disabled anyway
Changes in v3:
* Use DTS-es pending merge upstream
* Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device
as one of the bootable ones.
We dont have space constraints, so just re-enable SCSI rather than making
one more config header
Changes in v2:
* Correct the PHY mode to 2500Base-X
* Add the DTB to Makefile
* Remove SCSI/SATA, PCI and E1000 from defconfig as they are not present
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++
arch/arm/dts/armada-3720-eDPU.dts | 14 ++
arch/arm/dts/armada-3720-uDPU.dts | 150 +---
arch/arm/dts/armada-3720-uDPU.dtsi| 160 ++
configs/eDPU_defconfig| 95 +
6 files changed, 316 insertions(+), 149 deletions(-)
create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
create mode 100644 arch/arm/dts/armada-3720-eDPU.dts
create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi
create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 83630af4f6..c484875585 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -236,6 +236,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-db.dtb \
armada-3720-espressobin.dtb \
armada-3720-turris-mox.dtb \
+ armada-3720-eDPU.dtb\
armada-3720-uDPU.dtb\
armada-375-db.dtb \
armada-385-atl-x530.dtb \
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
new file mode 100644
index 00..1b2648f64d
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ product = "eDPU";
+ };
+
+ baseboard {
+ product = "eDPU";
+ };
+
+ chassis {
+ product = "eDPU";
+ };
+ };
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+
+ spi-flash@0 {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ /* G.hn does not work without additional configuration */
+ status = "disabled";
+};
+
+ {
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
diff --git a/arch/arm/dts/armada-3720-eDPU.dts
b/arch/arm/dts/armada-3720-eDPU.dts
new file mode 100644
index 00..57fc698e55
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "armada-3720-uDPU.dtsi"
+
+/ {
+ model = "Methode eDPU Board";
+ compatible = "methode,edpu", "marvell,armada3720", "marvell,armada3710";
+};
+
+ {
+ phy-mode = "2500base-x";
+};
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index f21a855fc6..a75734d88a 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -1,66 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Device tree for the uDPU board.
- * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- * Copyright (C) 2016 Marvell
- * Copyright (C) 2019 Methode Electronics
- * Copyright (C) 2019 Telus
- *
- * Vladimir Vid
- */
/dts-v1/;
-#include
-#include "armada-372x.dtsi"
+#include "armada-3720-uDPU.dtsi"
/ {
model = "Methode uDPU Board";
compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x 0x 0x 0x2000>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-power1 {
- label = "udpu:green:power";
- gpios = < 11 GPIO_ACTIVE_LOW>;
- };
-
-
[PATCH v5 1/3] arm: mvebu: dts: sync DTS
Update the uDPU DTS to the version that is pending upstream [1][2][3][4].
[1]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-4-robert.ma...@sartura.hr/
[2]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-5-robert.ma...@sartura.hr/
[3]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-6-robert.ma...@sartura.hr/
[4]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-7-robert.ma...@sartura.hr/
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU.dts | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index 1f534c0c65..f21a855fc6 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -16,7 +16,7 @@
/ {
model = "Methode uDPU Board";
- compatible = "methode,udpu", "marvell,armada3720";
+ compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
chosen {
stdout-path = "serial0:115200n8";
@@ -28,35 +28,34 @@
};
leds {
- pinctrl-names = "default";
compatible = "gpio-leds";
- power1 {
+ led-power1 {
label = "udpu:green:power";
gpios = < 11 GPIO_ACTIVE_LOW>;
};
- power2 {
+ led-power2 {
label = "udpu:red:power";
gpios = < 12 GPIO_ACTIVE_LOW>;
};
- network1 {
+ led-network1 {
label = "udpu:green:network";
gpios = < 13 GPIO_ACTIVE_LOW>;
};
- network2 {
+ led-network2 {
label = "udpu:red:network";
gpios = < 14 GPIO_ACTIVE_LOW>;
};
- alarm1 {
+ led-alarm1 {
label = "udpu:green:alarm";
gpios = < 15 GPIO_ACTIVE_LOW>;
};
- alarm2 {
+ led-alarm2 {
label = "udpu:red:alarm";
gpios = < 16 GPIO_ACTIVE_LOW>;
};
@@ -99,7 +98,7 @@
pinctrl-names = "default";
pinctrl-0 = <_quad_pins>;
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <5400>;
@@ -153,14 +152,12 @@
scl-gpios = < 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = < 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- nct375@48 {
- status = "okay";
+ temp-sensor@48 {
compatible = "ti,tmp75c";
reg = <0x48>;
};
- nct375@49 {
- status = "okay";
+ temp-sensor@49 {
compatible = "ti,tmp75c";
reg = <0x49>;
};
--
2.36.1
Re: [PATCH v4 3/3] MAINTAINERS: add myself as Methode maintainer
On Fri, May 20, 2022 at 1:17 PM Stefan Roese wrote: > > On 20.05.22 13:12, Robert Marko wrote: > > I am currently maintaing the Methode uDPU and eDPU boards so add myself > > as the maintainer for them. > > > > Signed-off-by: Robert Marko > > --- > > MAINTAINERS | 8 > > 1 file changed, 8 insertions(+) > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index 56be0bfad0..3d72b0c11f 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -344,6 +344,14 @@ F: tools/mtk_image.c > > F: tools/mtk_image.h > > N: mediatek > > > > +ARM METHODE SUPPORT > > +M: Robert Marko > > +S: Maintained > > +F: arch/arm/dts/armada-3720-eDPU* > > +F: arch/arm/dts/armada-3720-uDPU* > > +F: configs/eDPU_defconfig > > +F: configs/uDPU_defconfig > > + > > Please board/Marvell/mvebu_armada-37xx/MAINTAINERS as there is already > a bit for the uDPU which might be better dropped now, if you think > that's feasible. Hi Stefan, I can drop the uDPU entry from there as I was not aware it even existed. Regards, Robert > > Thanks, > Stefan > > > ARM MICROCHIP/ATMEL AT91 > > M: Eugen Hristev > > S: Maintained > > Viele Grüße, > Stefan Roese > > -- > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: robert.ma...@sartura.hr Web: www.sartura.hr
[PATCH v4 2/3] arm: mvebu: add support for Methode eDPU
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not
work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko
---
Changes in v4:
* Remove CMD_PCI as PCI is disabled anyway
Changes in v3:
* Use DTS-es pending merge upstream
* Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device
as one of the bootable ones.
We dont have space constraints, so just re-enable SCSI rather than making
one more config header
Changes in v2:
* Correct the PHY mode to 2500Base-X
* Add the DTB to Makefile
* Remove SCSI/SATA, PCI and E1000 from defconfig as they are not present
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++
arch/arm/dts/armada-3720-eDPU.dts | 14 ++
arch/arm/dts/armada-3720-uDPU.dts | 150 +---
arch/arm/dts/armada-3720-uDPU.dtsi| 160 ++
configs/eDPU_defconfig| 95 +
6 files changed, 316 insertions(+), 149 deletions(-)
create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
create mode 100644 arch/arm/dts/armada-3720-eDPU.dts
create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi
create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 83630af4f6..c484875585 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -236,6 +236,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-db.dtb \
armada-3720-espressobin.dtb \
armada-3720-turris-mox.dtb \
+ armada-3720-eDPU.dtb\
armada-3720-uDPU.dtb\
armada-375-db.dtb \
armada-385-atl-x530.dtb \
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
new file mode 100644
index 00..1b2648f64d
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ product = "eDPU";
+ };
+
+ baseboard {
+ product = "eDPU";
+ };
+
+ chassis {
+ product = "eDPU";
+ };
+ };
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+
+ spi-flash@0 {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ /* G.hn does not work without additional configuration */
+ status = "disabled";
+};
+
+ {
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
diff --git a/arch/arm/dts/armada-3720-eDPU.dts
b/arch/arm/dts/armada-3720-eDPU.dts
new file mode 100644
index 00..57fc698e55
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "armada-3720-uDPU.dtsi"
+
+/ {
+ model = "Methode eDPU Board";
+ compatible = "methode,edpu", "marvell,armada3720", "marvell,armada3710";
+};
+
+ {
+ phy-mode = "2500base-x";
+};
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index f21a855fc6..a75734d88a 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -1,66 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Device tree for the uDPU board.
- * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- * Copyright (C) 2016 Marvell
- * Copyright (C) 2019 Methode Electronics
- * Copyright (C) 2019 Telus
- *
- * Vladimir Vid
- */
/dts-v1/;
-#include
-#include "armada-372x.dtsi"
+#include "armada-3720-uDPU.dtsi"
/ {
model = "Methode uDPU Board";
compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x 0x 0x 0x2000>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-power1 {
- label = "udpu:green:power";
- gpios = < 11 GPIO_ACTIVE_LOW>;
- };
-
-
[PATCH v4 3/3] MAINTAINERS: add myself as Methode maintainer
I am currently maintaing the Methode uDPU and eDPU boards so add myself as the maintainer for them. Signed-off-by: Robert Marko --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 56be0bfad0..3d72b0c11f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -344,6 +344,14 @@ F: tools/mtk_image.c F: tools/mtk_image.h N: mediatek +ARM METHODE SUPPORT +M: Robert Marko +S: Maintained +F: arch/arm/dts/armada-3720-eDPU* +F: arch/arm/dts/armada-3720-uDPU* +F: configs/eDPU_defconfig +F: configs/uDPU_defconfig + ARM MICROCHIP/ATMEL AT91 M: Eugen Hristev S: Maintained -- 2.36.1
[PATCH v4 1/3] arm: mvebu: dts: sync DTS
Update the uDPU DTS to the version that is pending upstream [1][2][3][4].
[1]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-4-robert.ma...@sartura.hr/
[2]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-5-robert.ma...@sartura.hr/
[3]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-6-robert.ma...@sartura.hr/
[4]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-7-robert.ma...@sartura.hr/
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU.dts | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index 1f534c0c65..f21a855fc6 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -16,7 +16,7 @@
/ {
model = "Methode uDPU Board";
- compatible = "methode,udpu", "marvell,armada3720";
+ compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
chosen {
stdout-path = "serial0:115200n8";
@@ -28,35 +28,34 @@
};
leds {
- pinctrl-names = "default";
compatible = "gpio-leds";
- power1 {
+ led-power1 {
label = "udpu:green:power";
gpios = < 11 GPIO_ACTIVE_LOW>;
};
- power2 {
+ led-power2 {
label = "udpu:red:power";
gpios = < 12 GPIO_ACTIVE_LOW>;
};
- network1 {
+ led-network1 {
label = "udpu:green:network";
gpios = < 13 GPIO_ACTIVE_LOW>;
};
- network2 {
+ led-network2 {
label = "udpu:red:network";
gpios = < 14 GPIO_ACTIVE_LOW>;
};
- alarm1 {
+ led-alarm1 {
label = "udpu:green:alarm";
gpios = < 15 GPIO_ACTIVE_LOW>;
};
- alarm2 {
+ led-alarm2 {
label = "udpu:red:alarm";
gpios = < 16 GPIO_ACTIVE_LOW>;
};
@@ -99,7 +98,7 @@
pinctrl-names = "default";
pinctrl-0 = <_quad_pins>;
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <5400>;
@@ -153,14 +152,12 @@
scl-gpios = < 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = < 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- nct375@48 {
- status = "okay";
+ temp-sensor@48 {
compatible = "ti,tmp75c";
reg = <0x48>;
};
- nct375@49 {
- status = "okay";
+ temp-sensor@49 {
compatible = "ti,tmp75c";
reg = <0x49>;
};
--
2.36.1
Re: [PATCH v3 2/3] arm: mvebu: add support for Methode eDPU
On Fri, May 20, 2022 at 1:01 PM Pali Rohár wrote: > > On Friday 20 May 2022 12:54:23 Robert Marko wrote: > > Methode eDPU is an Armada 3720 power board based on the Methode uDPU. > > > > They feature the same CPU, RAM, and storage as well as the form factor. > > > > However, eDPU only has one SFP slot plus a copper G.hn port which does not > > work under U-boot. > > > > In order to reduce duplication, split the uDPU DTS into a common one. > > > > Signed-off-by: Robert Marko > > --- > > Changes in v3: > > * Use DTS-es pending merge upstream > > * Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device > > as one of the bootable ones. > > We dont have space constraints, so just re-enable SCSI rather than making > > one more config header > > > > Changes in v2: > > * Correct the PHY mode to 2500Base-X > > * Add the DTB to Makefile > > * Remove SCSI/SATA, PCI and E1000 from defconfig as they are not present > > --- > ... > > diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig > > new file mode 100644 > > index 00..5e5e5a6b4d > > --- /dev/null > > +++ b/configs/eDPU_defconfig > > @@ -0,0 +1,96 @@ > > +CONFIG_ARM=y > > +CONFIG_ARCH_CPU_INIT=y > > +CONFIG_ARCH_MVEBU=y > > +CONFIG_SYS_TEXT_BASE=0x > > +CONFIG_TARGET_MVEBU_ARMADA_37XX=y > > +CONFIG_MVEBU_EFUSE=y > > +CONFIG_ENV_SIZE=0x1 > > +CONFIG_ENV_OFFSET=0x18 > > +CONFIG_ENV_SECT_SIZE=0x1 > > +CONFIG_DM_GPIO=y > > +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" > > +CONFIG_DEBUG_UART_BASE=0xd0012000 > > +CONFIG_SYS_LOAD_ADDR=0x600 > > +CONFIG_DEBUG_UART=y > > +CONFIG_DISTRO_DEFAULTS=y > > +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > > +CONFIG_FIT=y > > +CONFIG_FIT_VERBOSE=y > > +CONFIG_USE_PREBOOT=y > > +# CONFIG_DISPLAY_CPUINFO is not set > > +# CONFIG_DISPLAY_BOARDINFO is not set > > +CONFIG_DISPLAY_BOARDINFO_LATE=y > > +CONFIG_ARCH_EARLY_INIT_R=y > > +CONFIG_BOARD_EARLY_INIT_F=y > > +CONFIG_SYS_PROMPT="eDPU>> " > > +# CONFIG_CMD_ELF is not set > > +# CONFIG_CMD_IMI is not set > > +# CONFIG_CMD_XIMG is not set > > +# CONFIG_CMD_FLASH is not set > > +CONFIG_CMD_FUSE=y > > +CONFIG_CMD_GPIO=y > > +CONFIG_CMD_I2C=y > > +CONFIG_CMD_MMC=y > > +CONFIG_CMD_MTD=y > > +CONFIG_CMD_PCI=y > > Hello! Seems that you forgot to remove some parts of PCI... Oh yeah, forgot the command(Which weirdly does not depend on PCI support at all) I will fixup it ASAP. Regards, Robert > > > +# CONFIG_CMD_SCSI is not set > > +CONFIG_CMD_SPI=y > > +CONFIG_CMD_USB=y > > +# CONFIG_CMD_SETEXPR is not set > > +CONFIG_CMD_TFTPPUT=y > > +CONFIG_CMD_CACHE=y > > +CONFIG_CMD_TIME=y > > +CONFIG_CMD_MVEBU_BUBT=y > > +CONFIG_CMD_EXT4_WRITE=y > > +CONFIG_MAC_PARTITION=y > > +CONFIG_ENV_OVERWRITE=y > > +CONFIG_ENV_IS_IN_SPI_FLASH=y > > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > > +CONFIG_ARP_TIMEOUT=200 > > +CONFIG_NET_RETRY_COUNT=50 > > +CONFIG_NET_RANDOM_ETHADDR=y > > +CONFIG_CLK=y > > +CONFIG_CLK_MVEBU=y > > +CONFIG_DM_I2C=y > > +CONFIG_DM_I2C_GPIO=y > > +CONFIG_SYS_I2C_MV=y > > +CONFIG_MISC=y > > +CONFIG_MMC_HS200_SUPPORT=y > > +CONFIG_MMC_SDHCI=y > > +CONFIG_MMC_SDHCI_SDMA=y > > +CONFIG_MMC_SDHCI_XENON=y > > +CONFIG_MTD=y > > +CONFIG_DM_MTD=y > > +CONFIG_SPI_FLASH_SFDP_SUPPORT=y > > +CONFIG_SPI_FLASH_MACRONIX=y > > +CONFIG_SPI_FLASH_SPANSION=y > > +CONFIG_SPI_FLASH_STMICRO=y > > +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set > > +CONFIG_SPI_FLASH_MTD=y > > +CONFIG_PHYLIB_10G=y > > +CONFIG_PHY_MARVELL=y > > +CONFIG_PHY_FIXED=y > > +CONFIG_PHY_GIGE=y > > +CONFIG_MVNETA=y > > +CONFIG_MVMDIO=y > > +CONFIG_PHY=y > > +CONFIG_MVEBU_COMPHY_SUPPORT=y > > +CONFIG_PINCTRL=y > > +CONFIG_PINCTRL_ARMADA_37XX=y > > +CONFIG_DM_REGULATOR_FIXED=y > > +CONFIG_DM_REGULATOR_GPIO=y > > +CONFIG_DM_SCSI=y > > +CONFIG_MVEBU_A3700_UART=y > > +CONFIG_MVEBU_A3700_SPI=y > > +CONFIG_SYSINFO=y > > +CONFIG_SYSINFO_SMBIOS=y > > +CONFIG_USB=y > > +CONFIG_USB_XHCI_HCD=y > > +CONFIG_USB_EHCI_HCD=y > > +CONFIG_USB_HOST_ETHER=y > > +CONFIG_USB_ETHER_ASIX=y > > +CONFIG_USB_ETHER_MCS7830=y > > +CONFIG_USB_ETHER_RTL8152=y > > +CONFIG_USB_ETHER_SMSC95XX=y > > +CONFIG_LZO=y > > +CONFIG_SPL_LZO=y > > -- > > 2.36.1 > > -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: robert.ma...@sartura.hr Web: www.sartura.hr
