Dear Hans de Goede,
Typographical error here:
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
at at -197,7 +197,7 at at static int serial_pre_remove(struct
udevice *dev)
#ifdef CONFIG_SYS_STDIO_DEREGISTER
struct serial_dev_priv *upriv =
Dear richie_wang,
richie_wang macro_system at 163.com writes:
Submitting a patch isn't as easy as copy-n-pasting but it's all documented.
Please read this page:
http://www.denx.de/wiki/U-Boot/Patches
From 133570dbb7f772f78558cfac9d8c558513d033a1 Mon Sep 17 00:00:00 2001
From: richie_wang
Dear Prabhakar Kushwaha,
Prabhakar Kushwaha prabhakar at freescale.com writes:
snipped
Thank you for the replies.
You mention you use the PBL... but probably not a pblimage. The patch
correctly fixes RAMBOOT_PBL as a trigger to generate the pblimage (u-
boot.pbl) but there seems to
Dear Steve Miller,
Steve Miller stevem at tanisys.com writes:
snipped
Questions:
1.Has anyone compiled u-boot for the 405EX using a DIMM, aka an
SPD defined RAM?
2. Is there something obvious that I need to place in the config
to get this to work? I compared this
Dear Prabhakar Kushwaha,
Prabhakar Kushwaha prabhakar at freescale.com writes:
Add support of 2 stage NAND boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(96K). This further
initialise DDR using SPD and environment and copy u-boot(512 kb) from NAND
to
Dear Prabhakar Kushwaha,
Prabhakar Kushwaha prabhakar at freescale.com writes:
T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power Architecture™ processor.
snipped
The code was test compiled.
You probably need to rebase to
Dear Prabhakar Kushwaha,
Rommel Custodio sessyargc+uboot at gmail.com writes:
Dear Prabhakar Kushwaha,
Prabhakar Kushwaha prabhakar at freescale.com writes:
T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power
Hi All,
Latest sandbox builds fine on a Linux box (VM actually).
Though, is it possible to build sandbox on OS X?? Has anyone tried lately?
I tried building on Mac a couple or so of days back and it just spewed out an
error message. I've got the standard OS X compiler installed and homebrew
Hi All,
U-Boot 2013.07-rc3 [ELDK 5.2.1 / ELDK 5.3]
Now I've started to use the new ext4 code. I need the ext4write command.
Though there seems to be several problems with the ext2/ext4 code.
I am testing on an ml507 (PPC440, Big Endian).
There are some cases where the a field is 16-bit but
Sorry for the extra noise.
On Wednesday, July 17, 2013, Rommel G Custodio sessya...@gmail.com wrote:
Dear Lukasz Majewski,
On 2013.07/16, Lukasz Majewski wrote:
Hi Rommel,
Hi All,
U-Boot 2013.07-rc3 [ELDK 5.2.1 / ELDK 5.3]
Now I've started to use the new ext4 code. I need the
Jagannadha Sutradharudu Teki jagannadha.sutradharudu-teki at xilinx.com
writes:
Hi,
On.. drivers/mmc/sdhci.c
+ if (caps SDHCI_CAN_DO_8BIT)
+ mmc-host_caps |= MMC_MODE_8BIT;
Here we are setting 8BIT bus width, if the sdhci capabilities register 18
bit is set.
txcotrader txcotrader at gmail.com writes:
Dear txcotrader
By board is based off of the ppc460sx.
I only have one I2C bus.
2007 version has clock signal at 0x50 (DIMM0 I2C)
2013 version has no clock signal at 0x50
My boardconfig.h file has the same values configured.
If you haven't
Stefan Roese sr at denx.de writes:
On 02/07/2013 04:20 AM, Frank Lombardo wrote:
Thanks for the responses guys. I got to work. What I found was that
the address being passed to the driver code was 0x8400. This is the
base address of the UART. However, the registers of the XPS
git am cleanly when mmc: check the revision for sd3.0 is
applied first. And mmc: check the revision for sd3.0 doesn't git am
cleanly if this patch is applied first. Maybe merging the two patches is
better to avoid this chicken and egg problem.
Builds OK all by itself.
Acked-by: Rommel Custodio
Dear Frank,
Frank Lombardo fastfrank at gmail.com writes:
So, that leaves me with the following questions:
1) Is the lack of flash memory causing THIS problem?
2) Am I missing some config items?
3) Does anybody have any advice on how I can debug this?
I'm on an ML507 and I use the default
Rommel Custodio sessyargc+uboot at gmail.com writes:
Dear Frank,
Frank Lombardo fastfrank at gmail.com writes:
So, that leaves me with the following questions:
1) Is the lack of flash memory causing THIS problem?
2) Am I missing some config items?
3) Does anybody have any advice
Dear Wolfgang,
Wolfgang Denk wd at denx.de writes:
What am I doing wrong.
Try instead:
env import -b 2005
Skipping the CRC ... maybe 2004 is the correct address.
env import -c 0x2000 0x200 if you want the CRC verified.
All the best,
Dear Wolfgang,
Wolfgang Denk wd at denx.de writes:
Dear Rommel Custodio,
:
:
You should actually read what I wrote before trying to correct me.
Apologies kind sir.
All the best,
Rommel
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U-Boot@lists.denx.de
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Dear Jagannadha,
Jagannadha Sutradharudu Teki jagannadha.sutradharudu-teki at xilinx.com
writes:
Hi Andy,
The latest patch mmc: Properly determine maximum supported bus width
(sha1: 7798f6dbd5e1a3030ed81a81da5dfb57c3307cac) is causing some error status
issue on
zynq platform with MMC
files changed, 3 insertions(+), 0 deletions(-)
Tested-by: Rommel Custodio sessya...@gmail.com
Note:
The change only reflects in the output of mmcinfo.
The functionality of mmc_send_if_cond() and sd_send_op_cond() is unaffected.
All the best,
Rommel
Dear Michal Simek
Michal Simek michal.simek at xilinx.com writes:
Fix one printf compilation warning in microblaze bdinfo part.
Warning log:
cmd_bdinfo.c: In function 'do_bdinfo':
cmd_bdinfo.c:219:2: warning: format '%u' expects argument of type
'unsigned int', but argument 2 has type
Dear Anatolij,
Anatolij Gustschin agust at denx.de writes:
Hi Albert,
On Sat, 10 Nov 2012 12:21:55 +0100
Albert ARIBAUD albert.u.boot at aribaud.net wrote:
...
Applied to u-boot-staging/agust at denx.de-urgent.
*bump*
This seems to be still missing in master.
All the best,
Dear Omer,
Ben-tal, Omer omer.ben-tal at intel.com writes:
Hi Denk,
I think I found a small bug in u-boot mmc driver (ver 2012.10).
Not sure how to submit it.
Any suggestions?
I was recently a newbie to the whole process myself.
I was pointed to this page earlier on:
Dear Jaehoon Chung, All,
Jaehoon Chung jh80.chung at samsung.com writes:
Hi Rommel,
Thanks for report.
On 11/05/2012 10:39 PM, Rommel G Custodio wrote:
Dear All, Jaehoon Chung
On 2012.09/21, Jaehoon Chung wrote:
In host-control register, DMA select bit field is present.
BUt
The default configuration for ml507 will generate a hang() in the
Xilinx uartlite driver.
userial_ports[] in drivers/serial/serial_xuartlite.c does not get
initialized properly. CONFIG_SERIAL_BASE is unused.
XILINX_UARTLITE_BASEADDR is used instead.
Signed-off-by: Rommel Custodio sessyargc+ub
Hello Jaehoon,
I didn't think so..Our environment is support the
CONFIG_SYS_MMC_MAX_BLK_COUNT.
This is defined in mmc.c right after the include definitions.
The comment says that:
Set block count limit because of 16 bit
register limit on some hardware
So my use of this define is a bit of
The default configuration for ml507 will generate a hang() in the Xilinx
uartlite driver.
userial_ports[] in drivers/serial/serial_xuartlite.c does not get
initialized properly. CONFIG_SERIAL_BASE is unused.
XILINX_UARTLITE_BASEADDR is used instead.
Signed-off-by: Rommel Custodio sessyargc+ub
Jaehoon Chung jh80.chung at samsung.com writes:
Timeout value is tunable.
When run read/write operation, sometime returned the timeout error.
Because the timeout value is too short.
Hello,
I think it is better to fine tune CONFIG_SYS_MMC_MAX_BLK_COUNT.
This gets assigned to mmc-b_max,
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