[U-Boot] [PATCH] powerpc/mpc85xx: Removed support for G4060
G4060 has no PA cores, hence removing its support.
Signed-off-by: Sandeep Singh sand...@freescale.com
Change-Id: Ia9b8760dec9bb890ee87c8b6c947d693aa884b33
Reviewed-on: http://git.am.freescale.net:8181/3808
Reviewed-by: Aggrwal Poonam-B10812 poonam.aggr...@freescale.com
Tested-by: Review Code-CDREVIEW cdrev...@freescale.com
Reviewed-by: York Sun york...@freescale.com
(cherry picked from commit bb94857b91955321afb0c6b836eb79f134600443)
Reviewed-on: http://git.am.freescale.net:8181/7156
Reviewed-by: Yusong Sun york...@freescale.com
(cherry picked from commit baa1bfe297e200fb9823068fa5f0f726621c3c06)
---
arch/powerpc/cpu/mpc8xxx/cpu.c |1 -
arch/powerpc/include/asm/processor.h |1 -
2 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 35795c4..8451cb2 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -64,7 +64,6 @@ static struct cpu_type cpu_type_list[] = {
CPU_TYPE_ENTRY(T4160, T4160, 0),
CPU_TYPE_ENTRY(B4860, B4860, 0),
CPU_TYPE_ENTRY(G4860, G4860, 0),
- CPU_TYPE_ENTRY(G4060, G4060, 0),
CPU_TYPE_ENTRY(B4440, B4440, 0),
CPU_TYPE_ENTRY(G4440, G4440, 0),
CPU_TYPE_ENTRY(B4420, B4420, 0),
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index 50c9d0a..698622a 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -1118,7 +1118,6 @@
#define SVR_C293 0x850030
#define SVR_B4860 0X868000
#define SVR_G4860 0x868001
-#define SVR_G4060 0x868003
#define SVR_B4440 0x868100
#define SVR_G4440 0x868101
#define SVR_B4420 0x868102
--
1.7.6.GIT
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[U-Boot] [PATCH] powerpc/mpc85xx: Add workaround to enable TDM on T1040
This is a workaround for 32 bit hardware limitation of TDM.
T1040 has 36 bit physical addressing, TDM DMAC register
are 32 bit wide but need to store address of CCSR space
which lies beyond 32 bit address range. This workaround
creats a LAW to enable access of TDM DMA to CCSR by
mapping CCSR to overlap with DDR.
A hole of 16M is created in memory using device tree. This
workaround law is set only if tdm is defined in hwconfig.
Also disable POST tests and add LIODN for TDM
Signed-off-by: Sandeep Singh sand...@freescale.com
Cc: York Sun york...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 29 +
arch/powerpc/cpu/mpc85xx/fdt.c| 26 ++
arch/powerpc/cpu/mpc85xx/t1040_ids.c |1 +
arch/powerpc/include/asm/fsl_law.h|1 +
arch/powerpc/include/asm/fsl_liodn.h |4
arch/powerpc/include/asm/immap_85xx.h |4 +++-
include/configs/T1040QDS.h|6 ++
include/configs/T104xRDB.h|6 ++
8 files changed, 76 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index d6cf885..78316a6 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -225,6 +225,32 @@ static void disable_cpc_sram(void)
}
#endif
+#if defined(T1040_TDM_QUIRK_CCSR_BASE)
+#ifdef CONFIG_POST
+#error POST memory test cannot be enabled with TDM
+#endif
+static void enable_tdm_law(void)
+{
+ int ret;
+ char buffer[HWCONFIG_BUFFER_SIZE] = {0};
+ int tdm_hwconfig_enabled = 0;
+
+ /*
+* Extract hwconfig from environment since environment
+* is not setup properly yet. Search for tdm entry in
+* hwconfig.
+*/
+ ret = getenv_f(hwconfig, buffer, sizeof(buffer));
+ if (ret 0) {
+ tdm_hwconfig_enabled = hwconfig_f(tdm, buffer);
+ /* If tdm is defined in hwconfig, set law for tdm workaround */
+ if (tdm_hwconfig_enabled)
+ set_next_law(T1040_TDM_QUIRK_CCSR_BASE, LAW_SIZE_16M,
+LAW_TRGT_IF_CCSR);
+ }
+}
+#endif
+
static void enable_cpc(void)
{
int i;
@@ -729,6 +755,9 @@ skip_l2:
disable_cpc_sram();
#endif
enable_cpc();
+#if defined(T1040_TDM_QUIRK_CCSR_BASE)
+ enable_tdm_law();
+#endif
#ifndef CONFIG_SYS_FSL_NO_SERDES
/* needs to be in ram since code uses global static vars */
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index ed80a84..85dfa5b 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -14,6 +14,7 @@
#include linux/ctype.h
#include asm/io.h
#include asm/fsl_portals.h
+#include hwconfig.h
#ifdef CONFIG_FSL_ESDHC
#include fsl_esdhc.h
#endif
@@ -35,6 +36,11 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)
u32 bootpg = determine_mp_bootpg(NULL);
u32 id = get_my_id();
const char *enable_method;
+#if defined(T1040_TDM_QUIRK_CCSR_BASE)
+ int ret;
+ int tdm_hwconfig_enabled = 0;
+ char buffer[HWCONFIG_BUFFER_SIZE] = {0};
+#endif
off = fdt_node_offset_by_prop_value(blob, -1, device_type, cpu, 4);
while (off != -FDT_ERR_NOTFOUND) {
@@ -77,6 +83,26 @@ void ft_fixup_cpu(void *blob, u64 memory_limit)
device_type, cpu, 4);
}
+#if defined(T1040_TDM_QUIRK_CCSR_BASE)
+#defineCONFIG_MEM_HOLE_16M 0x100
+ /*
+* Extract hwconfig from environment.
+* Search for tdm entry in hwconfig.
+*/
+ ret = getenv_f(hwconfig, buffer, sizeof(buffer));
+ if (ret 0)
+ tdm_hwconfig_enabled = hwconfig_f(tdm, buffer);
+
+ /* Reserve the memory hole created by TDM LAW, so OSes dont use it */
+ if (tdm_hwconfig_enabled) {
+ off = fdt_add_mem_rsv(blob, T1040_TDM_QUIRK_CCSR_BASE,
+ CONFIG_MEM_HOLE_16M);
+ if (off 0)
+ printf(Failed to reserve memory for tdm: %s\n,
+ fdt_strerror(off));
+ }
+#endif
+
/* Reserve the boot page so OSes dont use it */
if ((u64)bootpg memory_limit) {
off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
diff --git a/arch/powerpc/cpu/mpc85xx/t1040_ids.c
b/arch/powerpc/cpu/mpc85xx/t1040_ids.c
index 1034cd4..a5dfb81 100644
--- a/arch/powerpc/cpu/mpc85xx/t1040_ids.c
+++ b/arch/powerpc/cpu/mpc85xx/t1040_ids.c
@@ -47,6 +47,7 @@ struct liodn_id_table liodn_tbl[] = {
/* SET_NEXUS_LIODN(557), -- not yet implemented */
SET_QE_LIODN(559),
+ SET_TDM_LIODN(560),
};
int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
diff --git a/arch/powerpc/include/asm/fsl_law.h
b/arch/powerpc/include/asm/fsl_law.h
index 37d3a22..3b50487 100644
--- a/arch/powerpc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
[U-Boot] [PATCH] powerpc/mpc85xx: Removed support for G4060
G4060 has no PA cores, hence removing its support.
Signed-off-by: Sandeep Singh sand...@freescale.com
Change-Id: Ia9b8760dec9bb890ee87c8b6c947d693aa884b33
Reviewed-on: http://git.am.freescale.net:8181/3808
Reviewed-by: Aggrwal Poonam-B10812 poonam.aggr...@freescale.com
Tested-by: Review Code-CDREVIEW cdrev...@freescale.com
Reviewed-by: York Sun york...@freescale.com
(cherry picked from commit bb94857b91955321afb0c6b836eb79f134600443)
Reviewed-on: http://git.am.freescale.net:8181/7156
Reviewed-by: Yusong Sun york...@freescale.com
(cherry picked from commit baa1bfe297e200fb9823068fa5f0f726621c3c06)
---
arch/powerpc/cpu/mpc8xxx/cpu.c |1 -
arch/powerpc/include/asm/processor.h |1 -
2 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index 35795c4..8451cb2 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -64,7 +64,6 @@ static struct cpu_type cpu_type_list[] = {
CPU_TYPE_ENTRY(T4160, T4160, 0),
CPU_TYPE_ENTRY(B4860, B4860, 0),
CPU_TYPE_ENTRY(G4860, G4860, 0),
- CPU_TYPE_ENTRY(G4060, G4060, 0),
CPU_TYPE_ENTRY(B4440, B4440, 0),
CPU_TYPE_ENTRY(G4440, G4440, 0),
CPU_TYPE_ENTRY(B4420, B4420, 0),
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index 50c9d0a..698622a 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -1118,7 +1118,6 @@
#define SVR_C293 0x850030
#define SVR_B4860 0X868000
#define SVR_G4860 0x868001
-#define SVR_G4060 0x868003
#define SVR_B4440 0x868100
#define SVR_G4440 0x868101
#define SVR_B4420 0x868102
--
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[U-Boot] [PATCH] powerpc/b4860: Disable unused devices using DEVDISR register
Explicitly disabling unused IPs/blocks. This will lower
power consumption.
Signed-off-by: Sandeep Singh sand...@freescale.com
---
arch/powerpc/cpu/mpc85xx/Makefile|1 +
arch/powerpc/cpu/mpc85xx/b4860_cpu.c | 130 ++
arch/powerpc/include/asm/processor.h |1 +
board/freescale/b4860qds/b4860qds.c |2 +
4 files changed, 134 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/cpu/mpc85xx/b4860_cpu.c
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile
b/arch/powerpc/cpu/mpc85xx/Makefile
index cefd57b..340f3dd 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -149,6 +149,7 @@ COBJS-$(CONFIG_PPC_T4240) += t4240_serdes.o
COBJS-$(CONFIG_PPC_T4160) += t4240_serdes.o
COBJS-$(CONFIG_PPC_B4420) += b4860_serdes.o
COBJS-$(CONFIG_PPC_B4860) += b4860_serdes.o
+COBJS-$(CONFIG_PPC_B4860) += b4860_cpu.o
COBJS-$(CONFIG_BSC9132) += bsc9132_serdes.o
COBJS-$(CONFIG_PPC_T1040) += t1040_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/b4860_cpu.c
b/arch/powerpc/cpu/mpc85xx/b4860_cpu.c
new file mode 100644
index 000..600842a
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/b4860_cpu.c
@@ -0,0 +1,130 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/processor.h
+#include asm/io.h
+
+#define DISABLE_DDR1 0x8000
+#define DISABLE_DDR2 0x4000
+#define DISABLE_MAPLE_LTE0 0x0080
+#define DISABLE_MAPLE_LTE1 0x0040
+#define DISABLE_MAPLE_WCDMA0x0020
+
+/* Set DCFG_DEVDISRn for devices to be disabled for B4860 */
+#define B4860_DCFG_DEVDISR10
+#define B4860_DCFG_DEVDISR20
+#define B4860_DCFG_DEVDISR30
+#define B4860_DCFG_DEVDISR40
+#define B4860_DCFG_DEVDISR50
+
+/* Set DCFG_DEVDISRn for devices to be disabled for G4860 */
+#define G4860_DCFG_DEVDISR10
+#define G4860_DCFG_DEVDISR20
+#define G4860_DCFG_DEVDISR3(DISABLE_MAPLE_LTE0 | DISABLE_MAPLE_LTE1 |\
+ DISABLE_MAPLE_WCDMA)
+#define G4860_DCFG_DEVDISR40
+#define G4860_DCFG_DEVDISR50
+
+/* Set DCFG_DEVDISRn for devices to be disabled for B4060 */
+#define B4060_DCFG_DEVDISR10
+#define B4060_DCFG_DEVDISR20
+#define B4060_DCFG_DEVDISR30
+#define B4060_DCFG_DEVDISR40
+#define B4060_DCFG_DEVDISR5DISABLE_DDR2
+
+/* Set DCFG_DEVDISRn for devices to be disabled for G4060 */
+#define G4060_DCFG_DEVDISR10
+#define G4060_DCFG_DEVDISR20
+#define G4060_DCFG_DEVDISR3(DISABLE_MAPLE_LTE0 | DISABLE_MAPLE_LTE1 |\
+ DISABLE_MAPLE_WCDMA)
+#define G4060_DCFG_DEVDISR40
+#define G4060_DCFG_DEVDISR5DISABLE_DDR2
+
+/* Set DCFG_DEVDISRn for devices to be disabled for B4420 */
+#define B4420_DCFG_DEVDISR10
+#define B4420_DCFG_DEVDISR20
+#define B4420_DCFG_DEVDISR3DISABLE_MAPLE_LTE1
+#define B4420_DCFG_DEVDISR40
+#define B4420_DCFG_DEVDISR5DISABLE_DDR2
+
+
+void cpu_device_disable()
+{
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+ /* get devdisr */
+ u32 *devdisr1 = in_be32(gur-devdisr);
+ u32 *devdisr2 = in_be32(gur-devdisr2);
+ u32 *devdisr3 = in_be32(gur-devdisr3);
+ u32 *devdisr4 = in_be32(gur-devdisr4);
+ u32 *devdisr5 = in_be32(gur-devdisr5);
+
+ /* get SVR info */
+ u32 svr = SVR_SOC_VER(get_svr());
+
+ /*
+* Decide on the basis of SVR which devices to disable for a
+* particular personality
+*/
+ switch (svr) {
+ case SVR_B4860:
+ setbits_be32(devdisr1, B4860_DCFG_DEVDISR1);
+ setbits_be32(devdisr2, B4860_DCFG_DEVDISR2);
+ setbits_be32(devdisr3, B4860_DCFG_DEVDISR3);
+ setbits_be32(devdisr4, B4860_DCFG_DEVDISR4);
+ setbits_be32(devdisr5, B4860_DCFG_DEVDISR5);
+ break;
+ case SVR_G4860:
+ setbits_be32(devdisr1, G4860_DCFG_DEVDISR1);
+ setbits_be32(devdisr2, G4860_DCFG_DEVDISR2);
+ setbits_be32(devdisr3, G4860_DCFG_DEVDISR3);
+ setbits_be32(devdisr4, G4860_DCFG_DEVDISR4
[U-Boot] [PATCH] powerpc/mpc85xx: Enabling CPC conditionally based on hwconfig options
If hwconfig does not contains en_cpc then by default all cpcs are enabled
If this config is defined then only those individual cpcs which are defined
in the subargument of en_cpc will be enabled e.g en_cpc:cpc1,cpc2; (this
will enable cpc1 and cpc2) or en_cpc:cpc2; (this enables just cpc2)
Signed-off-by: Sandeep Singh sand...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 32
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 185e0d5..ea75ce5 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -159,11 +159,43 @@ void config_8560_ioports (volatile ccsr_cpm_t * cpm)
static void enable_cpc(void)
{
int i;
+ int arglen;
+ int ret;
u32 size = 0;
cpc_corenet_t *cpc = (cpc_corenet_t *)CONFIG_SYS_FSL_CPC_ADDR;
+ char buffer[HWCONFIG_BUFFER_SIZE];
+ char cpc_subarg[16];
+ bool have_hwconfig = 0;
+ const char *cpc_args = NULL;
+
+ /*
+* Extract hwconfig from environment since environment
+* is not setup properly yet
+*/
+ ret = getenv_f(hwconfig, buffer, sizeof(buffer));
+ if (ret == -1) {
+ printf(Error getting hwconfig\n);
+ return;
+ }
+
+ /*
+* If en_cpc is not defined in hwconfig then by default all
+* cpcs are enable. If this config is defined then individual
+* cpcs which have to be enabled should also be defined.
+* e.g en_cpc:cpc1,cpc2;
+*/
+ if (hwconfig_f(en_cpc, buffer))
+ have_hwconfig = 1;
for (i = 0; i CONFIG_SYS_NUM_CPC; i++, cpc++) {
+ sprintf(cpc_subarg, cpc%u, i + 1);
+ if (have_hwconfig) {
+ cpc_args = hwconfig_sub_f(en_cpc, cpc_subarg, buffer);
+ if (cpc_args == NULL)
+ continue;
+ }
+
u32 cpccfg0 = in_be32(cpc-cpccfg0);
size += CPC_CFG0_SZ_K(cpccfg0);
#if defined(CONFIG_RAMBOOT_PBL) || defined(CONFIG_SECURE_HKAREA_CPC)
--
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