Veyrons do not need full pinctrl support for SPL.
The full pinctrl support does nothing when enabled with OF_PLATDATA,
thus was already unused.
This frees about 4kB of SPL size.
Signed-off-by: Urja Rannikko
---
configs/chromebit_mickey_defconfig | 3 +--
configs/chromebook_jerry_defconfig | 3
Move veyron_init() back to veyron.c")
Signed-off-by: Urja Rannikko
---
board/google/veyron/veyron.c| 2 +-
configs/chromebit_mickey_defconfig | 1 +
configs/chromebook_jerry_defconfig | 2 +-
configs/chromebook_minnie_defconfig | 1 +
configs/chromebook_speedy_defconfig | 2 +-
5 files
sary and thus reduce SPL size.
Signed-off-by: Urja Rannikko
---
arch/arm/mach-rockchip/spl-boot-order.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-rockchip/spl-boot-order.c
b/arch/arm/mach-rockchip/spl-boot-order.c
index c147d5821e..d23829a789 100644
--- a/arch/arm/mach
Apparently speedy was forgotten from this list of veyron devices.
Fixes: 49105fb7ed ("rockchip: add common spl board file")
Signed-off-by: Urja Rannikko
---
arch/arm/mach-rockchip/spl.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/spl.c
ough to investigate these myself.
Urja Rannikko (4):
rockchip: spl: veyron speedy boots from SPI
rockchip: veyron: move board_early_init_f to _r (after reloc)
rockchip: spl-boot-order: do not attempt to access fdt if OF_PLATDATA
defconfig: veyron: no need for CONFIG_SPL_PINCTRL_FULL
arch/arm/
https://lwn.net/Articles/749064/
> I think the stack is much better place than a fixed buffer for
> something only 8 bytes in size.
Yes.
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ial stack problems in case of nonsensical
inputs.
As for the size, 8 bytes would be fine and actually leave some margin:
the most i would expect for op_len is 1 + 4 + 1 = 6 bytes (the lowest
would be 1+3+0 and the usual 1+3+1).
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on sysreset.
Signed-off-by: Urja Rannikko
---
v2: Fixup STPMIC1 config selection of CONFIG_SYSRESET_CMD_POWEROFF
---
arch/Kconfig | 1 +
arch/arm/mach-stm32mp/Makefile | 3 ---
arch/arm/mach-stm32mp/cmd_poweroff.c | 24
drivers/power/pmic/Kconfig
Based on snooping around the linux kernel rk8xx driver.
Tested on an ASUS C201.
Signed-off-by: Urja Rannikko
---
drivers/power/pmic/Kconfig | 1 +
drivers/power/pmic/rk8xx.c | 62 +++---
include/power/rk8xx_pmic.h | 4 +++
3 files changed, 63 insertions(+), 4
It seems that SYSRESET_POWER_OFF was added recently, and all previous code
used SYSRESET_POWER for poweroff. SYSRESET_POWER is supposed to be a
PMIC-level power cycle, not a poweroff.
Signed-off-by: Urja Rannikko
---
v2: Do not change STPMIC1 driver (thats actually SYSRESET_POWER)
Note: I didnt
s 4 BUCKs, 6 LDOs, 1 VREF and 2 power
> switches.
> It is accessed via an I2C interface. The device is used with STM32MP1
> SoCs. This driver implements register read/write operations.
I'll do that in v2, thanks for the test.
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will drop this part, but just to confirm... this means that
currently you have a configuration where using the poweroff command
causes a power-cycle? Neat.
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Updates jerry, mickey, minnie and speedy defconfigs to:
- fit the SPL in 32k
- boot from SPI (only)
- remove gadget support (these have no OTG port)
Reviewed-by: Simon Glass
Signed-off-by: Urja Rannikko
---
v2: Rebase, include previous reviewed-by
---
configs/chromebit_mickey_defconfig | 25
This affects RK3036, RK322X and RK3288 - the defconfig changes done by
moveconfig.py for the veyrons were left out on purpose because they dont
have an OTG port, and will get their config updated in the next commit.
Signed-off-by: Urja Rannikko
---
v2: Also cleanup now unrelevant comments about
Affects rk3288 veyrons and rk3036, this was mostly done by
moveconfig.py.
Reviewed-by: Simon Glass
Signed-off-by: Urja Rannikko
--
v2: Rebase, include previous reviewed-by
---
configs/chromebit_mickey_defconfig | 1 +
configs/chromebook_jerry_defconfig | 1 +
configs
Fixes the microSD slot on the ASUS C201.
Signed-off-by: Urja Rannikko
---
v2: use #if CONFIG_IS_ENABLED(DM_REGULATOR)
v3: Move ret variable inside the if block (only used there)
---
drivers/mmc/dw_mmc.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/mmc/dw_mmc.c b
It seems that SYSRESET_POWER_OFF was added recently, and all previous code
used SYSRESET_POWER for poweroff. SYSRESET_POWER is supposed to be a
PMIC-level power cycle, not a poweroff.
Signed-off-by: Urja Rannikko
---
Note: I didnt touch the test/dm/sysreset.c code yet, mostly because
I wanted
Based on snooping around the linux kernel rk8xx driver.
Tested on an ASUS C201.
Signed-off-by: Urja Rannikko
---
drivers/power/pmic/Kconfig | 1 +
drivers/power/pmic/rk8xx.c | 62 +++---
include/power/rk8xx_pmic.h | 4 +++
3 files changed, 63 insertions(+), 4
on sysreset.
Signed-off-by: Urja Rannikko
---
Note: I cant test STM32MP, so I would really appreciate if someone could
test this series on that.
---
arch/Kconfig | 1 +
arch/arm/mach-stm32mp/Makefile | 3 ---
arch/arm/mach-stm32mp/cmd_poweroff.c | 24
Hiya,
On Thu, Apr 11, 2019 at 8:07 PM Urja Rannikko wrote:
>
> Hi,
>
> On Mon, Apr 1, 2019 at 5:44 PM Urja Rannikko wrote:
> >
> > Fixes the microSD slot on the ASUS C201.
> >
> > Signed-off-by: Urja Rannikko
> > ---
> > v2: use #if CONFIG_IS_E
Hi,
On Wed, Apr 24, 2019 at 3:54 AM Simon Glass wrote:
>
> Hi,
>
> On Wed, 3 Apr 2019 at 06:21, Urja Rannikko wrote:
> >
> > Based on snooping around the linux kernel rk8xx driver, and
> > tested to work on the ASUS C201.
> >
> > Signed-off-by: Urja
Hi,
On Wed, Apr 24, 2019 at 3:55 AM Simon Glass wrote:
>
> On Wed, 3 Apr 2019 at 06:25, Urja Rannikko wrote:
> >
> > There were 3 copies of the same sequence, make it into a function.
> >
> > Signed-off-by: Urja Rannikko
>
nnie and speedy but maybe also rk3399
chromeos devices?
I'm thinking basically an ifdef around the check in is_gpt_valid and
let gcc optimize the rest of the code (test for 2) out, and then
select the Kconfig (ummm maybe CONFIG_IGNORE_CROS_IGNOREME_GPT or do
you have better ideas?) for the appropriate bo
There were 3 copies of the same sequence, make it into a function.
Signed-off-by: Urja Rannikko
---
v2: Just a rebase.
-
disk/part_efi.c | 73 +++--
1 file changed, 34 insertions(+), 39 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
will still complain.
Signed-off-by: Urja Rannikko
---
v2: Just a rebase.
-
disk/part_efi.c| 28 +---
include/part_efi.h | 2 ++
2 files changed, 23 insertions(+), 7 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 5f935da4c2..83ba7db665 100644
Hi,
On Fri, Mar 22, 2019 at 7:15 PM Urja Rannikko wrote:
>
> Urja Rannikko (4):
> pinctrl: exit pinconfig_post_bind if there are no subnodes
> rk3288-board: remove pinctrl call for debug uart
AFAIK these first two from this series would be "ready" so to say,
anythin
Hi,
On Mon, Apr 1, 2019 at 5:44 PM Urja Rannikko wrote:
>
> Fixes the microSD slot on the ASUS C201.
>
> Signed-off-by: Urja Rannikko
> ---
> v2: use #if CONFIG_IS_ENABLED(DM_REGULATOR)
Ping? Anything I should do wrt this?
--
Urja Rannikko
___
This affects RK3036, RK322X and RK3288 - the defconfig changes done by
moveconfig.py for the veyrons were left out on purpose because they dont
have an OTG port, and will get their config updated in the next commit.
Signed-off-by: Urja Rannikko
---
v2: Also cleanup now unrelevant comments about
_MASS_STORAGE
>
> This is leaving empty comments which serve no purpose. Looks like the
> same has happened above for when the usb otg parts got moved. Ditto for
> the other files below.
Thanks for noticing, i'll send a revised patch in a few minutes.
--
Urja Rannikko
__
will still complain.
Signed-off-by: Urja Rannikko
---
disk/part_efi.c| 28 +---
include/part_efi.h | 2 ++
2 files changed, 23 insertions(+), 7 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 5f935da4c2..83ba7db665 100644
--- a/disk/part_efi.c
+++ b
There were 3 copies of the same sequence, make it into a function.
Signed-off-by: Urja Rannikko
---
disk/part_efi.c | 73 +++--
1 file changed, 34 insertions(+), 39 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 239455b816
Based on snooping around the linux kernel rk8xx driver, and
tested to work on the ASUS C201.
Signed-off-by: Urja Rannikko
---
This is really handy to be able to poweroff (without pressing power button
for a long time) the C201 from u-boot, so i'm sending this as is.
The thing that is bothering
Updates jerry, mickey, minnie and speedy defconfigs to:
- fit the SPL in 32k
- boot from SPI (only)
- remove gadget support (these have no OTG port)
Signed-off-by: Urja Rannikko
---
configs/chromebit_mickey_defconfig | 26 --
configs/chromebook_jerry_defconfig | 26
This affects RK3036, RK322X and RK3288 - the defconfig changes done by
moveconfig.py for the veyrons were left out on purpose because they dont
have an OTG port, and will get their config updated in the next commit.
Signed-off-by: Urja Rannikko
---
configs/evb-rk3036_defconfig | 2
Affects rk3288 veyrons and rk3036, this was mostly done by
moveconfig.py.
Signed-off-by: Urja Rannikko
---
configs/chromebit_mickey_defconfig | 1 +
configs/chromebook_jerry_defconfig | 1 +
configs/chromebook_minnie_defconfig | 1 +
configs/chromebook_speedy_defconfig | 1 +
configs/evb
decided to say anything about that..)
Urja Rannikko (3):
configs: Move CONFIG_SPI_FLASH_GIGADEVICE properly into Kconfig
configs: Move CONFIG_CMD_USB_MASS_STORAGE properly into Kconfig
configs: update rk3288 veyron defconfigs
configs/chromebit_mickey_defconfig | 27
Fixes the microSD slot on the ASUS C201.
Signed-off-by: Urja Rannikko
---
v2: use #if CONFIG_IS_ENABLED(DM_REGULATOR)
-
drivers/mmc/dw_mmc.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 93a836eac3..b04c1f9f41 100644
Hi all,
On Fri, Mar 22, 2019 at 7:15 PM Urja Rannikko wrote:
>
> Urja Rannikko (4):
> pinctrl: exit pinconfig_post_bind if there are no subnodes
> rk3288-board: remove pinctrl call for debug uart
> rk3288-board: cosmetic: document selecting RK PWM
> dw_mmc: turn on t
Hi,
On Sat, Mar 30, 2019 at 9:18 PM Simon Glass wrote:
>
> Hi Urja,
>
> On Fri, 22 Mar 2019 at 13:15, Urja Rannikko wrote:
> >
> > This failed and caused a boot failure on c201, and afaik
> > the pins should be setup by the new pinctrl driver.
>
> It should
Hi,
On Sat, Mar 30, 2019 at 9:18 PM Simon Glass wrote:
>
> On Fri, 22 Mar 2019 at 13:15, Urja Rannikko wrote:
> >
> > Atleast hat is what it says in the TRM.
>
> At least that
Whoops.
But actually i found out (by chance from an another patch on the list
just now) tha
or_set_enable_if_allowed(mmc->vqmmc_supply,
> > true);
> > + if (ret)
> > + return ret;
> > + }
> > +#endif
> > +
> > return 0;
> > }
> >
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one i sent so atleast i didnt forget but
maybe the list filtered them (?).
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This failed and caused a boot failure on c201, and afaik
the pins should be setup by the new pinctrl driver.
Signed-off-by: Urja Rannikko
---
arch/arm/mach-rockchip/rk3288-board.c | 12
1 file changed, 12 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288-board.c
b/arch/arm
Fixes the microSD slot on the ASUS C201.
Signed-off-by: Urja Rannikko
---
drivers/mmc/dw_mmc.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 93a836eac3..e1960b213a 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc
is that the USB host port on
the otg-capable controller (near screen) doesn't work - one guess i have
is that the dwc2 host driver doesn't force it into host mode...
(It doesn't even read dr_mode ...)
Urja Rannikko (4):
pinctrl: exit pinconfig_post_bind if there are no subnodes
rk3288-board: remove
Atleast hat is what it says in the TRM.
Signed-off-by: Urja Rannikko
---
arch/arm/mach-rockchip/rk3288-board.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-rockchip/rk3288-board.c
b/arch/arm/mach-rockchip/rk3288-board.c
index f5df44dab1..9c05149610 100644
--- a/arch/arm
This fixes RK3288 SPL hanging or hitting this assert:
drivers/core/ofnode.c:183: ofnode_first_subnode: Assertion `ofnode_valid(node)'
failed.
Signed-off-by: Urja Rannikko
---
drivers/pinctrl/pinctrl-uclass.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/pinctrl/pinctrl
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