Re: [U-Boot] [PATCH 00/22] mmc: Add support for HS200 and UHS modes

hi simon, On 08/28/2017 04:10 AM, Simon Glass wrote: Hi, On 25 August 2017 at 02:16, Ziyuan <xzy...@rock-chips.com> wrote: hi Jaehoon, On 07/28/2017 09:05 PM, Jaehoon Chung wrote: Hi Kever, On 07/26/2017 08:33 PM, Kever Yang wrote: Hi Jaehoon, What's the status of this pat

Re: [U-Boot] [PATCH 00/22] mmc: Add support for HS200 and UHS modes

hi Jaehoon, On 07/28/2017 09:05 PM, Jaehoon Chung wrote: Hi Kever, On 07/26/2017 08:33 PM, Kever Yang wrote: Hi Jaehoon, What's the status of this patch set now? Can we land this patch set or the other patch set from Ziyuan Xu? The performance for mmc in U-Boot is really bad

Re: [U-Boot] [PATCH 01/33] mmc: select the available type from host_caps and card_caps

hi Jaehoon, On 05/25/2017 09:08 PM, Jaehoon Chung wrote: Hi Ziyuan, On 05/25/2017 05:12 PM, Ziyuan wrote: hi Jaehoon, On 05/16/2017 09:55 AM, Jaehoon Chung wrote: Hi Ziyuan, On 05/16/2017 10:15 AM, Ziyuan wrote: hi Simon & Jaehoon, On 05/16/2017 08:18 AM, Simon Glass wrote: Hi Zi

Re: [U-Boot] [PATCH 01/33] mmc: select the available type from host_caps and card_caps

hi Jaehoon, On 05/16/2017 09:55 AM, Jaehoon Chung wrote: Hi Ziyuan, On 05/16/2017 10:15 AM, Ziyuan wrote: hi Simon & Jaehoon, On 05/16/2017 08:18 AM, Simon Glass wrote: Hi Ziyuan, On 15 May 2017 at 00:06, Ziyuan Xu <xzy...@rock-chips.com> wrote: The original implementation

Re: [U-Boot] [PATCH 01/33] mmc: select the available type from host_caps and card_caps

hi Simon & Jaehoon, On 05/16/2017 08:18 AM, Simon Glass wrote: Hi Ziyuan, On 15 May 2017 at 00:06, Ziyuan Xu <xzy...@rock-chips.com> wrote: The original implementation select HS timing by default, add available type selection for higher speed mode compatibility, such as hs200, hs40

[U-Boot] [PATCH 32/33] dts: rk3399: change the maximum eMMC clock frequency to 150MHz

will be 4. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- arch/arm/dts/rk3399.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi index f3d3f53..b2122b6 100644 --- a/arch/arm/dts/rk3399.dtsi +++ b/arch/arm/dts/

[U-Boot] [PATCH 19/33] mmc: dw_mmc: rockchip: implement tuning with clock phase framework

signal is shift by some delay elements on rockchip platform. And the delay element affected by logic voltage and temperature in runtime. These factors wouldn't have changed a lot in U-Boot stage. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/rockchip_dw_mmc.c

[U-Boot] [PATCH 25/33] mmc: sdhci: update host->clock after clock setting

Overwrite host->clock after clock setting to avoid repetitive reset clock. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/sdhci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 48bac04..ad86278 100644 --- a/dr

[U-Boot] [PATCH 24/33] mmc: sdhci: rockchip: fix bus width setting

Rockchip sdhci controller capable of 8-bit transfer. The original can only run at 4 bit mode. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/rockchip_sdhci.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/drivers/mmc/rockchip_sdhci.c b/drive

[U-Boot] [PATCH 22/33] mmc: dw_mmc: rockchip: fix data crc error on ddr52 8bit mode

The clk_divider must be set to 1 on ddr52 8bit mode for rockchip platform. Otherwise we will get a data crc error during data transmission. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/dw_mmc.c | 2 +- drivers/mmc/rockchip_dw_mmc.c | 7 +++ 2 files chan

[U-Boot] [PATCH 23/33] mmc: dw_mmc: fix bus width setting

Hosts capable of 8-bit transfers can also do 4 bits. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/dw_mmc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index dcd7fba..3b89e7a 100644 --- a/drive

[U-Boot] [PATCH 06/33] mmc: add card_busy to query card status

Card devices get into busy status since host request speed mode switch, if host controller is able to query whether the device is busy, try it instead of sending cmd13. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/mmc-uclass.c | 16 drivers/mmc

[U-Boot] [PATCH 33/33] SPL: tiny-printf: add "X" modifier

tiny-printf does not know about the "X" modifier so far, which print all zero. The mmc driver use '0x%08X' to print command argument and response. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- lib/tiny-printf.c | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/tin

[U-Boot] [PATCH 01/33] mmc: select the available type from host_caps and card_caps

The original implementation select HS timing by default, add available type selection for higher speed mode compatibility, such as hs200, hs400, hs400es. By the way, we assume that card run at 1.8V or 1.2V I/O when its timing is ddr52/hs200/hs400(es). Signed-off-by: Ziyuan Xu <xzy...@r

[U-Boot] [PATCH 26/33] mmc: sdhci: add support for UHS timing

To support UHS speed mode, controller should enable 1.8V signaling and select one of UHS modes. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/sdhci.c | 40 include/mmc.h | 1 + include/sdhci.h | 17 + 3

[U-Boot] [PATCH 10/33] mmc: add support for HS200 mode of eMMC4.5

the HS200 mode is selected. By the way, mmc card can only switch to high speed mode in SPL stage. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/mmc.c | 395 -- include/mmc.h | 27 2 files changed, 289 insertions(+

[U-Boot] [PATCH 11/33] mmc: rework ddr mode judgement with timing

Since the card device is set the proper timing after speed mode switch is completed, host driver can get ddr_mode from timing parameter. So drop the antiquated ddr_mode. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- cmd/mmc.c | 2 +- drivers/mmc/dw_mmc.c

[U-Boot] [PATCH 15/33] rockchip: clk: rk3288: fix mmc clock setting

Mmc clock automatically divide 2 in internal. Before this: gpll = 594MHz, clock = 148.5MHz div = 594/148.5-1 = 3 output clock is 99MHz After this: gpll = 594MHz, clock = 148.5MHz div = 297+148.5-1/148.5 = 2 output clock is 148.5Mhz Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- d

[U-Boot] [PATCH 31/33] mmc: add support for HS400 mode of eMMC5.0

input timing for HS400 mode is the same as HS200 mode. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/mmc.c | 48 ++-- 1 file changed, 46 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index c

[U-Boot] [PATCH 29/33] mmc: sdhci: rockchip: add phy support

This patch gets phy phandle from dt-binding, and power cycle/re-configure phy whilst changing card clock. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/rockchip_sdhci.c | 147 +++ 1 file changed, 147 insertions(+) diff --git a/d

[U-Boot] [PATCH 16/33] rockchip: clk: rk3288: add support for the clock phase

This patch adds phase adjustment for mmc clock(ciu_sample), which is used to select the optimal sampling point of a data input. The phase shift is achieved through 255 delay elements(40-80 picoseconds), and calculate the number of delay element via clock frequency. Signed-off-by: Ziyuan Xu <

[U-Boot] [PATCH 21/33] mmc: add DDR52 support for eMMC card

4.41+ eMMC card devices can run at 52MHz on DDR 8-bit mode, it can improve write/read performance. Host driver can set MMC_MODE_DDR_52Mhz to enable this feature. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/mmc.c | 26 +- 1 file changed, 25 inse

[U-Boot] [PATCH 27/33] mmc: sdhci: rename set_clock callback

In fact, the original name is unsuitable for its behavior. It's better to rename to set_clock_ext. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/s5p_sdhci.c | 4 ++-- drivers/mmc/sdhci.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drive

[U-Boot] [PATCH 14/33] clk: introduce clk_phase get/set function & callback

& .get_phase callback in struct clk_ops. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/clk/clk-uclass.c | 20 include/clk-uclass.h | 17 + include/clk.h| 20 3 files changed, 57 insertions(+)

[U-Boot] [PATCH 28/33] mmc: sdhci: export sdhci_set_clock()

For arasan-rk3399-sdhci controller, we should make sure the phy is in poweroff status before we configure the clock stuff. So that we need to export it for phy configuration. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/sdhci.c | 16 +++- include/sdhci.h

[U-Boot] [PATCH 30/33] mmc: sdhci: add the support for tuning

ned sampling clcok. If tuning is failed, host controller keeps Sampling Clock Select to 0. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/sdhci.c | 116 +++- 1 file changed, 115 insertions(+), 1 deletion(-) diff --git a/dr

[U-Boot] [PATCH 20/33] mmc: dw_mmc: reset controller after data error

Per dw_mmc databook, it's recommend that reset the host contoller if some data-related error occurre during tuning progress. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/dw_mmc.c | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/d

[U-Boot] [PATCH 17/33] rockchip: clk: rk3399: fix emmc clock setting

Before this: gpll = 594MHz, set_clock = 200MHz div = 594/200 = 2 real clock is 297MHz After this: gpll = 594MHz, clock = 148.5MHz div = 594+200-1/200 = 3 real clock is 198Mhz Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/clk/rockchip/clk_rk3399.c | 4 ++-- 1 file chan

[U-Boot] [PATCH 02/33] mmc: add set_timing entry for timing selection

Some controller should do some configuration according to the selected timing. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/mmc.c | 7 +++ include/mmc.h | 49 + 2 files changed, 56 insertions(+) diff --git a/d

[U-Boot] [PATCH 12/33] mmc: remove tran_speed from struct mmc

The clock element is updated by mmc_set_clock every time, it denotes the current transfer speed. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- cmd/mmc.c | 2 +- drivers/mmc/mmc.c | 10 +- drivers/mmc/xenon_sdhci.c | 2 +- include/mmc.h

[U-Boot] [PATCH 18/33] mmc: dw_mmc: add the support for the tuning scheme

For the HS200/HS400/SDR104, tuning is needed to determine the optimal sampling point. Actual tuning procedure is provided by specific host controller driver. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/dw_mmc.c | 18 ++ include/dwmmc.h | 1 + 2

[U-Boot] [PATCH 07/33] mmc: dw_mmc: implement card_busy detection

Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/dw_mmc.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 700f764..baf2280 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -384,6 +

[U-Boot] [PATCH 04/33] mmc: rework high speed mode selection

Select timing parameter for the host since HS mode switch is completed. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/mmc.c | 16 ++-- include/mmc.h | 6 ++ 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/mmc.c b/drive

[U-Boot] [PATCH 13/33] cmd: mmc: show the current speed mode

So far mmc framework had support speed mode switch, it good to show the current speed mode from 'mmc info'. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- cmd/mmc.c | 5 + 1 file changed, 5 insertions(+) diff --git a/cmd/mmc.c b/cmd/mmc.c index 6ead27a..832eeb0 100644 --- a/cmd

[U-Boot] [PATCH 09/33] mmc: rework mmc_switch for non-send_status scenario

Per JEDEC spec, it is not recommended to use cmd13 to get card status after speed mode switch. CMD13 can't be guaranteed due to the asynchronous operation. Besieds, if the host controller supports busy detection in HW, we use it instead of cmd13. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.

[U-Boot] [PATCH 03/33] mmc: xenon_sdhci: drop redundant timing definitions

Remove the redundant mmc timing definitions which have defined in mmc.h. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/xenon_sdhci.c | 12 1 file changed, 12 deletions(-) diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c index 2a0d8b4..f

[U-Boot] [PATCH 08/33] mmc: sdhci: implement card_busy detection

Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/sdhci.c | 19 +++ include/sdhci.h | 1 + 2 files changed, 20 insertions(+) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 58cc0ab..48bac04 100644 --- a/drivers/mmc/sdhci.c +++ b/drive

[U-Boot] [PATCH 05/33] mmc: sdhci: fix HISPD bit setting

Configure HISPD bit field according to the timing parameter instead of the card clock frequency. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/sdhci.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c

[U-Boot] [PATCH 05/33] mmc: sdhci: fix HISPD bit setting

Configure HISPD bit field according to the timing parameter instead of the card clock frequency. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/sdhci.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c

[U-Boot] [PATCH 02/33] mmc: add set_timing entry for timing selection

Some controller should do some configuration according to the selected timing. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/mmc.c | 7 +++ include/mmc.h | 49 + 2 files changed, 56 insertions(+) diff --git a/d

[U-Boot] [PATCH 04/33] mmc: rework high speed mode selection

Select timing parameter for the host since HS mode switch is completed. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/mmc.c | 16 ++-- include/mmc.h | 6 ++ 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/mmc.c b/drive

[U-Boot] [PATCH 03/33] mmc: xenon_sdhci: drop redundant timing definitions

Remove the redundant mmc timing definitions which have defined in mmc.h. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/xenon_sdhci.c | 12 1 file changed, 12 deletions(-) diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c index 2a0d8b4..f

[U-Boot] [PATCH 01/33] mmc: select the available type from host_caps and card_caps

The original implementation select HS timing by default, add available type selection for higher speed mode compatibility, such as hs200, hs400, hs400es. By the way, we assume that card run at 1.8V or 1.2V I/O when its timing is ddr52/hs200/hs400(es). Signed-off-by: Ziyuan Xu <xzy...@r

[U-Boot] OF_PLATDATA questions on rk3399 platfrom

hi simon, I need to achieve emmc_phy physical address in driver, so that I can configure phy in different scenarios (phy register address should be 0xff77f780). see below: sdhci: sdhci@fe33 { phys = <_phy>; phy-names = "phy_arasan"; }; grf: syscon@ff77 {

[U-Boot] [PATCH 4/5] rockchip: clk: rk3288: add ciu_clk entry for eMMC/SDMMC/SDIO

The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for it. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/clk/rockchip/clk_rk3288.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_

[U-Boot] [PATCH 5/5] rockchip: clk: rk3328: add ciu_clk entry for eMMC/SDMMC

The genunie bus clock is sclk_x for eMMC/SDMMC, add support for it. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/clk/rockchip/clk_rk3328.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c

[U-Boot] [PATCH 2/5] rockchip: clk: rk3036: add ciu_clk entry for eMMC/SDIO

The genunie bus clock is sclk_x for eMMC/SDIO, add support for it. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/clk/rockchip/clk_rk3036.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c index 7

[U-Boot] [PATCH 3/5] rockchip: clk: rk3188: add ciu_clk entry for eMMC/SDMMC/SDIO

The genunie bus clock is sclk_x for eMMC/SDMMC/SDIO, add support for it. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/clk/rockchip/clk_rk3188.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_

[U-Boot] [PATCH 1/5] mmc: dw_mmc: rockchip: select proper card clock

As you know, biu_clk is used for AMBA AHB/APB interface, ciu_clk is used for communication between host and card devices. The real bus clock is ciu, so let's rectify it. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/rockchip_dw_mmc.c | 4 ++-- 1 file changed, 2 inse

[U-Boot] [bug report] Incorrect result from clk_get_by_name

ot;ciu_drv", "ciu_sample". I found that the clock list has only one element, it's "biu". I expected that there are four elements. Actually, I can use clk_get_by_index instead, but I prefer clock name, it's more readable. Ziyuan Xu BR __

Re: [U-Boot] accessing eMMC boot partitions from U-Boot

hi Stephen, On 03/14/2017 12:41 PM, Stephen Warren wrote: On 03/13/2017 06:54 PM, Ziyuan wrote: hi Stephen, On 03/14/2017 05:49 AM, Stephen Warren wrote: On 03/13/2017 03:34 PM, Tim Harvey wrote: Greetings, I'm working with some boards with eMMC FLASH and understand that I can set

Re: [U-Boot] accessing eMMC boot partitions from U-Boot

hi Stephen, On 03/14/2017 05:49 AM, Stephen Warren wrote: On 03/13/2017 03:34 PM, Tim Harvey wrote: Greetings, I'm working with some boards with eMMC FLASH and understand that I can set the fields of the PARTITION_CONFIG with the 'mmc partconf' command to specify what partition is used for

[U-Boot] [PATCH] mmc: drop unnecessary send_status request

It's redundant to send cmd13 after cmd9 whose response is not R1b. The card devices will not be busy w/ cmd9. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/mmc.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 3

Re: [U-Boot] [PATCH] rockchip: rk3288: sdram: fix DDR address range

Hi Simon, On 2016年09月23日 10:39, Simon Glass wrote: Hi, On 4 September 2016 at 19:39, Ziyuan Xu <xzy...@rock-chips.com> wrote: The all current Rockchip SoCs supporting 4GB of ram have problems accessing the memory region 0xfe00~0xff00. Actually, some IP controller can't address

Re: [U-Boot] [PATCH 1/3] mmc: dw_mmc: change the read/write order under fifo mode

hi Simon, On 2016年09月23日 10:39, Simon Glass wrote: Hi, On 7 September 2016 at 21:54, Jaehoon Chung <jh80.ch...@samsung.com> wrote: On 09/08/2016 12:43 PM, Ziyuan Xu wrote: On 2016年09月07日 14:50, Jaehoon Chung wrote: On 09/07/2016 03:14 PM, Ziyuan Xu wrote: hi Jaehoon, On 2016年08月

Re: [U-Boot] [PATCH] mmc: dw_mmc: push/pop all FIFO data if any data request

hi Jaehoon, On 2016年09月19日 14:43, Jaehoon Chung wrote: Hi Ziyuan, On 09/19/2016 11:16 AM, Ziyuan Xu wrote: From: "jacob2.chen" <jacob2.c...@rock-chips.com> As I remembered, I mentioned that changed to real name, not mail ID. likes "Jacob Chen <jacob2,c...@rock-ch

[U-Boot] [PATCH] mmc: dw_mmc: push/pop all FIFO data if any data request

o read remaining bytes on seeing DTO interrupt. Signed-off-by: jacob2.chen <jacob2.c...@rock-chips.com> Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- drivers/mmc/dw_mmc.c | 23 --- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/mmc/dw_

Re: [U-Boot] [PATCH 0/2] Add sdram capacity auto detect for rk3288

hi Vagrant, On 2016年09月11日 03:01, Vagrant Cascadian wrote: On 2016-09-10, Ziyuan Xu wrote: On 2016年09月09日 03:28, Vagrant Cascadian wrote: On 2016-09-08, Kever Yang wrote: The rk3288 spl size is very close to 32KB while the rk3288 bootrom has the limitation of maximum size of SPL is 32KB

Re: [U-Boot] [PATCH 0/2] Add sdram capacity auto detect for rk3288

hi Vagrant, On 2016年09月09日 03:28, Vagrant Cascadian wrote: On 2016-09-08, Kever Yang wrote: The rk3288 spl size is very close to 32KB while the rk3288 bootrom has the limitation of maximum size of SPL is 32KB. After apply this patch, the SPL size will exceed 32KB if we do not enable macro

[U-Boot] [PATCH] rockchip: miniarm: remove eMMC support

The latest rk3288-miniarm board doesn't have eMMC device, so remove it. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- arch/arm/dts/rk3288-miniarm.dtsi | 12 board/rockchip/miniarm_rk3288/miniarm-rk3288.c | 8 include/configs/miniarm_rk

Re: [U-Boot] [PATCH 1/3] mmc: dw_mmc: change the read/write order under fifo mode

On 2016年09月07日 14:50, Jaehoon Chung wrote: On 09/07/2016 03:14 PM, Ziyuan Xu wrote: hi Jaehoon, On 2016年08月30日 17:54, Jaehoon Chung wrote: Hi Jacob, On 08/30/2016 02:26 AM, Jacob Chen wrote: From: "jacob2.chen" <jacob2.c...@rock-chips.com> The former implement have a bu

Re: [U-Boot] [PATCH 1/3] mmc: dw_mmc: change the read/write order under fifo mode

hi Jaehoon, On 2016年08月30日 17:54, Jaehoon Chung wrote: Hi Jacob, On 08/30/2016 02:26 AM, Jacob Chen wrote: From: "jacob2.chen" The former implement have a bug. It will cause wrong data reading sometimes. Could you explain what bug is there? Signed-off-by:

[U-Boot] [PATCH] rockchip: rk3288: sdram: fix DDR address range

to 0xfef72000, and .bss variants was also relocated, such as do_fat_read_at_block. Once eMMC controller transfer data to do_fat_read_at_block via DMA, DMAC can't access more than 0xfe00. So that DMAC didn't work sane. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- arch/arm/mach-rockchip/

Re: [U-Boot] [PATCH 1/3] mmc: dw_mmc: change the read/write order under fifo mode

On 2016年08月30日 21:56, 陈豪 wrote: Hi jaehoon, 2016-08-30 17:54 GMT+08:00 Jaehoon Chung : Hi Jacob, On 08/30/2016 02:26 AM, Jacob Chen wrote: From: "jacob2.chen" The former implement have a bug. It will cause wrong data reading sometimes.

Re: [U-Boot] [PATCH v2 2/2] Enable ROCKCHIP_SPL_BACK_TO_BROM for rock2 board

Hi, On 2016年08月28日 03:39, Sandy Patterson wrote: Rock2 has been tested with back to brom feature. The tricky part is that with this feature the default environment is inside u-boot, and it's defined for every rk3288 board independetly. So I just changed it for rock2 here. Solve by moving

Re: [U-Boot] [PATCH v2 1/2] Disable SPL_MMC_SUPPORT if ROCKCHIP_SPL_BACK_TO_BROM is enabled.

On 2016年08月28日 03:39, Sandy Patterson wrote: Default SPL_MMC_SUPPORT to false when ROCKCHIP_SPL_BACK_TO_BROM is enabled. Signed-off-by: Sandy Patterson <apatter...@sightlogix.com> Acked-by: Ziyuan Xu <xzy...@rock-chips.com> --- Changes in v2: - Rebase after "Kconfig:

[U-Boot] [RFC PATCH] rockchip: rk3288: skip lowlevel_init process

lowlevel_init() is never needed for rk3288, so drop it. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- arch/arm/mach-rockchip/board.c| 4 arch/arm/mach-rockchip/rk3288-board-spl.c | 4 include/configs/rk3288_common.h | 1 + 3 files changed, 1 ins

Re: [U-Boot] *** Your dtc is too old, please upgrade to dtc 1.4 or newer make: *** [checkdtc] Error 1

On 2016年08月26日 13:45, pc.ramachandra wrote: Hai, I am running u-boot time DTC is old is coming, Actually i am upgraded my system Just know once again same problem coming i think DTC old means Device tree Compiler old: *** Your dtc is too old, please upgrade to dtc 1.4 or newer make: ***

[U-Boot] [PATCH] README: add cmd directory description

All of the command files have moved to cmd directory, add description to Directory Hierarchy. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- README | 1 + 1 file changed, 1 insertion(+) diff --git a/README b/README index 30d7ee3..f41a6af 100644 --- a/README +++ b/README @@ -151,6

Re: [U-Boot] [PATCH] rockchip: Fix SPL console output when ROCKCHIP_SPL_BACK_TO_BROM is enabled

Acked-by: Ziyuan Xu <xzy...@rock-chips.com> On 2016年08月11日 19:08, Sandy Patterson wrote: On Wed, Aug 10, 2016 at 11:01 PM, Ziyuan Xu <xzy...@rock-chips.com <mailto:xzy...@rock-chips.com>> wrote: On 2016年08月10日 22:21, Sandy Patterson wrote: Move back_to_bo

[U-Boot] [PATCH] rockchip: use dummy byte only enable OF_PLATDATA

Add a condition to determine the rk3288_sdram_channel size. This patch fixes read sdram_channel property failed from DT on rk3288 boards, which not enable OF_PLATDATA. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- arch/arm/include/asm/arch-rockchip/sdram.h | 4 1 file chan

Re: [U-Boot] disabling mmc in spl when booting using bootrom

On 2016年08月11日 19:31, Sandy Patterson wrote: Simon, I am trying to format a patch to disable MMC in the SPL if booting main u-boot using BOOTROM, therefore the SPL MMC isn't needed. Is the best solution to wrap every header file (rock2.h firefly-rk3288.h, etc) with ifdefs on the

Re: [U-Boot] disabling mmc in spl when booting using bootrom

On 2016年08月11日 19:39, Sandy Patterson wrote: On Thu, Aug 11, 2016 at 7:35 AM, Ziyuan Xu <xzy...@rock-chips.com <mailto:xzy...@rock-chips.com>> wrote: On 2016年08月11日 19:31, Sandy Patterson wrote: Simon, I am trying to format a patch to disable MM

Re: [U-Boot] [PATCH] rockchip: Fix SPL console output when ROCKCHIP_SPL_BACK_TO_BROM is enabled

On 2016年08月10日 22:21, Sandy Patterson wrote: Move back_to_bootrom() call later in SPL init so that the console is initialized and printouts happen. Currently when ROCKCHIP_SPL_BACK_TO_BROM is enabled there is no console output from the SPL init stages. I wasn't sure exactly where this should

Re: [U-Boot] [PATCH v2 3/3] CONFIG_EFI_LOADER breaks rock2 kernel loading

Hi Simon, I think you can drop this patch due to it fixes by a78cd86 - ARM: Rework and correct barrier which Tom had merge it into u-boot/master. On 2016年08月09日 05:43, Simon Glass wrote: Hi Sandy, On 22 July 2016 at 08:40, Sandy Patterson wrote: The problem

Re: [U-Boot] [PATCH] ARM: Rework and correct barrier definitions

Hi Tom, On 2016年08月02日 08:39, Tom Rini wrote: On Tue, Aug 02, 2016 at 08:37:19AM +0800, Ziyuan Xu wrote: Hi Tom, On 2016年08月02日 06:54, Tom Rini wrote: As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple

[U-Boot] [RESEND PATCH 1/2] rockchip: add basic partitions support for rk3288

ess! Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- include/configs/rk3288_common.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 814116c..fa37335 100644 --- a/include/configs/rk3288_common.h +++ b/includ

[U-Boot] [RESEND PATCH 2/2] rockchip: add usb mass storage feature support for rk3288

Enable ums feature for rk3288 boards, so that we can mount the mmc device to PC. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- include/configs/rk3288_common.h | 4 1 file changed, 4 insertions(+) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h

[U-Boot] [PATCH 2/2] rockchip: add usb mass storage feature support for rk3288

Enable ums feature for rk3288 boards, so that we can mount the mmc device to PC. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- include/common.h| 4 +++- include/configs/rk3288_common.h | 4 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/i

[U-Boot] [PATCH 1/2] rockchip: add basic partitions support for rk3288

ess! Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- include/configs/rk3288_common.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 814116c..fa37335 100644 --- a/include/configs/rk3288_common.h +++ b/includ

Re: [U-Boot] [PATCH] configs: rk3399: add gpt and fs support

On 2016年08月02日 10:56, Ziyuan Xu wrote: Hi kever, On 2016年08月02日 10:29, Kever Yang wrote: To compatible with distro boot, we need to add gpt and fs support, including gpt table and vfat, ext2, ext4 support. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- include/c

Re: [U-Boot] [PATCH] configs: rk3399: add gpt and fs support

On 2016年08月02日 10:56, Ziyuan Xu wrote: Hi kever, On 2016年08月02日 10:29, Kever Yang wrote: To compatible with distro boot, we need to add gpt and fs support, including gpt table and vfat, ext2, ext4 support. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- include/c

Re: [U-Boot] [PATCH] configs: rk3399: add gpt and fs support

Hi kever, On 2016年08月02日 10:29, Kever Yang wrote: To compatible with distro boot, we need to add gpt and fs support, including gpt table and vfat, ext2, ext4 support. Signed-off-by: Kever Yang --- include/configs/rk3399_common.h | 19 +++ 1 file

Re: [U-Boot] [PATCH] ARM: Rework and correct barrier definitions

Hi Tom, On 2016年08月02日 06:54, Tom Rini wrote: As part of testing booting Linux kernels on Rockchip devices, it was discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for some cases incomplete isb definitions. This was causing a failure to boot of the Linux kernel. In order

Re: [U-Boot] [PATCH] MAINTAINERS, git-mailrc: Update the mmc maintainer

Hi Jaehoon, On 2016年08月01日 11:35, Jaehoon Chung wrote: Update the mmc maintainer from Pantelis to me. Signed-off-by: Jaehoon Chung --- Congratulations!:-) ___ U-Boot mailing list U-Boot@lists.denx.de

Re: [U-Boot] [PATCH] rockchip: rockchip, sdram-channel 0xff fix remaining dts

Hi Simon, On 2016年08月01日 10:21, Simon Glass wrote: Hi Ziyuan, On 31 July 2016 at 20:13, Ziyuan Xu <xzy...@rock-chips.com> wrote: Hi Simon, On 2016年08月01日 09:51, Simon Glass wrote: Hi Sandy, On 28 July 2016 at 07:49, Sandy Patterson <apatter...@sightlogix.com> wrote: Add an e

Re: [U-Boot] [PATCH] rockchip: rockchip, sdram-channel 0xff fix remaining dts

Hi Simon, On 2016年08月01日 09:51, Simon Glass wrote: Hi Sandy, On 28 July 2016 at 07:49, Sandy Patterson wrote: Add an extra byte so that this data is not byteswapped. Signed-off-by: Sandy Patterson ---

Re: [U-Boot] [PATCH] arm: re-implement proper ISB instruction for ARMv7-A

On 2016年07月31日 22:27, Tom Rini wrote: On Sun, Jul 31, 2016 at 11:59:19AM +0800, Ziyuan Xu wrote: Hi Tom, On 2016年07月29日 09:12, Tom Rini wrote: On Fri, Jul 29, 2016 at 09:06:29AM +0800, Ziyuan Xu wrote: Hi Tom, On 2016年07月29日 08:34, Tom Rini wrote: On Fri, Jul 29, 2016 at 07:34:09AM

[U-Boot] [PATCH v2] rockchip: add support for rk3288 miniarm board

From: Xu Ziyuan <xzy...@rock-chips.com> Miniarm is a rockchip rk3288 based development board, which has lots of interface such as HDMI, USB, micro-SD card, Audio etc. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> Acked-by: Simon Glass <s...@chromium.org> --- Changes in v2

Re: [U-Boot] [PATCH] rockchip: add support for rk3288 miniarm board

Hi Simon, On 2016年08月01日 07:28, Simon Glass wrote: Hi Ziyuan, On 27 July 2016 at 21:43, Ziyuan Xu <xzy...@rock-chips.com> wrote: Miniarm is a rockchip rk3288 based development board, which has lots of interface such as HDMI, USB, micro-SD card, Audio etc. Signed-off-by: Ziyuan X

Re: [U-Boot] [PATCH] arm: re-implement proper ISB instruction for ARMv7-A

Hi Tom, On 2016年07月29日 09:12, Tom Rini wrote: On Fri, Jul 29, 2016 at 09:06:29AM +0800, Ziyuan Xu wrote: Hi Tom, On 2016年07月29日 08:34, Tom Rini wrote: On Fri, Jul 29, 2016 at 07:34:09AM +0800, Ziyuan Xu wrote: Hi Tom, On 2016年07月29日 06:15, Tom Rini wrote: On Thu, Jul 28, 2016 at 07:03

Re: [U-Boot] [PATCH] arm: re-implement proper ISB instruction for ARMv7-A

On 2016年07月29日 09:12, Tom Rini wrote: On Fri, Jul 29, 2016 at 09:06:29AM +0800, Ziyuan Xu wrote: Hi Tom, On 2016年07月29日 08:34, Tom Rini wrote: On Fri, Jul 29, 2016 at 07:34:09AM +0800, Ziyuan Xu wrote: Hi Tom, On 2016年07月29日 06:15, Tom Rini wrote: On Thu, Jul 28, 2016 at 07:03:17PM +0800

Re: [U-Boot] [PATCH] arm: re-implement proper ISB instruction for ARMv7-A

Hi Tom, On 2016年07月29日 08:34, Tom Rini wrote: On Fri, Jul 29, 2016 at 07:34:09AM +0800, Ziyuan Xu wrote: Hi Tom, On 2016年07月29日 06:15, Tom Rini wrote: On Thu, Jul 28, 2016 at 07:03:17PM +0800, Chen-Yu Tsai wrote: Hi, On Thu, Jul 28, 2016 at 6:13 PM, Ziyuan Xu <xzy...@rock-chips.com>

Re: [U-Boot] [PATCH] arm: re-implement proper ISB instruction for ARMv7-A

Hi Tom, On 2016年07月29日 06:15, Tom Rini wrote: On Thu, Jul 28, 2016 at 07:03:17PM +0800, Chen-Yu Tsai wrote: Hi, On Thu, Jul 28, 2016 at 6:13 PM, Ziyuan Xu <xzy...@rock-chips.com> wrote: For ARMv7-A architecture, the valid ISB instruction is asm volatile("isb"). This patch

Re: [U-Boot] [PATCH] arm: re-implement proper ISB instruction for ARMv7-A

Hi Alexander, On 2016年07月28日 18:39, Alexander Graf wrote: On 07/28/2016 12:13 PM, Ziyuan Xu wrote: For ARMv7-A architecture, the valid ISB instruction is asm volatile("isb"). This patch fixes the U-Boot was stuck in invalidate_dcache_all() before booting linux kernel, whic

Re: [U-Boot] [PATCH] arm: re-implement proper ISB instruction for ARMv7-A

Hi, On 2016年07月28日 19:03, Chen-Yu Tsai wrote: Hi, On Thu, Jul 28, 2016 at 6:13 PM, Ziyuan Xu <xzy...@rock-chips.com> wrote: For ARMv7-A architecture, the valid ISB instruction is asm volatile("isb"). This patch fixes the U-Boot was stuck in invalidate_dcache_all() before boot

[U-Boot] [PATCH] arm: re-implement proper ISB instruction for ARMv7-A

. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- arch/arm/include/asm/system.h | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 2bdc0be..12d4ba0 100644 --- a/arch/arm/include/asm/system.h +++ b/a

Re: [U-Boot] [PATCH] mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit

work sane coincidentally.:-) Thanks for fix. Reviewed-by: Ziyuan Xu <xzy...@rock-chips.com> Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com> --- include/dwmmc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/dwmmc.h b/include/dwmmc.h index 6aeb

[U-Boot] [PATCH] rockchip: add fastboot support for rk3036 board

Enable fastboot feature on rk3036, please refer to doc/README.rockchip for more detailed usage. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- arch/arm/dts/rk3036-sdk.dts| 2 -- board/rockchip/evb_rk3036/evb_rk3036.c | 46 ++ board/ro

[U-Boot] [PATCH] rockchip: add support for rk3288 miniarm board

Miniarm is a rockchip rk3288 based development board, which has lots of interface such as HDMI, USB, micro-SD card, Audio etc. Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com> --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3288-miniarm.dts

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