[U-Boot] [PATCH v3 4/5] ARMv8: Setup PSCI memory and device tree

2016-11-06 Thread macro . wave . z
From: Hongbo Zhang The newly added ARMv8 PSCI needs to be initialized, be copied or reserved in right place, this patch does all the setup steps. Signed-off-by: Hongbo Zhang --- arch/arm/cpu/armv8/cpu-dt.c | 8 arch/arm/cpu/armv8/cpu.c

[U-Boot] [PATCH v3 5/5] ARMv8: LS1043A: Enable LS1043A default PSCI support

2016-11-06 Thread macro . wave . z
From: Hongbo Zhang A most basic PSCI implementation with only one psci_version is added for LS1043A, this can verify the generic PSCI framework, and more platform specific implementation will be added later. Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v3 2/5] ARMv8: Add secure sections for PSCI text and data

2016-11-06 Thread macro . wave . z
From: Hongbo Zhang This patch adds secure_text, secure_data and secure_stack sections for ARMv8 to hold PSCI text and data, and it is based on the legacy implementation of ARMv7. Signed-off-by: Hongbo Zhang Reviewed-by: Tom Rini

[U-Boot] [PATCH v3 3/5] ARMv8: Add basic PSCI framework

2016-11-06 Thread macro . wave . z
From: Hongbo Zhang This patch introduces a generic ARMv8 PSCI framework, with all functions returning a dummy ARM_PSCI_RET_NI (Not Implemented), then it is up to each platform to implement their own functions based on this framework. Signed-off-by: Hongbo Zhang

[U-Boot] [PATCH v3 0/5] Add ARMv8 PSCI framework

2016-11-06 Thread macro . wave . z
From: Hongbo Zhang v2-v3 changes: - Drop the previous 1/6, since the previous CONFIG_ARMV8_PSCI in common parts of codes also work for generic PSCI framework, so there are 5 patches in this iteration. - Add "Reviewed-by: Tom Rini " for patches 1/5 and

[U-Boot] [PATCH v3 1/5] ARMv8: Enable SMC instruction

2016-11-06 Thread macro . wave . z
From: Hongbo Zhang PSCI implementation needs the SMC instruction to be enabled. Following the legacy codes pattern, no bit macro definition and bit operation are used, only the immediate data used in line is changed. Signed-off-by: Hongbo Zhang

[U-Boot] [PATCH v2 5/6] ARMv8: Setup PSCI memory and dt

2016-11-01 Thread macro . wave . z
From: Hongbo Zhang Newly add ARMv8 PSCI needs to be initialized, be copied or reserved in right place, this patch does all the setup steps. Signed-off-by: Hongbo Zhang --- arch/arm/cpu/armv8/cpu-dt.c | 10 ++ arch/arm/cpu/armv8/cpu.c

[U-Boot] [PATCH v2 6/6] ARMv8: LS1043A: Enable LS1043A default PSCI support

2016-11-01 Thread macro . wave . z
From: Hongbo Zhang A most basic PSCI implementation with only one psci_version is added for LS1043A, this can verify the generic PSCI framework, and more platform specific implementation will be added later. Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v2 3/6] ARMv8: Add secure sections for PSCI text and data

2016-11-01 Thread macro . wave . z
From: Hongbo Zhang This patch adds secure_text, secure_data and secure_stack sections for ARMv8 to hold PSCI text and data, and it is based on the legacy implementation of ARMv7. Signed-off-by: Hongbo Zhang --- arch/arm/config.mk| 3 ++-

[U-Boot] [PATCH v2 4/6] ARMv8: Add basic PSCI framework

2016-11-01 Thread macro . wave . z
From: Hongbo Zhang This patch introduces a generic ARMv8 PSCI framework, with all functions returning a dummy ARM_PSCI_RET_NI (Not Implemented), then it is up to each platform to implement their own functions based on this framework. Signed-off-by: Hongbo Zhang

[U-Boot] [PATCH v2 2/6] ARMv8: Enable SMC instruction

2016-11-01 Thread macro . wave . z
From: Hongbo Zhang PSCI implementation needs the SMC instruction to be enabled. Following the legacy codes pattern, no bit macro definition and bit operation are used, only the immediate data used in line is changed. Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v2 1/6] ARMv8: LS1043A: change macro CONFIG_ARMV8_PSCI definition

2016-11-01 Thread macro . wave . z
From: Hongbo Zhang NXP/Freescale uses macro CONFIG_ARMV8_PSCI to enable their private PSCI implementation in PPA firmware, but this macro naming too generic, so this patch replaces it with a specic one CONFIG_FSL_PPA_ARMV8_PSCI. And this macro CONFIG_ARMV8_PSCI will be used

[U-Boot] [PATCH v2 0/6] Add ARMv8 PSCI framework

2016-11-01 Thread macro . wave . z
From: Hongbo Zhang v1-v2 changes: - The new config options are introduced in Kconfig when used for first time - Introduce new config options in armv8/Kconfig instead of LS1043 platform - Move previous patch 5/6 to current 2/6 place v1 notes: This patch set introduces

[U-Boot] [PATCH 5/6] ARMv8: Enable SMC instruction

2016-09-27 Thread macro . wave . z
From: Hongbo Zhang PSCI implementation needs the SMC instruction to be enabled. Following the legacy codes pattern, no bit macro definition and bit operation are used, only the immediate data used in line is changed. Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH 6/6] ARMv8: LS1043A: Enable LS1043A default PSCI support

2016-09-27 Thread macro . wave . z
From: Hongbo Zhang A most basic PSCI implementation with only one psci_version is added for LS1043A, this can verify the generic PSCI framework, and more platform specific implementation will be added later. Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH 3/6] ARMv8: Add basic PSCI framework

2016-09-27 Thread macro . wave . z
From: Hongbo Zhang This patch introduces a generic ARMv8 PSCI framework, with all functions returning a dummy ARM_PSCI_RET_NI (Not Implemented), then it is up to each platform to implement their own functions based on this framework. Signed-off-by: Hongbo Zhang

[U-Boot] [PATCH 4/6] ARMv8: Setup PSCI memory and dt

2016-09-27 Thread macro . wave . z
From: Hongbo Zhang Newly add ARMv8 PSCI needs to be initialized, be copied or reserved in right place, this patch does all the setup steps. Signed-off-by: Hongbo Zhang --- arch/arm/cpu/armv8/cpu-dt.c | 10 ++ arch/arm/cpu/armv8/cpu.c

[U-Boot] [PATCH 0/6] Add ARMv8 PSCI framework

2016-09-27 Thread macro . wave . z
From: Hongbo Zhang This patch set introduces ARMv8 PSCI framework, all the PSCI functions are implemented a default dummy one, it is up to each platform to implement their own specific ones. The first 1/6 patch is a prepare clean up for adding ARMv8 PSCI. Patches 2/6 to

[U-Boot] [PATCH 2/6] ARMv8: Add secure sections for PSCI text and data

2016-09-27 Thread macro . wave . z
From: Hongbo Zhang This patch adds secure_text, secure_data and secure_stack sections for ARMv8 to hold PSCI text and data, and it is based on the legacy implementation of ARMv7. Signed-off-by: Hongbo Zhang --- arch/arm/config.mk| 3 +-

[U-Boot] [PATCH 1/6] ARMv8: LS1043A: change macro CONFIG_ARMV8_PSCI definition

2016-09-27 Thread macro . wave . z
From: Hongbo Zhang NXP/Freescale uses macro CONFIG_ARMV8_PSCI to enable their private PSCI implementation in PPA firmware, but this macro naming too generic, so this patch replaces it with a specic one CONFIG_FSL_PPA_ARMV8_PSCI. And this macro CONFIG_ARMV8_PSCI will be used

[U-Boot] [PATCH v2] ARMv7: LS102xA: Move two macros from header files to Kconfig

2016-09-21 Thread macro . wave . z
From: Hongbo Zhang Following commits 217f92b and 1544698, these two config CPU_V7_HAS_NONSEC and CPU_V7_HAS_VIRT are moved to Kconfig, for correctly select ARMV7_PSCI. Signed-off-by: Hongbo Zhang --- arch/arm/Kconfig | 4

[U-Boot] [PATCH] ARMv7: LS102xA: Move two macros from header files to Kconfig

2016-09-19 Thread macro . wave . z
From: Hongbo Zhang ARMV7_PSCI depends on ARMV7_NONSEC && ARCH_SUPPORT_PSCI, and ARMV7_NONSEC depends on CPU_V7_HAS_NONSEC, LS102XA didn't enable CPU_V7_HAS_NONSEC, but defined ARMV7_NONSEC in a internal header file, this cannot be recognized by Kconfig, so ARMV7_PSCI isn't

[U-Boot] [UBOOT PATCH 3/4] nxp: ls102xa: add EPU Finite State Machine

2016-08-19 Thread macro . wave . z
From: Hongbo Zhang The EPU Finite State Machie (FSM) is used in both the last stage of system suspend and the earliest stage of system resume. Signed-off-by: Hongbo Zhang --- arch/arm/cpu/armv7/ls102xa/fsl_epu.c | 157

[U-Boot] [UBOOT PATCH 4/4] nxp: ls102xa: add LS1 PSCI system suspend

2016-08-19 Thread macro . wave . z
From: Hongbo Zhang The deep sleep function of LS1 platform, is mapped into PSCI system suspend function, this patch adds implementation of it. Signed-off-by: Hongbo Zhang --- arch/arm/cpu/armv7/ls102xa/Makefile | 2 +-

[U-Boot] [UBOOT PATCH 2/4] nxp: ls102xa: add registers definition for system sleep

2016-08-19 Thread macro . wave . z
From: Hongbo Zhang This patch adds definitions of all the regesters necessary for system sleep. Signed-off-by: Hongbo Zhang --- arch/arm/include/asm/arch-ls102xa/config.h| 2 + arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 52

[U-Boot] [UBOOT PATCH 0/4] Add LS1 PSCI system suspend

2016-08-19 Thread macro . wave . z
From: Hongbo Zhang This patch set is based against latest community uboot tree in which my PSCIv1.0 support was merged. Currently doesn't apply our internal SDK uboot, when these get merged in community we can pull them back into SDK. We need community kernel to test this

[U-Boot] [UBOOT PATCH 1/4] armv7: psci: make v7_flush_dcache_all public for all psci code

2016-08-19 Thread macro . wave . z
From: Hongbo Zhang The v7_flush_dcache_all function will be called by ls102xa platform system suspend, it is necessary to make it a public call instead of a local one, but changing the LENTRY to ENTRY isn't enough, because there is another one using the same name, so this

[U-Boot] [PATCH v6 1/4] ARMv7: PSCI: add PSCI v1.0 functions skeleton

2016-07-21 Thread macro . wave . z
From: Hongbo Zhang This patch adds all the PSCI v1.0 functions in to the common framework, with all the functions returning "not implemented" by default, as a common framework all the dummy functions are added here, it is up to every platform developer to decide which

[U-Boot] [PATCH v6 4/4] ARMv7: PSCI: ls102xa: move secure text section into OCRAM

2016-07-21 Thread macro . wave . z
From: Hongbo Zhang LS1021 offers two secure OCRAM blocks for trustzone. This patch moves all the secure text sections into the OCRAM. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v6 0/4] ARMv7: PSCI: add PSCI v1.0 support

2016-07-21 Thread macro . wave . z
From: Hongbo Zhang v6 changes: - Remove the patch of fixing psci stack and patch of fixing saving target PC since Chen-Yu Tsai's patches resovle them in other way and already got merged - Temporarily remove patch of checking ON_PENDING and ALREADY_ON for reasons: it is

[U-Boot] [PATCH v6 3/4] ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention

2016-07-21 Thread macro . wave . z
From: Hongbo Zhang This patch implements PSCI functions for ls102xa SoC following PSCI v1.0, they are as the list: psci_version, psci_features, psci_cpu_suspend, psci_affinity_info, psci_system_reset, psci_system_off. Tested on LS1021aQDS,

[U-Boot] [PATCH v6 2/4] ARMv7: PSCI: ls102xa: check target CPU ID before further operations

2016-07-21 Thread macro . wave . z
From: Hongbo Zhang The input parameter CPU ID needs to be validated before furher oprations such as CPU_ON, this patch introduces the function to do this. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v5 2/8] ARMv7: PSCI: factor out reusable psci_cpu_on_common

2016-06-14 Thread macro . wave . z
From: Hongbo Zhang There are codes for saving target PC in each platform psci_cpu_on routines, these can be factored out as psci_cpu_on_common. Another purpose is that the codes of saving target PC will be changed a bit and a new context ID will be saved in the following

[U-Boot] [PATCH v5 3/8] ARMv7: PSCI: update the place of saving target PC

2016-06-14 Thread macro . wave . z
From: Hongbo Zhang The legacy code saves target PC at stack top, this patch changes it to stack bottom, because we will save more contents for PSCI v1.0, by this way we don't need to adjust the stack pointer when more contents are saved. Signed-off-by: Hongbo Zhang

[U-Boot] [PATCH v5 0/8] ARMv7: PSCI: add PSCI v1.0 support

2016-06-14 Thread macro . wave . z
From: Hongbo Zhang v5 changes: - Give up fixing the potential bug of PSCI stack overlap with secure text end when there is more CPUs in system. Because I just want to keep this series as simple as it could be: adding basic PSCI v1.0 support and adding more PSCI v1.0

[U-Boot] [PATCH v5 4/8] ARMv7: PSCI: add codes to save context ID for CPU_ON

2016-06-14 Thread macro . wave . z
From: Hongbo Zhang According to latest PSCI specification, the context ID is needed by CPU_ON. This patch saves context ID to the second lowest address of the stack (next to where target PC is saved), and restores it to r0 when needed while target CPU booting up.

[U-Boot] [PATCH v5 8/8] ARMv7: PSCI: ls102xa: move secure text section into OCRAM

2016-06-14 Thread macro . wave . z
From: Hongbo Zhang LS1021 offers two secure OCRAM blocks for trustzone. This patch moves all the secure text sections into the OCRAM. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v5 7/8] ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention

2016-06-14 Thread macro . wave . z
From: Hongbo Zhang This patch implements PSCI functions for ls102xa SoC following PSCI v1.0, they are as the list: psci_version, psci_features, psci_cpu_suspend, psci_affinity_info, psci_system_reset, psci_system_off. Tested on LS1021aQDS,

[U-Boot] [PATCH v5 6/8] ARMv7: PSCI: ls102xa: check ALREADY_ON or ON_PENDING for CPU_ON

2016-06-14 Thread macro . wave . z
From: Hongbo Zhang For the robustness of codes, while powering on a CPU, it is better to check if the target CPU is already on or in the process of power on, if yes the power on routine shouldn't be executed further and should return with the corresponding status

[U-Boot] [PATCH v5 5/8] ARMv7: PSCI: ls102xa: check target CPU ID before further operations

2016-06-14 Thread macro . wave . z
From: Hongbo Zhang The input parameter CPU ID needs to be validated before furher oprations such as CPU_ON, this patch introduces the function to do this. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v5 1/8] ARMv7: PSCI: add PSCI v1.0 functions skeleton

2016-06-14 Thread macro . wave . z
From: Hongbo Zhang This patch adds all the PSCI v1.0 functions in to the common framework, with all the functions returning "not implemented" by default, as a common framework all the dummy functions are added here, it is up to every platform developer to decide which

[U-Boot] [PATCH v4 9/9] ARMv7: PSCI: ls102xa: move secure text section into OCRAM

2016-06-02 Thread macro . wave . z
From: Hongbo Zhang LS1021 offers two secure OCRAM blocks for trustzone. This patch moves all the secure text sections into the OCRAM. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v4 6/9] ARMv7: PSCI: ls102xa: check target CPU ID before further operations

2016-06-02 Thread macro . wave . z
From: Hongbo Zhang The input parameter CPU ID needs to be validated before furher oprations such as CPU_ON, this patch introduces the function to do this. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v4 7/9] ARMv7: PSCI: ls102xa: check ALREADY_ON or ON_PENDING for CPU_ON

2016-06-02 Thread macro . wave . z
From: Hongbo Zhang For the robustness of codes, while powering on a CPU, it is better to check if the target CPU is already on or in the process of power on, if yes the power on routine shouldn't be executed further and should return with the corresponding status

[U-Boot] [PATCH v4 8/9] ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention

2016-06-02 Thread macro . wave . z
From: Hongbo Zhang This patch implements PSCI functions for ls102xa SoC following PSCI v1.0, they are as the list: psci_version, psci_features, psci_cpu_suspend, psci_affinity_info, psci_system_reset, psci_system_off. Tested on LS1021aQDS,

[U-Boot] [PATCH v4 5/9] ARMv7: PSCI: factor out reusable psci_cpu_on_common

2016-06-02 Thread macro . wave . z
From: Hongbo Zhang There are codes for saving target PC and target context ID in each platform psci_cpu_on routines, these can be factored out as psci_cpu_on_common. Signed-off-by: Hongbo Zhang Signed-off-by: Wang Dongsheng

[U-Boot] [PATCH v4 4/9] ARMv7: PSCI: add codes to save context ID for CPU_ON

2016-06-02 Thread macro . wave . z
From: Hongbo Zhang According to latest PSCI specification, the context ID is needed by CPU_ON. This patch saves context ID to the second lowest address of the stack (next to where target PC is saved), and restores it to r0 when needed while target CPU booting up. This

[U-Boot] [PATCH v4 0/9] ARMv7: PSCI: add PSCI v1.0 support

2016-06-02 Thread macro . wave . z
From: Hongbo Zhang v4 changes: - since there is already PSCI v0.2 function IDs definition merged in 5a07abb, I give up my previous patches 1/11 and 2/11, and move previous 7/11 "ARMv7: PSCI: add PSCI v1.0 functions skeleton" as current first one 1/9 - accept Andre's comment

[U-Boot] [PATCH v4 3/9] ARMv7: PSCI: update the place of saving target PC

2016-06-02 Thread macro . wave . z
From: Hongbo Zhang The legacy code reserves one word in each stack for saving target PC, but it isn't used, the target PC is still saved to where the stack top pointer points. This patch relocates the place for saving target PC to the lowest address of each stack,

[U-Boot] [PATCH v4 2/9] ARMv7: PSCI: update function psci_get_cpu_stack_top

2016-06-02 Thread macro . wave . z
From: Hongbo Zhang There are issues of legacy fuction psci_get_cpu_stack_top: First, the current algorithm arranges stacks from an fixed adress towards psci_text_end, if there are more CPUs, the stacks will overlap with psci text segment and even other segments. This patch

[U-Boot] [PATCH v4 1/9] ARMv7: PSCI: add PSCI v1.0 functions skeleton

2016-06-02 Thread macro . wave . z
From: Hongbo Zhang This patch adds all the PSCI v1.0 functions in to the common framework, with all the functions returning "not implemented" by default, as a common framework all the dummy functions are added here, it is up to every platform developer to decide which

[U-Boot] [PATCH v3 07/11] ARMv7: PSCI: add PSCI v1.0 functions skeleton

2016-05-18 Thread macro . wave . z
From: Hongbo Zhang This patch adds all the PSCI v1.0 functions in to the common framework, with all the functions returning "not sopported" by default, as a common framework all the functions are added here, it is up to every platform developer to decide which version of

[U-Boot] [PATCH v3 09/11] ARMv7: PSCI: ls102xa: check ALREADY_ON or ON_PENDING for CPU_ON

2016-05-18 Thread macro . wave . z
From: Hongbo Zhang For the robustness of codes, while powering on a CPU, it is better to check if the target CPU is already on or in the process of power on, if yes the power on routine shouldn't be executed further and should return with the corresponding status

[U-Boot] [PATCH v3 08/11] ARMv7: PSCI: ls102xa: check target CPU ID before further operations

2016-05-18 Thread macro . wave . z
From: Hongbo Zhang The input parameter CPU ID needs to be validated before furher oprations such as CPU_ON, this patch introduces the function to do this. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v3 11/11] ARMv7: PSCI: ls102xa: move secure text section into OCRAM

2016-05-18 Thread macro . wave . z
From: Hongbo Zhang LS1021 offers two secure OCRAM blocks for trustzone. This patch moves all the secure text sections into the OCRAM. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v3 10/11] ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention

2016-05-18 Thread macro . wave . z
From: Hongbo Zhang This patch implements PSCI functions for ls102xa SoC following PSCI v1.0, they are as the list: psci_version, psci_features, psci_cpu_suspend, psci_affinity_info, psci_system_reset, psci_system_off. Tested on LS1021aQDS,

[U-Boot] [PATCH v3 06/11] ARMv7: PSCI: factor out reusable psci_cpu_on_common

2016-05-18 Thread macro . wave . z
From: Hongbo Zhang There are codes for saving target PC and target context ID in each platform psci_cpu_on routines, these can be factored out as psci_cpu_on_common. Signed-off-by: Hongbo Zhang Signed-off-by: Wang Dongsheng

[U-Boot] [PATCH v3 05/11] ARMv7: PSCI: add codes to save context ID for CPU_ON

2016-05-18 Thread macro . wave . z
From: Hongbo Zhang According to latest PSCI specification, the context ID is needed by CPU_ON. This patch saves context ID to the second lowest address of the stack (next to where target PC is saved), and restores it to r0 when needed while target CPU booting up. This

[U-Boot] [PATCH v3 00/11] ARMv7: PSCI: add PSCI v1.0 support

2016-05-18 Thread macro . wave . z
From: Hongbo Zhang Previous v2 patch set was sent out for a long time but got no comments, this time I send a v3 with minor updates and with more people in list, they are contributors for Linux kernel PSCI codes. v3 changes: - patch 3/11, re-init the stack pointer to

[U-Boot] [PATCH v3 04/11] ARMv7: PSCI: update the place of saving target PC

2016-05-18 Thread macro . wave . z
From: Hongbo Zhang The legacy code reserves one word in each stack for saving target PC, but it isn't used, the target PC is still saved to where the stack top pointer points. This patch relocates the place for saving target PC to the lowest address of each stack,

[U-Boot] [PATCH v3 03/11] ARMv7: PSCI: update function psci_get_cpu_stack_top

2016-05-18 Thread macro . wave . z
From: Hongbo Zhang There are issues of legacy fuction psci_get_cpu_stack_top: First, the current algorithm arranges stacks from an fixed adress towards psci_text_end, if there are more CPUs, the stacks will overlap with psci text segment and even other segments. This patch

[U-Boot] [PATCH v3 02/11] ARM: PSCI: change PSCI related macros definition style

2016-05-18 Thread macro . wave . z
From: Wang Dongsheng Since we are already under the directory of arch/arm/, the prefix ARM_ for macros isn't so necessary, and with more PSCI interfaces being added later, there will be much more redundant ARM_ prefixes, what's more, there are no ARM_/arm_ prefixes for

[U-Boot] [PATCH v3 01/11] ARM: PSCI: change PSCI function IDs base and offsets

2016-05-18 Thread macro . wave . z
From: Wang Dongsheng According to PSCI specification v1.0, the PSCI functions should start from 0x8400 for SMC32, this patch changes this base value as well as other function offset values. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo

[U-Boot] [PATCH v2 11/11] ARMv7: PSCI: ls102xa: move secure text section into OCRAM

2016-04-08 Thread macro . wave . z
From: Hongbo Zhang LS1021 offers two secure OCRAM blocks for trustzone. This patch moves all the secure text sections into the OCRAM. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v2 08/11] ARMv7: PSCI: ls102xa: check target CPU ID before further operations

2016-04-08 Thread macro . wave . z
From: Hongbo Zhang The input parameter CPU ID needs to be validated before furher oprations such as CPU_ON, this patch introduces the function to do this. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo Zhang ---

[U-Boot] [PATCH v2 10/11] ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention

2016-04-08 Thread macro . wave . z
From: Hongbo Zhang This patch implements PSCI functions for ls102xa SoC following PSCI v1.0, they are as the list: psci_version, psci_features, psci_cpu_suspend, psci_affinity_info, psci_system_reset, psci_system_off. Tested on LS1021aQDS,

[U-Boot] [PATCH v2 07/11] ARMv7: PSCI: add PSCI v1.0 functions skeleton

2016-04-08 Thread macro . wave . z
From: Hongbo Zhang This patch adds all the PSCI v1.0 functions in to the common framework, with all the functions returning "not sopported" by default, as a common framework all the functions are added here, it is up to every platform developer to decide which version of

[U-Boot] [PATCH v2 09/11] ARMv7: PSCI: ls102xa: check ALREADY_ON or ON_PENDING for CPU_ON

2016-04-08 Thread macro . wave . z
From: Hongbo Zhang For the robustness of codes, while powering on a CPU, it is better to check if the target CPU is already on or in the process of power on, if yes the power on routine shouldn't be executed further and should return with the corresponding status

[U-Boot] [PATCH v2 06/11] ARMv7: PSCI: factor out reusable psci_cpu_on_common

2016-04-08 Thread macro . wave . z
From: Hongbo Zhang There are codes for saving target PC and target context ID in each platform psci_cpu_on routines, these can be factored out as psci_cpu_on_common. Signed-off-by: Hongbo Zhang Signed-off-by: Wang Dongsheng

[U-Boot] [PATCH v2 05/11] ARMv7: PSCI: add codes to save context ID for CPU_ON

2016-04-08 Thread macro . wave . z
From: Hongbo Zhang According to latest PSCI specification, the context ID is needed by CPU_ON. This patch saves context ID to the second lowest address of the stack (next to where target PC is saved), and restores it to r0 when needed while target CPU booting up. This

[U-Boot] [PATCH v2 02/11] ARM: PSCI: change PSCI related macros definition style

2016-04-08 Thread macro . wave . z
From: Wang Dongsheng Since we are already under the directory of arch/arm/, the prefix ARM_ for macros isn't so necessary, and with more PSCI interfaces being added later, there will be much more redundant ARM_ prefixes, what's more, there are no ARM_/arm_ prefixes for

[U-Boot] [PATCH v2 01/11] ARM: PSCI: change PSCI function IDs base and offsets

2016-04-08 Thread macro . wave . z
From: Wang Dongsheng According to PSCI specification v1.0, the PSCI functions should start from 0x8400 for SMC32, this patch changes this base value as well as other function offset values. Signed-off-by: Wang Dongsheng Signed-off-by: Hongbo

[U-Boot] [PATCH v2 04/11] ARMv7: PSCI: update the place of saving target PC

2016-04-08 Thread macro . wave . z
From: Hongbo Zhang The legacy code reserves one word in each stack for saving target PC, but it isn't used, the target PC is still saved to where the stack top pointer points. This patch relocates the place for saving target PC to the lowest address of each stack,

[U-Boot] [PATCH v2 03/11] ARMv7: PSCI: update function psci_get_cpu_stack_top

2016-04-08 Thread macro . wave . z
From: Hongbo Zhang There are issues of legacy fuction psci_get_cpu_stack_top: First, because the stack grows in descending address order, it is better the stack starts from page end or some similiar address, but currently the algorithm is based on address of page start, if

[U-Boot] [PATCH v2 00/11] ARMv7: PSCI: add PSCI v1.0 support

2016-04-08 Thread macro . wave . z
From: Hongbo Zhang This patch set contains two parts: ARMv7 PSCI common framework: fix some issues and add v1.0 support NXP (was Freescale) LS102XA: codes enhancement and add v1.0 implementation Changes since v1: - re-organize psci_cpu_on_common, this code should be called