From: Ying Zhang
When using rcw protocols to support 10G on MAC9 and MAC10, these MACs
should not be identified as 1G interface, otherwise, one MAC will be
listed as two Ethernet ports. For example, MAC9 will be listed as
FM1@TGEC1 and FM1@DTSEC9.
Signed-off-by: Ying Zhang
From: Ying Zhang
There are 12 ethernet port on T4240RDB, but there need to set 16
MAC addressed for ethernets.
There need to disable non-existent ethernet ports in U-boot
Signed-off-by: Ying Zhang
---
[changed from v1]:
--- update the title.
From: Ying Zhang
FM1_DTSEC9 & FM1_DTSEC10 should not be detected.
Signed-off-by: Ying Zhang
---
drivers/net/fm/t4240.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/fm/t4240.c b/drivers/net/fm/t4240.c
index
From: Ying Zhang
There are 12 ethernet port on T4240RDB, but there need to set 16
MAC addressed for ethernets.
There need to disable non-existent ethernet ports in U-boot
Signed-off-by: Ying Zhang
---
board/freescale/t4rdb/eth.c | 5 +
1 file
From: Ying Zhang
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage
From: Ying Zhang
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage
From: Ying Zhang
IR chip on all the boards support VID are required to be
used in Intel mode.
the VDD will not be adjusted while IR chip is not used in
Intel mode.
Signed-off-by: Ying Zhang
---
Changed from v2:
- Separate this patch from T4RDB
From: Ying Zhang
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage
From: Ying Zhang b40...@freescale.com
Because the function ft_board_setup() delete the USB2 device node, it
leads to can't find the device node and hung up.
In fact only P1020RDB needs to delete the USB2 node, this patch fixes
this issue.
Signed-off-by: Ying Zhang b40...@freescale.com
---
From: Ying Zhang b40...@freescale.com
Because the function ft_board_setup() delete the USB2 device node, it
leads to can't find the device node and hung up.
In fact only P1020RDB needs to delete the USB2 node, this patch fixes
this issue.
Signed-off-by: Ying Zhang b40...@freescale.com
---
From: Ying Zhang b40...@freescale.com
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage
From: Ying Zhang b40...@freescale.com
Modify CONFIG_USB_MAX_CONTROLLER_COUNT value to 1 on P1022DS.
As ETSEC2 and USB2 are muxed; thus if ETSEC2 is enabled, the
system bus hangs on USB2 if ETSEC2 is enabled but usb start
command is issued. Hence making default controller count to 1
to avoid
From: Ying Zhang b40...@freescale.com
Use generic board architecture for p1010rdb, tested with NOR
boot on p1010rdb-pb.
Signed-off-by: Ying Zhang b40...@freescale.com
---
include/configs/P1010RDB.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/P1010RDB.h
From: Ying Zhang b40...@freescale.com
Use generic board architecture for p1025-twr, tested with NOR
boot and NAND boot on p1025-twr.
Signed-off-by: Ying Zhang b40...@freescale.com
---
include/configs/p1_twr.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/p1_twr.h
From: Ying Zhang b40...@freescale.com
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage
From: Ying Zhang b40...@freescale.com
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage
From: Ying Zhang b40...@freescale.com
There was no enough memory for malloc in SPL booting from spi flash, so
relayout the memory in SPL: reduce the memory for global data from 16K
Bytes to 4K Bytes, save the space for malloc.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v1:
-
From: Ying Zhang b40...@freescale.com
1. The SPL's length of SDCARD boot has not enough,expand the SPL's
length to 128K.
2. deleted unused symbol: CONFIG_SYS_RUN_INDDR
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v1:
- No change.
include/configs/P1022DS.h | 12
From: Ying Zhang b40...@freescale.com
In the previous patches, we introduced the SPL/TPL fraamework.
For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
the DDR according to the SPD and loads
From: Ying Zhang b40...@freescale.com
There was no enough stack in SPL, so the buffer needed in SPL is to malloc
from memory pool and to repalce the temporary variable.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v1:
- The malloc size expand to 364K bytes.
common/env_sf.c
From: Ying Zhang b40...@freescale.com
There was no enough stack in SPL, so the buffer needed in SPL is to malloc
from memory pool and to repalce the temporary variable.
Signed-off-by: Ying Zhang b40...@freescale.com
---
common/env_sf.c| 7 ++-
include/configs/p1_p2_rdb_pc.h
From: Ying Zhang b40...@freescale.com
There was no enough stack in SPL, so the buffer needed in SPL is to malloc
from memory pool and to repalce the temporary variable.
Signed-off-by: Ying Zhang b40...@freescale.com
---
include/configs/P1022DS.h | 6 +++---
include/configs/p1_p2_rdb_pc.h |
From: Ying Zhang b40...@freescale.com
In the previous patches, we introduced the SPL/TPL fraamework.
For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
the DDR according to the SPD and loads
From: Ying Zhang b40...@freescale.com
1. The SPL's length of SDCARD boot has not enough,expand the SPL's
length to 128K.
2. deleted unused symbol: CONFIG_SYS_RUN_INDDR
Signed-off-by: Ying Zhang b40...@freescale.com
---
include/configs/P1022DS.h | 12 ++--
From: Ying Zhang b40...@freescale.com
Enable p1_p2_rdb_pc to start from eSDHC with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
board/freescale/p1_p2_rdb_pc/Makefile |3 +
board/freescale/p1_p2_rdb_pc/spl.c| 98 +
From: Ying Zhang b40...@freescale.com
Enable p1_p2_rdb_pc to start from eSPI with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
board/freescale/p1_p2_rdb_pc/spl.c |9 +
include/configs/p1_p2_rdb_pc.h | 36 +---
2 files changed, 38
From: Ying Zhang b40...@freescale.com
Enable TPL for p1_p2_rdb_pc nand boot.
Signed-off-by: Ying Zhang b40...@freescale.com
---
board/freescale/p1_p2_rdb_pc/spl.c | 15 +
board/freescale/p1_p2_rdb_pc/spl_minimal.c | 83 ++--
From: Ying Zhang b40...@freescale.com
- Added section u_boot_list in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
- Use the function i2c_init_all instead of i2c_init
Signed-off-by: Ying Zhang b40...@freescale.com
---
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds |5 +
board/freescale/p1022ds/spl.c
From: Ying Zhang b40...@freescale.com
- Added section u_boot_list in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
- Use the function i2c_init_all instead of i2c_init
Signed-off-by: Ying Zhang b40...@freescale.com
---
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds |5 +
board/freescale/p1022ds/spl.c
From: Ying Zhang b40...@freescale.com
SPL defines CONFIG_SPL_BUILD but this does not percolate to the autoconf.mk
Makefile.
As a result the build breaks when CONFIG_SPL_BUILD is used in the
board-specific include
header file. With this, there is a possibility of having a CONFIG option
defined
From: Ying Zhang b40...@freescale.com
SPL defines CONFIG_SPL_BUILD but this does not percolate to the autoconf.mk
Makefile.
As a result the build breaks when CONFIG_SPL_BUILD is used in the
board-specific include
header file. With this, there is a possibility of having a CONFIG option
defined
From: Ying Zhang b40...@freescale.com
Enable p1022ds to start from eSDHC with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v10:
- Fix the warning from spl.c.
Change from v9:
- Mofidy board/freescale/p1022ds/spl.c, fix checkpatch warnings.
Change from v8:
- No change.
From: Ying Zhang b40...@freescale.com
1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change
From: Ying Zhang b40...@freescale.com
The code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that being loaded by
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size
From: Ying Zhang b40...@freescale.com
Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that is loaded
by the code from the SPL. It initializes the
From: Ying Zhang b40...@freescale.com
TPL is introduced in the patch NAND: TPL : introduce the TPL
based on the SPL, here enable TPL for p1022ds nand boot.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v10:
- No change.
Change from v9:
- Modify drivers/mtd/nand/Makefile.
-
From: Ying Zhang b40...@freescale.com
Enable p1022ds to start from eSPI with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v10:
- No change.
Change from v9:
- No change.
Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- No longer changes the header
From: Zhang Ying rock.ap.freescale.net
SPL defines CONFIG_SPL_BUILD but this does not percolate to the autoconf.mk
Makefile.
As a result the build breaks when CONFIG_SPL_BUILD is used in the
board-specific include
header file. With this, there is a possibility of having a CONFIG option
defined
From: Ying Zhang b40...@freescale.com
1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change
From: Ying Zhang b40...@freescale.com
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final
From: Ying Zhang b40...@freescale.com
Enable p1022ds to start from eSDHC with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v9:
- Mofidy board/freescale/p1022ds/spl.c, fix checkpatch warnings.
Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- Split
From: Ying Zhang b40...@freescale.com
Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that is loaded
by the code from the SPL. It initializes the
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that being loaded by
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size
From: Ying Zhang b40...@freescale.com
TPL is introduced in the patch NAND: TPL : introduce the TPL
based on the SPL, here enable TPL for p1022ds nand boot.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v9:
- Modify drivers/mtd/nand/Makefile.
- Modify
From: Ying Zhang b40...@freescale.com
Enable p1022ds to start from eSPI with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v9:
- No change.
Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- No longer changes the header file included by the file.
-
From: Ying Zhang b40...@freescale.com
1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change
From: Ying Zhang b40...@freescale.com
Enable p1022ds to start from eSPI with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- No longer changes the header file included by the file
- board/freescale/p1022ds/spl.c
From: Ying Zhang b40...@freescale.com
TPL is introduced in the patch NAND: TPL : introduce the TPL
based on the SPL, here enable TPL for p1022ds nand boot.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v8:
- Add new symbol CONFIG_SPL_ENV_IN_NAND.
Change from v7:
- No change.
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that being loaded by
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that being loaded by
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size
From: Ying Zhang b40...@freescale.com
Enable p1022ds to start from eSDHC with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v8:
- No change.
Change from v7:
- No change.
Change from v6:
- Split from the patch powerpc/p1022ds: boot from SD Card with SPL,
- this patch only
From: Ying Zhang b40...@freescale.com
Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that is loaded
by the code from the SPL. It initializes the
From: Ying Zhang b40...@freescale.com
1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change
From: Ying Zhang b40...@freescale.com
Enable p1022ds to start from eSDHC with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v7:
- No change.
Change from v6:
- Split from the patch powerpc/p1022ds: boot from SD Card with SPL,
- this patch only enables p1022ds to boot from SD
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that being loaded by
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that being loaded by
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size
From: Ying Zhang b40...@freescale.com
TPL is introduced in the patch NAND: TPL : introduce the TPL
based on the SPL, here enable TPL for p1022ds nand boot.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v7:
- No change.
Change from v6:
- Delete the file
From: Ying Zhang b40...@freescale.com
Enable p1022ds to start from eSPI with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v7:
- No change.
Change from v6:
- No longer changes the header file included by the file
- board/freescale/p1022ds/spl.c
Change from v5:
- Split from
From: Ying Zhang b40...@freescale.com
Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that is loaded
by the code from the SPL. It initializes the
From: Ying Zhang b40...@freescale.com
1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that being loaded by
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size
From: Ying Zhang b40...@freescale.com
Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that is loaded
by the code from the SPL. It initializes the
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that being loaded by
the code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size
From: Ying Zhang b40...@freescale.com
Enable p1022ds to start from eSPI with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v6:
- No longer changes the header file included by the file
- board/freescale/p1022ds/spl.c
Change from v5:
- Split from powerpc/p1022ds: boot from
From: Ying Zhang b40...@freescale.com
Enable p1022ds to start from eSDHC with SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v6:
- Split from the patch powerpc/p1022ds: boot from SD Card with SPL,
- this patch only enables p1022ds to boot from SD Card with SPL.
Change from
From: Ying Zhang b40...@freescale.com
TPL is introduced in the patch NAND: TPL : introduce the TPL
based on the SPL, here enable TPL for p1022ds nand boot.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Change from v6:
- Delete the file board/freescale/p1022ds/tpl.c.
- Reuse the file
From: Ying Zhang b40...@freescale.com
The functionality env_import will be used in the SPL. They
had been excluded by ifndef CONFIG_SPL_BUILD. Now, add new
symbol CONFIG_SPL_ENV_IMPORT to contian the functionality
env_import in SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Compared
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that runs in the L2 SRAM,
after being loaded by the code from the internal on-chip ROM. It loads the
final uboot image into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum
From: Ying Zhang b40...@freescale.com
1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Compared
From: Ying Zhang b40...@freescale.com
enable p1022ds to start from eSPI with SPL.
This patch is on top of the patch:
SPL : spi flash : support to start from eSPI with SPL
Signed-off-by: Ying Zhang b40...@freescale.com
---
Compared with the original version, Changed as below:
1. Split from boot
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that runs in the L2 SRAM,
after being loaded by the code from the internal on-chip ROM. It loads the
final uboot image into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum
From: Ying Zhang b40...@freescale.com
Support TPL on the P1022DS.
The TPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are three stage uboot images:
* spl_boot, 4KB size, pad
From: Ying Zhang b40...@freescale.com
Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that runs in the
L2 SRAM, after being loaded by the code
From: Ying Zhang b40...@freescale.com
Move the common makefile line shared by the SPL and non-SPL to the public area,
so that we can avoid excessive SPL symbols. Some of them will be used by the
SPL later.
This patch is on top of the patch common/Makefile: Add new symbol
CONFIG_SPL_ENV_SUPPORT
From: Ying Zhang b40...@freescale.com
There will clear the BSS in the function clear_bss(), the reset address of
the BSS started from the __bss_start, and increased by four-byte increments,
finally stoped depending on the address is equal to the _bss_end. If the end
address __bss_end is not
From: Ying Zhang b40...@freescale.com
There will need the environment in SPL for reasons other than network
support (in particular, hwconfig contains info for how to set up DDR).
Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT
for environment in common/Makefile.
From: Ying Zhang b40...@freescale.com
1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Compared
From: Ying Zhang b40...@freescale.com
The functionality env_import will be used in the SPL. They
had been excluded by ifndef CONFIG_SPL_BUILD. Now, put it
into the SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Compared with the original version, Changed as below:
1. Split from boot
From: Ying Zhang b40...@freescale.com
For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM,
then jump to it to begin execution. After that, the SPL loads the final uboot
image into DDR, then jump to it to begin execution. The segment .resetvec in
the SPL and in final
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that runs in the L2 SRAM,
after being loaded by the code from the internal on-chip ROM. It loads the
final uboot image into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum
From: Ying Zhang b40...@freescale.com
Support to boot from spi flash.
This patch is on top of the patch:
powerpc/p1022ds: boot from SD Card with SPL
Signed-off-by: Ying Zhang b40...@freescale.com
---
Compared with the original version, Changed as below:
1. Split from boot from SD card/SPI flash
From: Ying Zhang b40...@freescale.com
Support TPL on the P1022DS.
The TPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are three stage uboot images:
* spl_boot, 4KB size, pad
From: Ying Zhang b40...@freescale.com
Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that runs in the
L2 SRAM, after being loaded by the code
From: Ying Zhang b40...@freescale.com
1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Some functions were unused in the minimal SPL, but it is useful
in the common SPL. So, enabled some functionality for common SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Compared
From: Ying Zhang b40...@freescale.com
Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that runs in the
L2 SRAM, after being loaded by the code
From: Ying Zhang b40...@freescale.com
Support TPL on the P1022DS.
The TPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are three stage uboot images:
* spl_boot, 4KB size, pad
From: Ying Zhang b40...@freescale.com
Due to the nand SPL on the board P1022DS has a size limit, it can not be
more than 4K. So, the SPL cannot initialize the DDR with the SPD code.
This patch introduces TPL to enable a loader stub that runs in the L2 SRAM,
after being loaded by the code from the
From: Ying Zhang b40...@freescale.com
1. The symbol CONFIG_SPL_NAND_MINIMAL is unused, so deleted it.
2. Introduced a new symbol CONFIG_SPL_MINIMAL:
It is different from the common SPL. If set, only a
tiny part code of the SPL is built and to avoid unreferenced
functions. For example:
From: Ying Zhang b40...@freescale.com
The functionality env_import will be used in the SPL. They
had been excluded by ifndef CONFIG_SPL_BUILD. Now, put it
into the SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Compared with the previous version, split into two separate patches.
this
From: Ying Zhang b40...@freescale.com
Support to boot from spi flash.
This patch is on top of the patch:
powerpc/p1022ds: boot from SD Card with SPL
Signed-off-by: Ying Zhang b40...@freescale.com
---
board/freescale/p1022ds/spl.c | 12 +-
drivers/mtd/spi/Makefile |1 +
From: Ying Zhang b40...@freescale.com
There will clear the BSS in the function clear_bss(), the reset address of
the BSS started from the __bss_start, and increased by four-byte increments,
finally stoped depending on the address is equal to the _bss_end. If the end
address __bss_end is not
From: Ying Zhang b40...@freescale.com
For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM,
then jump to it to begin execution. After that, the SPL loads the final uboot
image into DDR, then jump to it to begin execution. The segment .resetvec in
the SPL and in final
From: Ying Zhang b40...@freescale.com
There will need the environment in SPL for reasons other than network
support (in particular, hwconfig contains info for how to set up DDR).
Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT
for environment in common/Makefile.
From: Ying Zhang b40...@freescale.com
There will clear the BSS in the function clear_bss(), the reset address of
the BSS started from the __bss_start, and increased by four-byte increments,
finally stoped depending on the address is equal to the _bss_end. If the end
address __bss_end is not
From: Ying Zhang b40...@freescale.com
Move the common makefile line shared by the SPL and non-SPL to the public area,
so that we can avoid excessive SPL symbols. Some of them will be used by the
SPL later.
This patch is on top of the patch common/Makefile: Add new symbol
CONFIG_SPL_ENV_SUPPORT
From: Ying Zhang b40...@freescale.com
This patch introduces SPL to enable a loader stub that runs in the L2 SRAM,
after being loaded by the code from the internal on-chip ROM. It loads the
final uboot image into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum
From: Ying Zhang b40...@freescale.com
There was some functionality will be used in the SPL. They
had been excluded by ifndef CONFIG_SPL_BUILD. Now, put it
into the SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
arch/powerpc/cpu/mpc85xx/tlb.c |2 +-
arch/powerpc/cpu/mpc8xxx/law.c |
From: Ying Zhang b40...@freescale.com
There was some functionality will be used in the SPL. They
had been excluded by ifndef CONFIG_SPL_BUILD. Now, put it
into the SPL.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Compared with the previous version, give up new symbol and delete the line
From: Ying Zhang b40...@freescale.com
Move the common makefile line shared by the SPL and non-SPL to the public area,
so that we can avoid excessive SPL symbols. Some of them will be used by the
SPL later.
This patch is on top of the patch common/Makefile: Add new symbol
CONFIG_SPL_ENV_SUPPORT
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