Re: [PATCH 3/4] SoC: exynos: add support for exynos 78x0
On Sun, Oct 17, 2021 at 01:45:41PM +0300, Dzmitry Sankouski wrote: > Samsung Exynos 7880 \ 7870 - SoC for mainstream smartphones and tablets > introduced on March 2017. > Features: > - 8 Cortex A53 cores > - ARM Mali-T830 MP3 GPU > - LTE Cat. 7 (7880) or 6 (7870) modem > > Signed-off-by: Dzmitry Sankouski > Cc: Minkyu Kang Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
[PATCH 3/4] SoC: exynos: add support for exynos 78x0
Samsung Exynos 7880 \ 7870 - SoC for mainstream smartphones and tablets
introduced on March 2017.
Features:
- 8 Cortex A53 cores
- ARM Mali-T830 MP3 GPU
- LTE Cat. 7 (7880) or 6 (7870) modem
Signed-off-by: Dzmitry Sankouski
Cc: Minkyu Kang
---
arch/arm/dts/exynos78x0-gpio.dtsi | 204 ++
arch/arm/dts/exynos78x0-pinctrl.dtsi| 280
arch/arm/dts/exynos78x0.dtsi| 98 +++
arch/arm/mach-exynos/mmu-arm64.c| 66 +
drivers/gpio/s5p_gpio.c | 1 +
drivers/pinctrl/exynos/Kconfig | 8 +
drivers/pinctrl/exynos/Makefile | 1 +
drivers/pinctrl/exynos/pinctrl-exynos78x0.c | 119 +
include/configs/exynos78x0-common.h | 112
9 files changed, 889 insertions(+)
create mode 100644 arch/arm/dts/exynos78x0-gpio.dtsi
create mode 100644 arch/arm/dts/exynos78x0-pinctrl.dtsi
create mode 100644 arch/arm/dts/exynos78x0.dtsi
create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos78x0.c
create mode 100644 include/configs/exynos78x0-common.h
diff --git a/arch/arm/dts/exynos78x0-gpio.dtsi
b/arch/arm/dts/exynos78x0-gpio.dtsi
new file mode 100644
index 00..a7f75c5ca9
--- /dev/null
+++ b/arch/arm/dts/exynos78x0-gpio.dtsi
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Samsung's Exynos7880 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2020 Dzmitry Sankouski (dsankou...@gmail.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+ /* ALIVE */
+ gpio@139F {
+ etc0: etc0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ etc1: etc1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpa0: gpa0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpa1: gpa1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpa2: gpa2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpa3: gpa3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpq0: gpq0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ /* CCORE */
+ gpio@1063 {
+ gpm0: gpm0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ /* DISP/AUD */
+ gpio@148C {
+ gpz0: gpz0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpz1: gpz1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpz2: gpz2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ /* FSYS0 */
+ gpio@1375 {
+ gpr0: gpr0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpr1: gpr1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpr2: gpr2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpr3: gpr3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpr4: gpr4 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ /* TOP */
+ gpio@139B {
+ gpb0: gpb0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc0: gpc0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc1: gpc1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc4: gpc4 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc5: gpc5 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc6: gpc6 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+
[PATCH 3/4] SoC: exynos: add support for exynos 78x0
Samsung Exynos 7880 \ 7870 - SoC for mainstream smartphones and tablets
introduced on March 2017.
Features:
- 8 Cortex A53 cores
- ARM Mali-T830 MP3 GPU
- LTE Cat. 7 (7880) or 6 (7870) modem
Signed-off-by: Dzmitry Sankouski
Cc: Minkyu Kang
---
arch/arm/dts/exynos78x0-gpio.dtsi | 204 ++
arch/arm/dts/exynos78x0-pinctrl.dtsi| 280
arch/arm/dts/exynos78x0.dtsi| 98 +++
arch/arm/mach-exynos/mmu-arm64.c| 66 +
drivers/gpio/s5p_gpio.c | 1 +
drivers/pinctrl/exynos/Kconfig | 8 +
drivers/pinctrl/exynos/Makefile | 1 +
drivers/pinctrl/exynos/pinctrl-exynos78x0.c | 119 +
include/configs/exynos78x0-common.h | 112
9 files changed, 889 insertions(+)
create mode 100644 arch/arm/dts/exynos78x0-gpio.dtsi
create mode 100644 arch/arm/dts/exynos78x0-pinctrl.dtsi
create mode 100644 arch/arm/dts/exynos78x0.dtsi
create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos78x0.c
create mode 100644 include/configs/exynos78x0-common.h
diff --git a/arch/arm/dts/exynos78x0-gpio.dtsi
b/arch/arm/dts/exynos78x0-gpio.dtsi
new file mode 100644
index 00..a7f75c5ca9
--- /dev/null
+++ b/arch/arm/dts/exynos78x0-gpio.dtsi
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Samsung's Exynos7880 SoC pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ * Copyright (c) 2020 Dzmitry Sankouski (dsankou...@gmail.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+ /* ALIVE */
+ gpio@139F {
+ etc0: etc0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ etc1: etc1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpa0: gpa0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpa1: gpa1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpa2: gpa2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpa3: gpa3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpq0: gpq0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ /* CCORE */
+ gpio@1063 {
+ gpm0: gpm0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ /* DISP/AUD */
+ gpio@148C {
+ gpz0: gpz0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpz1: gpz1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpz2: gpz2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ /* FSYS0 */
+ gpio@1375 {
+ gpr0: gpr0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpr1: gpr1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpr2: gpr2 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpr3: gpr3 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpr4: gpr4 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+ /* TOP */
+ gpio@139B {
+ gpb0: gpb0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc0: gpc0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc1: gpc1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc4: gpc4 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc5: gpc5 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpc6: gpc6 {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+
