Re: [U-Boot] [RESEND PATCH v5 2/2] socfpga: Adding pin mux handoff files

2013-08-07 Thread Chin Liang See
On Tue, 2013-08-06 at 11:04 -0500, Dinh Nguyen wrote:
 On Tue, 2013-08-06 at 09:10 -0500, Chin Liang See wrote:
  Adding the generated pin mux
  configuration by Preloader Generator tool
  
  Signed-off-by: Chin Liang See cl...@altera.com
  Reviewed-by: Pavel Machek pa...@denx.de
  Cc: Wolfgang Denk w...@denx.de
  CC: Pavel Machek pa...@denx.de
  Cc: Dinh Nguyen dingu...@altera.com
  Cc: Tom Rini tr...@ti.com
  Cc: Albert Aribaud albert.u.b...@aribaud.net
  ---
  Changes for v2:
 - Fixed the word wrap issue within patch
  Changes for v3:
 - Fixed the long subject of the patch
  Changes for v4:
 - Added change log for each revision change
  Changes for v5:
 - Updated the license header for reset_manager.c
 - Updated the subject
 
 Re-org with latest changes on top.

Noted will fix in v6

Thanks

Chin Liang

 
 Acked-by: Dinh Nguyen dingu...@altera.com
 
 Dinh
  ---



___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot


[U-Boot] [RESEND PATCH v5 2/2] socfpga: Adding pin mux handoff files

2013-08-06 Thread Chin Liang See
Adding the generated pin mux
configuration by Preloader Generator tool

Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v2:
   - Fixed the word wrap issue within patch
Changes for v3:
   - Fixed the long subject of the patch
Changes for v4:
   - Added change log for each revision change
Changes for v5:
   - Updated the license header for reset_manager.c
   - Updated the subject
---
 board/altera/socfpga/pinmux_config.c |  214 ++
 board/altera/socfpga/pinmux_config.h |   54 +
 2 files changed, 268 insertions(+)
 create mode 100644 board/altera/socfpga/pinmux_config.c
 create mode 100644 board/altera/socfpga/pinmux_config.h

diff --git a/board/altera/socfpga/pinmux_config.c 
b/board/altera/socfpga/pinmux_config.c
new file mode 100644
index 000..8b09005
--- /dev/null
+++ b/board/altera/socfpga/pinmux_config.c
@@ -0,0 +1,214 @@
+/* This file is generated by Preloader Generator */
+
+#include pinmux_config.h
+
+/* pin mux configuration data */
+unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
+   0, /* EMACIO0 - Unused */
+   2, /* EMACIO1 - USB */
+   2, /* EMACIO2 - USB */
+   2, /* EMACIO3 - USB */
+   2, /* EMACIO4 - USB */
+   2, /* EMACIO5 - USB */
+   2, /* EMACIO6 - USB */
+   2, /* EMACIO7 - USB */
+   2, /* EMACIO8 - USB */
+   0, /* EMACIO9 - Unused */
+   2, /* EMACIO10 - USB */
+   2, /* EMACIO11 - USB */
+   2, /* EMACIO12 - USB */
+   2, /* EMACIO13 - USB */
+   0, /* EMACIO14 - N/A */
+   0, /* EMACIO15 - N/A */
+   0, /* EMACIO16 - N/A */
+   0, /* EMACIO17 - N/A */
+   0, /* EMACIO18 - N/A */
+   0, /* EMACIO19 - N/A */
+   3, /* FLASHIO0 - SDMMC */
+   3, /* FLASHIO1 - SDMMC */
+   3, /* FLASHIO2 - SDMMC */
+   3, /* FLASHIO3 - SDMMC */
+   0, /* FLASHIO4 - SDMMC */
+   0, /* FLASHIO5 - SDMMC */
+   0, /* FLASHIO6 - SDMMC */
+   0, /* FLASHIO7 - SDMMC */
+   0, /* FLASHIO8 - SDMMC */
+   3, /* FLASHIO9 - SDMMC */
+   3, /* FLASHIO10 - SDMMC */
+   3, /* FLASHIO11 - SDMMC */
+   3, /* GENERALIO0 - TRACE */
+   3, /* GENERALIO1 - TRACE */
+   3, /* GENERALIO2 - TRACE */
+   3, /* GENERALIO3 - TRACE  */
+   3, /* GENERALIO4 - TRACE  */
+   3, /* GENERALIO5 - TRACE  */
+   3, /* GENERALIO6 - TRACE  */
+   3, /* GENERALIO7 - TRACE  */
+   3, /* GENERALIO8 - TRACE  */
+   3, /* GENERALIO9 - SPIM0 */
+   3, /* GENERALIO10 - SPIM0 */
+   3, /* GENERALIO11 - SPIM0 */
+   3, /* GENERALIO12 - SPIM0 */
+   2, /* GENERALIO13 - CAN0 */
+   2, /* GENERALIO14 - CAN0 */
+   3, /* GENERALIO15 - I2C0 */
+   3, /* GENERALIO16 - I2C0 */
+   2, /* GENERALIO17 - UART0 */
+   2, /* GENERALIO18 - UART0 */
+   0, /* GENERALIO19 - N/A */
+   0, /* GENERALIO20 - N/A */
+   0, /* GENERALIO21 - N/A */
+   0, /* GENERALIO22 - N/A */
+   0, /* GENERALIO23 - N/A */
+   0, /* GENERALIO24 - N/A */
+   0, /* GENERALIO25 - N/A */
+   0, /* GENERALIO26 - N/A */
+   0, /* GENERALIO27 - N/A */
+   0, /* GENERALIO28 - N/A */
+   0, /* GENERALIO29 - N/A */
+   0, /* GENERALIO30 - N/A */
+   0, /* GENERALIO31 - N/A */
+   2, /* MIXED1IO0 - EMAC */
+   2, /* MIXED1IO1 - EMAC */
+   2, /* MIXED1IO2 - EMAC */
+   2, /* MIXED1IO3 - EMAC */
+   2, /* MIXED1IO4 - EMAC */
+   2, /* MIXED1IO5 - EMAC */
+   2, /* MIXED1IO6 - EMAC */
+   2, /* MIXED1IO7 - EMAC */
+   2, /* MIXED1IO8 - EMAC */
+   2, /* MIXED1IO9 - EMAC */
+   2, /* MIXED1IO10 - EMAC */
+   2, /* MIXED1IO11 - EMAC */
+   2, /* MIXED1IO12 - EMAC */
+   2, /* MIXED1IO13 - EMAC */
+   0, /* MIXED1IO14 - Unused */
+   3, /* MIXED1IO15 - QSPI */
+   3, /* MIXED1IO16 - QSPI */
+   3, /* MIXED1IO17 - QSPI */
+   3, /* MIXED1IO18 - QSPI */
+   3, /* MIXED1IO19 - QSPI */
+   3, /* MIXED1IO20 - QSPI */
+   0, /* MIXED1IO21 - GPIO */
+   0, /* MIXED2IO0 - N/A */
+   0, /* MIXED2IO1 - N/A */
+   0, /* MIXED2IO2 - N/A */
+   0, /* MIXED2IO3 - N/A */
+   0, /* MIXED2IO4 - N/A */
+   0, /* MIXED2IO5 - N/A */
+   0, /* MIXED2IO6 - N/A */
+   0, /* MIXED2IO7 - N/A */
+   0, /* GPLINMUX48 */
+   0, /* GPLINMUX49 */
+   0, /* GPLINMUX50 */
+   0, /* GPLINMUX51 */
+   0, /* GPLINMUX52 */
+   0, /* GPLINMUX53 */
+   0, /* GPLINMUX54 */
+   0, /* GPLINMUX55 */
+   0, /* GPLINMUX56 */
+   0, /* GPLINMUX57 */
+   0, /* GPLINMUX58 */
+   0, /* GPLINMUX59 */
+   0, /* GPLINMUX60 */
+   0, /* GPLINMUX61 */
+   0, /* GPLINMUX62 */
+   0, /* GPLINMUX63 */
+   0, /* GPLINMUX64 */
+   0, /* 

Re: [U-Boot] [RESEND PATCH v5 2/2] socfpga: Adding pin mux handoff files

2013-08-06 Thread Dinh Nguyen
On Tue, 2013-08-06 at 09:10 -0500, Chin Liang See wrote:
 Adding the generated pin mux
 configuration by Preloader Generator tool
 
 Signed-off-by: Chin Liang See cl...@altera.com
 Reviewed-by: Pavel Machek pa...@denx.de
 Cc: Wolfgang Denk w...@denx.de
 CC: Pavel Machek pa...@denx.de
 Cc: Dinh Nguyen dingu...@altera.com
 Cc: Tom Rini tr...@ti.com
 Cc: Albert Aribaud albert.u.b...@aribaud.net
 ---
 Changes for v2:
- Fixed the word wrap issue within patch
 Changes for v3:
- Fixed the long subject of the patch
 Changes for v4:
- Added change log for each revision change
 Changes for v5:
- Updated the license header for reset_manager.c
- Updated the subject

Re-org with latest changes on top.

Acked-by: Dinh Nguyen dingu...@altera.com

Dinh
 ---
  board/altera/socfpga/pinmux_config.c |  214 
 ++
  board/altera/socfpga/pinmux_config.h |   54 +
  2 files changed, 268 insertions(+)
  create mode 100644 board/altera/socfpga/pinmux_config.c
  create mode 100644 board/altera/socfpga/pinmux_config.h
 
 diff --git a/board/altera/socfpga/pinmux_config.c 
 b/board/altera/socfpga/pinmux_config.c
 new file mode 100644
 index 000..8b09005
 --- /dev/null
 +++ b/board/altera/socfpga/pinmux_config.c
 @@ -0,0 +1,214 @@
 +/* This file is generated by Preloader Generator */
 +
 +#include pinmux_config.h
 +
 +/* pin mux configuration data */
 +unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
 + 0, /* EMACIO0 - Unused */
 + 2, /* EMACIO1 - USB */
 + 2, /* EMACIO2 - USB */
 + 2, /* EMACIO3 - USB */
 + 2, /* EMACIO4 - USB */
 + 2, /* EMACIO5 - USB */
 + 2, /* EMACIO6 - USB */
 + 2, /* EMACIO7 - USB */
 + 2, /* EMACIO8 - USB */
 + 0, /* EMACIO9 - Unused */
 + 2, /* EMACIO10 - USB */
 + 2, /* EMACIO11 - USB */
 + 2, /* EMACIO12 - USB */
 + 2, /* EMACIO13 - USB */
 + 0, /* EMACIO14 - N/A */
 + 0, /* EMACIO15 - N/A */
 + 0, /* EMACIO16 - N/A */
 + 0, /* EMACIO17 - N/A */
 + 0, /* EMACIO18 - N/A */
 + 0, /* EMACIO19 - N/A */
 + 3, /* FLASHIO0 - SDMMC */
 + 3, /* FLASHIO1 - SDMMC */
 + 3, /* FLASHIO2 - SDMMC */
 + 3, /* FLASHIO3 - SDMMC */
 + 0, /* FLASHIO4 - SDMMC */
 + 0, /* FLASHIO5 - SDMMC */
 + 0, /* FLASHIO6 - SDMMC */
 + 0, /* FLASHIO7 - SDMMC */
 + 0, /* FLASHIO8 - SDMMC */
 + 3, /* FLASHIO9 - SDMMC */
 + 3, /* FLASHIO10 - SDMMC */
 + 3, /* FLASHIO11 - SDMMC */
 + 3, /* GENERALIO0 - TRACE */
 + 3, /* GENERALIO1 - TRACE */
 + 3, /* GENERALIO2 - TRACE */
 + 3, /* GENERALIO3 - TRACE  */
 + 3, /* GENERALIO4 - TRACE  */
 + 3, /* GENERALIO5 - TRACE  */
 + 3, /* GENERALIO6 - TRACE  */
 + 3, /* GENERALIO7 - TRACE  */
 + 3, /* GENERALIO8 - TRACE  */
 + 3, /* GENERALIO9 - SPIM0 */
 + 3, /* GENERALIO10 - SPIM0 */
 + 3, /* GENERALIO11 - SPIM0 */
 + 3, /* GENERALIO12 - SPIM0 */
 + 2, /* GENERALIO13 - CAN0 */
 + 2, /* GENERALIO14 - CAN0 */
 + 3, /* GENERALIO15 - I2C0 */
 + 3, /* GENERALIO16 - I2C0 */
 + 2, /* GENERALIO17 - UART0 */
 + 2, /* GENERALIO18 - UART0 */
 + 0, /* GENERALIO19 - N/A */
 + 0, /* GENERALIO20 - N/A */
 + 0, /* GENERALIO21 - N/A */
 + 0, /* GENERALIO22 - N/A */
 + 0, /* GENERALIO23 - N/A */
 + 0, /* GENERALIO24 - N/A */
 + 0, /* GENERALIO25 - N/A */
 + 0, /* GENERALIO26 - N/A */
 + 0, /* GENERALIO27 - N/A */
 + 0, /* GENERALIO28 - N/A */
 + 0, /* GENERALIO29 - N/A */
 + 0, /* GENERALIO30 - N/A */
 + 0, /* GENERALIO31 - N/A */
 + 2, /* MIXED1IO0 - EMAC */
 + 2, /* MIXED1IO1 - EMAC */
 + 2, /* MIXED1IO2 - EMAC */
 + 2, /* MIXED1IO3 - EMAC */
 + 2, /* MIXED1IO4 - EMAC */
 + 2, /* MIXED1IO5 - EMAC */
 + 2, /* MIXED1IO6 - EMAC */
 + 2, /* MIXED1IO7 - EMAC */
 + 2, /* MIXED1IO8 - EMAC */
 + 2, /* MIXED1IO9 - EMAC */
 + 2, /* MIXED1IO10 - EMAC */
 + 2, /* MIXED1IO11 - EMAC */
 + 2, /* MIXED1IO12 - EMAC */
 + 2, /* MIXED1IO13 - EMAC */
 + 0, /* MIXED1IO14 - Unused */
 + 3, /* MIXED1IO15 - QSPI */
 + 3, /* MIXED1IO16 - QSPI */
 + 3, /* MIXED1IO17 - QSPI */
 + 3, /* MIXED1IO18 - QSPI */
 + 3, /* MIXED1IO19 - QSPI */
 + 3, /* MIXED1IO20 - QSPI */
 + 0, /* MIXED1IO21 - GPIO */
 + 0, /* MIXED2IO0 - N/A */
 + 0, /* MIXED2IO1 - N/A */
 + 0, /* MIXED2IO2 - N/A */
 + 0, /* MIXED2IO3 - N/A */
 + 0, /* MIXED2IO4 - N/A */
 + 0, /* MIXED2IO5 - N/A */
 + 0, /* MIXED2IO6 - N/A */
 + 0, /* MIXED2IO7 - N/A */
 + 0, /* GPLINMUX48 */
 + 0, /* GPLINMUX49 */
 + 0, /* GPLINMUX50 */
 + 0, /* GPLINMUX51 */
 + 0, /* GPLINMUX52 */
 + 0, /* GPLINMUX53 */
 + 0, /* GPLINMUX54 */
 + 0, /* GPLINMUX55 */
 + 0, /* GPLINMUX56 */
 + 0, /* GPLINMUX57 */
 + 0, /* GPLINMUX58 */
 + 0, /* GPLINMUX59 */
 + 0, /* GPLINMUX60 */
 + 0, /* GPLINMUX61 */
 + 0, /* GPLINMUX62 */