Re: [PATCH] arch: mach-k3: fix mapping higher DDR addresses as device memory

2024-02-22 Thread Nishanth Menon
On 12:15-20240222, Neha Malcom Francis wrote:
> From: Sekhar Nori 
> 
> An entry in memory map table for MMU configuration is spilling over and
> inadvertently mapping DDR available at higher address (above 4GB address
> space) as device memory (nGnRnE).
> 
> Fix this by adjusting entry size. Tested on AM62A SK by enabling
> CONFIG_CMD_TIME. Before this patch:
> 
> => time crc32 0x88100 0x2000
> crc32 for 88100 ... 8a0ff ==> 5a7a5760
> 
> time: 1 minutes, 14.715 seconds
> 
> After patch:
> 
> => time crc32 0x88100 0x2000
> crc32 for 88100 ... 8a0ff ==> 3df1ce02
> 
> time: 2.711 seconds
> 
> Signed-off-by: Sekhar Nori 
> [n-fran...@ti.com: rebased on next, retested on all devices inc. commit]
> Signed-off-by: Neha Malcom Francis 
> Cc: Andrew Davis 
> ---
> Boot logs:
> https://gist.github.com/nehamalcom/7b101ea8b97f5a9433a553ef881166a1
> 
>  arch/arm/mach-k3/arm64-mmu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
> index b4308205b2..0e07b1b7ce 100644
> --- a/arch/arm/mach-k3/arm64-mmu.c
> +++ b/arch/arm/mach-k3/arm64-mmu.c
> @@ -41,7 +41,7 @@ struct mm_region k3_mem_map[] = {
>   }, {
>   .virt = 0x5UL,
>   .phys = 0x5UL,
> - .size = 0x4UL,
> + .size = 0x38000UL,
>   .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
>PTE_BLOCK_NON_SHARE |
>PTE_BLOCK_PXN | PTE_BLOCK_UXN
> -- 
> 2.34.1
> 
https://lore.kernel.org/u-boot/20240119160900.GU12635@bill-the-cat/ ??

Something was missing?

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 
849D 1736 249D


Re: [PATCH] arch: mach-k3: fix mapping higher DDR addresses as device memory

2024-02-21 Thread Neha Malcom Francis

Hi all,

Looks like this patch was already merged to u-boot/master

https://lore.kernel.org/all/20240109084551.21155-1-nsek...@ti.com/T/#md1fd66ff9f1cb93dfaa0dfb5f67d7452416e2cc2

Sorry for the spam!

On 22/02/24 12:15, Neha Malcom Francis wrote:

From: Sekhar Nori 

An entry in memory map table for MMU configuration is spilling over and
inadvertently mapping DDR available at higher address (above 4GB address
space) as device memory (nGnRnE).

Fix this by adjusting entry size. Tested on AM62A SK by enabling
CONFIG_CMD_TIME. Before this patch:

=> time crc32 0x88100 0x2000
crc32 for 88100 ... 8a0ff ==> 5a7a5760

time: 1 minutes, 14.715 seconds

After patch:

=> time crc32 0x88100 0x2000
crc32 for 88100 ... 8a0ff ==> 3df1ce02

time: 2.711 seconds

Signed-off-by: Sekhar Nori 
[n-fran...@ti.com: rebased on next, retested on all devices inc. commit]
Signed-off-by: Neha Malcom Francis 
Cc: Andrew Davis 
---
Boot logs:
https://gist.github.com/nehamalcom/7b101ea8b97f5a9433a553ef881166a1

  arch/arm/mach-k3/arm64-mmu.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index b4308205b2..0e07b1b7ce 100644
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -41,7 +41,7 @@ struct mm_region k3_mem_map[] = {
}, {
.virt = 0x5UL,
.phys = 0x5UL,
-   .size = 0x4UL,
+   .size = 0x38000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
 PTE_BLOCK_NON_SHARE |
 PTE_BLOCK_PXN | PTE_BLOCK_UXN


--
Thanking You
Neha Malcom Francis


[PATCH] arch: mach-k3: fix mapping higher DDR addresses as device memory

2024-02-21 Thread Neha Malcom Francis
From: Sekhar Nori 

An entry in memory map table for MMU configuration is spilling over and
inadvertently mapping DDR available at higher address (above 4GB address
space) as device memory (nGnRnE).

Fix this by adjusting entry size. Tested on AM62A SK by enabling
CONFIG_CMD_TIME. Before this patch:

=> time crc32 0x88100 0x2000
crc32 for 88100 ... 8a0ff ==> 5a7a5760

time: 1 minutes, 14.715 seconds

After patch:

=> time crc32 0x88100 0x2000
crc32 for 88100 ... 8a0ff ==> 3df1ce02

time: 2.711 seconds

Signed-off-by: Sekhar Nori 
[n-fran...@ti.com: rebased on next, retested on all devices inc. commit]
Signed-off-by: Neha Malcom Francis 
Cc: Andrew Davis 
---
Boot logs:
https://gist.github.com/nehamalcom/7b101ea8b97f5a9433a553ef881166a1

 arch/arm/mach-k3/arm64-mmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index b4308205b2..0e07b1b7ce 100644
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -41,7 +41,7 @@ struct mm_region k3_mem_map[] = {
}, {
.virt = 0x5UL,
.phys = 0x5UL,
-   .size = 0x4UL,
+   .size = 0x38000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
 PTE_BLOCK_NON_SHARE |
 PTE_BLOCK_PXN | PTE_BLOCK_UXN
-- 
2.34.1