Re: [PATCH 2/5] t210: do not enable PLLE and UPHY PLL HW PWRSEQ

2020-03-18 Thread Stephen Warren
e OK in practice too. Acked-by: Stephen Warren > Thanks, > JC > > On 3/18/20 1:44 AM, Tom Warren wrote: >> -Original Message- >> From: Stephen Warren >> Sent: Tuesday, March 17, 2020 10:30 AM >> To: Tom Warren >> Cc: u-boot@lists.denx.de; Jui

Re: [PATCH 2/5] t210: do not enable PLLE and UPHY PLL HW PWRSEQ

2020-03-18 Thread JC Kuo
10:30 AM > To: Tom Warren > Cc: u-boot@lists.denx.de; Jui Chang Kuo > Subject: Re: [PATCH 2/5] t210: do not enable PLLE and UPHY PLL HW PWRSEQ > > External email: Use caution opening links or attachments > > > On 3/16/20 1:40 PM, twar...@nvidia.com wrote:

RE: [PATCH 2/5] t210: do not enable PLLE and UPHY PLL HW PWRSEQ

2020-03-17 Thread Tom Warren
-Original Message- From: Stephen Warren Sent: Tuesday, March 17, 2020 10:30 AM To: Tom Warren Cc: u-boot@lists.denx.de; Jui Chang Kuo Subject: Re: [PATCH 2/5] t210: do not enable PLLE and UPHY PLL HW PWRSEQ External email: Use caution opening links or attachments On 3/16/20 1:40 PM

Re: [PATCH 2/5] t210: do not enable PLLE and UPHY PLL HW PWRSEQ

2020-03-17 Thread Stephen Warren
On 3/16/20 1:40 PM, twar...@nvidia.com wrote: > From: JC Kuo > > This commit removes the programming sequence that enables PLLE and UPHY > PLL hardware power sequencers. Per TRM, boot software should enable PLLE > and UPHY PLLs in software controlled power-on state and should power > down PLL

[PATCH 2/5] t210: do not enable PLLE and UPHY PLL HW PWRSEQ

2020-03-16 Thread twarren
From: JC Kuo This commit removes the programming sequence that enables PLLE and UPHY PLL hardware power sequencers. Per TRM, boot software should enable PLLE and UPHY PLLs in software controlled power-on state and should power down PLL before jumping into kernel or the next stage boot software.