Re: [PATCH v1 30/43] x86: apl: Support set_hide() in p2sb driver

2020-06-30 Thread Bin Meng
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass  wrote:
>
> Add support for this new method in the driver and in the fsp-s setup.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/cpu/apollolake/fsp_s.c  | 26 +++---
>  arch/x86/cpu/intel_common/p2sb.c | 30 ++
>  2 files changed, 41 insertions(+), 15 deletions(-)
>

Reviewed-by: Bin Meng 


Re: [PATCH v1 30/43] x86: apl: Support set_hide() in p2sb driver

2020-06-23 Thread Wolfgang Wallner
Hi Simon,


-"Simon Glass"  schrieb: -
> Betreff: [PATCH v1 30/43] x86: apl: Support set_hide() in p2sb driver
> 
> Add support for this new method in the driver and in the fsp-s setup.
> 
> Signed-off-by: Simon Glass 
> ---
> 
>  arch/x86/cpu/apollolake/fsp_s.c  | 26 +++---
>  arch/x86/cpu/intel_common/p2sb.c | 30 ++
>  2 files changed, 41 insertions(+), 15 deletions(-)
> 

Reviewed-by: Wolfgang Wallner 

Tested-by: Wolfgang Wallner 
Tested on an Apollo Lake-based board.


[PATCH v1 30/43] x86: apl: Support set_hide() in p2sb driver

2020-06-14 Thread Simon Glass
Add support for this new method in the driver and in the fsp-s setup.

Signed-off-by: Simon Glass 
---

 arch/x86/cpu/apollolake/fsp_s.c  | 26 +++---
 arch/x86/cpu/intel_common/p2sb.c | 30 ++
 2 files changed, 41 insertions(+), 15 deletions(-)

diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index 0f5520fc7d..3a54297a28 100644
--- a/arch/x86/cpu/apollolake/fsp_s.c
+++ b/arch/x86/cpu/apollolake/fsp_s.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -21,10 +22,11 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include 
-#include 
 
 #define PCH_P2SB_E00xe0
 #define HIDE_BIT   BIT(0)
@@ -59,12 +61,6 @@ int fsps_update_config(struct udevice *dev, ulong rom_offset,
return fsp_s_update_config_from_dtb(node, cfg);
 }
 
-static void p2sb_set_hide_bit(pci_dev_t dev, int hide)
-{
-   pci_x86_clrset_config(dev, PCH_P2SB_E0 + 1, HIDE_BIT,
- hide ? HIDE_BIT : 0, PCI_SIZE_8);
-}
-
 /* Configure package power limits */
 static int set_power_limits(struct udevice *dev)
 {
@@ -137,15 +133,15 @@ static int set_power_limits(struct udevice *dev)
 
 int p2sb_unhide(void)
 {
-   pci_dev_t dev = PCI_BDF(0, 0xd, 0);
-   ulong val;
-
-   p2sb_set_hide_bit(dev, 0);
-
-   pci_x86_read_config(dev, PCI_VENDOR_ID, , PCI_SIZE_16);
+   struct udevice *dev;
+   int ret;
 
-   if (val != PCI_VENDOR_ID_INTEL)
-   return log_msg_ret("p2sb unhide", -EIO);
+   ret = uclass_find_first_device(UCLASS_P2SB, );
+   if (ret)
+   return log_msg_ret("p2sb", ret);
+   ret = p2sb_set_hide(dev, false);
+   if (ret)
+   return log_msg_ret("hide", ret);
 
return 0;
 }
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index ec35d04ae5..ebf8f62aea 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -16,6 +16,9 @@
 #include 
 #include 
 
+#define PCH_P2SB_E00xe0
+#define HIDE_BIT   BIT(0)
+
 struct p2sb_platdata {
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
struct dtd_intel_p2sb dtplat;
@@ -127,6 +130,29 @@ static int p2sb_probe(struct udevice *dev)
return 0;
 }
 
+static void p2sb_set_hide_bit(struct udevice *dev, bool hide)
+{
+   dm_pci_clrset_config8(dev, PCH_P2SB_E0 + 1, HIDE_BIT,
+ hide ? HIDE_BIT : 0);
+}
+
+static int intel_p2sb_set_hide(struct udevice *dev, bool hide)
+{
+   u16 vendor;
+
+   if (!CONFIG_IS_ENABLED(PCI))
+   return -EPERM;
+   p2sb_set_hide_bit(dev, hide);
+
+   dm_pci_read_config16(dev, PCI_VENDOR_ID, );
+   if (hide && vendor != 0x)
+   return log_msg_ret("hide", -EEXIST);
+   else if (!hide && vendor != PCI_VENDOR_ID_INTEL)
+   return log_msg_ret("unhide", -ENOMEDIUM);
+
+   return 0;
+}
+
 static int p2sb_child_post_bind(struct udevice *dev)
 {
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
@@ -143,6 +169,10 @@ static int p2sb_child_post_bind(struct udevice *dev)
return 0;
 }
 
+struct p2sb_ops p2sb_ops = {
+   .set_hide   = intel_p2sb_set_hide,
+};
+
 static const struct udevice_id p2sb_ids[] = {
{ .compatible = "intel,p2sb" },
{ }
-- 
2.27.0.290.gba653c62da-goog