Add IO range property to fix below error on uboot
PCI: Failed autoconfig bar 18
Signed-off-by: Wasim Khan <wasim.k...@nxp.com>
---
Changes in v2:
- Updated commit subject
arch/arm/dts/fsl-lx2160a.dtsi | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index dee1e2f..70efbbf 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -297,7 +297,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
- ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0
0x40000000>;
+ ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0
0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0
0x40000000>; /* non-prefetchable memory */
};
pcie@3500000 {
@@ -312,7 +313,8 @@
device_type = "pci";
num-lanes = <2>;
bus-range = <0x0 0xff>;
- ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0
0x40000000>;
+ ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0
0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0
0x40000000>; /* non-prefetchable memory */
};
pcie@3600000 {
@@ -326,7 +328,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
- ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0
0x40000000>;
+ ranges = <0x81000000 0x0 0x00000000 0x90 0x00020000 0x0
0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x90 0x40000000 0x0
0x40000000>; /* non-prefetchable memory */
};
pcie@3700000 {
@@ -340,7 +343,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
- ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0
0x40000000>;
+ ranges = <0x81000000 0x0 0x00000000 0x98 0x00020000 0x0
0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x98 0x40000000 0x0
0x40000000>; /* non-prefetchable memory */
};
pcie@3800000 {
@@ -354,7 +358,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
- ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0
0x40000000>;
+ ranges = <0x81000000 0x0 0x00000000 0xa0 0x00020000 0x0
0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0
0x40000000>; /* non-prefetchable memory */
};
pcie@3900000 {
@@ -368,7 +373,8 @@
#size-cells = <2>;
device_type = "pci";
bus-range = <0x0 0xff>;
- ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0
0x40000000>;
+ ranges = <0x81000000 0x0 0x00000000 0xa8 0x00020000 0x0
0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0
0x40000000>; /* non-prefetchable memory */
};
fsl_mc: fsl-mc@80c000000 {
--
2.7.4
