subject:"\[PATCH v2 00\/11\] riscv\: Add Sipeed Maix support"

Re: [PATCH v2 00/11] riscv: Add Sipeed Maix support

2020-01-15 Thread Sean Anderson

From 1db8b70d069d1f96eb33597fb5bd82cb8a9cec9d Mon Sep 17 00:00:00 2001
From: Sean Anderson 
Date: Tue, 31 Dec 2019 14:28:58 -0500
Subject: [PATCH v2 08/11] riscv: Add device tree for K210

There is a mirror of ram located at 0x400 which is un-cached. This is
probably useful for DMA, but I am unsure of how to describe it in this device
tree. 

The cache-line size is undocumented. Emphirical tests suggest that it is 32
bytes, but I've used 64-bytes to be on the safe side.

Where possible, I have tried to find compatible drivers based on the layout of
registers. However, I have not tested most of this functionality, and anything
aside from clint0, uarths0, and sysctl should be considered descriptive at best.
I would appreciate if anyone could help identify possibly compatible devices,
especially for the timers, watchdogs, and rtc.

The documentation for pinconf devices indicates that #pinctrl-cells is a
required property, but I am unsure what to put for it. Should that be filled in
by a board-specific device tree?

The sysctl device has multiple different unrelated registers. For the moment, I
have split off sub-devices for each functionality. In addition to clock and
reset control, it also contains DMA handshake registers, and power registers. I
have not described those at the moment, and I would appreciate suggestions on
how to best describe them.

I'm not sure what the value of spi-max-frequency should be for external sd-card
slots. Suggestions are appreciated.

Signed-off-by: Sean Anderson 
---
Changes for v2:
  Model changed to "Sipeed Maix Bit" to match file name.
  Value of stdout-path fixed.
  SD card slot compatible changed to "mmc-spi-slot".
  "jedec,spi-nor" added to spi flash compatible list.
  Aliases for spi busses added.
  timebase-frequency divided by 50 to match timer speed.
  cpu-frequency renamed to clock-frequency.
  CPUX_intc restyled to cpuX_intc.
  "kendryte,k210-soc" added to soc compatible list for future-proofing.
  PLIC handle renamed to plic0 from pic0.
  K210_RST_SOC removed from sysrst, due to not being located in the
  reset register.
  K210_RST_* numbers changed to match their bit offset within the reset
  register.
  gpio_controller restyled to gpio-controller.
  Added a second clock to the dma binding to match what the driver
  expects.
  Changed "snps,designware-spi" compatible string to "snps,dw-apb-ssi"
  to match the correct driver.
  Added a name to the spi clocks.
  Added reg-io-width property to spi bindings.
  Assigned a default parent to K210_CLK_SPI3.
  Removed assigned clocks for ACLK and PLLs.
  Removed u-boot,dm-pre-reloc bindings.

 arch/riscv/dts/Makefile |   1 +
 arch/riscv/dts/k210-maix-bit.dts|  42 +++
 arch/riscv/dts/k210.dtsi| 453 
 board/sipeed/maix/Kconfig   |   3 +
 configs/sipeed_maix_bitm_defconfig  |   1 +
 include/dt-bindings/clock/k210-sysctl.h |  54 +++
 include/dt-bindings/reset/k210-sysctl.h |  38 ++
 7 files changed, 592 insertions(+)
 create mode 100644 arch/riscv/dts/k210-maix-bit.dts
 create mode 100644 arch/riscv/dts/k210.dtsi
 create mode 100644 include/dt-bindings/clock/k210-sysctl.h
 create mode 100644 include/dt-bindings/reset/k210-sysctl.h

diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 4f30e6936f..3a6f96c67d 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -2,6 +2,7 @@
 
 dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_FU540) += hifive-unleashed-a00.dtb
+dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
 
 targets += $(dtb-y)
 
diff --git a/arch/riscv/dts/k210-maix-bit.dts b/arch/riscv/dts/k210-maix-bit.dts
new file mode 100644
index 00..a25aa34ff8
--- /dev/null
+++ b/arch/riscv/dts/k210-maix-bit.dts
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Sean Anderson 
+ */
+
+/dts-v1/;
+
+#include "k210.dtsi"
+
+/ {
+   model = "Sipeed Maix Bit";
+   compatible = "sipeed,maix-bit", "kendryte,k210";
+
+   chosen {
+   bootargs = "console=ttyS0,115200n8 debug loglevel=7";
+   stdout-path = "serial0";
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   slot@0 {
+   compatible = "mmc-spi-slot";
+   reg = <0>;
+   broken-cd;
+   disable-wp;
+   };
+};
+
+ {
+   status = "okay";
+   spi-flash@0 {
+   compatible = "gd25lq64c", "gd25q64", "jedec,spi-nor";
+   reg = <0>;
+   spi-max-frequency = <12000>;
+   m25p,fast-read;
+   };
+};
diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
new file mode 100644
index 00..1408d9b4a9
--- /dev/null
+++ b/arch/riscv/dts/k210.dtsi
@@ -0,0 +1,453 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Sean Anderson 
+ */
+
+#include 
+#include 
+
+/ {
+   /*
+* Although

[PATCH v2 00/11] riscv: Add Sipeed Maix support

2020-01-15 Thread Sean Anderson

This patch series adds support for Sipeed Maix boards and the
Kendryte K210 CPU. Currently, only the Maix Bit V2.0 is supported,
however other models are similar. This series depends on

(clk: Include missing headers for linux/clk-provider.h).

To flash u-boot to a maix bit, run
kflash -tp /dev/ -B bit_mic u-boot-dtb.bin

Boot output should look like the following:

U-Boot 2020.01-00455-gad03fd83e1 (Jan 15 2020 - 17:10:24 -0500)

DRAM:  8 MiB
MMC:   spi@5200:slot@0: 0
In:serial@3800
Out:   serial@3800
Err:   serial@3800
=> 

I would really appreciate feedback! Many of the changes I had to make
for this revision were fairly trivial and could have been caught by
someone more familiar with the source code than I. In particular, there
are still some questions in individual patches which have yet to be
answered.

Changes for v2:
  Many bugfixes for the device tree.
  Modify the config to build without errors.
  Add support for keeping internal PLL frequencies in-range.
  Fix several rebase-induced artifacts.

Sean Anderson (11):
  clk: Always use the supplied struct clk
  clk: Check that ops of composite clock components exist before calling
  riscv: Add headers for asm/global_data.h
  riscv: Add an option to default to RV64I
  riscv: Add option to disable writes to mcounteren
  riscv: Fix incorrect cpu frequency on RV64
  riscv: Add initial Sipeed Maix support
  riscv: Add device tree for K210
  riscv: Add K210 sysctl support
  riscv: Add K210 pll support
  riscv: Add K210 clock support

 arch/riscv/Kconfig  |  19 +
 arch/riscv/cpu/cpu.c|   2 +
 arch/riscv/dts/Makefile |   1 +
 arch/riscv/dts/k210-maix-bit.dts|  42 ++
 arch/riscv/dts/k210.dtsi| 453 ++
 arch/riscv/include/asm/global_data.h|   2 +
 arch/riscv/include/asm/k210_sysctl.h|  43 ++
 arch/riscv/lib/Makefile |   1 +
 arch/riscv/lib/k210_sysctl.c|  21 +
 board/sipeed/maix/Kconfig   |  49 ++
 board/sipeed/maix/MAINTAINERS   |  13 +
 board/sipeed/maix/Makefile  |   5 +
 board/sipeed/maix/maix.c|   9 +
 configs/sipeed_maix_bitm_defconfig  |  95 
 drivers/clk/Kconfig |   1 +
 drivers/clk/Makefile|   1 +
 drivers/clk/clk-composite.c |  65 ++-
 drivers/clk/clk-divider.c   |   6 +-
 drivers/clk/clk-fixed-factor.c  |   3 +-
 drivers/clk/clk-gate.c  |   6 +-
 drivers/clk/clk-mux.c   |  12 +-
 drivers/clk/imx/clk-gate2.c |   4 +-
 drivers/clk/kendryte/Kconfig|   7 +
 drivers/clk/kendryte/Makefile   |   1 +
 drivers/clk/kendryte/clk.c  | 390 
 drivers/clk/kendryte/clk.h  |  27 ++
 drivers/clk/kendryte/pll.c  | 598 
 drivers/clk/kendryte/pll.h  |  38 ++
 drivers/cpu/riscv_cpu.c |   2 +
 include/configs/sipeed-maix.h   |  19 +
 include/dt-bindings/clock/k210-sysctl.h |  54 +++
 include/dt-bindings/reset/k210-sysctl.h |  38 ++
 32 files changed, 1985 insertions(+), 42 deletions(-)
 create mode 100644 arch/riscv/dts/k210-maix-bit.dts
 create mode 100644 arch/riscv/dts/k210.dtsi
 create mode 100644 arch/riscv/include/asm/k210_sysctl.h
 create mode 100644 arch/riscv/lib/k210_sysctl.c
 create mode 100644 board/sipeed/maix/Kconfig
 create mode 100644 board/sipeed/maix/MAINTAINERS
 create mode 100644 board/sipeed/maix/Makefile
 create mode 100644 board/sipeed/maix/maix.c
 create mode 100644 configs/sipeed_maix_bitm_defconfig
 create mode 100644 drivers/clk/kendryte/Kconfig
 create mode 100644 drivers/clk/kendryte/Makefile
 create mode 100644 drivers/clk/kendryte/clk.c
 create mode 100644 drivers/clk/kendryte/clk.h
 create mode 100644 drivers/clk/kendryte/pll.c
 create mode 100644 drivers/clk/kendryte/pll.h
 create mode 100644 include/configs/sipeed-maix.h
 create mode 100644 include/dt-bindings/clock/k210-sysctl.h
 create mode 100644 include/dt-bindings/reset/k210-sysctl.h

-- 
2.24.1

Re: [PATCH v2 00/11] riscv: Add Sipeed Maix support

[PATCH v2 00/11] riscv: Add Sipeed Maix support

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