Re: [PATCH v2 4/5] clk: ti: k3-pll: Change DIV_CTRL programming to read-modify-write

On Tue, Sep 07, 2021 at 05:16:57PM -0500, Dave Gerlach wrote: > There are three different divider values in the DIV_CTRL register > controlled by the k3-pll driver. Currently the ti_pll_clk_set_rate > function writes the entire register when programming plld, even though > plld only resides in

[PATCH v2 4/5] clk: ti: k3-pll: Change DIV_CTRL programming to read-modify-write

There are three different divider values in the DIV_CTRL register controlled by the k3-pll driver. Currently the ti_pll_clk_set_rate function writes the entire register when programming plld, even though plld only resides in the lower 6 bits. Change the plld programming to read-modify-write to