Hi Matthias,
On Wed, May 27, 2020 at 8:20 PM Matthias Brugger wrote:
>
>
>
> On 26/05/2020 10:07, Bin Meng wrote:
> > Hi Simon,
> >
> > On Tue, May 26, 2020 at 5:41 AM Simon Glass wrote:
> >>
> >> Hi Sylwester,
> >>
> >> On Mon, 25 May 2020 at 11:42, Sylwester Nawrocki
> >> wrote:
> >>>
> >>>
On 26/05/2020 10:07, Bin Meng wrote:
> Hi Simon,
>
> On Tue, May 26, 2020 at 5:41 AM Simon Glass wrote:
>>
>> Hi Sylwester,
>>
>> On Mon, 25 May 2020 at 11:42, Sylwester Nawrocki
>> wrote:
>>>
>>> Hi Simon,
>>>
>>> On 25.05.2020 19:04, Simon Glass wrote:
On Mon, 25 May 2020 at 10:57,
Hi,
On 26.05.2020 09:49, Marek Szyprowski wrote:
> On 25.05.2020 23:40, Simon Glass wrote:
>> On Mon, 25 May 2020 at 11:42, Sylwester Nawrocki
>> wrote:
>>> On 25.05.2020 19:04, Simon Glass wrote:
On Mon, 25 May 2020 at 10:57, Sylwester Nawrocki
wrote:
> On 25.05.2020 16:57,
Hi Simon,
On Tue, May 26, 2020 at 5:41 AM Simon Glass wrote:
>
> Hi Sylwester,
>
> On Mon, 25 May 2020 at 11:42, Sylwester Nawrocki
> wrote:
> >
> > Hi Simon,
> >
> > On 25.05.2020 19:04, Simon Glass wrote:
> > > On Mon, 25 May 2020 at 10:57, Sylwester Nawrocki
> > > wrote:
> > >> On
Hi Simon,
On 25.05.2020 23:40, Simon Glass wrote:
> On Mon, 25 May 2020 at 11:42, Sylwester Nawrocki
> wrote:
>> On 25.05.2020 19:04, Simon Glass wrote:
>>> On Mon, 25 May 2020 at 10:57, Sylwester Nawrocki
>>> wrote:
On 25.05.2020 16:57, Simon Glass wrote:
> On Mon, 25 May 2020 at
Hi Sylwester,
On Mon, 25 May 2020 at 11:42, Sylwester Nawrocki wrote:
>
> Hi Simon,
>
> On 25.05.2020 19:04, Simon Glass wrote:
> > On Mon, 25 May 2020 at 10:57, Sylwester Nawrocki
> > wrote:
> >> On 25.05.2020 16:57, Simon Glass wrote:
> >>> On Mon, 25 May 2020 at 05:40, Sylwester Nawrocki
Hi Simon,
On 25.05.2020 19:04, Simon Glass wrote:
> On Mon, 25 May 2020 at 10:57, Sylwester Nawrocki
> wrote:
>> On 25.05.2020 16:57, Simon Glass wrote:
>>> On Mon, 25 May 2020 at 05:40, Sylwester Nawrocki
>>> wrote:
There might be hardware configurations where 64-bit data accesses
Hi Sylwester,
On Mon, 25 May 2020 at 10:57, Sylwester Nawrocki wrote:
>
> Hi Simon,
>
> On 25.05.2020 16:57, Simon Glass wrote:
> > On Mon, 25 May 2020 at 05:40, Sylwester Nawrocki
> > wrote:
> >>
> >> There might be hardware configurations where 64-bit data accesses
> >> to XHCI registers are
Hi Simon,
On 25.05.2020 16:57, Simon Glass wrote:
> On Mon, 25 May 2020 at 05:40, Sylwester Nawrocki
> wrote:
>>
>> There might be hardware configurations where 64-bit data accesses
>> to XHCI registers are not supported properly. This patch removes
>> the readq/writeq so always two 32-bit
Hi Sylwester,
On Mon, 25 May 2020 at 05:40, Sylwester Nawrocki wrote:
>
> There might be hardware configurations where 64-bit data accesses
> to XHCI registers are not supported properly. This patch removes
> the readq/writeq so always two 32-bit accesses are used to read/write
> 64-bit XHCI
There might be hardware configurations where 64-bit data accesses
to XHCI registers are not supported properly. This patch removes
the readq/writeq so always two 32-bit accesses are used to read/write
64-bit XHCI registers, similarly as it is done in Linux kernel.
This patch fixes operation of
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