[PATCHv2] pci: layerscape: update the searching compatible of LX2160A PCIe

[Zhiqiang Hou]

From: Hou Zhiqiang <zhiqiang....@nxp.com>

The current fixup of LX2160A PCIe nodes is based on non-production
rev1 silicon, and in Linux the nodes have been updated for rev2
silicon, so update the searching compatible string to match the
kernel changes. And for compatibility with the rev1 nodes, move
forward the board specific fixup.

Signed-off-by: Hou Zhiqiang <zhiqiang....@nxp.com>
---
V2:
 - Fix build issue on LS1021A platform.

 drivers/pci/Kconfig                 | 4 +---
 drivers/pci/pcie_layerscape_fixup.c | 9 +++++----
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index ba41787f64..16647bed54 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -219,8 +219,7 @@ config FSL_PCIE_COMPAT
        default "fsl,ls1046a-pcie" if ARCH_LS1046A
        default "fsl,ls2080a-pcie" if ARCH_LS2080A
        default "fsl,ls1088a-pcie" if ARCH_LS1088A
-       default "fsl,lx2160a-pcie" if ARCH_LX2160A
-       default "fsl,ls2088a-pcie" if ARCH_LX2162A
+       default "fsl,ls2088a-pcie" if ARCH_LX2160A || ARCH_LX2162A
        default "fsl,ls1021a-pcie" if ARCH_LS1021A
        help
          This compatible is used to find pci controller node in Kernel DT
@@ -229,7 +228,6 @@ config FSL_PCIE_COMPAT
 config FSL_PCIE_EP_COMPAT
        string "PCIe EP compatible of Kernel DT"
        depends on PCIE_LAYERSCAPE_RC || PCIE_LAYERSCAPE_GEN4
-       default "fsl,lx2160a-pcie-ep" if ARCH_LX2160A
        default "fsl,ls-pcie-ep"
        help
          This compatible is used to find pci controller ep node in Kernel DT
diff --git a/drivers/pci/pcie_layerscape_fixup.c 
b/drivers/pci/pcie_layerscape_fixup.c
index 8a2a0e1f4a..44d82bf856 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -527,7 +527,7 @@ static void fdt_fixup_pcie_ls(void *blob)
        }
 
        if (!IS_ENABLED(CONFIG_PCI_IOMMU_EXTRA_MAPPINGS))
-               goto skip;
+               return;
 
        list_for_each_entry(pcie_rc, &ls_pcie_list, list) {
                nodeoffset = fdt_pcie_get_nodeoffset(blob, pcie_rc);
@@ -568,9 +568,6 @@ static void fdt_fixup_pcie_ls(void *blob)
                }
                free(entries);
        }
-
-skip:
-       pcie_board_fix_fdt(blob);
 }
 #endif
 
@@ -619,6 +616,10 @@ void ft_pci_setup_ls(void *blob, struct bd_info *bd)
 {
        struct ls_pcie_rc *pcie_rc;
 
+#if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
+       pcie_board_fix_fdt(blob);
+#endif
+
        list_for_each_entry(pcie_rc, &ls_pcie_list, list)
                ft_pcie_ls_setup(blob, pcie_rc);
 
-- 
2.17.1