Re: [U-Boot] [PATCH] ARM: k2g: Update PLL Multiplier and divider values

2016-11-04 Thread Tom Rini
On Thu, Nov 03, 2016 at 03:35:02PM +0530, Lokesh Vutla wrote: > Only a certain set of PLLM/D values are recommended to configure the DDR > at the required speeds for a given clock input frequency. Updating these > values as specified in Data Sheet[1] Table 5-18 > > [1]

[U-Boot] [PATCH] ARM: k2g: Update PLL Multiplier and divider values

2016-11-03 Thread Lokesh Vutla
Only a certain set of PLLM/D values are recommended to configure the DDR at the required speeds for a given clock input frequency. Updating these values as specified in Data Sheet[1] Table 5-18 [1] http://www.ti.com/lit/ds/symlink/66ak2g02.pdf Signed-off-by: Lokesh Vutla ---