Re: [U-Boot] [PATCH] Revert spi: add config option to enable the WP pin function on st micron flashes

2015-04-23 Thread Heiko Schocher 

Hello Jagan,

Am 22.04.2015 13:03, schrieb Jagan Teki:

On 23 December 2014 at 13:45, Jagan Teki jagannadh.t...@gmail.com wrote:

Hi Heiko,

On 23 December 2014 at 12:04, Heiko Schocher h...@denx.de wrote:

Hello Jagan,

Am 22.12.2014 09:58, schrieb Jagan Teki:


On 18 December 2014 at 19:21, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:


This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d.

Never see the issue with N25Q128 flash without need of W#/Vpp signal
during probe.

Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Heiko Schocher h...@denx.de
---
   README| 11 ---
   drivers/mtd/spi/sf_internal.h |  4 
   drivers/mtd/spi/sf_probe.c| 30 --
   3 files changed, 45 deletions(-)



I found this issue on the aristainetos board, there the W#/Vpp signal
is connected to a gpio pin.


Did you test the same board on Linux? what about the status there?


You can revert this patch. It seems it works not as expected, so it
is better to revert it, and I maybe get time for reworking it.

bye,
Heiko
--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] Revert spi: add config option to enable the WP pin function on st micron flashes

2015-04-23 Thread Jagan Teki 
On 23 April 2015 at 18:28, Heiko Schocher h...@denx.de wrote:
 Hello Jagan,

 Am 22.04.2015 13:03, schrieb Jagan Teki:

 On 23 December 2014 at 13:45, Jagan Teki jagannadh.t...@gmail.com wrote:

 Hi Heiko,

 On 23 December 2014 at 12:04, Heiko Schocher h...@denx.de wrote:

 Hello Jagan,

 Am 22.12.2014 09:58, schrieb Jagan Teki:


 On 18 December 2014 at 19:21, Jagannadha Sutradharudu Teki
 jagannadh.t...@gmail.com wrote:


 This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d.

 Never see the issue with N25Q128 flash without need of W#/Vpp signal
 during probe.

 Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
 Cc: Heiko Schocher h...@denx.de
 ---
README| 11 ---
drivers/mtd/spi/sf_internal.h |  4 
drivers/mtd/spi/sf_probe.c| 30 --
3 files changed, 45 deletions(-)



 I found this issue on the aristainetos board, there the W#/Vpp signal
 is connected to a gpio pin.


 Did you test the same board on Linux? what about the status there?


 You can revert this patch. It seems it works not as expected, so it
 is better to revert it, and I maybe get time for reworking it.

Ok, Shall I apply this revert patch?

thanks!
-- 
Jagan.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] Revert spi: add config option to enable the WP pin function on st micron flashes

2015-04-23 Thread Heiko Schocher 

Hello Jagan,

Am 23.04.2015 15:06, schrieb Jagan Teki:

On 23 April 2015 at 18:28, Heiko Schocher h...@denx.de wrote:

Hello Jagan,

Am 22.04.2015 13:03, schrieb Jagan Teki:


On 23 December 2014 at 13:45, Jagan Teki jagannadh.t...@gmail.com wrote:


Hi Heiko,

On 23 December 2014 at 12:04, Heiko Schocher h...@denx.de wrote:


Hello Jagan,

Am 22.12.2014 09:58, schrieb Jagan Teki:



On 18 December 2014 at 19:21, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:



This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d.

Never see the issue with N25Q128 flash without need of W#/Vpp signal
during probe.

Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Heiko Schocher h...@denx.de
---
README| 11 ---
drivers/mtd/spi/sf_internal.h |  4 
drivers/mtd/spi/sf_probe.c| 30 --
3 files changed, 45 deletions(-)




I found this issue on the aristainetos board, there the W#/Vpp signal
is connected to a gpio pin.



Did you test the same board on Linux? what about the status there?



You can revert this patch. It seems it works not as expected, so it
is better to revert it, and I maybe get time for reworking it.


Ok, Shall I apply this revert patch?


Yes, please.

bye,
Heiko
--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] Revert spi: add config option to enable the WP pin function on st micron flashes

2015-04-22 Thread Heiko Schocher 

Hello Jagan,

Am 22.04.2015 13:03, schrieb Jagan Teki:

On 23 December 2014 at 13:45, Jagan Teki jagannadh.t...@gmail.com wrote:

Hi Heiko,

On 23 December 2014 at 12:04, Heiko Schocher h...@denx.de wrote:

Hello Jagan,

Am 22.12.2014 09:58, schrieb Jagan Teki:


On 18 December 2014 at 19:21, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:


This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d.

Never see the issue with N25Q128 flash without need of W#/Vpp signal
during probe.

Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Heiko Schocher h...@denx.de
---
   README| 11 ---
   drivers/mtd/spi/sf_internal.h |  4 
   drivers/mtd/spi/sf_probe.c| 30 --
   3 files changed, 45 deletions(-)



I found this issue on the aristainetos board, there the W#/Vpp signal
is connected to a gpio pin.


Did you test the same board on Linux? what about the status there?



BTW: What is with the patchset:

[U-Boot] [PATCH v3 0/3] spi, sf: add mtdparts feature to spi and sf commands
http://lists.denx.de/pipermail/u-boot/2014-September/188098.html

Patchwork [U-Boot,v3,1/3] mtd, spi: add MTD layer driver
http://patchwork.ozlabs.org/patch/386102/

Patchwork [U-Boot,v3,2/3] mtd, nand: move common functions from cmd_nand.c
to common place
http://patchwork.ozlabs.org/patch/386103/

Patchwork [U-Boot,v3,3/3] spi, sf: use offset and size in sf cmd from
mtdpartition
http://patchwork.ozlabs.org/patch/386101/


Will come back next.







diff --git a/README b/README
index 4ca04d0..908646f 100644
--- a/README
+++ b/README
@@ -3090,17 +3090,6 @@ CBFS (Coreboot Filesystem) support
  memories can be connected with a given cs line.
  currently Xilinx Zynq qspi support these type of
connections.

-   CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-   enable the W#/Vpp signal to disable writing to the status
-   register on ST MICRON flashes like the N25Q128.
-   The status register write enable/disable bit, combined
with
-   the W#/VPP signal provides hardware data protection for
the
-   device as follows: When the enable/disable bit is set to
1,
-   and the W#/VPP signal is driven LOW, the status register
-   nonvolatile bits become read-only and the WRITE STATUS
REGISTER
-   operation will not execute. The only way to exit this
-   hardware-protected mode is to drive W#/VPP HIGH.
-
   - SystemACE Support:
  CONFIG_SYSTEMACE

diff --git a/drivers/mtd/spi/sf_internal.h
b/drivers/mtd/spi/sf_internal.h
index 785f7a9..bd834dc 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -97,10 +97,6 @@ enum {
   #define STATUS_QEB_MXIC(1  6)
   #define STATUS_PEC (1  7)

-#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-#define STATUS_SRWD(1  7) /* SR write protect */
-#endif
-
   /* Flash timeout values */
   #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
   #define SPI_FLASH_PAGE_ERASE_TIMEOUT   (5 * CONFIG_SYS_HZ)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index ce9987f..3b0e652 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -287,34 +287,6 @@ int spi_flash_decode_fdt(const void *blob, struct
spi_flash *flash)
   }
   #endif /* CONFIG_OF_CONTROL */

-#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-/* enable the W#/Vpp signal to disable writing to the status register */
-static int spi_enable_wp_pin(struct spi_flash *flash)
-{
-   u8 status;
-   int ret;
-
-   ret = spi_flash_cmd_read_status(flash, status);
-   if (ret  0)
-   return ret;
-
-   ret = spi_flash_cmd_write_status(flash, STATUS_SRWD);
-   if (ret  0)
-   return ret;
-
-   ret = spi_flash_cmd_write_disable(flash);
-   if (ret  0)
-   return ret;
-
-   return 0;
-}
-#else
-static int spi_enable_wp_pin(struct spi_flash *flash)
-{
-   return 0;
-}
-#endif
-
   /**
* spi_flash_probe_slave() - Probe for a SPI flash device on a bus
*
@@ -393,8 +365,6 @@ int spi_flash_probe_slave(struct spi_slave *spi,
struct spi_flash *flash)
  puts( Full access #define CONFIG_SPI_FLASH_BAR\n);
  }
   #endif
-   if (spi_enable_wp_pin(flash))
-   puts(Enable WP pin failed\n);

  /* Release spi bus */
  spi_release_bus(spi);
--
1.9.1



Ping!


Ping!


I try to test it today.

bye,
Heiko
--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] Revert spi: add config option to enable the WP pin function on st micron flashes

2015-04-22 Thread Jagan Teki 
On 23 December 2014 at 13:45, Jagan Teki jagannadh.t...@gmail.com wrote:
 Hi Heiko,

 On 23 December 2014 at 12:04, Heiko Schocher h...@denx.de wrote:
 Hello Jagan,

 Am 22.12.2014 09:58, schrieb Jagan Teki:

 On 18 December 2014 at 19:21, Jagannadha Sutradharudu Teki
 jagannadh.t...@gmail.com wrote:

 This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d.

 Never see the issue with N25Q128 flash without need of W#/Vpp signal
 during probe.

 Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
 Cc: Heiko Schocher h...@denx.de
 ---
   README| 11 ---
   drivers/mtd/spi/sf_internal.h |  4 
   drivers/mtd/spi/sf_probe.c| 30 --
   3 files changed, 45 deletions(-)


 I found this issue on the aristainetos board, there the W#/Vpp signal
 is connected to a gpio pin.

 Did you test the same board on Linux? what about the status there?


 BTW: What is with the patchset:

 [U-Boot] [PATCH v3 0/3] spi, sf: add mtdparts feature to spi and sf commands
 http://lists.denx.de/pipermail/u-boot/2014-September/188098.html

 Patchwork [U-Boot,v3,1/3] mtd, spi: add MTD layer driver
 http://patchwork.ozlabs.org/patch/386102/

 Patchwork [U-Boot,v3,2/3] mtd, nand: move common functions from cmd_nand.c
 to common place
 http://patchwork.ozlabs.org/patch/386103/

 Patchwork [U-Boot,v3,3/3] spi, sf: use offset and size in sf cmd from
 mtdpartition
 http://patchwork.ozlabs.org/patch/386101/

 Will come back next.





 diff --git a/README b/README
 index 4ca04d0..908646f 100644
 --- a/README
 +++ b/README
 @@ -3090,17 +3090,6 @@ CBFS (Coreboot Filesystem) support
  memories can be connected with a given cs line.
  currently Xilinx Zynq qspi support these type of
 connections.

 -   CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
 -   enable the W#/Vpp signal to disable writing to the status
 -   register on ST MICRON flashes like the N25Q128.
 -   The status register write enable/disable bit, combined
 with
 -   the W#/VPP signal provides hardware data protection for
 the
 -   device as follows: When the enable/disable bit is set to
 1,
 -   and the W#/VPP signal is driven LOW, the status register
 -   nonvolatile bits become read-only and the WRITE STATUS
 REGISTER
 -   operation will not execute. The only way to exit this
 -   hardware-protected mode is to drive W#/VPP HIGH.
 -
   - SystemACE Support:
  CONFIG_SYSTEMACE

 diff --git a/drivers/mtd/spi/sf_internal.h
 b/drivers/mtd/spi/sf_internal.h
 index 785f7a9..bd834dc 100644
 --- a/drivers/mtd/spi/sf_internal.h
 +++ b/drivers/mtd/spi/sf_internal.h
 @@ -97,10 +97,6 @@ enum {
   #define STATUS_QEB_MXIC(1  6)
   #define STATUS_PEC (1  7)

 -#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
 -#define STATUS_SRWD(1  7) /* SR write protect */
 -#endif
 -
   /* Flash timeout values */
   #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
   #define SPI_FLASH_PAGE_ERASE_TIMEOUT   (5 * CONFIG_SYS_HZ)
 diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
 index ce9987f..3b0e652 100644
 --- a/drivers/mtd/spi/sf_probe.c
 +++ b/drivers/mtd/spi/sf_probe.c
 @@ -287,34 +287,6 @@ int spi_flash_decode_fdt(const void *blob, struct
 spi_flash *flash)
   }
   #endif /* CONFIG_OF_CONTROL */

 -#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
 -/* enable the W#/Vpp signal to disable writing to the status register */
 -static int spi_enable_wp_pin(struct spi_flash *flash)
 -{
 -   u8 status;
 -   int ret;
 -
 -   ret = spi_flash_cmd_read_status(flash, status);
 -   if (ret  0)
 -   return ret;
 -
 -   ret = spi_flash_cmd_write_status(flash, STATUS_SRWD);
 -   if (ret  0)
 -   return ret;
 -
 -   ret = spi_flash_cmd_write_disable(flash);
 -   if (ret  0)
 -   return ret;
 -
 -   return 0;
 -}
 -#else
 -static int spi_enable_wp_pin(struct spi_flash *flash)
 -{
 -   return 0;
 -}
 -#endif
 -
   /**
* spi_flash_probe_slave() - Probe for a SPI flash device on a bus
*
 @@ -393,8 +365,6 @@ int spi_flash_probe_slave(struct spi_slave *spi,
 struct spi_flash *flash)
  puts( Full access #define CONFIG_SPI_FLASH_BAR\n);
  }
   #endif
 -   if (spi_enable_wp_pin(flash))
 -   puts(Enable WP pin failed\n);

  /* Release spi bus */
  spi_release_bus(spi);
 --
 1.9.1


 Ping!

Ping!

-- 
Jagan.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] Revert spi: add config option to enable the WP pin function on st micron flashes

2014-12-23 Thread Jagan Teki 
Hi Heiko,

On 23 December 2014 at 12:04, Heiko Schocher h...@denx.de wrote:
 Hello Jagan,

 Am 22.12.2014 09:58, schrieb Jagan Teki:

 On 18 December 2014 at 19:21, Jagannadha Sutradharudu Teki
 jagannadh.t...@gmail.com wrote:

 This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d.

 Never see the issue with N25Q128 flash without need of W#/Vpp signal
 during probe.

 Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
 Cc: Heiko Schocher h...@denx.de
 ---
   README| 11 ---
   drivers/mtd/spi/sf_internal.h |  4 
   drivers/mtd/spi/sf_probe.c| 30 --
   3 files changed, 45 deletions(-)


 I found this issue on the aristainetos board, there the W#/Vpp signal
 is connected to a gpio pin.

Did you test the same board on Linux? what about the status there?


 BTW: What is with the patchset:

 [U-Boot] [PATCH v3 0/3] spi, sf: add mtdparts feature to spi and sf commands
 http://lists.denx.de/pipermail/u-boot/2014-September/188098.html

 Patchwork [U-Boot,v3,1/3] mtd, spi: add MTD layer driver
 http://patchwork.ozlabs.org/patch/386102/

 Patchwork [U-Boot,v3,2/3] mtd, nand: move common functions from cmd_nand.c
 to common place
 http://patchwork.ozlabs.org/patch/386103/

 Patchwork [U-Boot,v3,3/3] spi, sf: use offset and size in sf cmd from
 mtdpartition
 http://patchwork.ozlabs.org/patch/386101/

Will come back next.





 diff --git a/README b/README
 index 4ca04d0..908646f 100644
 --- a/README
 +++ b/README
 @@ -3090,17 +3090,6 @@ CBFS (Coreboot Filesystem) support
  memories can be connected with a given cs line.
  currently Xilinx Zynq qspi support these type of
 connections.

 -   CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
 -   enable the W#/Vpp signal to disable writing to the status
 -   register on ST MICRON flashes like the N25Q128.
 -   The status register write enable/disable bit, combined
 with
 -   the W#/VPP signal provides hardware data protection for
 the
 -   device as follows: When the enable/disable bit is set to
 1,
 -   and the W#/VPP signal is driven LOW, the status register
 -   nonvolatile bits become read-only and the WRITE STATUS
 REGISTER
 -   operation will not execute. The only way to exit this
 -   hardware-protected mode is to drive W#/VPP HIGH.
 -
   - SystemACE Support:
  CONFIG_SYSTEMACE

 diff --git a/drivers/mtd/spi/sf_internal.h
 b/drivers/mtd/spi/sf_internal.h
 index 785f7a9..bd834dc 100644
 --- a/drivers/mtd/spi/sf_internal.h
 +++ b/drivers/mtd/spi/sf_internal.h
 @@ -97,10 +97,6 @@ enum {
   #define STATUS_QEB_MXIC(1  6)
   #define STATUS_PEC (1  7)

 -#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
 -#define STATUS_SRWD(1  7) /* SR write protect */
 -#endif
 -
   /* Flash timeout values */
   #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
   #define SPI_FLASH_PAGE_ERASE_TIMEOUT   (5 * CONFIG_SYS_HZ)
 diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
 index ce9987f..3b0e652 100644
 --- a/drivers/mtd/spi/sf_probe.c
 +++ b/drivers/mtd/spi/sf_probe.c
 @@ -287,34 +287,6 @@ int spi_flash_decode_fdt(const void *blob, struct
 spi_flash *flash)
   }
   #endif /* CONFIG_OF_CONTROL */

 -#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
 -/* enable the W#/Vpp signal to disable writing to the status register */
 -static int spi_enable_wp_pin(struct spi_flash *flash)
 -{
 -   u8 status;
 -   int ret;
 -
 -   ret = spi_flash_cmd_read_status(flash, status);
 -   if (ret  0)
 -   return ret;
 -
 -   ret = spi_flash_cmd_write_status(flash, STATUS_SRWD);
 -   if (ret  0)
 -   return ret;
 -
 -   ret = spi_flash_cmd_write_disable(flash);
 -   if (ret  0)
 -   return ret;
 -
 -   return 0;
 -}
 -#else
 -static int spi_enable_wp_pin(struct spi_flash *flash)
 -{
 -   return 0;
 -}
 -#endif
 -
   /**
* spi_flash_probe_slave() - Probe for a SPI flash device on a bus
*
 @@ -393,8 +365,6 @@ int spi_flash_probe_slave(struct spi_slave *spi,
 struct spi_flash *flash)
  puts( Full access #define CONFIG_SPI_FLASH_BAR\n);
  }
   #endif
 -   if (spi_enable_wp_pin(flash))
 -   puts(Enable WP pin failed\n);

  /* Release spi bus */
  spi_release_bus(spi);
 --
 1.9.1


 Ping!

thanks!
-- 
Jagan.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] Revert spi: add config option to enable the WP pin function on st micron flashes

2014-12-22 Thread Jagan Teki 
On 18 December 2014 at 19:21, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:
 This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d.

 Never see the issue with N25Q128 flash without need of W#/Vpp signal
 during probe.

 Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
 Cc: Heiko Schocher h...@denx.de
 ---
  README| 11 ---
  drivers/mtd/spi/sf_internal.h |  4 
  drivers/mtd/spi/sf_probe.c| 30 --
  3 files changed, 45 deletions(-)

 diff --git a/README b/README
 index 4ca04d0..908646f 100644
 --- a/README
 +++ b/README
 @@ -3090,17 +3090,6 @@ CBFS (Coreboot Filesystem) support
 memories can be connected with a given cs line.
 currently Xilinx Zynq qspi support these type of connections.

 -   CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
 -   enable the W#/Vpp signal to disable writing to the status
 -   register on ST MICRON flashes like the N25Q128.
 -   The status register write enable/disable bit, combined with
 -   the W#/VPP signal provides hardware data protection for the
 -   device as follows: When the enable/disable bit is set to 1,
 -   and the W#/VPP signal is driven LOW, the status register
 -   nonvolatile bits become read-only and the WRITE STATUS 
 REGISTER
 -   operation will not execute. The only way to exit this
 -   hardware-protected mode is to drive W#/VPP HIGH.
 -
  - SystemACE Support:
 CONFIG_SYSTEMACE

 diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
 index 785f7a9..bd834dc 100644
 --- a/drivers/mtd/spi/sf_internal.h
 +++ b/drivers/mtd/spi/sf_internal.h
 @@ -97,10 +97,6 @@ enum {
  #define STATUS_QEB_MXIC(1  6)
  #define STATUS_PEC (1  7)

 -#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
 -#define STATUS_SRWD(1  7) /* SR write protect */
 -#endif
 -
  /* Flash timeout values */
  #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
  #define SPI_FLASH_PAGE_ERASE_TIMEOUT   (5 * CONFIG_SYS_HZ)
 diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
 index ce9987f..3b0e652 100644
 --- a/drivers/mtd/spi/sf_probe.c
 +++ b/drivers/mtd/spi/sf_probe.c
 @@ -287,34 +287,6 @@ int spi_flash_decode_fdt(const void *blob, struct 
 spi_flash *flash)
  }
  #endif /* CONFIG_OF_CONTROL */

 -#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
 -/* enable the W#/Vpp signal to disable writing to the status register */
 -static int spi_enable_wp_pin(struct spi_flash *flash)
 -{
 -   u8 status;
 -   int ret;
 -
 -   ret = spi_flash_cmd_read_status(flash, status);
 -   if (ret  0)
 -   return ret;
 -
 -   ret = spi_flash_cmd_write_status(flash, STATUS_SRWD);
 -   if (ret  0)
 -   return ret;
 -
 -   ret = spi_flash_cmd_write_disable(flash);
 -   if (ret  0)
 -   return ret;
 -
 -   return 0;
 -}
 -#else
 -static int spi_enable_wp_pin(struct spi_flash *flash)
 -{
 -   return 0;
 -}
 -#endif
 -
  /**
   * spi_flash_probe_slave() - Probe for a SPI flash device on a bus
   *
 @@ -393,8 +365,6 @@ int spi_flash_probe_slave(struct spi_slave *spi, struct 
 spi_flash *flash)
 puts( Full access #define CONFIG_SPI_FLASH_BAR\n);
 }
  #endif
 -   if (spi_enable_wp_pin(flash))
 -   puts(Enable WP pin failed\n);

 /* Release spi bus */
 spi_release_bus(spi);
 --
 1.9.1


Ping!

thanks!
-- 
Jagan.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] Revert spi: add config option to enable the WP pin function on st micron flashes

2014-12-22 Thread Heiko Schocher 

Hello Jagan,

Am 22.12.2014 09:58, schrieb Jagan Teki:

On 18 December 2014 at 19:21, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:

This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d.

Never see the issue with N25Q128 flash without need of W#/Vpp signal
during probe.

Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Heiko Schocher h...@denx.de
---
  README| 11 ---
  drivers/mtd/spi/sf_internal.h |  4 
  drivers/mtd/spi/sf_probe.c| 30 --
  3 files changed, 45 deletions(-)


I found this issue on the aristainetos board, there the W#/Vpp signal
is connected to a gpio pin.

bye,
Heiko

BTW: What is with the patchset:

[U-Boot] [PATCH v3 0/3] spi, sf: add mtdparts feature to spi and sf commands
http://lists.denx.de/pipermail/u-boot/2014-September/188098.html

Patchwork [U-Boot,v3,1/3] mtd, spi: add MTD layer driver
http://patchwork.ozlabs.org/patch/386102/

Patchwork [U-Boot,v3,2/3] mtd, nand: move common functions from cmd_nand.c to 
common place
http://patchwork.ozlabs.org/patch/386103/

Patchwork [U-Boot,v3,3/3] spi, sf: use offset and size in sf cmd from 
mtdpartition
http://patchwork.ozlabs.org/patch/386101/




diff --git a/README b/README
index 4ca04d0..908646f 100644
--- a/README
+++ b/README
@@ -3090,17 +3090,6 @@ CBFS (Coreboot Filesystem) support
 memories can be connected with a given cs line.
 currently Xilinx Zynq qspi support these type of connections.

-   CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-   enable the W#/Vpp signal to disable writing to the status
-   register on ST MICRON flashes like the N25Q128.
-   The status register write enable/disable bit, combined with
-   the W#/VPP signal provides hardware data protection for the
-   device as follows: When the enable/disable bit is set to 1,
-   and the W#/VPP signal is driven LOW, the status register
-   nonvolatile bits become read-only and the WRITE STATUS REGISTER
-   operation will not execute. The only way to exit this
-   hardware-protected mode is to drive W#/VPP HIGH.
-
  - SystemACE Support:
 CONFIG_SYSTEMACE

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 785f7a9..bd834dc 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -97,10 +97,6 @@ enum {
  #define STATUS_QEB_MXIC(1  6)
  #define STATUS_PEC (1  7)

-#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-#define STATUS_SRWD(1  7) /* SR write protect */
-#endif
-
  /* Flash timeout values */
  #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
  #define SPI_FLASH_PAGE_ERASE_TIMEOUT   (5 * CONFIG_SYS_HZ)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index ce9987f..3b0e652 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -287,34 +287,6 @@ int spi_flash_decode_fdt(const void *blob, struct 
spi_flash *flash)
  }
  #endif /* CONFIG_OF_CONTROL */

-#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-/* enable the W#/Vpp signal to disable writing to the status register */
-static int spi_enable_wp_pin(struct spi_flash *flash)
-{
-   u8 status;
-   int ret;
-
-   ret = spi_flash_cmd_read_status(flash, status);
-   if (ret  0)
-   return ret;
-
-   ret = spi_flash_cmd_write_status(flash, STATUS_SRWD);
-   if (ret  0)
-   return ret;
-
-   ret = spi_flash_cmd_write_disable(flash);
-   if (ret  0)
-   return ret;
-
-   return 0;
-}
-#else
-static int spi_enable_wp_pin(struct spi_flash *flash)
-{
-   return 0;
-}
-#endif
-
  /**
   * spi_flash_probe_slave() - Probe for a SPI flash device on a bus
   *
@@ -393,8 +365,6 @@ int spi_flash_probe_slave(struct spi_slave *spi, struct 
spi_flash *flash)
 puts( Full access #define CONFIG_SPI_FLASH_BAR\n);
 }
  #endif
-   if (spi_enable_wp_pin(flash))
-   puts(Enable WP pin failed\n);

 /* Release spi bus */
 spi_release_bus(spi);
--
1.9.1



Ping!

thanks!



--
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] Revert spi: add config option to enable the WP pin function on st micron flashes

2014-12-18 Thread Jagannadha Sutradharudu Teki 
This reverts commit 562f8df18da62ae02c4ace1e530451fe82c3312d.

Never see the issue with N25Q128 flash without need of W#/Vpp signal
during probe.

Signed-off-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Cc: Heiko Schocher h...@denx.de
---
 README| 11 ---
 drivers/mtd/spi/sf_internal.h |  4 
 drivers/mtd/spi/sf_probe.c| 30 --
 3 files changed, 45 deletions(-)

diff --git a/README b/README
index 4ca04d0..908646f 100644
--- a/README
+++ b/README
@@ -3090,17 +3090,6 @@ CBFS (Coreboot Filesystem) support
memories can be connected with a given cs line.
currently Xilinx Zynq qspi support these type of connections.
 
-   CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-   enable the W#/Vpp signal to disable writing to the status
-   register on ST MICRON flashes like the N25Q128.
-   The status register write enable/disable bit, combined with
-   the W#/VPP signal provides hardware data protection for the
-   device as follows: When the enable/disable bit is set to 1,
-   and the W#/VPP signal is driven LOW, the status register
-   nonvolatile bits become read-only and the WRITE STATUS REGISTER
-   operation will not execute. The only way to exit this
-   hardware-protected mode is to drive W#/VPP HIGH.
-
 - SystemACE Support:
CONFIG_SYSTEMACE
 
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 785f7a9..bd834dc 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -97,10 +97,6 @@ enum {
 #define STATUS_QEB_MXIC(1  6)
 #define STATUS_PEC (1  7)
 
-#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-#define STATUS_SRWD(1  7) /* SR write protect */
-#endif
-
 /* Flash timeout values */
 #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ)
 #define SPI_FLASH_PAGE_ERASE_TIMEOUT   (5 * CONFIG_SYS_HZ)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index ce9987f..3b0e652 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -287,34 +287,6 @@ int spi_flash_decode_fdt(const void *blob, struct 
spi_flash *flash)
 }
 #endif /* CONFIG_OF_CONTROL */
 
-#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-/* enable the W#/Vpp signal to disable writing to the status register */
-static int spi_enable_wp_pin(struct spi_flash *flash)
-{
-   u8 status;
-   int ret;
-
-   ret = spi_flash_cmd_read_status(flash, status);
-   if (ret  0)
-   return ret;
-
-   ret = spi_flash_cmd_write_status(flash, STATUS_SRWD);
-   if (ret  0)
-   return ret;
-
-   ret = spi_flash_cmd_write_disable(flash);
-   if (ret  0)
-   return ret;
-
-   return 0;
-}
-#else
-static int spi_enable_wp_pin(struct spi_flash *flash)
-{
-   return 0;
-}
-#endif
-
 /**
  * spi_flash_probe_slave() - Probe for a SPI flash device on a bus
  *
@@ -393,8 +365,6 @@ int spi_flash_probe_slave(struct spi_slave *spi, struct 
spi_flash *flash)
puts( Full access #define CONFIG_SPI_FLASH_BAR\n);
}
 #endif
-   if (spi_enable_wp_pin(flash))
-   puts(Enable WP pin failed\n);
 
/* Release spi bus */
spi_release_bus(spi);
-- 
1.9.1

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot