This patch splits the current mini emmc configuration into emmc0
and emmc1 configurations because emmc is probed at boot time and on
systems which have only one interface mini configuration is failing on
unused interface. This patch also adds required clock node in dts and
enables CONFIG_MMC_SDHCI_ZYNQ through defconfig.
Signed-off-by: Siva Durga Prasad Paladugu
---
arch/arm/dts/Makefile | 4 +-
...{zynqmp-mini-emmc.dts => zynqmp-mini-emmc0.dts} | 20 ++-
arch/arm/dts/zynqmp-mini-emmc1.dts | 67 ++
...efconfig => xilinx_zynqmp_mini_emmc0_defconfig} | 3 +-
configs/xilinx_zynqmp_mini_emmc1_defconfig | 49
5 files changed, 127 insertions(+), 16 deletions(-)
rename arch/arm/dts/{zynqmp-mini-emmc.dts => zynqmp-mini-emmc0.dts} (77%)
create mode 100644 arch/arm/dts/zynqmp-mini-emmc1.dts
rename configs/{xilinx_zynqmp_mini_emmc_defconfig =>
xilinx_zynqmp_mini_emmc0_defconfig} (94%)
create mode 100644 configs/xilinx_zynqmp_mini_emmc1_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9e29fe6..6367b2d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -147,7 +147,9 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zturn.dtb \
zynq-zybo.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += \
- zynqmp-mini-emmc.dtb\
+ zynqmp-mini-emmc0.dtb \
+ zynqmp-mini-emmc1.dtb \
+ zynqmp-mini-nand.dtb\
zynqmp-mini-nand.dtb\
zynqmp-zcu100-revC.dtb \
zynqmp-zcu102-revA.dtb \
diff --git a/arch/arm/dts/zynqmp-mini-emmc.dts
b/arch/arm/dts/zynqmp-mini-emmc0.dts
similarity index 77%
rename from arch/arm/dts/zynqmp-mini-emmc.dts
rename to arch/arm/dts/zynqmp-mini-emmc0.dts
index e5b3c5f..24dd1ab 100644
--- a/arch/arm/dts/zynqmp-mini-emmc.dts
+++ b/arch/arm/dts/zynqmp-mini-emmc0.dts
@@ -18,7 +18,6 @@
aliases {
serial0 =
mmc0 =
- mmc1 =
};
chosen {
@@ -36,6 +35,12 @@
u-boot,dm-pre-reloc;
};
+ clk_xin: clk_xin {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2>;
+ };
+
amba: amba {
compatible = "simple-bus";
#address-cells = <2>;
@@ -50,15 +55,6 @@
clock-names = "clk_xin", "clk_ahb";
xlnx,device_id = <0>;
};
-
- sdhci1: sdhci@ff17 {
- u-boot,dm-pre-reloc;
- compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
- status = "disabled";
- reg = <0x0 0xff17 0x0 0x1000>;
- clock-names = "clk_xin", "clk_ahb";
- xlnx,device_id = <1>;
- };
};
};
@@ -69,7 +65,3 @@
{
status = "okay";
};
-
- {
- status = "okay";
-};
diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts
b/arch/arm/dts/zynqmp-mini-emmc1.dts
new file mode 100644
index 000..d1549b6
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-emmc1.dts
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Xilinx ZynqMP Mini Configuration
+ *
+ * (C) Copyright 2018, Xilinx, Inc.
+ *
+ * Siva Durga Prasad
+ */
+
+/dts-v1/;
+
+/ {
+ model = "ZynqMP MINI EMMC";
+ compatible = "xlnx,zynqmp";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 =
+ mmc0 =
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x2000>;
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "disabled";
+ u-boot,dm-pre-reloc;
+ };
+
+ clk_xin: clk_xin {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2>;
+ };
+
+ amba: amba {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ sdhci1: sdhci@ff17 {
+ u-boot,dm-pre-reloc;
+ compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
+ status = "disabled";
+ reg = <0x0 0xff17 0x0 0x1000>;
+ clock-names = "clk_xin", "clk_xin";
+ xlnx,device_id = <1>;
+ };
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
diff --git a/configs/xilinx_zynqmp_mini_emmc_defconfig
b/configs/xilinx_zynqmp_mini_emmc0_defconfig
similarity index 94%
rename from
