Re: [U-Boot] [PATCH] armv8: fsl-layerscape: Fix "cpu status" command

2016-10-08 Thread york sun
On 09/13/2016 12:40 PM, york sun wrote: > The core position is not continuous for some SoCs. For example, > valid cores may present at position 0, 1, 4, 5, 8, 9, etc. Some > registers (including boot release register) only count existing > cores. Current implementation of cpu_mask() complies with

[U-Boot] [PATCH] armv8: fsl-layerscape: Fix "cpu status" command

2016-09-13 Thread York Sun
The core position is not continuous for some SoCs. For example, valid cores may present at position 0, 1, 4, 5, 8, 9, etc. Some registers (including boot release register) only count existing cores. Current implementation of cpu_mask() complies with the continuous numbering. However, command "cpu