Re: [U-Boot] [PATCH] armv8: fsl-lsch3: enable snoopable sata read and write

2017-01-19 Thread york sun
On 12/01/2016 01:20 AM, yuantian.t...@nxp.com wrote: > From: Tang Yuantian > > By default the SATA IP on the ls208Xa SoCs does not generating > coherent/snoopable transactions. This patch enable it in the > sata axicc register. > > Signed-off-by: Tang Yuantian > --- Applied to fsl-qoriq master,

Re: [U-Boot] [PATCH] armv8: fsl-lsch3: enable snoopable sata read and write

2017-01-05 Thread york sun
On 01/04/2017 08:47 PM, Y.T. Tang wrote: > Hi York, > > For chasis2 platforms, like ls1043a and ls1046a, similar patch has been > merged already. > Ah! I see them in a wider range. You have them under #elif defined(CONFIG_FSL_LSCH2). It isn't visible in this patch. York

Re: [U-Boot] [PATCH] armv8: fsl-lsch3: enable snoopable sata read and write

2017-01-04 Thread Y.T. Tang
Hi York, For chasis2 platforms, like ls1043a and ls1046a, similar patch has been merged already. Patch information: commit 4de6ce1594fcff6fa9e626d094fa922f4889e167 Author: Tang Yuantian Date: Mon Aug 8 15:07:20 2016 armv8: fsl-lsch2: enable snoopable sata read and write By defa

Re: [U-Boot] [PATCH] armv8: fsl-lsch3: enable snoopable sata read and write

2017-01-04 Thread york sun
On 12/01/2016 01:20 AM, yuantian.t...@nxp.com wrote: > From: Tang Yuantian > > By default the SATA IP on the ls208Xa SoCs does not generating > coherent/snoopable transactions. This patch enable it in the > sata axicc register. How about ls1043a, ls1046a? You didn't check SVR. York ___

[U-Boot] [PATCH] armv8: fsl-lsch3: enable snoopable sata read and write

2016-12-01 Thread yuantian.tang
From: Tang Yuantian By default the SATA IP on the ls208Xa SoCs does not generating coherent/snoopable transactions. This patch enable it in the sata axicc register. Signed-off-by: Tang Yuantian --- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/a