Re: [U-Boot] [PATCH] armv8: layerscape: refine port register configuration

On 12/04/2017 05:39 PM, Andy Tang wrote: > Hi York, > > This patch is to adjust the OOB (out of bound) timing of sata port. It is > totally hardware timing. > I was asked to update those timing by hardware/validation team. They > calculated those values from clock frequency. You can apply it

Re: [U-Boot] [PATCH] armv8: layerscape: refine port register configuration

Hi York, This patch is to adjust the OOB (out of bound) timing of sata port. It is totally hardware timing. I was asked to update those timing by hardware/validation team. They calculated those values from clock frequency. You can apply it safely. Please apply this patch with SATA added.

Re: [U-Boot] [PATCH] armv8: layerscape: refine port register configuration

On 12/04/2017 01:31 AM, Yuantian Tang wrote: > These PP2C and PP3C registers control the configuration of the PHY > control OOB timing for the COMINIT/COMWAKE parameters respectively > for sata port. Overwrite default values with calculated ones to get > better OOB timing. > > Signed-off-by: Tang

[U-Boot] [PATCH] armv8: layerscape: refine port register configuration

These PP2C and PP3C registers control the configuration of the PHY control OOB timing for the COMINIT/COMWAKE parameters respectively for sata port. Overwrite default values with calculated ones to get better OOB timing. Signed-off-by: Tang Yuantian ---