Fix some style violations in the gdsys MPC8308 board files, and make the
code more readable.

Signed-off-by: Mario Six <mario....@gdsys.cc>
---
 board/gdsys/mpc8308/hrcon.c   | 55 ++++++++++++++++++-----------------
 board/gdsys/mpc8308/mpc8308.c | 12 ++++----
 board/gdsys/mpc8308/strider.c | 49 ++++++++++++++++---------------
 3 files changed, 59 insertions(+), 57 deletions(-)

diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index 2d709dee945..79e3b25de8c 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -35,11 +35,11 @@
 #define MAX_MUX_CHANNELS 2
 
 enum {
-       MCFPGA_DONE = 1 << 0,
-       MCFPGA_INIT_N = 1 << 1,
-       MCFPGA_PROGRAM_N = 1 << 2,
-       MCFPGA_UPDATE_ENABLE_N = 1 << 3,
-       MCFPGA_RESET_N = 1 << 4,
+       MCFPGA_DONE = BIT(0),
+       MCFPGA_INIT_N = BIT(1),
+       MCFPGA_PROGRAM_N = BIT(2),
+       MCFPGA_UPDATE_ENABLE_N = BIT(3),
+       MCFPGA_RESET_N = BIT(4),
 };
 
 enum {
@@ -47,7 +47,7 @@ enum {
        GPIO_MDIO = 1 << 15,
 };
 
-unsigned int mclink_fpgacount;
+uint mclink_fpgacount;
 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
 
 struct {
@@ -107,7 +107,7 @@ int checkboard(void)
 
        printf("HRCon %s", hw_type_cat ? "CAT" : "Fiber");
 
-       if (s != NULL) {
+       if (s) {
                puts(", serial# ");
                puts(s);
        }
@@ -120,12 +120,11 @@ int checkboard(void)
 int last_stage_init(void)
 {
        int slaves;
-       unsigned int k;
-       unsigned int mux_ch;
-       unsigned char mclink_controllers[] = { 0x3c, 0x3d, 0x3e };
+       uint k;
+       uchar mclink_controllers[] = { 0x3c, 0x3d, 0x3e };
        u16 fpga_features;
        bool hw_type_cat = pca9698_get_value(0x20, 20);
-       bool ch0_rgmii2_present = false;
+       bool ch0_rgmii2_present;
 
        FPGA_GET_REG(0, fpga_features, &fpga_features);
 
@@ -137,16 +136,16 @@ int last_stage_init(void)
 
        /* wait for FPGA done, then reset FPGA */
        for (k = 0; k < ARRAY_SIZE(mclink_controllers); ++k) {
-               unsigned int ctr = 0;
+               uint ctr = 0;
 
                if (i2c_probe(mclink_controllers[k]))
                        continue;
 
                while (!(pca953x_get_val(mclink_controllers[k])
                       & MCFPGA_DONE)) {
-                       udelay(100000);
+                       mdelay(100);
                        if (ctr++ > 5) {
-                               printf("no done for mclink_controller %d\n", k);
+                               printf("no done for mclink_controller %u\n", k);
                                break;
                        }
                }
@@ -159,8 +158,10 @@ int last_stage_init(void)
        }
 
        if (hw_type_cat) {
+               uint mux_ch;
                int retval;
                struct mii_dev *mdiodev = mdio_alloc();
+
                if (!mdiodev)
                        return -ENOMEM;
                strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
@@ -179,7 +180,7 @@ int last_stage_init(void)
        }
 
        /* give slave-PLLs and Parade DP501 some time to be up and running */
-       udelay(500000);
+       mdelay(500);
 
        mclink_fpgacount = CONFIG_SYS_MCLINK_MAX;
        slaves = mclink_probe();
@@ -207,6 +208,7 @@ int last_stage_init(void)
                if (hw_type_cat) {
                        int retval;
                        struct mii_dev *mdiodev = mdio_alloc();
+
                        if (!mdiodev)
                                return -ENOMEM;
                        strncpy(mdiodev->name, bb_miiphy_buses[k].name,
@@ -233,17 +235,17 @@ int last_stage_init(void)
  * provide access to fpga gpios and controls (for I2C bitbang)
  * (these may look all too simple but make iocon.h much more readable)
  */
-void fpga_gpio_set(unsigned int bus, int pin)
+void fpga_gpio_set(uint bus, int pin)
 {
        FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.set, pin);
 }
 
-void fpga_gpio_clear(unsigned int bus, int pin)
+void fpga_gpio_clear(uint bus, int pin)
 {
        FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.clear, pin);
 }
 
-int fpga_gpio_get(unsigned int bus, int pin)
+int fpga_gpio_get(uint bus, int pin)
 {
        u16 val;
 
@@ -252,7 +254,7 @@ int fpga_gpio_get(unsigned int bus, int pin)
        return val & pin;
 }
 
-void fpga_control_set(unsigned int bus, int pin)
+void fpga_control_set(uint bus, int pin)
 {
        u16 val;
 
@@ -260,7 +262,7 @@ void fpga_control_set(unsigned int bus, int pin)
        FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, control, val | pin);
 }
 
-void fpga_control_clear(unsigned int bus, int pin)
+void fpga_control_clear(uint bus, int pin)
 {
        u16 val;
 
@@ -273,7 +275,7 @@ void mpc8308_init(void)
        pca9698_direction_output(0x20, 4, 1);
 }
 
-void mpc8308_set_fpga_reset(unsigned state)
+void mpc8308_set_fpga_reset(uint state)
 {
        pca9698_set_value(0x20, 4, state ? 0 : 1);
 }
@@ -285,11 +287,11 @@ void mpc8308_setup_hw(void)
        /*
         * set "startup-finished"-gpios
         */
-       setbits_be32(&immr->gpio[0].dir, (1 << (31-11)) | (1 << (31-12)));
-       setbits_be32(&immr->gpio[0].dat, 1 << (31-12));
+       setbits_be32(&immr->gpio[0].dir, (BIT(31 - 11) | BIT(31 - 12)));
+       setbits_be32(&immr->gpio[0].dat, BIT(31 - 12));
 }
 
-int mpc8308_get_fpga_done(unsigned fpga)
+int mpc8308_get_fpga_done(uint fpga)
 {
        return pca9698_get_value(0x20, 19);
 }
@@ -367,7 +369,7 @@ int ft_board_setup(void *blob, bd_t *bd)
  */
 
 struct fpga_mii {
-       unsigned fpga;
+       uint fpga;
        int mdio;
 } fpga_mii[] = {
        { 0, 1},
@@ -494,5 +496,4 @@ struct bb_miiphy_bus bb_miiphy_buses[] = {
        },
 };
 
-int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
-                         sizeof(bb_miiphy_buses[0]);
+int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses);
diff --git a/board/gdsys/mpc8308/mpc8308.c b/board/gdsys/mpc8308/mpc8308.c
index 0112244fc79..9fe1d66c605 100644
--- a/board/gdsys/mpc8308/mpc8308.c
+++ b/board/gdsys/mpc8308/mpc8308.c
@@ -24,14 +24,14 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int get_fpga_state(unsigned dev)
+int get_fpga_state(uint dev)
 {
        return gd->arch.fpga_state[dev];
 }
 
 int board_early_init_f(void)
 {
-       unsigned k;
+       uint k;
 
        for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
                gd->arch.fpga_state[k] = 0;
@@ -41,8 +41,8 @@ int board_early_init_f(void)
 
 int board_early_init_r(void)
 {
-       unsigned k;
-       unsigned ctr;
+       uint k;
+       uint ctr;
 
        for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k)
                gd->arch.fpga_state[k] = 0;
@@ -59,7 +59,7 @@ int board_early_init_r(void)
        for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
                ctr = 0;
                while (!mpc8308_get_fpga_done(k)) {
-                       udelay(100000);
+                       mdelay(100);
                        if (ctr++ > 5) {
                                gd->arch.fpga_state[k] |=
                                        FPGA_STATE_DONE_FAILED;
@@ -86,7 +86,7 @@ int board_early_init_r(void)
                        if (val == REFLECTION_TESTPATTERN_INV)
                                break;
 
-                       udelay(100000);
+                       mdelay(100);
                        if (ctr++ > 5) {
                                gd->arch.fpga_state[k] |=
                                        FPGA_STATE_REFLECTION_FAILED;
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index fa26585296a..b1997f453ae 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -50,7 +50,7 @@ enum {
        GPIO_MDIO = 1 << 15,
 };
 
-unsigned int mclink_fpgacount;
+uint mclink_fpgacount;
 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
 
 struct {
@@ -110,7 +110,7 @@ int checkboard(void)
 
        printf("Strider %s", hw_type_cat ? "CAT" : "Fiber");
 
-       if (s != NULL) {
+       if (s) {
                puts(", serial# ");
                puts(s);
        }
@@ -123,17 +123,17 @@ int checkboard(void)
 int last_stage_init(void)
 {
        int slaves;
-       unsigned int k;
-       unsigned int mux_ch;
-       unsigned char mclink_controllers_dvi[] = { 0x3c, 0x3d, 0x3e };
+       uint k;
+       uint mux_ch;
+       uchar mclink_controllers_dvi[] = { 0x3c, 0x3d, 0x3e };
 #ifdef CONFIG_STRIDER_CPU
-       unsigned char mclink_controllers_dp[] = { 0x24, 0x25, 0x26 };
+       uchar mclink_controllers_dp[] = { 0x24, 0x25, 0x26 };
 #endif
        bool hw_type_cat = pca9698_get_value(0x20, 18);
 #ifdef CONFIG_STRIDER_CON_DP
        bool is_dh = pca9698_get_value(0x20, 25);
 #endif
-       bool ch0_sgmii2_present = false;
+       bool ch0_sgmii2_present;
 
        /* Turn on Analog Devices ADV7611 */
        pca9698_direction_output(0x20, 8, 0);
@@ -146,8 +146,8 @@ int last_stage_init(void)
 
        /* wait for FPGA done, then reset FPGA */
        for (k = 0; k < ARRAY_SIZE(mclink_controllers_dvi); ++k) {
-               unsigned int ctr = 0;
-               unsigned char *mclink_controllers = mclink_controllers_dvi;
+               uint ctr = 0;
+               uchar *mclink_controllers = mclink_controllers_dvi;
 
 #ifdef CONFIG_STRIDER_CPU
                if (i2c_probe(mclink_controllers[k])) {
@@ -161,7 +161,7 @@ int last_stage_init(void)
 #endif
                while (!(pca953x_get_val(mclink_controllers[k])
                       & MCFPGA_DONE)) {
-                       udelay(100000);
+                       mdelay(100);
                        if (ctr++ > 5) {
                                printf("no done for mclink_controller %d\n", k);
                                break;
@@ -178,6 +178,7 @@ int last_stage_init(void)
        if (hw_type_cat) {
                int retval;
                struct mii_dev *mdiodev = mdio_alloc();
+
                if (!mdiodev)
                        return -ENOMEM;
                strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
@@ -196,7 +197,7 @@ int last_stage_init(void)
        }
 
        /* give slave-PLLs and Parade DP501 some time to be up and running */
-       udelay(500000);
+       mdelay(500);
 
        mclink_fpgacount = CONFIG_SYS_MCLINK_MAX;
        slaves = mclink_probe();
@@ -235,7 +236,7 @@ int last_stage_init(void)
        for (k = 1; k <= slaves; ++k)
                FPGA_SET_REG(k, extended_control, 0x10); /* enable video */
 
-       udelay(500000);
+       mdelay(500);
 #endif
 
        for (k = 1; k <= slaves; ++k) {
@@ -260,6 +261,7 @@ int last_stage_init(void)
                if (hw_type_cat) {
                        int retval;
                        struct mii_dev *mdiodev = mdio_alloc();
+
                        if (!mdiodev)
                                return -ENOMEM;
                        strncpy(mdiodev->name, bb_miiphy_buses[k].name,
@@ -286,17 +288,17 @@ int last_stage_init(void)
  * provide access to fpga gpios (for I2C bitbang)
  * (these may look all too simple but make iocon.h much more readable)
  */
-void fpga_gpio_set(unsigned int bus, int pin)
+void fpga_gpio_set(uint bus, int pin)
 {
        FPGA_SET_REG(bus, gpio.set, pin);
 }
 
-void fpga_gpio_clear(unsigned int bus, int pin)
+void fpga_gpio_clear(uint bus, int pin)
 {
        FPGA_SET_REG(bus, gpio.clear, pin);
 }
 
-int fpga_gpio_get(unsigned int bus, int pin)
+int fpga_gpio_get(uint bus, int pin)
 {
        u16 val;
 
@@ -306,7 +308,7 @@ int fpga_gpio_get(unsigned int bus, int pin)
 }
 
 #ifdef CONFIG_STRIDER_CON_DP
-void fpga_control_set(unsigned int bus, int pin)
+void fpga_control_set(uint bus, int pin)
 {
        u16 val;
 
@@ -314,7 +316,7 @@ void fpga_control_set(unsigned int bus, int pin)
        FPGA_SET_REG(bus, control, val | pin);
 }
 
-void fpga_control_clear(unsigned int bus, int pin)
+void fpga_control_clear(uint bus, int pin)
 {
        u16 val;
 
@@ -328,7 +330,7 @@ void mpc8308_init(void)
        pca9698_direction_output(0x20, 26, 1);
 }
 
-void mpc8308_set_fpga_reset(unsigned state)
+void mpc8308_set_fpga_reset(uint state)
 {
        pca9698_set_value(0x20, 26, state ? 0 : 1);
 }
@@ -340,11 +342,11 @@ void mpc8308_setup_hw(void)
        /*
         * set "startup-finished"-gpios
         */
-       setbits_be32(&immr->gpio[0].dir, (1 << (31-11)) | (1 << (31-12)));
-       setbits_be32(&immr->gpio[0].dat, 1 << (31-12));
+       setbits_be32(&immr->gpio[0].dir, BIT(31 - 11) | BIT(31 - 12));
+       setbits_be32(&immr->gpio[0].dat, BIT(31 - 12));
 }
 
-int mpc8308_get_fpga_done(unsigned fpga)
+int mpc8308_get_fpga_done(uint fpga)
 {
        return pca9698_get_value(0x20, 20);
 }
@@ -422,7 +424,7 @@ int ft_board_setup(void *blob, bd_t *bd)
  */
 
 struct fpga_mii {
-       unsigned fpga;
+       uint fpga;
        int mdio;
 } fpga_mii[] = {
        { 0, 1},
@@ -549,5 +551,4 @@ struct bb_miiphy_bus bb_miiphy_buses[] = {
        },
 };
 
-int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
-                         sizeof(bb_miiphy_buses[0]);
+int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses);
-- 
2.20.1

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